     8     (            C  t                                                                      ,hinlink,h66k rockchip,rk3568             7HINLINK H66K       aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe310000            /mmc@fe2b0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                       psci                       (   @        :           G           T   @        f           s                                    
      cpu@100          cpu          ,arm,cortex-a55                                      psci                       (   @        :           G           T   @        f           s                                          cpu@200          cpu          ,arm,cortex-a55                                      psci                       (   @        :           G           T   @        f           s                                          cpu@300          cpu          ,arm,cortex-a55                                      psci                       (   @        :           G           T   @        f           s                                             l3-cache             ,cache                                          *   @        <                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            ˂                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI             i2s                    3okay       simple-audio-card,codec         :         simple-audio-card,cpu           :   	         pmu          ,arm,cortex-a55-pmu        0  D                                                O   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   b   shmem@10f000             ,arm,scmi-shmem                                 i                    timer            ,arm,armv8-timer       0  D                                 
            p      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          D       _                       	  sata-phy                                   	  3disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          D       `                       	  sata-phy                                   	  3disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          D                                             ref_clk suspend_clk bus_clk         otg       
  utmi_wide                                              	  3disabled                             usb2-phy usb3-phy         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          D                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                                3okay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 D      	            .        C           T    A          ^  (            i         b                                  x              msi-controller@fd440000          ,arm,gic-v3-its               D                  x         i                      Y         usb@fd800000             ,generic-ehci                                  D                                                        usb         3okay          usb@fd840000             ,generic-ohci                                  D                                                        usb         3okay          usb@fd880000             ,generic-ehci                                  D                                                        usb         3okay          usb@fd8c0000             ,generic-ohci                                  D                                                        usb         3okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     W   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           3okay                                                                                                                syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                               clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                                                          .   G          C              Z                    i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               D       .                        -      	  i2c pclk                        default                                   3okay       regulator@1c             ,tcs,tcs4525                     g           vdd_cpu                            5          0                     !              regulator-state-mem          	         pmic@20          ,rockchip,rk809                                       "        D              default            #         "         :        H   $        T   $        `   $        l   $        x   $           $           $           $           $   regulators     DCDC_REG1         
  vdd_logic                                                   p          q   regulator-state-mem          	         DCDC_REG2           vdd_gpu                                                 p          q           F   regulator-state-mem          	         DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                               p          q   regulator-state-mem          	         DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem          	         LDO_REG1            vdda0v9_image                                S   regulator-state-mem          	         LDO_REG2          	  vdda_0v9                                           regulator-state-mem          	         LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                            LDO_REG4            vccio_acodec                      2Z         2Z              regulator-state-mem          	         LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem          	         LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem          	         LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                   w@         LDO_REG9            vcca1v8_image            w@         w@           T   regulator-state-mem          	         SWITCH_REG1         vcc_3v3                                 regulator-state-mem          	         SWITCH_REG2         vcc3v3                       regulator-state-mem          	                  serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 D       t                        ,        baudclk apb_pclk               %       %              &        default                             	  3disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               '        default                    3okay          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               (        default                  	  3disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               )        default                  	  3disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               *        default                  	  3disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            &                                           power-domain@7                                           :   +        &          power-domain@8                                           :   ,   -   .        &          power-domain@9              	                                   :   /   0   1        &          power-domain@10             
                             :   2   3   4   5   6   7        &          power-domain@11                                    :   8        &          power-domain@13                                   :   9        &          power-domain@14                                   :   :   ;   <        &          power-domain@15                                     :   =   >   ?   @   A   B   C   D        &                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  D       (          )          '           Ajob mmu gpu                              gpu bus                                   3okay               E        Q   F                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               D                  Avdpu                               
  aclk hclk           ]   G                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        D                  aclk iface                                             d               G      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              D       Z                                      aclk hclk sclk               &     $     %        qcore axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  D       @                              
  aclk hclk           ]   H              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        D       ?                                aclk iface                
        d               H      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         D       d                                           biu ciu ciu-drive ciu-sample            }           р                      qreset         	  3disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 D                             Amacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  qstmmaceth           Z              I                    J           K               	  3disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                      I      rx-queues-config                          J   queue0           tx-queues-config            &              K   queue0              vop@fe040000                          0     @                <vop gamma-lut           D                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            ]   L              	        Z           3okay             ,rockchip,rk3568-vop                             C               ports                                           port@0                                            endpoint@2                      F   M           U         port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                D                                       aclk iface          d                  	        3okay               L      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       D           pclk                           dphy               N              	        qapb                      Z         	  3disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       E           pclk                           dphy               O              	        qapb                      Z         	  3disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 D       -         (                          (              iahb isfr cec ref           default            P   Q   R              	                   Z           V            3okay            g   S        w   T              ports                                port@0                  endpoint            F   U           M         port@1                 endpoint            F   V                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   +      qos@fe138080             ,rockchip,rk3568-qos syscon                                  :      qos@fe138100             ,rockchip,rk3568-qos syscon                                   ;      qos@fe138180             ,rockchip,rk3568-qos syscon                                  <      qos@fe148000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe148080             ,rockchip,rk3568-qos syscon                                  -      qos@fe148100             ,rockchip,rk3568-qos syscon                                   .      qos@fe150000             ,rockchip,rk3568-qos syscon                                    8      qos@fe158000             ,rockchip,rk3568-qos syscon                                   2      qos@fe158100             ,rockchip,rk3568-qos syscon                                   3      qos@fe158180             ,rockchip,rk3568-qos syscon                                  4      qos@fe158200             ,rockchip,rk3568-qos syscon                                   5      qos@fe158280             ,rockchip,rk3568-qos syscon                                  6      qos@fe158300             ,rockchip,rk3568-qos syscon                                   7      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    =      qos@fe190280             ,rockchip,rk3568-qos syscon                                  A      qos@fe190300             ,rockchip,rk3568-qos syscon                                   B      qos@fe190380             ,rockchip,rk3568-qos syscon                                  C      qos@fe190400             ,rockchip,rk3568-qos syscon                                   D      qos@fe198000             ,rockchip,rk3568-qos syscon                                   9      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   /      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  0      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   1      dfi@fe230000             ,rockchip,rk3568-dfi              #                 D                     W      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               <dbi apb config        <  D       K          J          I          H          G           Asys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         C                                `                    X                      X                     X                     X                                                               Y                                      	  pcie-phy                        T  b                                                    @              @                         qpipe                                     3okay            default            Z           [                  \   legacy-interrupt-controller                      C            .                     D       H              X         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         D       b                                           biu ciu ciu-drive ciu-sample            }           р                      qreset           3okay            +            5        F   "               O        default            ]   ^   _   `         Z        g   a        s         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         D       c                                           biu ciu ciu-drive ciu-sample            }           р                      qreset         	  3disabled          spi@fe300000             ,rockchip,sfc                 0        @         D       e                  x      v        clk_sfc hclk_sfc               b        default       	  3disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 D                        {      }        . n6       (         |      z      y      {      }        core bus axi block timer            3okay            +                                               default            c   d   e   f        g           s         rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb                  m        3okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 D       4                 =      A        .Fq Fq                ?      C      9        mclk_tx mclk_rx hclk               g            tx                P      Q      
  qtx-m rx-m           Z           V            3okay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 D       5                 E      I        .Fq Fq                G      K      :        mclk_tx mclk_rx hclk               g      g           rx tx                 R      S      
  qtx-m rx-m           Z           default       0     h   i   j   k   l   m   n   o   p   q   r   s        V          	  3disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 D       6                 M        .Fq                O      O      ;        mclk_tx mclk_rx hclk               g      g           tx rx                 T        qtx-m            Z           default            t   u   v   w        V          	  3disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 D       7                  S      W      <        mclk_tx mclk_rx hclk               g      g           tx rx                 U      V      
  qtx-m rx-m           Z           V          	  3disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 D       L                  Z      Y        pdm_clk pdm_hclk               g   	        rx             x   y   z   {   |   }        default               X        qpdm-m           V          	  3disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 D       f         
  mclk hclk                  _      \           g           tx          default            ~        V          	  3disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         D                                                 	  apb_pclk                          %      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         D                                                 	  apb_pclk                          g      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 D       /                 H     G      	  i2c pclk                       default                                 	  3disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 D       0                 J     I      	  i2c pclk                       default                                   3okay          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 D       1                 L     K      	  i2c pclk                       default                                 	  3disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 D       2                 N     M      	  i2c pclk                       default                                 	  3disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 D       3                 P     O      	  i2c pclk                       default                                 	  3disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 D                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 D       g                 R     Q        spiclk apb_pclk            %      %           tx rx           default                                                  	  3disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 D       h                 T     S        spiclk apb_pclk            %      %           tx rx           default                                                  	  3disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 D       i                 V     U        spiclk apb_pclk            %      %           tx rx           default                                                  	  3disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 D       j                 X     W        spiclk apb_pclk            %      %           tx rx           default                                                  	  3disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 D       u                              baudclk apb_pclk               %      %                      default                             	  3disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 D       v                 #              baudclk apb_pclk               %      %                      default                               3okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 D       w                 '     $        baudclk apb_pclk               %      %                      default                             	  3disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 D       x                 +     (        baudclk apb_pclk               %      %   	                   default                             	  3disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 D       y                 /     ,        baudclk apb_pclk               %   
   %                      default                             	  3disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 D       z                 3     0        baudclk apb_pclk               %      %                      default                             	  3disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 D       {                 7     4        baudclk apb_pclk               %      %                      default                             	  3disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 D       |                 ;     8        baudclk apb_pclk               %      %                      default                             	  3disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 D       }                 ?     <        baudclk apb_pclk               %      %                      default                             	  3disabled          thermal-zones      cpu-thermal            d                            trips      cpu_alert0          	 p        	           passive                  cpu_alert1          	 $        	           passive       cpu_crit            	 s        	        	   critical             cooling-maps       map0            	&         0  	+   
                     gpu-thermal                                       trips      gpu-threshold           	 p        	           passive       gpu-target          	 $        	           passive                  gpu-crit            	 s        	        	   critical             cooling-maps       map0            	&           	+                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 D       s                             .f@ 
`                           tsadc apb_pclk                                 Z           	: s        default sleep                      	Q           	[           3okay            	q           	                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 D       ]                              saradc apb_pclk                      qsaradc-apb          	           3okay            	         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  3disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default                  	  3disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  3disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default                  	  3disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  3disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default                  	  3disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  3disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default                  	  3disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  3disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default                  	  3disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  3disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default                  	  3disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe                  "        .                      qphy         	           	           	           3okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe                  %        .                      qphy         	           	           	           3okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            	                         qapb         Z         	  3disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        	                  	        qapb                    	  3disabled               N      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        	                  	        qapb                    	  3disabled               O      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            D                  	                       3okay       host-port           	            3okay            
                    otg-port            	          	  3disabled                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            D                  	                       3okay       host-port           	            3okay            
                    otg-port            	            3okay            
                       pinctrl          ,rockchip,rk3568-pinctrl         Z              W                                  b              gpio@fdd60000            ,rockchip,gpio-bank                                D       !                  .               
        
                       
+            .        C              "      gpio@fe740000            ,rockchip,gpio-bank               t                 D       "                 c     d         
        
                       
+            .        C         gpio@fe750000            ,rockchip,gpio-bank               u                 D       #                 e     f         
        
          @            
+            .        C              [      gpio@fe760000            ,rockchip,gpio-bank               v                 D       $                 g     h         
        
          `            
+            .        C                    gpio@fe770000            ,rockchip,gpio-bank               w                 D       %                 i     j         
        
                      
+            .        C         pcfg-pull-up             
7                 pcfg-pull-none           
D                 pcfg-pull-none-drv-level-1           
D        
Q                    pcfg-pull-none-drv-level-2           
D        
Q                    pcfg-pull-none-drv-level-3           
D        
Q                    pcfg-pull-up-drv-level-1             
7        
Q                    pcfg-pull-up-drv-level-2             
7        
Q                    pcfg-pull-none-smt           
D         
`                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
u                                              can1       can1m0-pins          
u                                             can2       can2m0-pins          
u                                            cif       clk32k     clk32k-out0         
u                                 cpu       ebc       edpdp         emmc       emmc-bus8           
u                                                                                                           c      emmc-clk            
u                       d      emmc-cmd            
u                       e      emmc-datastrobe         
u                       f         eth0          eth1          flash         fspi       fspi-pins         `  
u                                                                                   b         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
u                       R      hdmitx-scl          
u                       P      hdmitx-sda          
u                       Q         i2c0       i2c0-xfer            
u       	             
                           i2c1       i2c1-xfer            
u                                              i2c2       i2c2m1-xfer          
u                                            i2c3       i2c3m0-xfer          
u                                             i2c4       i2c4m0-xfer          
u                  
                          i2c5       i2c5m0-xfer          
u                                            i2s1       i2s1m0-lrckrx           
u                       k      i2s1m0-lrcktx           
u                       j      i2s1m0-sclkrx           
u                       i      i2s1m0-sclktx           
u                       h      i2s1m0-sdi0         
u                       l      i2s1m0-sdi1         
u      
                 m      i2s1m0-sdi2         
u      	                 n      i2s1m0-sdi3         
u                       o      i2s1m0-sdo0         
u                       p      i2s1m0-sdo1         
u                       q      i2s1m0-sdo2         
u      	                 r      i2s1m0-sdo3         
u      
                 s         i2s2       i2s2m0-lrcktx           
u                       u      i2s2m0-sclktx           
u                       t      i2s2m0-sdi          
u                       v      i2s2m0-sdo          
u                       w         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
u                       x      pdmm0-clk1          
u                       y      pdmm0-sdi0          
u                       z      pdmm0-sdi1          
u      
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u      	                 |      pdmm0-sdi3          
u                       }         pmic       pmic-int            
u                         #         pmu       pwm0       pwm0m0-pins         
u                        '         pwm1       pwm1m0-pins         
u                        (         pwm2       pwm2m0-pins         
u                        )         pwm3       pwm3-pins           
u                        *         pwm4       pwm4-pins           
u                                 pwm5       pwm5-pins           
u                                 pwm6       pwm6-pins           
u                                 pwm7       pwm7-pins           
u                                 pwm8       pwm8m0-pins         
u      	                          pwm9       pwm9m0-pins         
u      
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u                                pwm11      pwm11m0-pins            
u                                pwm12      pwm12m0-pins            
u                                pwm13      pwm13m0-pins            
u                                pwm14      pwm14m0-pins            
u                                pwm15      pwm15m0-pins            
u                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
u                                                            ]      sdmmc0-clk          
u                       ^      sdmmc0-cmd          
u                       _      sdmmc0-det          
u                        `         sdmmc1        sdmmc2        spdif      spdifm0-tx          
u                       ~         spi0       spi0m0-pins       0  
u                                                        spi0m0-cs0          
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u                                                     spi1m0-cs0          
u                             spi1m0-cs1          
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u                                                     spi2m0-cs0          
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u                              
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u                                tsadc      tsadc-shutorg           
u                              tsadc-pin           
u                                  uart0      uart0-xfer           
u                                     &         uart1      uart1m0-xfer             
u                                            uart2      uart2m0-xfer             
u                                              uart3      uart3m0-xfer             
u                                             uart4      uart4m0-xfer             
u                                            uart5      uart5m0-xfer             
u                                            uart6      uart6m0-xfer             
u                                            uart7      uart7m0-xfer             
u                                            uart8      uart8m0-xfer             
u                                            uart9      uart9m0-xfer             
u                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       keys       factory         
u                                   leds       green-led           
u                              red-led         
u                              work-led            
u                                 ir     pwm3-ir-m0          
u                                  mmc    sd-pwren            
u                                  pcie       lan-power-en            
u                               lan-reseta          
u                              lan-resetb          
u                              wifi-perstn         
u                        Z         usb    usb-power-en            
u                                     opp-table-0          ,operating-points-v2          
              opp-408000000           
    Q         
 P P 0        
  @      opp-600000000           
    #F         
 P P 0        
  @      opp-816000000           
    0,         
 P P 0        
  @         
      opp-1104000000          
    Aʹ         
   0        
  @      opp-1416000000          
    Tfr         
   0        
  @      opp-1608000000          
    _"         
   0        
  @      opp-1800000000          
    kI         
 0 0 0        
  @      opp-1992000000          
    v         
 0 0 0        
  @         opp-table-1          ,operating-points-v2            E   opp-200000000           
             
 P P B@      opp-300000000           
             
 P P B@      opp-400000000           
    ׄ         
 P P B@      opp-600000000           
    #F         
   B@      opp-700000000           
    )'         
 ~ ~ B@      opp-800000000           
    /         
 B@ B@ B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                            sata pmalive rxoob          D       ^                       	  sata-phy                                     3okay          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        qos@fe190080             ,rockchip,rk3568-qos syscon                                   >      qos@fe190100             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190200             ,rockchip,rk3568-qos syscon                                   @      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                 	                   &      '     w        refclk_m refclk_n pclk                       qphy         
           3okay            
                       pcie@fe270000            ,rockchip,rk3568-pcie                                                 (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  D                                                          Asys pmc msg legacy err          C                                `                                                                                                                                                 Y                                  	  pcie-phy                        0      @       @      '                             T  b                                                    @      @       @           <dbi apb config                        qpipe            3okay            default                                         \   legacy-interrupt-controller          .                     C                        D                              pcie@fe280000            ,rockchip,rk3568-pcie                                            /      (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  D                                                          Asys pmc msg legacy err          C                                `                                                                                                                                                  Y                                   	  pcie-phy                        0             @      (                             T  b                                                    @             @           <dbi apb config                        qpipe            3okay            default                       [                  \   legacy-interrupt-controller          .                     C                        D                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                 D                            Amacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  qstmmaceth           Z                                                            	  3disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                            rx-queues-config                             queue0           tx-queues-config            &                 queue0              can@fe570000             ,rockchip,rk3568v2-canfd              W                 D                        A     @      
  baud pclk                U     T      	  qcore apb            default                  	  3disabled          can@fe580000             ,rockchip,rk3568v2-canfd              X                 D                        C     B      
  baud pclk                W     V      	  qcore apb            default                  	  3disabled          can@fe590000             ,rockchip,rk3568v2-canfd              Y                 D                        E     D      
  baud pclk                Y     X      	  qcore apb            default                  	  3disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                            |              ref apb pipe                          .                      qphy         	           	           	           3okay                     chosen          
serial2:1500000n8         hdmi-con             ,hdmi-connector           a      port       endpoint            F              V            ir-receiver          ,gpio-ir-receiver               "              default                  keys          
   ,gpio-keys           default               button-factory          
factory         
             "               
   2         leds          
   ,gpio-leds           default                     led-0                      wan                           netdev        led-1                      disk                            led-2                      status                            default-on           regulator-0v9-vcc-2g5            ,regulator-fixed         vcc0v9_2g5                                                 !      regulator-12v-vcc-dcinp          ,regulator-fixed         vcc12v_dcinp                                                           regulator-3v3-vcc-pi6c-05            ,regulator-fixed          0           "               default                    vcc3v3_pi6c_05           2Z         2Z           !           \      regulator-3v3-vcc-sd             ,regulator-fixed          0           "               default                  
  vcc3v3_sd            2Z         2Z           $           a      regulator-3v3-vcc-sys            ,regulator-fixed         vcc3v3_sys                             2Z         2Z           !           $      regulator-5v0-vcc-sys            ,regulator-fixed         vcc5v0_sys                             LK@         LK@                      !      regulator-5v0-vcc-usb30-otg0             ,regulator-fixed          0           "               default                    vcc5v0_usb30_otg0            LK@         LK@           !                    	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes reset-gpios vpcie3v3-supply bus-width cap-sd-highspeed cd-gpios disable-wp sd-uhs-sdr50 vmmc-supply vqmmc-supply cap-mmc-highspeed mmc-hs200-1_8v non-removable dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf data-lanes stdout-path label linux,code debounce-interval color function linux,default-trigger enable-active-high 