Ðþí  *Ç   8  '|   (            K  'D                             9    renesas,rzt2h-evk renesas,r9a09g077m44 renesas,r9a09g077                                  /   &Renesas RZ/T2H EVK Board based on r9a09g077m44     cpus                                cpu@0             arm,cortex-a55           ,             0cpu          <            Mpsci          cpu@100           arm,cortex-a55           ,            0cpu          <            Mpsci          cpu@200           arm,cortex-a55           ,            0cpu          <            Mpsci          cpu@300           arm,cortex-a55           ,            0cpu          <            Mpsci          cache-controller-0            cache             [         i            t            €            extal             fixed-clock          ˆ             •}x@         €         psci              arm,psci-1.0 arm,psci-0.2            Tsmc       soc           simple-bus           ¥                                     ¶   serial@80005000           renesas,r9a09g077-rsci           ,    € P              0   ½      N         O         P         Q            Èeri rxi txi tei          Ø                            ßoperation bus            ë            ùokay                        
default       serial@80005400           renesas,r9a09g077-rsci           ,    € T              0   ½      R         S         T         U            Èeri rxi txi tei          Ø         	                   ßoperation bus            ë         	   ùdisabled          serial@80005800           renesas,r9a09g077-rsci           ,    € X              0   ½      V         W         X         Y            Èeri rxi txi tei          Ø         
                   ßoperation bus            ë         	   ùdisabled          serial@80005c00           renesas,r9a09g077-rsci           ,    € \              0   ½      Z         [         \         ]            Èeri rxi txi tei          Ø                            ßoperation bus            ë         	   ùdisabled          serial@80006000           renesas,r9a09g077-rsci           ,    € `              0   ½      ^         _         `         a            Èeri rxi txi tei          Ø                            ßoperation bus            ë         	   ùdisabled          serial@81005000           renesas,r9a09g077-rsci           ,     P              0   ½      b         c         d         e            Èeri rxi txi tei          Ø        X                   ßoperation bus            ë         	   ùdisabled          watchdog@80082000             renesas,r9a09g077-wdt             ,    €             )Q                 Ø                   ßpclk             ë         	   ùdisabled          watchdog@80082400             renesas,r9a09g077-wdt             ,    €$            )Q                Ø                   ßpclk             ë         	   ùdisabled          watchdog@80082800             renesas,r9a09g077-wdt             ,    €(            )Q                Ø                   ßpclk             ë            ùokay               <      watchdog@80082c00             renesas,r9a09g077-wdt             ,    €,            )Q                Ø                   ßpclk             ë         	   ùdisabled          watchdog@80083000             renesas,r9a09g077-wdt             ,    €0            )Q                Ø                   ßpclk             ë         	   ùdisabled          watchdog@80083400             renesas,r9a09g077-wdt             ,    €4            )Q                Ø                   ßpclk             ë         	   ùdisabled          i2c@80088000              renesas,riic-r9a09g077           ,    €€              0   ½      f         g         h         i            Èeei rxi txi tei          Ø         d         ë                                     ùokay                        
default          • €   eeprom@50             renesas,r1ex24016 atmel,24c16            ,   P        $            i2c@80088400              renesas,riic-r9a09g077           ,    €„              0   ½      j         k         l         m            Èeei rxi txi tei          Ø         e         ë                                     ùokay                        
default          • €      i2c@81008000              renesas,riic-r9a09g077           ,     €              0   ½      n         o         p         q            Èeei rxi txi tei          Ø        Y         ë                                  	   ùdisabled          clock-controller@80280000             renesas,r9a09g077-cpg-mssr            ,    €(             (                  Ø            ßextal            ˆ           -           :             €         pinctrl@802c0000              renesas,r9a09g077-pinctrl         0   ,    €,             ,             €+                 Nnsr srs srn          Ø                   X        h           t                       ë            €      sci0-pins           €  Ü  Ý         €         sdhi0-emmc-iovs-hog          ‡                        –      	  ¢SD0_IOVS          sd0-emmc-group           €      data-pins            € ) b ) c ) d ) e ) f ) g ) h ) i      ctrl-pins           € ) ` ) a ) j         sd0-sd-group       data-pins           € ) b ) c ) d ) e      ctrl-pins           € ) ` ) a ) µ ) ¶         sdhi1-pwen-hog           ‡           E             –      	  ¢SD1_PWEN          sd1-group            €      data-pins           € ) ‡ ) ˆ ) ‰ ) Š      ctrl-pins           € ) … ) † ) Œ         i2c0-pins           €  »  ¼         €         i2c1-pins           €  (  '         €         usb-pins            €              €            interrupt-controller@83000000             arm,gic-v3            ,    ƒ              ƒ                 ¬                         ½         ½      	            €         usb@92040000              generic-ohci             ,    ’                  ½      J            Ø        ˜        Ò   	           ×usb          ë            ùokay            áotg          €   
      usb@92040100              generic-ehci             ,    ’                 ½      J            Ø        ˜        Ò   	           ×usb         é   
         ë            ùokay            áotg       usb-phy@92040200              renesas,usb2-phy-r9a09g077           ,    ’                 ½      J            Ø        ˜                  ó            ë            ùokay                        
default          €   	      usb@92041000              renesas,usbhs-r9a09g077          ,    ’              $   ½      K         L         M            Ø        ˜        Ò   	           ×usb          ë            ùokay            áotg       mmc@92080000          .    renesas,sdhi-r9a09g077 renesas,sdhi-r9a09g057            ,    ’                  ½                           Ø        ¼                
   ßaclk clkh            ë            ùokay                        þ           
default state_uhs                                 !            +         9        H      vqmmc-regulator         _SDHI0-VQMMC         n w@        † 2Z       	   ùdisabled             mmc@92090000          .    renesas,sdhi-r9a09g077 renesas,sdhi-r9a09g057            ,    ’	                  ½                           Ø        ½                
   ßaclk clkh            ë            ùokay                        þ           
default state_uhs                                 !            ž         «   vqmmc-regulator         _SDHI1-VQMMC         n w@        † 2Z       	   ùdisabled                timer             arm,armv8-timer       P  ¹                                             
                     %   Èsec-phys phys virt hyp-phys hyp-virt          aliases         Í/soc/i2c@80088000           Ò/soc/i2c@80088400           ×/soc/mmc@92080000           Ü/soc/mmc@92090000           á/soc/serial@80005000          chosen          éserial0:115200n8          regulator-1p8v            regulator-fixed         _fixed-1.8V          n w@        † w@         õ                  €         regulator-3p3v            regulator-fixed         _fixed-3.3V          n 2Z         † 2Z          õ                  €         regulator-vccq-sdhi1              regulator-gpio          _SDHI1 VccQ          n w@        † 2Z               F                        ! 2Z      w@            €         leds          
    gpio-leds      led-0                 ¹            (           .debug           7          led-1                            (           .debug           7         led-2                 7            (           .debug           7         led-4                             (           .debug           7         led-5                 ‘            (           .debug           7         led-6                 ·            (           .debug           7         led-7                 ¸            (           .debug           7         led-8                 ½            (           .debug           7               	compatible #address-cells #size-cells model reg device_type next-level-cache enable-method cache-unified cache-size cache-level phandle #clock-cells clock-frequency interrupt-parent ranges interrupts interrupt-names clocks clock-names power-domains status pinctrl-0 pinctrl-names timeout-sec pagesize #reset-cells #power-domain-cells reg-names gpio-controller #gpio-cells gpio-ranges pinmux gpio-hog gpios output-high line-name #interrupt-cells interrupt-controller phys phy-names dr_mode companion #phy-cells pinctrl-1 vmmc-supply vqmmc-supply bus-width non-removable mmc-hs200-1_8v fixed-emmc-driver-type regulator-name regulator-min-microvolt regulator-max-microvolt sd-uhs-sdr50 sd-uhs-sdr104 interrupts-extended i2c0 i2c1 mmc0 mmc1 serial0 stdout-path regulator-boot-on regulator-always-on gpios-states color function function-enumerator 