Ðþí     8  °   (            g  x                                                                   (   ,Arm Morello System Development Platform          2arm,morello-sdp arm,morello    clock-50000000           2fixed-clock          =             Júð€      	   Zapb_pclk             m         clock-85000000           2fixed-clock          =             Jÿ@         Ziofpga:aclk       cpus                                 cpu@0            2arm,rainier          u                 ycpu          …psci             “                @         ²            ¿            Ì   @         Þ            ë            ü          l2-cache             2cache                       •            ¢   @         ´                     ë            m            cpu@100          2arm,rainier          u                ycpu          …psci             “                @         ²            ¿            Ì   @         Þ            ë            ü          l2-cache             2cache                       •            ¢   @         ´                     ë            m            cpu@10000            2arm,rainier          u                ycpu          …psci             “                @         ²            ¿            Ì   @         Þ            ë            ü         l2-cache             2cache                       •            ¢   @         ´                     ë            m            cpu@10100            2arm,rainier          u               ycpu          …psci             “                @         ²            ¿            Ì   @         Þ            ë            ü         l2-cache             2cache                       •            ¢   @         ´                     ë            m            l3-cache             2cache                       •                     m            firmware                    scmi          	   2arm,scmi            tx rx           (                           /   	   
                             protocol@13          u            =            m         protocol@14          u            =               memory@80000000          ymemory           u    €                memory@8080000000            ymemory           u   €€      x         pmu          2arm,rainier-pmu         5               psci             2arm,psci-0.2             Œsmc       reserved-memory                                   @   secure-firmware@ff000000             u    ÿ                   G         spe-pmu       '   2arm,statistical-profiling-extension-v1          5               soc          2simple-bus                                                 @   serial@2a400000          2arm,pl011 arm,primecell          u    *@                 5       ?            ü              Nuartclk apb_pclk            Zokay          interrupt-controller@30000000            2arm,gic-v3            u    0              0                 5      	           a            r                                  @         m      msi-controller@30040000          2arm,gic-v3-its           u    0                  ‡        –            m         msi-controller@30060000          2arm,gic-v3-its           u    0                  ‡        –            m         msi-controller@30080000          2arm,gic-v3-its           u    0                  ‡        –            m         msi-controller@300a0000          2arm,gic-v3-its           u    0
                  ‡        –            m            iommu@2ce00000           2arm,smmu-v3          u    ,à               $  5       L          P          N           ¡eventq gerror cmdq-sync         ±            m         mhu@45000000             2arm,mhu-doorbell arm,primecell           u    E                  5      >         <           ¾            ü         	  Napb_pclk             m         sram@6000000          
   2mmio-sram            u             €         @             €                             scp-sram@0           2arm,scmi-shmem           u       €         m   	      scp-sram@80          2arm,scmi-shmem           u   €   €         m   
            timer            2arm,armv8-timer       0  5                                 
         aliases         Ê/soc/serial@2a400000          chosen          Òserial0:115200n8          clock-350000000          2fixed-clock          =             JÜ“€         Zaclk             m         clock-148500000          2fixed-clock          =             JÙî          Zpxclk            m         i2c@1c0f0000             2cdns,i2c-r1p14           u                     5       Š            ü                                      J †    hdmi-transmitter@70          2nxp,tda998x          u   p        Þ #E   port       endpoint            ê            m                  display@2cc00000             2arm,mali-d32 arm,mali-d71            u    ,À                 5       E            ü           Naclk          (  ú                                                            pipeline@0           u             ü           Npxclk      port       endpoint            ê            m                  iommu@4f000000           2arm,smmu-v3          u    O                0  5       ä          æ          )          å           ¡eventq gerror priq cmdq-sync                           ±                     m         iommu@4f400000           2arm,smmu-v3          u    O@               0  5       ë          í          (          ì           ¡eventq gerror priq cmdq-sync                           ±                     m         pcie@28c0000000          ypci          2pci-host-ecam-generic            u   (À                T  @               o        €         `       `          B      	       	       À                  ÿ        #                                              a           4                        G                                 ©                                    ª                                    «                                    ¬           U                      ]                    pcie@4fc0000000          ypci          2pci-host-ecam-generic            u   OÀ                T  @                       €         p       p          B      0       0       À           #                                             a           4                        G                                 É                                    Ê                                    Ë                                    Ì           U                      ]                       	interrupt-parent #address-cells #size-cells model compatible #clock-cells clock-frequency clock-output-names phandle reg device_type enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks cache-level cache-unified mbox-names mboxes shmem interrupts ranges no-map clock-names status #interrupt-cells interrupt-controller msi-controller #msi-cells interrupt-names #iommu-cells #mbox-cells serial0 stdout-path video-ports remote-endpoint iommus msi-parent dma-coherent bus-range linux,pci-domain interrupt-map-mask interrupt-map msi-map iommu-map 