 5   8 (H   (             (                             "    tsd,rk3588-jaguar rockchip,rk3588                                    +         $   7Theobroma Systems RK3588-SBC Jaguar    aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /ethernet@fe1b0000           /mmc@fe2e0000            /mmc@fe2c0000           /i2c@fd880000/rtc@6f          cpus                         +       cpu-map    cluster0       core0           
         core1           
         core2           
         core3           
            cluster1       core0           
         core1           
            cluster2       core0           
         core1           
   	            cpu@0           cpu           arm,cortex-a55                      psci            ,          ?   
            F   
            V0,         k           {              @                                 @                                                                        cpu@100         cpu           arm,cortex-a55                     psci            ,          ?   
            k           {              @                                 @                                                                        cpu@200         cpu           arm,cortex-a55                     psci            ,          ?   
            k           {              @                                 @                                                                        cpu@300         cpu           arm,cortex-a55                     psci            ,          ?   
            k           {              @                                 @                                                                        cpu@400         cpu           arm,cortex-a76                     psci            ,           ?   
           F   
           V0,         k           {              @                                 @                                                                       cpu@500         cpu           arm,cortex-a76                     psci            ,           ?   
           k           {              @                                 @                                                                       cpu@600         cpu           arm,cortex-a76                     psci            ,           ?   
           F   
           V0,         k           {              @                                 @                                                                       cpu@700         cpu           arm,cortex-a76                     psci            ,           ?   
           k           {              @                                 @                                                                 	      idle-states          psci       cpu-sleep             arm,idle-state           -        >           U   d        f   x        v                      l2-cache-l0           cache           }              @                                                           l2-cache-l1           cache           }              @                                                           l2-cache-l2           cache           }              @                                                           l2-cache-l3           cache           }              @                                                           l2-cache-b0           cache           }              @                                                           l2-cache-b1           cache           }              @                                                           l2-cache-b2           cache           }              @                                                           l2-cache-b3           cache           }              @                                                           l3-cache              cache           } 0             @                                                   display-subsystem             rockchip,display-subsystem                   firmware       optee             linaro,optee-tz         %smc       scmi              arm,scmi-smc                                              +       protocol@14                                  
      protocol@16                                   pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            %smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %   sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    sram@10f000       
    mmio-sram                                                                  +      sram@0            arm,scmi-shmem                                     gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             F   
           V         ?                       core coregroup stacks                   0         \              ]              ^                job mmu gpu         #           7              Eokay            L      opp-table             operating-points-v2               opp-300000000           X             _ 
L 
L P      opp-400000000           X    ׄ         _ 
L 
L P      opp-500000000           X    e         _ 
L 
L P      opp-600000000           X    #F         _ 
L 
L P      opp-700000000           X    )'         _ 
` 
` P      opp-800000000           X    /         _ q q P      opp-900000000           X    5         _ 5  5  P      opp-1000000000          X    ;         _ P P P            usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                ?                       ref_clk suspend_clk bus_clk         motg         u       !           zusb2-phy usb3-phy         
  utmi_wide           7                   R                                                            	  Edisabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      ?                  "        u   #        zusb         7              Eokay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      ?                  "        u   #        zusb         7              Eokay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      ?                  $        u   %        zusb         7              Eokay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      ?                  $        u   %        zusb         7              Eokay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  ?     j     i     h     k     r      &  ref_clk suspend_clk bus_clk utmi pipe           mhost            u   &         	  zusb3-phy          
  utmi_wide                4                                             @      	  Edisabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o                eventq gerror priq cmdq-sync            Z         	  Edisabled          iommu@fcb00000            arm,smmu-v3                             @        }                                       {                eventq gerror priq cmdq-sync            Z         	  Edisabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   f      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   a      syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    b      syscon@fd5a6000           rockchip,rk3588-vo-grf syscon               Z`                 ?                      syscon@fd5a8000           rockchip,rk3588-vo-grf syscon               Z                ?                c      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    (      syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    ?             phyclk          usb480m_phy0                                      m             gphy apb       	  Edisabled                  otg-port            s          	  Edisabled                            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   ?             phyclk          usb480m_phy2                                      o             gphy apb         Eokay               "   host-port           s            Eokay            ~   '           #            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   ?             phyclk          usb480m_phy3                                      p              gphy apb         Eokay               $   host-port           s            Eokay               %            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                          sram@fd600000         
    mmio-sram               `                         `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                F                                                                         ]      q                 @  VA .  2Fq )׫ׄ e /  ׄ   e Zр            (                                       i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               ?     t     s      	  i2c pclk               )        default                      +            Eokay       fan@18            ti,amc6821                   regulator@42              rockchip,rk8602            B                   vdd_npu_s0                              dp         ~        0          E   *   regulator-state-mem          P         regulator@43               rockchip,rk8603 rockchip,rk8602            C                   vdd_cpu_big1_s0                             dp                 0          E   *              regulator-state-mem          P         rtc@6f            isil,isl1208               o         serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               ?                  baudclk apb_pclk            i   +      +           ntx rx              ,        default         x                      Eokay          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?                	  pwm pclk               -        default                  	  Edisabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             ?                	  pwm pclk               .        default                  	  Edisabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?                	  pwm pclk               /        default                  	  Edisabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               ?                	  pwm pclk               0        default                  	  Edisabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  d   power-controller          !    rockchip,rk3588-power-controller                                    +            Eokay                  power-domain@8                                              +       power-domain@9             	         ?     !     #     "                1   2   3                                 +       power-domain@10            
        ?     !     #     "           4                  power-domain@11                    ?     !     #     "           5                        power-domain@12                    ?                          6   7   8   9                  power-domain@13                                 +                   power-domain@14                  (  ?                                    :                  power-domain@15                     ?                               ;                  power-domain@16                    ?                     <   =   >                     +                   power-domain@17                     ?                               ?   @   A                        power-domain@21                    ?                                                                                                      B   C   D   E   F   G   H   I                     +                   power-domain@23                    ?      C      A                J                  power-domain@14                     ?                               :                  power-domain@15                    ?                          ;                  power-domain@22                    ?                     K                     power-domain@24                    ?     [     Z     ]           L   M                     +                   power-domain@25                  8  ?                                   Z           N                     power-domain@26                  8  ?                                   Q           O   P                  power-domain@27                  0  ?                                         Q   R   S   T                     +                   power-domain@28                     ?                               U   V                  power-domain@29                  (  ?                                    W   X                     power-domain@30                    ?     z     {           Y                  power-domain@31                  @  ?     W                                              Z   [   \   ]                  power-domain@33            !        ?     W     Z     [                  power-domain@34            "        ?     W     Z     [                  power-domain@37            %        ?          2           ^                  power-domain@38            &        ?      4      5                  power-domain@40            (           _                        video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l                vdpu            F      A      C        Vׄ ׄ         ?      A      C      
  aclk hclk           7                                          vop@fdd90000              rockchip,rk3588-vop                      B     P                vop gamma-lut                               8  ?     ]     \     a     b     c     d     [      7  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop             `        7                 a           b           c           d      	  Edisabled       ports                        +                  port@0                       +                      port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  ?     ]     \        aclk iface          Z            7            	  Edisabled               `      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    ?                       mclk_tx mclk_rx hclk            F                           i   e            ntx          7                           gtx-m                      	  Edisabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    ?     4     4     5        mclk_tx mclk_rx hclk            F     1                      i   e           ntx          7                           gtx-m                      	  Edisabled          i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   ?     0     0     ,        mclk_tx mclk_rx hclk            F     -                      i   e           nrx          7                           grx-m                      	  Edisabled          qos@fdf35000              rockchip,rk3588-qos syscon              P                    6      qos@fdf35200              rockchip,rk3588-qos syscon              R                    7      qos@fdf35400              rockchip,rk3588-qos syscon              T                    8      qos@fdf35600              rockchip,rk3588-qos syscon              V                    9      qos@fdf36000              rockchip,rk3588-qos syscon              `                    Y      qos@fdf39000              rockchip,rk3588-qos syscon                                  ^      qos@fdf3d800              rockchip,rk3588-qos syscon                                  _      qos@fdf3e000              rockchip,rk3588-qos syscon                                  [      qos@fdf3e200              rockchip,rk3588-qos syscon                                  Z      qos@fdf3e400              rockchip,rk3588-qos syscon                                  \      qos@fdf3e600              rockchip,rk3588-qos syscon                                  ]      qos@fdf40000              rockchip,rk3588-qos syscon                                   W      qos@fdf40200              rockchip,rk3588-qos syscon                                  X      qos@fdf40400              rockchip,rk3588-qos syscon                                  Q      qos@fdf40500              rockchip,rk3588-qos syscon                                  R      qos@fdf40600              rockchip,rk3588-qos syscon                                  S      qos@fdf40800              rockchip,rk3588-qos syscon                                  T      qos@fdf41000              rockchip,rk3588-qos syscon                                  U      qos@fdf41100              rockchip,rk3588-qos syscon                                  V      qos@fdf60000              rockchip,rk3588-qos syscon                                   <      qos@fdf60200              rockchip,rk3588-qos syscon                                  =      qos@fdf60400              rockchip,rk3588-qos syscon                                  >      qos@fdf61000              rockchip,rk3588-qos syscon                                  ?      qos@fdf61200              rockchip,rk3588-qos syscon                                  @      qos@fdf61400              rockchip,rk3588-qos syscon                                  A      qos@fdf62000              rockchip,rk3588-qos syscon                                   :      qos@fdf63000              rockchip,rk3588-qos syscon              0                    ;      qos@fdf64000              rockchip,rk3588-qos syscon              @                    J      qos@fdf66000              rockchip,rk3588-qos syscon              `                    B      qos@fdf66200              rockchip,rk3588-qos syscon              b                    C      qos@fdf66400              rockchip,rk3588-qos syscon              d                    D      qos@fdf66600              rockchip,rk3588-qos syscon              f                    E      qos@fdf66800              rockchip,rk3588-qos syscon              h                    F      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    G      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    H      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    I      qos@fdf67000              rockchip,rk3588-qos syscon              p                    K      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                   4      qos@fdf71000              rockchip,rk3588-qos syscon                                  5      qos@fdf72000              rockchip,rk3588-qos syscon                                   1      qos@fdf72200              rockchip,rk3588-qos syscon              "                    2      qos@fdf72400              rockchip,rk3588-qos syscon              $                    3      qos@fdf80000              rockchip,rk3588-qos syscon                                   N      qos@fdf81000              rockchip,rk3588-qos syscon                                  O      qos@fdf81200              rockchip,rk3588-qos syscon                                  P      qos@fdf82000              rockchip,rk3588-qos syscon                                   L      qos@fdf82200              rockchip,rk3588-qos syscon              "                    M      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  f      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  ?     C     H     >     M     R           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                 sys pmc msg legacy err          '           8                     `  K                  g                      g                     g                     g           Y           j           y  0    h  0                       u   &         	  zpcie-phy            7      "      T                                                       @      	       @         0     
@       @                                     dbi apb config               )     .      	  gpwr pipe                         +         	  Edisabled       legacy-interrupt-controller                               '                                                g         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  ?     D     I     ?     N     S     s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                 sys pmc msg legacy err          '           8                     `  K                  i                      i                     i                     i           Y           j           y  @    h  @                       u   j         	  zpcie-phy            7      "      T                                                       @      
        @         0     
A        @                                     dbi apb config               *     /      	  gpwr pipe                         +         	  Edisabled       legacy-interrupt-controller                               '                                                i         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                      macirq eth_wake_irq       (  ?     6     7     Y     ^     5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         7      !             $      
  gstmmaceth              a           (           k                    l           m               	  Edisabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                     k      rx-queues-config            +              l   queue0        queue1           tx-queues-config            A              m   queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  ?     b     _     e     T     o        sata pmalive rxoob ref asic         W                        +          	  Edisabled       sata-port@0                     i @          u   j         	  zsata-phy            v                         sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  ?     d     a     g     V     q        sata pmalive rxoob ref asic         W                        +          	  Edisabled       sata-port@0                     i @          u   &         	  zsata-phy            v                         spi@fe2b0000              rockchip,sfc                +        @                               ?     /     0        clk_sfc hclk_sfc                         +          	  Edisabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                ?   
      
   	                  biu ciu ciu-drive ciu-sample                       р        default            n   o   p        7      (        Eokay                                                                                                  q        +   r      mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                ?                            biu ciu ciu-drive ciu-sample                                default            s        7      %      	  Edisabled          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       F     -     .     ,        V n6        (  ?     ,     *     +     -     .        core bus axi block timer                        t   u   v   w        default       (                                   gcore bus axi block timer            Eokay                        8         J         W         f         u           x                                               q        +   y      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       ?      +      /      (        mclk_tx mclk_rx hclk            F      )      -                            i   +       +           ntx rx           7      &              *      +      
  gtx-m rx-m                    default       (     z   {   |   }   ~                                 	  Edisabled          i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       ?     y     }     u        mclk_tx mclk_rx hclk            i   +      +           ntx rx                ^     _      
  gtx-m rx-m                    default       (                                                  	  Edisabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       ?                    i2s_clk i2s_hclk            F                            i                     ntx rx           7      &        default                                       	  Edisabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       ?      %              i2s_clk i2s_hclk            F      "                      i                    ntx rx           7      &        default                                       	  Edisabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                            a               8                                      '            +                 msi-controller@fe640000           arm,gic-v3-its              d                          	              h      msi-controller@fe660000           arm,gic-v3-its              f                          	                    ppi-partitions     interrupt-partition-0           	                             interrupt-partition-1           	            	                       dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                	        ?      n      	  apb_pclk            	-              +      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                	        ?      o      	  apb_pclk            	-                    i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?            {      	  i2c pclk                  >                          default                      +          	  Edisabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?            |      	  i2c pclk                  ?                          default                      +          	  Edisabled          i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?            }      	  i2c pclk                  @                          default                      +          	  Edisabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?            ~      	  i2c pclk                  A                          default                      +          	  Edisabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?                  	  i2c pclk                  B                          default                      +          	  Edisabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               ?      T      W        pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              ?      d      c      
  tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               ?                    spiclk apb_pclk         i   +      +           ntx rx           	8                            default                      +          	  Edisabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               ?                    spiclk apb_pclk         i   +      +           ntx rx           	8                            default                      +          	  Edisabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               ?                    spiclk apb_pclk         i                    ntx rx           	8                         default                      +            Eokay            F              V    pmic@0            rockchip,rk806                                                 	?        	O           default                             	[ B@         	m        	   *        	   *        	   *        	   *        	   *        	   *        	   *        	   *        	   *        	   *        	           
   *        
           
%           
2   *   dvs1-null-pins          
>gpio_pwrctrl1         	  
Cpin_fun0                     dvs2-null-pins          
>gpio_pwrctrl2         	  
Cpin_fun0                     dvs3-null-pins          
>gpio_pwrctrl3         	  
Cpin_fun0                     regulators     dcdc-reg1                      dp         ~        0  0        vdd_gpu_s0          
L                regulator-state-mem          P         dcdc-reg2           vdd_cpu_lit_s0                              dp         ~        0  0              regulator-state-mem          P         dcdc-reg3           vdd_log_s0                              
L         q        0  0   regulator-state-mem          P        
h q         dcdc-reg4           vdd_vdenc_s0                                dp         ~        0  0   regulator-state-mem          P         dcdc-reg5           vdd_ddr_s0                              
L                 0  0   regulator-state-mem          P        
h P         dcdc-reg6           vdd2_ddr_s3                      regulator-state-mem          
         dcdc-reg7           vdd_2v0_pldo_s3                                              0  0              regulator-state-mem          
        
h          dcdc-reg8           vcc_3v3_s3                              2Z         2Z           q   regulator-state-mem          
        
h 2Z         dcdc-reg9           vddq_ddr_s0                      regulator-state-mem          P         dcdc-reg10          vcc_1v8_s3                              w@         w@           y   regulator-state-mem          
        
h w@         pldo-reg1           vcca_1v8_s0                             w@         w@   regulator-state-mem          P         pldo-reg2           vcc_1v8_s0                              w@         w@              regulator-state-mem          P        
h w@         pldo-reg3           vdda_1v2_s0                             O         O   regulator-state-mem          P         pldo-reg4           vcca_3v3_s0                             2Z         2Z        0  0   regulator-state-mem          P         pldo-reg5           vccio_sd_s0                             w@         2Z        0  0           r   regulator-state-mem          P         pldo-reg6         	  pldo6_s3                                w@         w@   regulator-state-mem          
        
h w@         nldo-reg1           vdd_0v75_s3                             q         q   regulator-state-mem          
        
h q         nldo-reg2           vdda_ddr_pll_s0                             P         P   regulator-state-mem          P        
h P         nldo-reg3           vdda_0v75_s0                                q         q   regulator-state-mem          P         nldo-reg4           vdda_0v85_s0                                P         P   regulator-state-mem          P         nldo-reg5           vdd_0v75_s0                             q         q   regulator-state-mem          P                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               ?                    spiclk apb_pclk         i                    ntx rx           	8                            default                      +          	  Edisabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               ?                    baudclk apb_pclk            i   +      +   	        ntx rx                      default                    x         	  Edisabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               ?                    baudclk apb_pclk            i   +   
   +           ntx rx                      default                    x           Eokay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               ?                    baudclk apb_pclk            i   +      +           ntx rx                         default                    x           Eokay             
      serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               ?                    baudclk apb_pclk            i      	      
        ntx rx                      default                    x         	  Edisabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               ?                    baudclk apb_pclk            i                    ntx rx                      default                    x         	  Edisabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               ?                    baudclk apb_pclk            i                    ntx rx                      default                    x         	  Edisabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               ?                    baudclk apb_pclk            i   e      e           ntx rx                      default                    x           Eokay          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               ?                    baudclk apb_pclk            i   e   	   e   
        ntx rx                      default                    x         	  Edisabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               ?                    baudclk apb_pclk            i   e      e           ntx rx                      default                    x         	  Edisabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?      L      K      	  pwm pclk                       default                  	  Edisabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             ?      L      K      	  pwm pclk                       default                  	  Edisabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?      L      K      	  pwm pclk                       default                  	  Edisabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               ?      L      K      	  pwm pclk                       default                  	  Edisabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?      O      N      	  pwm pclk                       default                  	  Edisabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             ?      O      N      	  pwm pclk                       default                  	  Edisabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?      O      N      	  pwm pclk                       default                  	  Edisabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               ?      O      N      	  pwm pclk                       default                  	  Edisabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?      R      Q      	  pwm pclk                       default                  	  Edisabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             ?      R      Q      	  pwm pclk                       default                  	  Edisabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              ?      R      Q      	  pwm pclk                       default                  	  Edisabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               ?      R      Q      	  pwm pclk                       default                  	  Edisabled          tsadc@fec00000            rockchip,rk3588-tsadc                                                     ?                    tsadc apb_pclk          F              V               V      W        gtsadc-apb tsadc         
         
            
                                  gpio otpout                    Eokay          adc@fec10000              rockchip,rk3588-saradc                                                    &           ?                    saradc apb_pclk               U        gsaradc-apb          Eokay            8                    i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?                  	  i2c pclk                  C                          default                      +          	  Edisabled          i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?                  	  i2c pclk                  D                          default                      +            Eokay       eeprom@54             st,24c04 atmel,24c04               T        D           M   q         i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              ?                  	  i2c pclk                  E                          default                      +            Eokay       regulator@42              rockchip,rk8602            B                   vdd_cpu_big0_s0                             dp                 0          E   *              regulator-state-mem          P            spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               ?                    spiclk apb_pclk         i   e      e           ntx rx           	8                            default                      +          	  Edisabled          efuse@fecc0000            rockchip,rk3588-otp                               ?                                otp apb_pclk phy arb                                      gotp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                        X            npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                	        ?      p      	  apb_pclk            	-              e      phy@fed60000              rockchip,rk3588-hdptx-phy                                 ?          T        ref apb         s          8       #          c     d     e     !     "      "  gphy apb init cmn lane ropll lcpll                    	  Edisabled          phy@fed80000              rockchip,rk3588-usbdp-phy                                s           ?          l     V           refclk immortal pclk utmi         (                                       ginit cmn lane pcs_apb pma_apb           ]           p                               	  Edisabled               !      phy@fee00000              rockchip,rk3588-naneng-combphy                               ?          v     W        ref apb pipe            F             V         s                <     C        gphy apb            (                 	  Edisabled               j      phy@fee20000              rockchip,rk3588-naneng-combphy                               ?          x     W        ref apb pipe            F             V         s                >     E        gphy apb            (                 	  Edisabled               &      sram@ff001000         
    mmio-sram                                                                +         pinctrl           rockchip,rk3588-pinctrl                                          +                 gpio@fd8a0000             rockchip,gpio-bank                                                    ?     q     r         	?                                        	O           '                    gpio@fec20000             rockchip,gpio-bank                                                    ?      s      t         	?                                        	O           '                 mdot2e-w-disable1-n-hog            	                    m.2 E-key W_DISABLE1#                     gpio@fec30000             rockchip,gpio-bank                                                    ?      u      v         	?                  @                     	O           '                    gpio@fec40000             rockchip,gpio-bank                                                    ?      w      x         	?                  `                     	O           '         gpio@fec50000             rockchip,gpio-bank                                                    ?      y      z         	?                                       	O           '                 mdot2e-w-disable2-n-hog                                m.2 E-key W_DISABLE2#                     pcfg-pull-up                              pcfg-pull-down                            pcfg-pull-none                            pcfg-pull-none-drv-level-2                   (                    pcfg-pull-up-drv-level-1                     (                    pcfg-pull-up-drv-level-2                     (                    pcfg-pull-none-smt                    7                 auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-bus8           L                                                                                                           t      emmc-clk            L                       v      emmc-cmd            L                        u      emmc-data-strobe            L                       w      emmc-reset          L                                 eth1          fspi          gmac1         gpu       hdmi          i2c0       i2c0m2-xfer          L                                     )         i2c1       i2c1m4-xfer          L         	            	                       i2c2       i2c2m0-xfer          L          	             	                       i2c3       i2c3m0-xfer          L         	            	                       i2c4       i2c4m0-xfer          L         	            	                       i2c5       i2c5m0-xfer          L         	            	                       i2c6       i2c6m4-xfer          L         	             	                       i2c7       i2c7m0-xfer          L         	            	                       i2c8       i2c8m2-xfer          L         	            	                       i2s0       i2s0-lrck           L                       z      i2s0-sclk           L                       {      i2s0-sdi0           L                       |      i2s0-sdi1           L                       }      i2s0-sdi2           L                       ~      i2s0-sdi3           L                             i2s0-sdo0           L                             i2s0-sdo1           L                             i2s0-sdo2           L                             i2s0-sdo3           L                                i2s1       i2s1m0-lrck         L                             i2s1m0-sclk         L                             i2s1m0-sdi0         L                             i2s1m0-sdi1         L                             i2s1m0-sdi2         L                             i2s1m0-sdi3         L                             i2s1m0-sdo0         L      	                       i2s1m0-sdo1         L      
                       i2s1m0-sdo2         L                             i2s1m0-sdo3         L                                i2s2       i2s2m1-lrck         L                             i2s2m1-sclk         L                             i2s2m1-sdi          L      
                       i2s2m1-sdo          L                                i2s3       i2s3-lrck           L                             i2s3-sclk           L                             i2s3-sdi            L                             i2s3-sdo            L                                jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4       pcie30x4-clkreqn-m0         L                              pcie30x4-perstn-m0          L                               pcie30x4-waken-m0           L                                 pdm0          pdm1          pmic       pmic-pins         p  L                                                                                                                pmu       pwm0       pwm0m0-pins         L                        -         pwm1       pwm1m0-pins         L                        .         pwm2       pwm2m0-pins         L                        /         pwm3       pwm3m0-pins         L                        0         pwm4       pwm4m0-pins         L                                 pwm5       pwm5m0-pins         L       	                          pwm6       pwm6m0-pins         L                                 pwm7       pwm7m0-pins         L                                 pwm8       pwm8m0-pins         L                                pwm9       pwm9m0-pins         L                                pwm10      pwm10m0-pins            L                                 pwm11      pwm11m0-pins            L                                pwm12      pwm12m0-pins            L                                pwm13      pwm13m0-pins            L                                pwm14      pwm14m0-pins            L                                pwm15      pwm15m0-pins            L                                refclk        sata          sata0         sata1         sata2         sdio       sdiom1-pins       `  L                                                                                    s         sdmmc      sdmmc-bus4        @  L                                                           n      sdmmc-clk           L                       p      sdmmc-cmd           L                       o         spdif0        spdif1        spi0       spi0m0-pins       0  L                                                        spi0m0-cs0          L                              spi0m0-cs1          L                                 spi1       spi1m1-pins       0  L                                                     spi1m1-cs0          L                             spi1m1-cs1          L                                spi2       spi2m2-pins       0  L                                                        spi2m2-cs0          L       	                          spi3       spi3m1-pins       0  L                                                     spi3m1-cs0          L                             spi3m1-cs1          L                                spi4       spi4m0-pins       0  L                                                     spi4m0-cs0          L                             spi4m0-cs1          L                                tsadc      tsadc-shut          L                                 uart0      uart0m0-xfer             L                                     ,         uart1      uart1m1-xfer             L         
            
                       uart2      uart2m0-xfer             L          
             
                       uart3      uart3m2-xfer             L         
            
                    uart3-rtsn          L         
                       uart4      uart4m1-xfer             L         
            
                       uart5      uart5m1-xfer             L         
            
                       uart6      uart6m1-xfer             L          
            
                       uart7      uart7m0-xfer             L         
            
                       uart8      uart8m1-xfer             L         
            
                       uart9      uart9m1-xfer             L         
            
                       vop       bt656         gpio-func      tsadc-gpio-func         L                                  eth0       eth0-pins           L                                gmac0      gmac0-miim           L                                         gmac0-rx-bus2         0  L                                                     gmac0-tx-bus2         0  L                                                     gmac0-rgmii-clk          L                                         gmac0-rgmii-bus       @  L                              	            
                          ethernet       eth-reset           L                                 leds       led1-pin            L                                    usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                ?                       ref_clk suspend_clk bus_clk         motg         u                 zusb2-phy usb3-phy         
  utmi_wide           7                   S                                          	  Edisabled          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                         syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                          syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +                 usb2phy@4000              rockchip,rk3588-usb2phy           @                        ?             phyclk          usb480m_phy1                                      n             gphy apb       	  Edisabled                  otg-port            s          	  Edisabled                           i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      ?                       mclk_tx mclk_rx hclk            F                           i   e           ntx          7                           gtx-m                      	  Edisabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      ?     9     9     ?        mclk_tx mclk_rx hclk            F     6                      i   e           ntx          7                           gtx-m                      	  Edisabled          i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      ?     +     +     '        mclk_tx mclk_rx hclk            F     (                      i   e           nrx          7                           grx-m                      	  Edisabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    ?     &     &     "        mclk_tx mclk_rx hclk            F     #                      i   e           nrx          7                           grx-m                      	  Edisabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        4  ?     @     E     ;     J     O     t         -  aclk_mst aclk_slv aclk_dbi pclk aux pipe ref            pci       P                                                                            sys pmc msg legacy err          '           8                     `  K                                                                                             Y            j           y                                 u         	  zpcie-phy            7      "      T                                                       @      	        @         0     
@        @                                     dbi apb config               &     +      	  gpwr pipe            Eokay            default                       Z                  f      legacy-interrupt-controller                               '                                                        pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  ?     A     F     <     K     P     u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                               sys pmc msg legacy err          '           8                     `  K                                                                                             Y           j           y                               u         	  zpcie-phy            7      "      T                                                       @      	@       @         0     
@@       @                                     dbi apb config               '     ,      	  gpwr pipe          	  Edisabled       legacy-interrupt-controller                               '                                                         pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  ?     B     G     =     L     Q           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe            pci       P                                                                                 sys pmc msg legacy err          '           8                     `  K                                                                                             Y           j           y       h                          u            	  zpcie-phy            7      "      T                                                       @      	       @         0     
@       @                                     dbi apb config               (     -      	  gpwr pipe                         +           Eokay            Z                  f      legacy-interrupt-controller                               '                                                         ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                      macirq eth_wake_irq       (  ?     6     7     X     ]     4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref         7      !             #      
  gstmmaceth              a           (                                                           Eokay            voutput                     rgmii           ~           default                                                                                            '    mdio              snps,dwmac-mdio                      +       ethernet-phy@6            ethernet-phy-ieee802.3-c22                     ?                          stmmac-axi-config                                                                           rx-queues-config            +                 queue0        queue1           tx-queues-config            A                 queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  ?     c     `     f     U     p        sata pmalive rxoob ref asic         W                        +          	  Edisabled       sata-port@0                     i @          u            	  zsata-phy            v                         phy@fed90000              rockchip,rk3588-usbdp-phy                                s           ?          m     W           refclk immortal pclk utmi         (                                       ginit cmn lane pcs_apb pma_apb           ]           p                               	  Edisabled                     phy@fee10000              rockchip,rk3588-naneng-combphy                               ?          w     W        ref apb pipe            F             V         s                =     D        gphy apb            (                   Eokay                     phy@fee80000              rockchip,rk3588-pcie3-phy                                s            ?     y        pclk                 H        gphy            (                   Eokay                     adc-keys          	    adc-keys                           buttons          w@        ,   d   button-bios-disable         :BIOS_DISABLE            @  h        K             chosen          eserial2:115200n8          dc-12v-regulator              regulator-fixed         dc_12v                                                         emmc-pwrseq           mmc-pwrseq-emmc                    default         Z                     x      leds          
    gpio-leds           default               led-1                           
  
Cheartbeat         
  qheartbeat                       pcie-refclk-gen-clock             fixed-clock                                      pcie-refclk-clock             gpio-gate-clock         ?                                       default                            pps       	    pps-gpio                            vcc-1v1-nldo-s3-regulator             regulator-fixed         vcc_1v1_nldo_s3                                              E   *                 vcc-1v2-s3-regulator              regulator-fixed         vcc_1v2_s3                              O         O        E   *                 vcc-2v8-s3-regulator              regulator-fixed         vcc_2v8_s3                              *         *        E   q      vcc-5v0-usb-a-regulator           regulator-fixed       
  usb_a_vcc             LK@         LK@        E   *                                      '      vcc-5v0-usb-c1-regulator              regulator-fixed       	  5v_usbc1              LK@         LK@        E                                   vcc-5v0-usb-c2-regulator              regulator-fixed       	  5v_usbc2              LK@         LK@        E                                   vcc3v3-mdot2-regulator            regulator-fixed         vcc3v3_mdot2                                2Z         2Z        E                   vcc5v0-sys-regulator              regulator-fixed         vcc5v0_sys                              LK@         LK@        E             *      vcc5v0-usb-regulator              regulator-fixed         vcc5v0_usb                              LK@         LK@        E   *                   	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 ethernet0 mmc0 mmc1 rtc0 cpu device_type reg enable-method capacity-dmips-mhz clocks assigned-clocks assigned-clock-rates cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells interrupts clock-frequency clock-output-names interrupt-names ranges clock-names operating-points-v2 power-domains status mali-supply opp-hz opp-microvolt dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu assigned-clock-parents #sound-dai-cells bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map num-lanes interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency broken-cd bus-width cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-ddr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v mmc-hs400-1_8v mmc-hs400-enhanced-strobe mmc-pwrseq no-sdio no-sd non-removable supports-cqe rockchip,trcm-sync-tx-only mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs gpio-controller #gpio-cells spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend linux,rs485-enabled-at-boot-time rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply pagesize vcc-supply bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,vo-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges gpios output-low line-name gpio-hog bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins reset-gpios vpcie3v3-supply clock_in_out phy-handle phy-mode tx_delay rx_delay snps,reset-gpio snps,reset-active-low snps,reset-delays-us rockchip,phy-grf io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt stdout-path linux,default-trigger color enable-gpios enable-active-high 