  U   8  Nx   (            ,  N@                                                      &   rockchip,rk3036-kylin rockchip,rk3036            &            7Rockchip RK3036 KylinBoard     aliases          =/pinctrl/gpio@2007c000           C/pinctrl/gpio@20080000           I/pinctrl/gpio@20084000           O/i2c@20072000            T/i2c@20056000            Y/i2c@2005a000            ^/mmc@1021c000            d/mmc@10214000            j/mmc@10218000            p/serial@20060000             x/serial@20064000             /serial@20068000             /spi@20074000            /mmc@1021c000            /mmc@10214000            /mmc@10218000         cpus                                       rockchip,rk3036-smp    cpu@f00          cpu          arm,cortex-a7                                         s B@           @                                 cpu@f01          cpu          arm,cortex-a7                                                  arm-pmu          arm,cortex-a7-pmu                   L          M                        display-subsystem            rockchip,display-subsystem                   timer            arm,armv7-timer                0                                 
          6n6       oscillator           fixed-clock         6n6         Fxin24m          Y                &      sram@10080000         
   mmio-sram                                                   f             smp-sram@0           rockchip,rk3066-smp-sram                             gpu@10090000          "   rockchip,rk3036-mali arm,mali-400            	           0                                                   mgp gpmmu pp0 ppmmu0         }      @                        @      @      	  bus core                                 x        okay                     video-codec@10108000             rockchip,rk3036-vpu                                         mvdpu                              
  aclk hclk                                  iommu@10108800           rockchip,iommu                               7                               aclk iface                                              vop@10118000             rockchip,rk3036-vop                             +                        d             aclk_vop dclk_vop hclk_vop                 u      v      w        axi ahb dclk               	                      okay       port                                             endpoint@0                          
            ,            iommu@10118300           rockchip,iommu                               +                               aclk iface                                    okay                	      qos@1012d000             rockchip,rk3036-qos syscon                            *      qos@1012e000             rockchip,rk3036-qos syscon                            )      qos@1012f000             rockchip,rk3036-qos syscon                            (      interrupt-controller@10139000            arm,gic-400                                                                               	                    usb@10180000          2   rockchip,rk3036-usb rockchip,rk3066-usb snps,dwc2                                 
                         otg         %otg         -           ?          N            @   @            ]         	  busb2-phy            okay          usb@101c0000          2   rockchip,rk3036-usb rockchip,rk3066-usb snps,dwc2                                                          otg         %host            ]         	  busb2-phy            okay          ethernet@10200000            rockchip,rk3036-emac                  @                            l                                     hclk macref macclk          }              y                 d        rmii            okay                          
                         default                  mdio                                 ethernet-phy@0                                       mmc@10214000          0   rockchip,rk3036-dw-mshc rockchip,rk3288-dw-mshc          !@   @         6<4`        <4`                    D        biu ciu                                              Q        reset         	  disabled                                         (            :        default                           mmc@10218000          0   rockchip,rk3036-dw-mshc rockchip,rk3288-dw-mshc          !   @         <4`                     E      s      w        biu ciu ciu-drive ciu-sample                                                 R        reset           okay                                 E        R   Z         p                            default                                                            mmc@1021c000          0   rockchip,rk3036-dw-mshc rockchip,rk3288-dw-mshc          !   @                                                6<4`        <4`                     G      u      y        biu ciu ciu-drive ciu-sample             :                      rx-tx                                        default                                 S        reset           okay          i2s@10220000          (   rockchip,rk3036-i2s rockchip,rk3066-i2s          "    @                 3           i2s_clk i2s_hclk                   R                                  tx rx           default                                okay                J      nand-controller@10500000          (   rockchip,rk3036-nfc rockchip,rk2928-nfc          P    @                                        L        ahb nfc         }      L        р                  !   "   #   $   %        default       	  disabled          clock-controller@20000000            rockchip,rk3036-cru                             &        xin24m          l           Y                      }              #g                  syscon@20008000       &   rockchip,rk3036-grf syscon simple-mfd                                                          usb2phy@17c          rockchip,rk3036-usb2phy            |                   ]        phyclk          Fusb480m_phy         }              y   '        Y            okay                '   host-port                   5         
  mlinestate                       okay                      otg-port          $          #          3          4           motg-bvalid otg-id linestate                     okay                         power-controller          !   rockchip,rk3036-power-controller                                                        power-domain@3                                        d        -   (                  power-domain@4                                          -   )                  power-domain@5                             @        -   *                     reboot-mode          syscon-reboot-mode          4          ;RB         GRB        URB	        eRB         audio-codec@20030000             rockchip,rk3036-codec                 @         acodec_pclk               q        l                       okay          hdmi@20034000            rockchip,rk3036-inno-hdmi             @   @                 -                 h      d      	  pclk ref            l           default            +                    okay       ports                                port@0                  endpoint               ,            
         port@1                 endpoint               -            F               timer@20044000        ,   rockchip,rk3036-timer rockchip,rk3288-timer           @                                      a   &        pclk timer        pwm@20050000          (   rockchip,rk3036-pwm rockchip,rk2928-pwm                        q                 ^        default            .      	  disabled          pwm@20050010          (   rockchip,rk3036-pwm rockchip,rk2928-pwm                       q                 ^        default            /      	  disabled          pwm@20050020          (   rockchip,rk3036-pwm rockchip,rk2928-pwm                        q                 ^        default            0      	  disabled          pwm@20050030          (   rockchip,rk3036-pwm rockchip,rk2928-pwm            0           q                 ^        default            1      	  disabled          i2c@20056000          (   rockchip,rk3036-i2c rockchip,rk3288-i2c           `                                                         i2c               M        default            2        okay            6    pmic@1b          rockchip,rk808                       &                          default            3   4         |                 Y           Fxin32k rk808-clkout2               5           5           5           5           5           5           6           7           7           5        %   7        2   8   regulators     DCDC_REG1            ?         S        e q        } p        vdd_arm    regulator-state-mem                   DCDC_REG2            ?         S        e P        }         vdd_gpu                regulator-state-mem                   B@         DCDC_REG3            ?         S        vcc_ddr    regulator-state-mem                   DCDC_REG4            ?         S        e 2Z        } 2Z        vcc_io              7   regulator-state-mem                   2Z         LDO_REG1             ?         S        e 2Z        } 2Z      
  vccio_pmu               8   regulator-state-mem                   2Z         LDO_REG2             ?         S        e 2Z        } 2Z        vcc_tp     regulator-state-mem                   LDO_REG3             ?         S        e B@        } B@        vdd_10     regulator-state-mem                   B@         LDO_REG4             ?         S        e w@        } w@      
  vcc18_lcd      regulator-state-mem                   w@         LDO_REG5             ?         S        e w@        } 2Z      	  vccio_sd       regulator-state-mem                   2Z         LDO_REG6             ?         S        e w@        } &%        vout5      regulator-state-mem                   w@         LDO_REG7             ?         S        e w@        } w@        vcc_18              6   regulator-state-mem                   w@         LDO_REG8             ?         S        e w@        } w@        vcca_codec     regulator-state-mem                   w@         SWITCH_REG1          ?         S        vcc_wl     regulator-state-mem                   SWITCH_REG2          ?         S        vcc_lcd    regulator-state-mem                            i2c@2005a000          (   rockchip,rk3036-i2c rockchip,rk3288-i2c                                                                    i2c               N        default            9        okay       audio-codec@1b           realtek,rt5616                             q        mclk                            K         serial@20060000       &   rockchip,rk3036-uart snps,dw-apb-uart                                                                   6n6                M     U        baudclk apb_pclk            default            :   ;   <        okay          serial@20064000       &   rockchip,rk3036-uart snps,dw-apb-uart             @                                                     6n6                N     V        baudclk apb_pclk            default            =      	  disabled          serial@20068000       &   rockchip,rk3036-uart snps,dw-apb-uart                                                                  6n6                O     W        baudclk apb_pclk            default            >        okay          i2c@20072000          (   rockchip,rk3036-i2c rockchip,rk3288-i2c                                                                     i2c               L        default            ?      	  disabled          spi@20074000             rockchip,rk3036-spi           @                                      A     R        spiclk apb_pclk                     	        tx rx           default            @   A   B   C                                	  disabled          dma-controller@20078000          arm,pl330 arm,primecell              @                                                            .                     	  apb_pclk                      pinctrl          rockchip,rk3036-pinctrl         l                                     f   gpio@2007c000            rockchip,gpio-bank                                $                 @         E        U                                   I      gpio@20080000            rockchip,gpio-bank                                 %                 A         E        U                             gpio@20084000            rockchip,gpio-bank            @                    &                 B         E        U                                         pcfg-pull-default            a            E      pcfg-pull-none           w            D      pwm0       pwm0-pin                          D            .         pwm1       pwm1-pin                         D            /         pwm2       pwm2-pin                         D            0         pwm3       pwm3-pin                         D            1         sdmmc      sdmmc-clk                       D                  sdmmc-cmd                       E                  sdmmc-cd                        E                  sdmmc-bus1                      E      sdmmc-bus4        @              E            E            E            E                  sdmmc-pwr                        D         sdio       sdio-bus1                        E      sdio-bus4         @               E             E             E             E                  sdio-cmd                         E                  sdio-clk                   	      D                  bt-wake-h                        E            H         emmc       emmc-clk                        D                  emmc-cmd                        E                  emmc-bus8                       E            E            E            E            E            E            E            E                     nfc    flash-ale                        E                  flash-bus8                      E            E            E            E            E            E            E            E                   flash-cle                       E            !      flash-csn0                      E            "      flash-rdn                       E            #      flash-rdy                       E            $      flash-wrn                       E            %         emac       emac-xfer                 
      E            E            E            E            E            E            E            E                  emac-mdio                        E            E                     i2c0       i2c0-xfer                          D             D            ?         i2c1       i2c1-xfer                         D             D            2         i2c2       i2c2-xfer                        D            D            9         i2s    i2s-bus       `               E            E            E            E            E            E                     hdmi       hdmi-ctl          @              D      	      D      
      D            D            +         uart0      uart0-xfer                        E             D            :      uart0-cts                        E            ;      uart0-rts                        D            <         uart1      uart1-xfer                       E            D            =         uart2      uart2-xfer                       E            D            >         spi-pins       spi-txd                     E            @      spi-rxd                     E            A      spi-clk                      E            B      spi-cs0                     E            C      spi-cs1                     E         leds       led-ctl                      D            G         pmic       pmic-int                         E            3         suspend    global-pwroff                       D            4            chosen          serial2:115200n8          memory@60000000          memory           `             hdmi-con             hdmi-connector           a      port       endpoint               F            -            gpio-leds         
   gpio-leds      led-0                             kylin:red:led           default            G         sdio-pwrseq          mmc-pwrseq-simple           default            H      $     I         I            	                     sound            simple-audio-card           i2s         rockchip,rt5616-codec                    4  Microphone Microphone Jack Headphone Headphone Jack       k  MIC1 Microphone Jack MIC2 Microphone Jack Microphone Jack micbias1 Headphone Jack HPOL Headphone Jack HPOR     simple-audio-card,cpu           "   J      simple-audio-card,codec         "   K         regulator-vsys           regulator-fixed         vcc_sys         e LK@        } LK@         ?         S            5         	#address-cells #size-cells compatible interrupt-parent model gpio0 gpio1 gpio2 i2c0 i2c1 i2c2 mshc0 mshc1 mshc2 serial0 serial1 serial2 spi mmc0 mmc1 mmc2 enable-method device_type reg resets operating-points clock-latency clocks phandle interrupts interrupt-affinity ports arm,cpu-registers-not-fw-configured clock-frequency clock-output-names #clock-cells ranges interrupt-names assigned-clocks assigned-clock-rates clock-names power-domains status mali-supply iommus #iommu-cells reset-names remote-endpoint interrupt-controller #interrupt-cells dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phys phy-names rockchip,grf assigned-clock-parents max-speed phy-mode phy phy-reset-duration phy-reset-gpios pinctrl-names pinctrl-0 max-frequency fifo-depth bus-width cap-mmc-highspeed cap-sd-highspeed card-detect-delay disable-wp cap-sdio-irq rockchip,default-sample-phase keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 dmas dma-names mmc-ddr-1_8v #sound-dai-cells #reset-cells #phy-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #pwm-cells rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vddio-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst gpio-controller #gpio-cells bias-pull-pin-default bias-disable rockchip,pins stdout-path label simple-audio-card,format simple-audio-card,name simple-audio-card,mclk-fs simple-audio-card,widgets simple-audio-card,routing sound-dai 