  j   8     (                                                                      google,veyron-tiger-rev8 google,veyron-tiger-rev7 google,veyron-tiger-rev6 google,veyron-tiger-rev5 google,veyron-tiger-rev4 google,veyron-tiger-rev3 google,veyron-tiger-rev2 google,veyron-tiger-rev1 google,veyron-tiger-rev0 google,veyron-tiger google,veyron rockchip,rk3288           &            7Google Tiger       aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0f0000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp               cpu@500         cpu          arm,cortex-a12                                     '           ;           J              Q  r        k   	        w         cpu@501         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w         cpu@502         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w         cpu@503         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w            opp-table-0          operating-points-v2                  w      opp-126000000                                  @      opp-216000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                opp-1608000000              _"                 opp-1704000000              e          p      opp-1800000000              kI          \         reserved-memory                                      dma-unusable@fe000000                                  oscillator           fixed-clock         n6         xin24m                      w   
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                         H           J     a   
        "pclk timer        display-subsystem            rockchip,display-subsystem          .            mmc@ff0c0000             rockchip,rk3288-dw-mshc         4р         J           D      r      v        "biu ciu ciu-drive ciu-sample            B                                           @                        Mreset         	  Ydisabled          mmc@ff0d0000             rockchip,rk3288-dw-mshc         4р         J           E      s      w        "biu ciu ciu-drive ciu-sample            B                   !                       @                        Mreset           Yokay            `            j         {                                     default                                                                                                         btmrvl@2             marvell,sd8897-bt                       &                                     default                     mmc@ff0e0000             rockchip,rk3288-dw-mshc         4р         J           F      t      x        "biu ciu ciu-drive ciu-sample            B                   "                       @                        Mreset         	  Ydisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         4р         J           G      u      y        "biu ciu ciu-drive ciu-sample            B                   #                       @                        Mreset           Yokay            `            0        B            `         k                            default                        saradc@ff100000          rockchip,saradc                                      $           z           J      I     [        "saradc apb_pclk                W        Msaradc-apb        	  Ydisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      A     R        "spiclk apb_pclk                             tx rx                   ,           default                                                                          	  Ydisabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      B     S        "spiclk apb_pclk                             tx rx                   -           default                      !                                                     	  Ydisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      C     T        "spiclk apb_pclk                             tx rx                   .           default            "   #   $   %                                                       Yokay                  flash@0          jedec,spi-nor                                i2c@ff140000             rockchip,rk3288-i2c                                      >                                     "i2c         J     M        default            &        Yokay                        2           d   tpm@20           infineon,slb9645tt                                i2c@ff150000             rockchip,rk3288-i2c                                      ?                                     "i2c         J     O        default            '        Yokay                        2          ,   touchscreen@10           elan,ekth3500                       &   (                       default            )   *           (                 +            +         -         i2c@ff160000             rockchip,rk3288-i2c                                      @                                     "i2c         J     P        default            ,        Yokay                        2          ,   ts3a227e@3b          ti,ts3a227e            ;         &   -                       default            .        ;           w            i2c@ff170000             rockchip,rk3288-i2c                                      A                                     "i2c         J     Q        default            /      	  Ydisabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        7           F           P           J      M     U        "baudclk apb_pclk                                tx rx           default            0   1   2        Yokay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        8           F           P           J      N     V        "baudclk apb_pclk                                tx rx           default            3        Yokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart               i                         9           F           P           J      O     W        "baudclk apb_pclk            default            4        Yokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        :           F           P           J      P     X        "baudclk apb_pclk                                tx rx           default            5      	  Ydisabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        ;           F           P           J      Q     Y        "baudclk apb_pclk                  	      
        tx rx           default            6      	  Ydisabled          dma-controller@ff250000          arm,pl330 arm,primecell             %        @                                      ]            h                 J            	  "apb_pclk            w         thermal-zones      reserve-thermal                                7          cpu-thermal            d                     7      trips      cpu_alert0           p                  passive         w   8      cpu_alert1           $                  passive         w   9      cpu_crit                             	  critical             cooling-maps       map0               8      0                                map1               9      0                          gpu-thermal            d                     7      trips      gpu_alert0           4                  passive         w   :      gpu_crit                             	  critical             cooling-maps       map0               :           ;               tsadc@ff280000           rockchip,rk3288-tsadc               (                         %           J      H     Z        "tsadc apb_pclk                       
  Mtsadc-apb           init default sleep             <           =           <                   #   >        0 H        Yokay            G           ^           w   7      ethernet@ff290000            rockchip,rk3288-gmac                )                                              ymacirq eth_wake_irq         #   >      8  J            f      g      c                 ]      M  "stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  Mstmmaceth           Yokay                             ?        input              @        rgmii              A        default            B   C   D   E                      0                                         '  u0         -   mdio0            snps,dwmac-mdio                              ethernet-phy@1                     w   @            usb@ff500000             generic-ehci                P                                    J             )   F        .usb         Yokay             8      usb@ff520000             generic-ohci                R                         )           J             )   F        .usb       	  Ydisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2               T                                    J             "otg         Nhost            )   G      	  .usb2-phy             V        Yokay             m      usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2               X                                    J             "otg         Nhost                                             @   @            )   H      	  .usb2-phy            Yokay                  z           H         m      usb@ff5c0000             generic-ehci                \                                    J           	  Ydisabled          dma-controller@ff600000          arm,pl330 arm,primecell             `        @                                       ]            h                 J            	  "apb_pclk          	  Ydisabled          i2c@ff650000             rockchip,rk3288-i2c             e                         <                                     "i2c         J     L        default            I        Yokay                        2           d   pmic@1b          rockchip,rk808                     xin32k wifibt_32kin          &   -                       default            J   K   L                  -                                                                                                )           6   +        C           P   M          M               Z   N        w      regulators     DCDC_REG1           gvdd_arm          v                  q                    q        w   	   regulator-state-mem                   DCDC_REG2           gvdd_gpu          v                  5                    q        w      regulator-state-mem                   DCDC_REG3           gvcc135_ddr           v            regulator-state-mem                   DCDC_REG4           gvcc_18           v                  w@         w@        w      regulator-state-mem                   w@         LDO_REG3            gvdd_10           v                  B@         B@   regulator-state-mem                   B@         LDO_REG7          
  gvdd10_lcd            v                  B@         B@   regulator-state-mem                   SWITCH_REG1       
  gvcc33_lcd            v                 w   d   regulator-state-mem                   LDO_REG6            gvcc18_codec          v                  w@         w@        w   e   regulator-state-mem                   LDO_REG2             v                  w@         w@        gvdd18_lcdt     regulator-state-mem                   LDO_REG8             v                  2Z         2Z      
  gvcc33_ccd      regulator-state-mem                   SWITCH_REG2       
  gvcc33_lan           w   A               i2c@ff660000             rockchip,rk3288-i2c             f                         =                                     "i2c         J     N        default            O        Yokay                        2              max98090@10          maxim,max98090                      &   P                       "mclk            J      q        default            Q        w            pwm@ff680000             rockchip,rk3288-pwm             h                 .           default            R        J     _        Yokay            w         pwm@ff680010             rockchip,rk3288-pwm             h                .           default            S        J     _        Yokay            w         pwm@ff680020             rockchip,rk3288-pwm             h                 .           default            T        J     _      	  Ydisabled          pwm@ff680030             rockchip,rk3288-pwm             h 0               .           default            U        J     _      	  Ydisabled          sram@ff700000         
   mmio-sram               p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                            sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram              r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd               s                 w      power-controller          !   rockchip,rk3288-power-controller            9                                     w   i   power-domain@9             	        J                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  M   V   W   X   Y   Z   [   \   ]   ^        9          power-domain@11                    J            o      p        M   _   `        9          power-domain@12                    J                   M   a        9          power-domain@13                    J              M   b   c        9             reboot-mode          syscon-reboot-mode          T           [RB         gRB        uRB	        RB         syscon@ff740000          rockchip,rk3288-sgrf syscon             t               clock-controller@ff760000            rockchip,rk3288-cru             v                 J   
        "xin24m          #   >                            H                                    j                k      $  #gׄ e  рxh рxh        w         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd               w                 w   >   edp-phy          rockchip,rk3288-dp-phy          J      h        "24m                     Yokay            w   y      io-domains        "   rockchip,rk3288-io-voltage-domain           Yokay               +                                 +           +           d        	           	   e      usbphy           rockchip,rk3288-usb-phy                                   Yokay       usb-phy@320                                J      ]        "phyclk                                   
  Mphy-reset           w   H      usb-phy@334                       4        J      ^        "phyclk                                   
  Mphy-reset           w   F      usb-phy@348                       H        J      _        "phyclk                                   
  Mphy-reset           w   G            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                              J     p                O           Yokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                              	$            J      T           
  "mclk hclk              f           tx                  6           default            g        #   >      	  Ydisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                              	$                    5           J      R             "i2s_clk i2s_hclk               f       f           tx rx           default            h        	5           	P           Yokay            w         crypto@ff8a0000          rockchip,rk3288-crypto                      @                 0            J                 }              "aclk hclk sclk apb_pclk                        Mcrypto-rst        iommu@ff900800           rockchip,iommu                      @                           J                   "aclk iface          	j          	  Ydisabled          iommu@ff914000           rockchip,iommu               @            P                                   J                   "aclk iface          	j             	w      	  Ydisabled          rga@ff920000             rockchip,rk3288-rga                                                J                 j        "aclk hclk sclk          	   i   	               i      l      m        Mcore axi ahb          vop@ff930000             rockchip,rk3288-vop                                                             J                         "aclk_vop dclk_vop hclk_vop          	   i   	               d      e      f        Maxi ahb dclk            	   j        Yokay       port                                      w      endpoint@0                      	   k        w         endpoint@1                     	   l        w   {      endpoint@2                     	   m        w   t      endpoint@3                     	   n        w   w            iommu@ff930300           rockchip,iommu                                                 J                   "aclk iface          	   i   	        	j            Yokay            w   j      vop@ff940000             rockchip,rk3288-vop                                                             J                         "aclk_vop dclk_vop hclk_vop          	   i   	                                   Maxi ahb dclk            	   o        Yokay       port                                      w      endpoint@0                      	   p        w         endpoint@1                     	   q        w   |      endpoint@2                     	   r        w   u      endpoint@3                     	   s        w   x            iommu@ff940300           rockchip,iommu                                                 J                   "aclk iface          	   i   	        	j            Yokay            w   o      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                       @                            J      ~     d      	  "ref pclk            	   i   	        #   >      	  Ydisabled       ports                                port@0                                           endpoint@0                      	   t        w   m      endpoint@1                     	   u        w   r         port@1                         lvds@ff96c000            rockchip,rk3288-lvds                       @         J     g      
  "pclk_lvds           lcdc               v        	   i   	        #   >      	  Ydisabled       ports                                port@0                                           endpoint@0                      	   w        w   n      endpoint@1                     	   x        w   s         port@1                         dp@ff970000          rockchip,rk3288-dp                      @                 b                 h           
        J      i     c        "dp pclk         )   y        .dp          	   i   	               o        Mdp          #   >        Yokay            default            z   ports                                port@0                                           endpoint@0                      	   {        w   l      endpoint@1                     	   |        w   q         port@1                                          endpoint@0                      	   }        w                  hdmi@ff980000            rockchip,rk3288-dw-hdmi                              P                   g           J     h      m      n        "iahb isfr cec           	   i   	        #   >        	$            Yokay            default unwedge            ~                   w      ports                                port@0                                           endpoint@0                      	           w   k      endpoint@1                     	           w   p         port@1                         video-codec@ff9a0000             rockchip,rk3288-vpu                                      	          
         
  yvepu vdpu           J                 
  "aclk hclk           	           	   i         iommu@ff9a0800           rockchip,iommu                                                 J                   "aclk iface          	j            	   i           w         iommu@ff9c0440           rockchip,iommu               @       @           @                o           J                   "aclk iface          	j          	  Ydisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                             $                                         yjob mmu gpu         J              '           ;           	   i           Yokay            	           w   ;      opp-table-1          operating-points-v2         w      opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon                                w   b      qos@ffaa0080             rockchip,rk3288-qos syscon                               w   c      qos@ffad0000             rockchip,rk3288-qos syscon                                w   W      qos@ffad0100             rockchip,rk3288-qos syscon                               w   X      qos@ffad0180             rockchip,rk3288-qos syscon                              w   Y      qos@ffad0400             rockchip,rk3288-qos syscon                               w   Z      qos@ffad0480             rockchip,rk3288-qos syscon                              w   [      qos@ffad0500             rockchip,rk3288-qos syscon                               w   V      qos@ffad0800             rockchip,rk3288-qos syscon                               w   \      qos@ffad0880             rockchip,rk3288-qos syscon                              w   ]      qos@ffad0900             rockchip,rk3288-qos syscon              	                 w   ^      qos@ffae0000             rockchip,rk3288-qos syscon                                w   a      qos@ffaf0000             rockchip,rk3288-qos syscon                                w   _      qos@ffaf0080             rockchip,rk3288-qos syscon                               w   `      dma-controller@ffb20000          arm,pl330 arm,primecell                     @                                       ]            h                 J            	  "apb_pclk            w   f      efuse@ffb40000           rockchip,rk3288-efuse                                                          J     q        "pclk_efuse     cpu-id@7                        cpu_leakage@17                         interrupt-controller@ffc01000            arm,gic-400          	        	                       @                                @             `                        	          w         pinctrl          rockchip,rk3288-pinctrl         #   >                                                     default sleep                                                                gpio@ff750000            rockchip,gpio-bank              u                         Q           J     @         	        	            	        	           
PMIC_SLEEP_AP DDRIO_PWROFF DDRIO_RETEN TS3A227E_INT_L PMIC_INT_L PWR_KEY_L HUB_USB1_nFALUT PHY_PMEB PHY_INT RECOVERY_SW_L OTP_OUT  USB_OTG_POWER_EN AP_WARM_RESET_H USB_OTG_nFALUT I2C0_SDA_PMIC I2C0_SCL_PMIC DEVMODE_L USB_INT            w   -      gpio@ff780000            rockchip,gpio-bank              x                         R           J     A         	        	            	        	         gpio@ff790000            rockchip,gpio-bank              y                         S           J     B         	        	            	        	         i  
CONFIG0 CONFIG1 CONFIG2     CONFIG3  EMMC_RST_L   BL_PWR_EN  TOUCH_INT TOUCH_RST I2C3_SCL_TP I2C3_SDA_TP            w   (      gpio@ff7a0000            rockchip,gpio-bank              z                         T           J     C         	        	            	        	           
FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7 VCC5V_GOOD_H        FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO      PHY_TXD2 PHY_TXD3 MAC_RXD2 MAC_RXD3 PHY_TXD0 PHY_TXD1 MAC_RXD0 MAC_RXD1        gpio@ff7b0000            rockchip,gpio-bank              {                         U           J     D         	        	            	        	           
MAC_MDC MAC_RXDV MAC_RXER MAC_CLK PHY_TXEN MAC_MDIO MAC_RXCLK  PHY_RST PHY_TXCLK       UART0_RXD UART0_TXD UART0_CTS_L UART0_RTS_L SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE           w         gpio@ff7c0000            rockchip,gpio-bank              |                         V           J     E         	        	            	        	           
            USB_OTG_CTL1 HUB_USB2_CTL1 HUB_USB2_PWR_EN HUB_USB_ILIM_SEL USB_OTG_STATUS_L HUB_USB1_CTL1 HUB_USB1_PWR_EN VCC50_HDMI_EN            w         gpio@ff7d0000            rockchip,gpio-bank              }                         W           J     F         	        	            	        	           
I2S0_SCLK I2S0_LRCK_RX I2S0_LRCK_TX I2S0_SDI I2S0_SDO0 HP_DET_H  INT_CODEC I2S0_CLK I2C2_SDA I2C2_SCL MICDET     HUB_USB2_nFALUT USB_OTG_ILIM_SEL           w   P      gpio@ff7e0000            rockchip,gpio-bank              ~                         X           J     G         	        	            	        	           
LCD_BL_PWM PWM_LOG BL_EN PWR_LED1 TPM_INT_H SPK_ON AP_FLASH_WP_L  CPU_NMI DVSOK  EDP_HPD DVS1  LCD_EN DVS2 HDMI_CEC I2C4_SDA I2C4_SCL I2C5_SDA_HDMI I2C5_SCL_HDMI 5V_DRV UART2_RXD UART2_TXD            w   M      gpio@ff7f0000            rockchip,gpio-bank                                       Y           J     H         	        	            	        	         ^  
RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         
                  hdmi-cec-c7         
                  hdmi-ddc             
                                w   ~      hdmi-ddc-unwedge             
                                 w         vcc50-hdmi-en           
                     w            pcfg-output-low          
#        w         pcfg-pull-up             
.        w         pcfg-pull-down           
;        w         pcfg-pull-none           
J        w         pcfg-pull-none-12ma          
J        
W           w         suspend    global-pwroff           
                      w         ddrio-pwroff            
                     w         ddr0-retention          
                     w         ddr1-retention          
                      edp    edp-hpd         
                    w   z         i2c0       i2c0-xfer            
                                  w   I         i2c1       i2c1-xfer            
                                w   &         i2c2       i2c2-xfer            
      	            
              w   O         i2c3       i2c3-xfer            
                                w   '         i2c4       i2c4-xfer            
                                w   ,         i2c5       i2c5-xfer            
                                w   /         i2s0       i2s0-bus          `  
                                                                                 w   h         lcdc       lcdc-ctl          @  
                                                        w   v         sdmmc      sdmmc-clk           
                  sdmmc-cmd           
                  sdmmc-cd            
                  sdmmc-bus1          
                  sdmmc-bus4        @  
                                                         sdio0      sdio0-bus1          
                  sdio0-bus4        @  
                                                        w         sdio0-cmd           
                    w         sdio0-clk           
                    w         sdio0-cd            
                  sdio0-wp            
                  sdio0-pwr           
                  sdio0-bkpwr         
                  sdio0-int           
                  wifienable-h            
                     w         bt-enable-l         
                   bt-host-wake            
                   bt-host-wake-l          
                     w         bt-dev-wake-sleep           
                     w         bt-dev-wake-awake           
                     w         bt-dev-wake         
                      sdio1      sdio1-bus1          
                  sdio1-bus4        @  
                                                      sdio1-cd            
                  sdio1-wp            
                  sdio1-bkpwr         
                  sdio1-int           
                  sdio1-cmd           
                  sdio1-clk           
                  sdio1-pwr           
      	               emmc       emmc-clk            
                    w         emmc-cmd            
                    w         emmc-pwr            
      	            emmc-bus1           
                   emmc-bus4         @  
                                                       emmc-bus8           
                                                                                                         w         emmc-reset          
      	               w            spi0       spi0-clk            
                    w         spi0-cs0            
                    w         spi0-tx         
                    w         spi0-rx         
                    w         spi0-cs1            
                     spi1       spi1-clk            
                    w         spi1-cs0            
                    w   !      spi1-rx         
                    w          spi1-tx         
                    w            spi2       spi2-cs1            
                  spi2-clk            
                    w   "      spi2-cs0            
                    w   %      spi2-rx         
                    w   $      spi2-tx         
      	              w   #         uart0      uart0-xfer           
                                w   0      uart0-cts           
                    w   1      uart0-rts           
                    w   2         uart1      uart1-xfer           
                  	              w   3      uart1-cts           
      
            uart1-rts           
                     uart2      uart2-xfer           
                                w   4         uart3      uart3-xfer           
                                w   5      uart3-cts           
      	            uart3-rts           
      
               uart4      uart4-xfer           
                                w   6      uart4-cts           
                  uart4-rts           
                     tsadc      otp-pin         
       
               w   <      otp-out         
       
              w   =         pwm0       pwm0-pin            
                     w   R         pwm1       pwm1-pin            
                    w   S         pwm2       pwm2-pin            
                    w   T         pwm3       pwm3-pin            
                    w   U         gmac       rgmii-pins          
                                                                                                                                           	                                                  w   B      rmii-pins           
                                                                                                                               phy-rst         
                     w   C      phy-pmeb            
                      w   D      phy-int         
                      w   E         spdif      spdif-tx            
                    w   g         pcfg-pull-none-drv-8ma           
J        
W           w         pcfg-pull-up-drv-8ma             
.        
W         pcfg-output-high             
f        w         buttons    pwr-key-l           
                      w            pmic       pmic-int-l          
                      w   J      dvs-1           
                     w   K      dvs-2           
                     w   L         reboot     ap-warm-reset-h         
                      w            recovery-switch    rec-mode-l          
       	                tpm    tpm-int-h           
                      write-protect      fw-wp-ap            
                      codec      hp-det          
                     w         int-codec           
                     w   Q      mic-det         
                     w            headset    ts3a227e-int-l          
                      w   .         buck-5v    drv-5v          
                     w            leds       pwr-led1-on         
                     w         pwr-led1-blink          
                     w            usb-bc12       usb-otg-ilim-sel            
                     w         usb-usb-ilim-sel            
                     w            usb-host       hub_usb1_pwr_en         
                     w         hub_usb2_pwr_en         
                     w         usb_otg_pwr_en          
                      w            backlight      bl_pwr_en           
                     w         bl-en           
                     w            lcd    lcd-en          
                     w            touchscreen    touch-int           
                     w   )      touch-rst           
                     w   *            chosen          
rserial2:115200n8          memory          memory                               power-button          
   gpio-keys           default               key-power           
~Power              -              
   t        
   d         -         gpio-restart             gpio-restart               -               default                    
         emmc-pwrseq          mmc-pwrseq-emmc                    default            (   	            w         sdio-pwrseq          mmc-pwrseq-simple           J            
  "ext_clock           default                                     w         regulator-vcc-5v             regulator-fixed         gvcc_5v           v                  LK@         LK@         
           M               default                    w   N      regulator-vcc33-sys          regulator-fixed       
  gvcc33_sys            v                  2Z         2Z        w         regulator-vcc50-hdmi             regulator-fixed         gvcc50_hdmi           v                 
   N         
                          default                  regulator-vdd-logic          pwm-regulator         
  gvdd_logic           
                     
           
   {            
            v                  ~         p                sound         !   rockchip,rockchip-audio-max98090            default                       
VEYRON-I2S                     &           ;   P               Q   P              h                    regulator-vccsys             regulator-fixed         gvccsys                    v        w         regulator-vcc33-io           regulator-fixed          v               	  gvcc33_io            w   +      regulator-vcc5-host1             regulator-fixed          
                          default                    gvcc5_host1           v               regulator-vcc5-host2             regulator-fixed          
                          default                    gvcc5_host2           v               regulator-vcc5v-otg          regulator-fixed          
           -               default                  	  gvcc5_otg             v               external-gmac-clock          fixed-clock                     sY@      	  ext_gmac            w   ?      regulator-backlight          regulator-fixed          
           (               default                    gbacklight_regulator         
             :        w         regulator-panel          regulator-fixed          
           M               default                    gpanel_regulator         
           w         backlight            pwm-backlight                                                  M               default                    
        B@               
           
                   w         panel            auo,b101ean01           Yokay                       &      panel-timing            @        0           8           E           Q            [           c           p           |         ports      port       endpoint            	           w   }                  	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply marvell,wakeup-pin cap-mmc-highspeed rockchip,default-sample-phase disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names rx-sample-delay-ns spi-max-frequency i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended reset-gpios vcc33-supply vccio-supply wakeup-source ti,micbias reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-handle phy-mode phy-supply rx_delay tx_delay snps,reset-gpio snps,reset-active-low snps,reset-delays-us phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply vcc10-supply dvs-gpios vcc11-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply audio-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority enable-active-high vin-supply pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,i2s-controller rockchip,audio-codec rockchip,hp-det-gpios rockchip,mic-det-gpios rockchip,headset-codec rockchip,hdmi-codec startup-delay-us brightness-levels num-interpolated-steps default-brightness-level enable-gpios post-pwm-on-delay-ms pwm-off-delay-ms power-supply backlight hactive hfront-porch hback-porch hsync-len vactive vfront-porch vback-porch vsync-len 