  y   8      (            y                                                          google,veyron-fievel-rev8 google,veyron-fievel-rev7 google,veyron-fievel-rev6 google,veyron-fievel-rev5 google,veyron-fievel-rev4 google,veyron-fievel-rev3 google,veyron-fievel-rev2 google,veyron-fievel-rev1 google,veyron-fievel-rev0 google,veyron-fievel google,veyron rockchip,rk3288             &            7Google Fievel      aliases          =/ethernet@ff290000           G/pinctrl/gpio@ff750000           M/pinctrl/gpio@ff780000           S/pinctrl/gpio@ff790000           Y/pinctrl/gpio@ff7a0000           _/pinctrl/gpio@ff7b0000           e/pinctrl/gpio@ff7c0000           k/pinctrl/gpio@ff7d0000           q/pinctrl/gpio@ff7e0000           w/pinctrl/gpio@ff7f0000           }/i2c@ff650000            /i2c@ff140000            /i2c@ff660000            /i2c@ff150000            /i2c@ff160000            /i2c@ff170000            /serial@ff180000             /serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /mmc@ff0f0000         arm-pmu          arm,cortex-a12-pmu        0                                                                      cpus                                       rockchip,rk3066-smp               cpu@500         cpu          arm,cortex-a12                                     '           ;           J              Q  r        k   	        w         cpu@501         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w         cpu@502         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w         cpu@503         cpu          arm,cortex-a12                                   '           ;           J              Q  r        w            opp-table-0          operating-points-v2                  w      opp-126000000                                  @      opp-216000000                               opp-408000000               Q                opp-600000000               #F                opp-696000000               )|          ~      opp-816000000               0,          B@      opp-1008000000              <                opp-1200000000              G                opp-1416000000              Tfr          O      opp-1512000000              ZJ                opp-1608000000              _"                 opp-1704000000              e          p      opp-1800000000              kI          \         reserved-memory                                      dma-unusable@fe000000                                  oscillator           fixed-clock         n6         xin24m                      w   
      timer            arm,armv7-timer                0                                 
          n6                timer@ff810000           rockchip,rk3288-timer                                         H           J     a   
        "pclk timer        display-subsystem            rockchip,display-subsystem          .            mmc@ff0c0000             rockchip,rk3288-dw-mshc         4р         J           D      r      v        "biu ciu ciu-drive ciu-sample            B                                           @                        Mreset         	  Ydisabled          mmc@ff0d0000             rockchip,rk3288-dw-mshc         4р         J           E      s      w        "biu ciu ciu-drive ciu-sample            B                   !                       @                        Mreset           Yokay            `            j         {                                     default                                                                                                         btmrvl@2             marvell,sd8897-bt                       &                                     default                     mmc@ff0e0000             rockchip,rk3288-dw-mshc         4р         J           F      t      x        "biu ciu ciu-drive ciu-sample            B                   "                       @                        Mreset         	  Ydisabled          mmc@ff0f0000             rockchip,rk3288-dw-mshc         4р         J           G      u      y        "biu ciu ciu-drive ciu-sample            B                   #                       @                        Mreset           Yokay            `            0        B            `         k                            default                        saradc@ff100000          rockchip,saradc                                      $           z           J      I     [        "saradc apb_pclk                W        Msaradc-apb        	  Ydisabled          spi@ff110000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      A     R        "spiclk apb_pclk                             tx rx                   ,           default                                                                          	  Ydisabled          spi@ff120000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      B     S        "spiclk apb_pclk                             tx rx                   -           default                      !                                                     	  Ydisabled          spi@ff130000          (   rockchip,rk3288-spi rockchip,rk3066-spi         J      C     T        "spiclk apb_pclk                             tx rx                   .           default            "   #   $   %                                                       Yokay                  flash@0          jedec,spi-nor                                i2c@ff140000             rockchip,rk3288-i2c                                      >                                     "i2c         J     M        default            &        Yokay                        2           d   tpm@20           infineon,slb9645tt                                i2c@ff150000             rockchip,rk3288-i2c                                      ?                                     "i2c         J     O        default            '      	  Ydisabled          i2c@ff160000             rockchip,rk3288-i2c                                      @                                     "i2c         J     P        default            (        Yokay                        2          ,   ts3a227e@3b          ti,ts3a227e            ;         &   )                       default            *                   w            i2c@ff170000             rockchip,rk3288-i2c                                      A                                     "i2c         J     Q        default            +      	  Ydisabled          serial@ff180000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        7                                 J      M     U        "baudclk apb_pclk                                tx rx           default            ,   -   .        Yokay          serial@ff190000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        8                                 J      N     V        "baudclk apb_pclk                                tx rx           default            /        Yokay          serial@ff690000       &   rockchip,rk3288-uart snps,dw-apb-uart               i                         9                                 J      O     W        "baudclk apb_pclk            default            0        Yokay          serial@ff1b0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        :                                 J      P     X        "baudclk apb_pclk                                tx rx           default            1      	  Ydisabled          serial@ff1c0000       &   rockchip,rk3288-uart snps,dw-apb-uart                                        ;                                 J      Q     Y        "baudclk apb_pclk                  	      
        tx rx           default            2      	  Ydisabled          dma-controller@ff250000          arm,pl330 arm,primecell             %        @                                      )            4         O        J            	  "apb_pclk            w         thermal-zones      reserve-thermal         f          |             3          cpu-thermal         f   d        |             3      trips      cpu_alert0           p                  passive         w   4      cpu_alert1           $                  passive         w   5      cpu_crit                             	  critical             cooling-maps       map0               4      0                                map1               5      0                          gpu-thermal         f   d        |             3      trips      gpu_alert0           4                  passive         w   6      gpu_crit                             	  critical             cooling-maps       map0               6           7               tsadc@ff280000           rockchip,rk3288-tsadc               (                         %           J      H     Z        "tsadc apb_pclk                       
  Mtsadc-apb           init default sleep             8           9           8                      :         H        Yokay                       *           w   3      ethernet@ff290000            rockchip,rk3288-gmac                )                                              Emacirq eth_wake_irq            :      8  J            f      g      c                 ]      M  "stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                   B      
  Mstmmaceth           Yokay            U              e   ;        |input              <        rgmii              =        default            >   ?   @   A                      0                                         '  u0            mdio0            snps,dwmac-mdio                              ethernet-phy@1                     w   <            usb@ff500000             generic-ehci                P                                    J                B        usb         Yokay                   usb@ff520000             generic-ohci                R                         )           J                B        usb       	  Ydisabled          usb@ff540000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2               T                                    J             "otg         (host               C      	  usb2-phy             0        Yokay             G      usb@ff580000          2   rockchip,rk3288-usb rockchip,rk3066-usb snps,dwc2               X                                    J             "otg         (host            ^           p                      @   @               D      	  usb2-phy            Yokay            U      z        e   D         G      usb@ff5c0000             generic-ehci                \                                    J           	  Ydisabled          dma-controller@ff600000          arm,pl330 arm,primecell             `        @                                       )            4         O        J            	  "apb_pclk          	  Ydisabled          i2c@ff650000             rockchip,rk3288-i2c             e                         <                                     "i2c         J     L        default            E        Yokay                        2           d   pmic@1b          rockchip,rk808                     xin32k wifibt_32kin          &   )                       default            F   G   H                                                                                                                                I                   *   J          J               4   K        w      regulators     DCDC_REG1           Avdd_arm          P         d        v q                    q        w   	   regulator-state-mem                   DCDC_REG2           Avdd_gpu          P         d        v 5                    q        w      regulator-state-mem                   DCDC_REG3           Avcc135_ddr           P         d   regulator-state-mem                   DCDC_REG4           Avcc_18           P         d        v w@         w@        w      regulator-state-mem                   w@         LDO_REG3            Avdd_10           P         d        v B@         B@   regulator-state-mem                   B@         LDO_REG7          
  Avdd10_lcd            P         d        v B@         B@   regulator-state-mem                   SWITCH_REG1       
  Avcc33_lcd            P         d        w   a   regulator-state-mem                   LDO_REG6            Avcc18_codec          P         d        v w@         w@        w   b   regulator-state-mem                   LDO_REG2             P         d        v w@         w@        Avdd18_lcdt     regulator-state-mem                   LDO_REG8             P         d        v 2Z         2Z      
  Avcc33_ccd      regulator-state-mem                   SWITCH_REG2       
  Avcc33_lan           w   =               i2c@ff660000             rockchip,rk3288-i2c             f                         =                                     "i2c         J     N        default            L        Yokay                        2              max98090@10          maxim,max98090                      &   M                       "mclk            J      q        default            N        w            pwm@ff680000             rockchip,rk3288-pwm             h                            default            O        J     _      	  Ydisabled          pwm@ff680010             rockchip,rk3288-pwm             h                           default            P        J     _        Yokay            w         pwm@ff680020             rockchip,rk3288-pwm             h                            default            Q        J     _      	  Ydisabled          pwm@ff680030             rockchip,rk3288-pwm             h 0                          default            R        J     _      	  Ydisabled          sram@ff700000         
   mmio-sram               p                                                 p       smp-sram@0           rockchip,rk3066-smp-sram                            sram@ff720000         #   rockchip,rk3288-pmu-sram mmio-sram              r               power-management@ff730000         &   rockchip,rk3288-pmu syscon simple-mfd               s                 w      power-controller          !   rockchip,rk3288-power-controller                                                 w   f   power-domain@9             	        J                                                                                   c     h     g     f     d     e      h      i      l      k      j      $  '   S   T   U   V   W   X   Y   Z   [                  power-domain@11                    J            o      p        '   \   ]                  power-domain@12                    J                   '   ^                  power-domain@13                    J              '   _   `                     reboot-mode          syscon-reboot-mode          .           5RB         ARB        ORB	        _RB         syscon@ff740000          rockchip,rk3288-sgrf syscon             t               clock-controller@ff760000            rockchip,rk3288-cru             v                 J   
        "xin24m             :                   k         H  U                                  j                k      $  x#gׄ e  рxh рxh        w         syscon@ff770000       &   rockchip,rk3288-grf syscon simple-mfd               w                 w   :   edp-phy          rockchip,rk3288-dp-phy          J      h        "24m                   	  Ydisabled            w   v      io-domains        "   rockchip,rk3288-io-voltage-domain           Yokay               I                                 I           I           a                      b      usbphy           rockchip,rk3288-usb-phy                                   Yokay       usb-phy@320                                J      ]        "phyclk                                   
  Mphy-reset           w   D      usb-phy@334                       4        J      ^        "phyclk                                   
  Mphy-reset           w   B      usb-phy@348                       H        J      _        "phyclk                                   
  Mphy-reset           w   C            watchdog@ff800000             rockchip,rk3288-wdt snps,dw-wdt                              J     p                O           Yokay          sound@ff8b0000        ,   rockchip,rk3288-spdif rockchip,rk3066-spdif                                          J      T           
  "mclk hclk              c           tx                  6           default            d           :      	  Ydisabled          i2s@ff890000          (   rockchip,rk3288-i2s rockchip,rk3066-i2s                                                  5           J      R             "i2s_clk i2s_hclk               c       c           tx rx           default            e        	           	*           Yokay            w         crypto@ff8a0000          rockchip,rk3288-crypto                      @                 0            J                 }              "aclk hclk sclk apb_pclk                        Mcrypto-rst        iommu@ff900800           rockchip,iommu                      @                           J                   "aclk iface          	D          	  Ydisabled          iommu@ff914000           rockchip,iommu               @            P                                   J                   "aclk iface          	D             	Q      	  Ydisabled          rga@ff920000             rockchip,rk3288-rga                                                J                 j        "aclk hclk sclk          	l   f   	               i      l      m        Mcore axi ahb          vop@ff930000             rockchip,rk3288-vop                                                             J                         "aclk_vop dclk_vop hclk_vop          	l   f   	               d      e      f        Maxi ahb dclk            	z   g        Yokay       port                                      w      endpoint@0                      	   h        w   {      endpoint@1                     	   i        w   w      endpoint@2                     	   j        w   q      endpoint@3                     	   k        w   t            iommu@ff930300           rockchip,iommu                                                 J                   "aclk iface          	l   f   	        	D            Yokay            w   g      vop@ff940000             rockchip,rk3288-vop                                                             J                         "aclk_vop dclk_vop hclk_vop          	l   f   	                                   Maxi ahb dclk            	z   l      	  Ydisabled       port                                      w      endpoint@0                      	   m        w   |      endpoint@1                     	   n        w   x      endpoint@2                     	   o        w   r      endpoint@3                     	   p        w   u            iommu@ff940300           rockchip,iommu                                                 J                   "aclk iface          	l   f   	        	D          	  Ydisabled            w   l      dsi@ff960000          *   rockchip,rk3288-mipi-dsi snps,dw-mipi-dsi                       @                            J      ~     d      	  "ref pclk            	l   f   	           :      	  Ydisabled       ports                                port@0                                           endpoint@0                      	   q        w   j      endpoint@1                     	   r        w   o         port@1                         lvds@ff96c000            rockchip,rk3288-lvds                       @         J     g      
  "pclk_lvds           lcdc               s        	l   f   	           :      	  Ydisabled       ports                                port@0                                           endpoint@0                      	   t        w   k      endpoint@1                     	   u        w   p         port@1                         dp@ff970000          rockchip,rk3288-dp                      @                 b           U      h        e   
        J      i     c        "dp pclk            v        dp          	l   f   	               o        Mdp             :      	  Ydisabled       ports                                port@0                                           endpoint@0                      	   w        w   i      endpoint@1                     	   x        w   n         port@1                         hdmi@ff980000            rockchip,rk3288-dw-hdmi                                                 g           J     h      m      n        "iahb isfr cec           	l   f   	           :                    Yokay            default unwedge            y           z        w      ports                                port@0                                           endpoint@0                      	   {        w   h      endpoint@1                     	   |        w   m         port@1                         video-codec@ff9a0000             rockchip,rk3288-vpu                                      	          
         
  Evepu vdpu           J                 
  "aclk hclk           	z   }        	l   f         iommu@ff9a0800           rockchip,iommu                                                 J                   "aclk iface          	D            	l   f           w   }      iommu@ff9c0440           rockchip,iommu               @       @           @                o           J                   "aclk iface          	D          	  Ydisabled          gpu@ffa30000          #   rockchip,rk3288-mali arm,mali-t760                             $                                         Ejob mmu gpu         J              '   ~        ;           	l   f           Yokay            	           w   7      opp-table-1          operating-points-v2         w   ~   opp-100000000                         ~      opp-200000000                         ~      opp-300000000                         B@      opp-400000000               ׄ                opp-600000000               #F                   qos@ffaa0000             rockchip,rk3288-qos syscon                                w   _      qos@ffaa0080             rockchip,rk3288-qos syscon                               w   `      qos@ffad0000             rockchip,rk3288-qos syscon                                w   T      qos@ffad0100             rockchip,rk3288-qos syscon                               w   U      qos@ffad0180             rockchip,rk3288-qos syscon                              w   V      qos@ffad0400             rockchip,rk3288-qos syscon                               w   W      qos@ffad0480             rockchip,rk3288-qos syscon                              w   X      qos@ffad0500             rockchip,rk3288-qos syscon                               w   S      qos@ffad0800             rockchip,rk3288-qos syscon                               w   Y      qos@ffad0880             rockchip,rk3288-qos syscon                              w   Z      qos@ffad0900             rockchip,rk3288-qos syscon              	                 w   [      qos@ffae0000             rockchip,rk3288-qos syscon                                w   ^      qos@ffaf0000             rockchip,rk3288-qos syscon                                w   \      qos@ffaf0080             rockchip,rk3288-qos syscon                               w   ]      dma-controller@ffb20000          arm,pl330 arm,primecell                     @                                       )            4         O        J            	  "apb_pclk            w   c      efuse@ffb40000           rockchip,rk3288-efuse                                                          J     q        "pclk_efuse     cpu-id@7                        cpu_leakage@17                         interrupt-controller@ffc01000            arm,gic-400          	        	                       @                                @             `                        	          w         pinctrl          rockchip,rk3288-pinctrl            :                                                     default sleep                                                                gpio@ff750000            rockchip,gpio-bank              u                         Q           J     @         	        	            	        	           	PMIC_SLEEP_AP DDRIO_PWROFF DDRIO_RETEN TS3A227E_INT_L PMIC_INT_L PWR_KEY_L HUB_USB1_nFALUT PHY_PMEB PHY_INT RECOVERY_SW_L OTP_OUT  USB_OTG_POWER_EN AP_WARM_RESET_H USB_OTG_nFALUT I2C0_SDA_PMIC I2C0_SCL_PMIC DEVMODE_L USB_INT            w   )      gpio@ff780000            rockchip,gpio-bank              x                         R           J     A         	        	            	        	         gpio@ff790000            rockchip,gpio-bank              y                         S           J     B         	        	            	        	         i  	CONFIG0 CONFIG1 CONFIG2     CONFIG3  EMMC_RST_L   BL_PWR_EN  TOUCH_INT TOUCH_RST I2C3_SCL_TP I2C3_SDA_TP            w         gpio@ff7a0000            rockchip,gpio-bank              z                         T           J     C         	        	            	        	           	FLASH0_D0 FLASH0_D1 FLASH0_D2 FLASH0_D3 FLASH0_D4 FLASH0_D5 FLASH0_D6 FLASH0_D7 VCC5V_GOOD_H        FLASH0_CS2/EMMC_CMD  FLASH0_DQS/EMMC_CLKO      PHY_TXD2 PHY_TXD3 MAC_RXD2 MAC_RXD3 PHY_TXD0 PHY_TXD1 MAC_RXD0 MAC_RXD1        gpio@ff7b0000            rockchip,gpio-bank              {                         U           J     D         	        	            	        	           	MAC_MDC MAC_RXDV MAC_RXER MAC_CLK PHY_TXEN MAC_MDIO MAC_RXCLK  PHY_RST PHY_TXCLK       UART0_RXD UART0_TXD UART0_CTS_L UART0_RTS_L SDIO0_D0 SDIO0_D1 SDIO0_D2 SDIO0_D3 SDIO0_CMD SDIO0_CLK BT_DEV_WAKE  WIFI_ENABLE_H BT_ENABLE_L WIFI_HOST_WAKE BT_HOST_WAKE           w         gpio@ff7c0000            rockchip,gpio-bank              |                         V           J     E         	        	            	        	           	            USB_OTG_CTL1 HUB_USB2_CTL1 HUB_USB2_PWR_EN HUB_USB_ILIM_SEL USB_OTG_STATUS_L HUB_USB1_CTL1 HUB_USB1_PWR_EN VCC50_HDMI_EN            w         gpio@ff7d0000            rockchip,gpio-bank              }                         W           J     F         	        	            	        	           	I2S0_SCLK I2S0_LRCK_RX I2S0_LRCK_TX I2S0_SDI I2S0_SDO0 HP_DET_H  INT_CODEC I2S0_CLK I2C2_SDA I2C2_SCL MICDET     HUB_USB2_nFALUT USB_OTG_ILIM_SEL           w   M      gpio@ff7e0000            rockchip,gpio-bank              ~                         X           J     G         	        	            	        	           	LCD_BL_PWM PWM_LOG BL_EN PWR_LED1 TPM_INT_H SPK_ON AP_FLASH_WP_L  CPU_NMI DVSOK  EDP_HPD DVS1  LCD_EN DVS2 HDMI_CEC I2C4_SDA I2C4_SCL I2C5_SDA_HDMI I2C5_SCL_HDMI 5V_DRV UART2_RXD UART2_TXD            w   J      gpio@ff7f0000            rockchip,gpio-bank                                       Y           J     H         	        	            	        	         ^  	RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3 I2C1_SDA_TPM I2C1_SCL_TPM SPI2_CLK SPI2_CS0 SPI2_RXD SPI2_TXD         hdmi       hdmi-cec-c0         	                  hdmi-cec-c7         	                  hdmi-ddc             	                                w   y      hdmi-ddc-unwedge             	                                 w   z      vcc50-hdmi-en           	                     w            pcfg-output-low          	        w         pcfg-pull-up             
        w         pcfg-pull-down           
        w         pcfg-pull-none           
$        w         pcfg-pull-none-12ma          
$        
1           w         suspend    global-pwroff           	                      w         ddrio-pwroff            	                     w         ddr0-retention          	                     w         ddr1-retention          	                      edp    edp-hpd         	                     i2c0       i2c0-xfer            	                                  w   E         i2c1       i2c1-xfer            	                                w   &         i2c2       i2c2-xfer            	      	            
              w   L         i2c3       i2c3-xfer            	                                w   '         i2c4       i2c4-xfer            	                                w   (         i2c5       i2c5-xfer            	                                w   +         i2s0       i2s0-bus          `  	                                                                                 w   e         lcdc       lcdc-ctl          @  	                                                        w   s         sdmmc      sdmmc-clk           	                  sdmmc-cmd           	                  sdmmc-cd            	                  sdmmc-bus1          	                  sdmmc-bus4        @  	                                                         sdio0      sdio0-bus1          	                  sdio0-bus4        @  	                                                        w         sdio0-cmd           	                    w         sdio0-clk           	                    w         sdio0-cd            	                  sdio0-wp            	                  sdio0-pwr           	                  sdio0-bkpwr         	                  sdio0-int           	                  wifienable-h            	                     w         bt-enable-l         	                   bt-host-wake            	                   bt-host-wake-l          	                     w         bt-dev-wake-sleep           	                     w         bt-dev-wake-awake           	                     w         bt-dev-wake         	                      sdio1      sdio1-bus1          	                  sdio1-bus4        @  	                                                      sdio1-cd            	                  sdio1-wp            	                  sdio1-bkpwr         	                  sdio1-int           	                  sdio1-cmd           	                  sdio1-clk           	                  sdio1-pwr           	      	               emmc       emmc-clk            	                    w         emmc-cmd            	                    w         emmc-pwr            	      	            emmc-bus1           	                   emmc-bus4         @  	                                                       emmc-bus8           	                                                                                                         w         emmc-reset          	      	               w            spi0       spi0-clk            	                    w         spi0-cs0            	                    w         spi0-tx         	                    w         spi0-rx         	                    w         spi0-cs1            	                     spi1       spi1-clk            	                    w         spi1-cs0            	                    w   !      spi1-rx         	                    w          spi1-tx         	                    w            spi2       spi2-cs1            	                  spi2-clk            	                    w   "      spi2-cs0            	                    w   %      spi2-rx         	                    w   $      spi2-tx         	      	              w   #         uart0      uart0-xfer           	                                w   ,      uart0-cts           	                    w   -      uart0-rts           	                    w   .         uart1      uart1-xfer           	                  	              w   /      uart1-cts           	      
            uart1-rts           	                     uart2      uart2-xfer           	                                w   0         uart3      uart3-xfer           	                                w   1      uart3-cts           	      	            uart3-rts           	      
               uart4      uart4-xfer           	                                w   2      uart4-cts           	                  uart4-rts           	                     tsadc      otp-pin         	       
               w   8      otp-out         	       
              w   9         pwm0       pwm0-pin            	                     w   O         pwm1       pwm1-pin            	                    w   P         pwm2       pwm2-pin            	                    w   Q         pwm3       pwm3-pin            	                    w   R         gmac       rgmii-pins          	                                                                                                                                           	                                                  w   >      rmii-pins           	                                                                                                                               phy-rst         	                     w   ?      phy-pmeb            	                      w   @      phy-int         	                      w   A         spdif      spdif-tx            	                    w   d         pcfg-pull-none-drv-8ma           
$        
1           w         pcfg-pull-up-drv-8ma             
        
1         pcfg-output-high             
@        w         buttons    pwr-key-l           	                      w            pmic       pmic-int-l          	                      w   F      dvs-1           	                     w   G      dvs-2           	                     w   H         reboot     ap-warm-reset-h         	                      w            recovery-switch    rec-mode-l          	       	                tpm    tpm-int-h           	                      write-protect      fw-wp-ap            	                      codec      hp-det          	                     w         int-codec           	                     w   N      mic-det         	                     w            headset    ts3a227e-int-l          	                      w   *         buck-5v    drv-5v          	                     w            leds       pwr-led1-on         	                     w         pwr-led1-blink          	                     w            usb-bc12       usb-otg-ilim-sel            	                     w         usb-usb-ilim-sel            	                     w            usb-host       hub_usb1_pwr_en         	                     w         hub_usb2_pwr_en         	                     w         usb_otg_pwr_en          	                      w               chosen          
Lserial2:115200n8          memory          memory                               power-button          
   gpio-keys           default               key-power           
XPower           .   )              
^   t        
i   d                  gpio-restart             gpio-restart            .   )               default                    
{         emmc-pwrseq          mmc-pwrseq-emmc                    default         
      	            w         sdio-pwrseq          mmc-pwrseq-simple           J            
  "ext_clock           default                    
                 w         regulator-vcc-5v             regulator-fixed         Avcc_5v           P         d        v LK@         LK@         
           J               default                    w   K      regulator-vcc33-sys          regulator-fixed       
  Avcc33_sys            P         d        v 2Z         2Z        w         regulator-vcc50-hdmi             regulator-fixed         Avcc50_hdmi           P         d        
   K         
                          default                  regulator-vdd-logic          pwm-regulator         
  Avdd_logic           
                     
           
   {            
            P         d        v ~         p                sound         !   rockchip,rockchip-audio-max98090            default                       
VEYRON-I2S          
                      !   M               7   M              N           e         regulator-vccsys             regulator-fixed         Avccsys           d         P      regulator-vcc33-io           regulator-fixed          P         d      	  Avcc33_io            w   I      regulator-vcc5-host1             regulator-fixed          
                          default                    Avcc5_host1           P         d      regulator-vcc5-host2             regulator-fixed          
                          default                    Avcc5_host2           P         d      regulator-vcc5v-otg          regulator-fixed          
           )               default                  	  Avcc5_otg             P         d      external-gmac-clock          fixed-clock                     sY@      	  ext_gmac            w   ;         	#address-cells #size-cells compatible interrupt-parent model ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 gpio8 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 mmc0 interrupts interrupt-affinity enable-method rockchip,pmu device_type reg resets operating-points-v2 #cooling-cells clocks dynamic-power-coefficient cpu0-supply phandle opp-shared opp-hz opp-microvolt clock-latency-ns ranges clock-frequency clock-output-names #clock-cells arm,cpu-registers-not-fw-configured arm,no-tick-in-suspend clock-names ports max-frequency fifo-depth reset-names status bus-width cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable pinctrl-names pinctrl-0 sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply marvell,wakeup-pin cap-mmc-highspeed rockchip,default-sample-phase disable-wp mmc-hs200-1_8v #io-channel-cells dmas dma-names rx-sample-delay-ns spi-max-frequency i2c-scl-falling-time-ns i2c-scl-rising-time-ns powered-while-suspended ti,micbias reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,grf rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names assigned-clocks assigned-clock-parents clock_in_out phy-handle phy-mode phy-supply rx_delay tx_delay snps,reset-gpio snps,reset-active-low snps,reset-delays-us wakeup-source phys phy-names needs-reset-on-resume dr_mode snps,reset-phy-on-wake snps,need-phy-for-wake g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size rockchip,system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc12-supply vddio-supply vcc10-supply dvs-gpios vcc11-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells assigned-clock-rates #phy-cells bb-supply dvp-supply flash0-supply gpio1830-supply gpio30-supply lcdc-supply wifi-supply audio-supply #sound-dai-cells rockchip,playback-channels rockchip,capture-channels #iommu-cells rockchip,disable-mmu-reset power-domains iommus remote-endpoint mali-supply interrupt-controller #interrupt-cells gpio-controller #gpio-cells gpio-line-names rockchip,pins output-low bias-pull-up bias-pull-down bias-disable drive-strength output-high stdout-path label linux,code debounce-interval priority reset-gpios enable-active-high vin-supply pwms pwm-supply pwm-dutycycle-range pwm-dutycycle-unit rockchip,model rockchip,i2s-controller rockchip,audio-codec rockchip,hp-det-gpios rockchip,mic-det-gpios rockchip,headset-codec rockchip,hdmi-codec 