     8     (            	                                                                     ,   ,asus,rk3566-tinker-board-3s rockchip,rk3566          7Asus Tinker Board 3S       aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe2b0000            /mmc@fe310000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                       psci                       (   @        :           G           T   @        f           s                                    
      cpu@100          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                          cpu@200          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                          cpu@300          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                             l3-cache             ,cache                                          *   @        <                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            ˂                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI             i2s                  	  3disabled       simple-audio-card,codec         :         simple-audio-card,cpu           :   	         pmu          ,arm,cortex-a55-pmu        0  D                                                O   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   b   shmem@10f000             ,arm,scmi-shmem                                 i                    timer            ,arm,armv8-timer       0  D                                 
            p      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          D       _                       	  sata-phy                                   	  3disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          D       `                       	  sata-phy                                   	  3disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          D                                             ref_clk suspend_clk bus_clk         otg       
  utmi_wide                                              	  3disabled                     	  usb2-phy            .           5high-speed        usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          D                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                              	  3disabled          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 D      	            C        X           i    A          s  (            ~         b                                                msi-controller@fd440000          ,arm,gic-v3-its               D                           ~                      L         usb@fd800000             ,generic-ehci                                  D                                                        usb         3okay          usb@fd840000             ,generic-ohci                                  D                                                        usb         3okay          usb@fd880000             ,generic-ehci                                  D                                                        usb         3okay          usb@fd8c0000             ,generic-ohci                                  D                                                        usb         3okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     J   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain         	  3disabled             syscon@fdc50000                                 ,rockchip,rk3566-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                               clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                                                             G                                            i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               D       .                        -      	  i2c pclk                       default                                   3okay       pmic@20          ,rockchip,rk809                             H                                       H        mclk            rk809-clkout1 rk809-clkout2                      D              default                                             '        5           A           M           Y           e           q           }                            regulators     DCDC_REG5           vcc_1v8                            w@         w@           Y   regulator-state-mem                   SWITCH_REG1         vcc_3v3                              X   regulator-state-mem                   SWITCH_REG2       
  vcc3v3_sd                                Q   regulator-state-mem                   LDO_REG5          	  vccio_sd                               w@         2Z           R   regulator-state-mem                         regulator@40             ,silergy,syr827              @                   vdd_cpu                            0         O        <          Q                 regulator-state-mem                      serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 D       t                        ,        baudclk apb_pclk            \                          !        default         a           n         	  3disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               "        default         x         	  3disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               #        default         x         	  3disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               $        default         x         	  3disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               %        default         x         	  3disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller                                                       power-domain@7                                              &                  power-domain@8                                              '   (   )                  power-domain@9              	                                      *   +   ,                  power-domain@10             
                                -   .   /   0   1   2                  power-domain@11                                       3                  power-domain@13                                      4                  power-domain@14                                      5   6   7                  power-domain@15                                       8   9   :   ;   <                        gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  D       (          )          '           job mmu gpu                              gpu bus                                 	  3disabled               =                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               D                  vdpu                               
  aclk hclk              >                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        D                  aclk iface                                                            >      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              D       Z                                      aclk hclk sclk               &     $     %        core axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  D       @                              
  aclk hclk              ?              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        D       ?                                aclk iface                
                       ?      video-capture@fdfe0000           ,rockchip,rk3568-vicap                                 D                                                                           aclk hclk dclk iclk            @                    (                                        arst hrst drst prst irst                     	  3disabled       ports                                port@0                     port@1                          iommu@fdfe0800           ,rockchip,rk3568-iommu                                D                                       aclk iface                                           	  3disabled               @      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         D       d                                           biu ciu ciu-drive ciu-sample                       р                      reset         	  3disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 D                             macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  stmmaceth                         A                 #   B        6   C         I      	  3disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config           R                                 \           l              A      rx-queues-config            |              B   queue0           tx-queues-config                          C   queue0              vop@fe040000                          0     @                vop gamma-lut           D                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               D              	                 	  3disabled             ,rockchip,rk3566-vop    ports                                           port@0                                               port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                D                                       aclk iface                            	      	  3disabled               D      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       D           pclk                           dphy               E              	        apb                               	  3disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       E           pclk                           dphy               F              	        apb                               	  3disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 D       -         (                          (              iahb isfr cec ref           default            G   H   I              	        a                                	  3disabled                  ports                                port@0                     port@1                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   &      qos@fe138080             ,rockchip,rk3568-qos syscon                                  5      qos@fe138100             ,rockchip,rk3568-qos syscon                                   6      qos@fe138180             ,rockchip,rk3568-qos syscon                                  7      qos@fe148000             ,rockchip,rk3568-qos syscon                                   '      qos@fe148080             ,rockchip,rk3568-qos syscon                                  (      qos@fe148100             ,rockchip,rk3568-qos syscon                                   )      qos@fe150000             ,rockchip,rk3568-qos syscon                                    3      qos@fe158000             ,rockchip,rk3568-qos syscon                                   -      qos@fe158100             ,rockchip,rk3568-qos syscon                                   .      qos@fe158180             ,rockchip,rk3568-qos syscon                                  /      qos@fe158200             ,rockchip,rk3568-qos syscon                                   0      qos@fe158280             ,rockchip,rk3568-qos syscon                                  1      qos@fe158300             ,rockchip,rk3568-qos syscon                                   2      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    8      qos@fe190280             ,rockchip,rk3568-qos syscon                                  9      qos@fe190300             ,rockchip,rk3568-qos syscon                                   :      qos@fe190380             ,rockchip,rk3568-qos syscon                                  ;      qos@fe190400             ,rockchip,rk3568-qos syscon                                   <      qos@fe198000             ,rockchip,rk3568-qos syscon                                   4      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   *      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  +      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   ,      dfi@fe230000             ,rockchip,rk3568-dfi              #                 D                     J      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               dbi apb config        <  D       K          J          I          H          G           sys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         X                                `                    K                      K                     K                     K                                  
                      (       L               0                       	  pcie-phy                        T  b                                                                  @                         pipe                                   	  3disabled       legacy-interrupt-controller                      X            C                     D       H              K         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         D       b                                           biu ciu ciu-drive ciu-sample                       р                      reset           3okay            :            D         U        default            M   N   O   P        `   Q        l   R      mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         D       c                                           biu ciu ciu-drive ciu-sample                       р                      reset         	  3disabled          spi@fe300000             ,rockchip,sfc                 0        @         D       e                  x      v        clk_sfc hclk_sfc               S        default       	  3disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 D                        {      }         n6       (         |      z      y      {      }        core bus axi block timer            3okay            :            y                                   default            T   U   V   W        `   X        l   Y      rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb                  m      	  3disabled          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 D       4                 =      A        Fq Fq                ?      C      9        mclk_tx mclk_rx hclk            \   Z            tx                P      Q      
  tx-m rx-m                                	  3disabled               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 D       5                 E      I        Fq Fq                G      K      :        mclk_tx mclk_rx hclk            \   Z      Z           rx tx                 R      S      
  tx-m rx-m                      default       0     [   \   ]   ^   _   `   a   b   c   d   e   f                  	  3disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 D       6                 M        Fq                O      O      ;        mclk_tx mclk_rx hclk            \   Z      Z           tx rx                 T        tx-m                       default            g   h   i   j                  	  3disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 D       7                  S      W      <        mclk_tx mclk_rx hclk            \   Z      Z           tx rx                 U      V      
  tx-m rx-m                                	  3disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 D       L                  Z      Y        pdm_clk pdm_hclk            \   Z   	        rx             k   l   m   n   o   p        default               X        pdm-m                     	  3disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 D       f         
  mclk hclk                  _      \        \   Z           tx          default            q                  	  3disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         D                                                 	  apb_pclk                                 dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         D                                                 	  apb_pclk                          Z      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 D       /                 H     G      	  i2c pclk               r        default                                 	  3disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 D       0                 J     I      	  i2c pclk               s        default                                   3okay       eeprom@50            ,atmel,24c08             P        default            t      rtc@6f           ,isil,isl1208                o        irq                          default            u         i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 D       1                 L     K      	  i2c pclk               v        default                                 	  3disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 D       2                 N     M      	  i2c pclk               w        default                                 	  3disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 D       3                 P     O      	  i2c pclk               x        default                                 	  3disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 D                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 D       g                 R     Q        spiclk apb_pclk         \                      tx rx           default            y   z   {                                	  3disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 D       h                 T     S        spiclk apb_pclk         \                      tx rx           default            |   }   ~                                	  3disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 D       i                 V     U        spiclk apb_pclk         \                      tx rx           default                                                  	  3disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 D       j                 X     W        spiclk apb_pclk         \                      tx rx           default                                                  	  3disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 D       u                              baudclk apb_pclk            \                                 default         a           n         	  3disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 D       v                 #              baudclk apb_pclk            \                                 default         a           n           3okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 D       w                 '     $        baudclk apb_pclk            \                                 default         a           n         	  3disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 D       x                 +     (        baudclk apb_pclk            \              	                   default         a           n         	  3disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 D       y                 /     ,        baudclk apb_pclk            \       
                          default         a           n         	  3disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 D       z                 3     0        baudclk apb_pclk            \                                 default         a           n         	  3disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 D       {                 7     4        baudclk apb_pclk            \                                 default         a           n         	  3disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 D       |                 ;     8        baudclk apb_pclk            \                                 default         a           n         	  3disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 D       }                 ?     <        baudclk apb_pclk            \                                 default         a           n         	  3disabled          thermal-zones      cpu-thermal            d                            trips      cpu_alert0           p        (           passive                  cpu_alert1           $        (           passive       cpu_crit             s        (        	   critical             cooling-maps       map0            3         0  8   
                     gpu-thermal                                       trips      gpu-threshold            p        (           passive       gpu-target           $        (           passive                  gpu-crit             s        (        	   critical             cooling-maps       map0            3           8                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 D       s                             f@ 
`                           tsadc apb_pclk                                            G s        default sleep                      ^           h         	  3disabled                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 D       ]                              saradc apb_pclk                      saradc-apb          ~         	  3disabled          pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         x         	  3disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         x         	  3disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         x         	  3disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default         x         	  3disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         x         	  3disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         x         	  3disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         x         	  3disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default         x         	  3disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         x         	  3disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         x         	  3disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         x         	  3disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default         x         	  3disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe                  "                              phy                                        	  3disabled                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe                  %                              phy                                        	  3disabled                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk                                     apb                  	  3disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z                          	        apb                    	  3disabled               E      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {                          	        apb                    	  3disabled               F      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            D                                         3okay                  host-port                       3okay                                otg-port                      	  3disabled                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            D                                         3okay       host-port                       3okay                                otg-port                      	  3disabled                        pinctrl          ,rockchip,rk3568-pinctrl                       J                                  b              gpio@fdd60000            ,rockchip,gpio-bank                                D       !                  .                                                          C        X                    gpio@fe740000            ,rockchip,gpio-bank               t                 D       "                 c     d                                                    C        X         gpio@fe750000            ,rockchip,gpio-bank               u                 D       #                 e     f                           @                        C        X         gpio@fe760000            ,rockchip,gpio-bank               v                 D       $                 g     h                           `                        C        X         gpio@fe770000            ,rockchip,gpio-bank               w                 D       %                 i     j                                                   C        X         pcfg-pull-up             	                 pcfg-pull-none           	                 pcfg-pull-none-drv-level-1           	        	                     pcfg-pull-none-drv-level-2           	        	                     pcfg-pull-none-drv-level-3           	        	                     pcfg-pull-up-drv-level-1             	        	                     pcfg-pull-up-drv-level-2             	        	                     pcfg-pull-none-smt           	         	/                 acodec        audiopwm          bt656         bt1120        cam       can0          can1          can2          cif       clk32k     clk32k-out0         	D                                 cpu       ebc       edpdp         emmc       emmc-bus8           	D                                                                                                           T      emmc-clk            	D                       U      emmc-cmd            	D                       V      emmc-datastrobe         	D                       W         eth0          eth1          flash         fspi       fspi-pins         `  	D                                                                                   S         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            	D                       I      hdmitx-scl          	D                       G      hdmitx-sda          	D                       H         i2c0       i2c0-xfer            	D       	             
                          i2c1       i2c1-xfer            	D                                     r         i2c2       i2c2m0-xfer          	D                                     s         i2c3       i2c3m0-xfer          	D                                    v         i2c4       i2c4m0-xfer          	D                  
                 w         i2c5       i2c5m0-xfer          	D                                   x         i2s1       i2s1m0-lrckrx           	D                       ^      i2s1m0-lrcktx           	D                       ]      i2s1m0-mclk         	D                             i2s1m0-sclkrx           	D                       \      i2s1m0-sclktx           	D                       [      i2s1m0-sdi0         	D                       _      i2s1m0-sdi1         	D      
                 `      i2s1m0-sdi2         	D      	                 a      i2s1m0-sdi3         	D                       b      i2s1m0-sdo0         	D                       c      i2s1m0-sdo1         	D                       d      i2s1m0-sdo2         	D      	                 e      i2s1m0-sdo3         	D      
                 f         i2s2       i2s2m0-lrcktx           	D                       h      i2s2m0-sclktx           	D                       g      i2s2m0-sdi          	D                       i      i2s2m0-sdo          	D                       j         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           	D                       k      pdmm0-clk1          	D                       l      pdmm0-sdi0          	D                       m      pdmm0-sdi1          	D      
                 n      pdmm0-sdi2          	D      	                 o      pdmm0-sdi3          	D                       p         pmic       pmic-int-l          	D                                  pmu       pwm0       pwm0m0-pins         	D                        "         pwm1       pwm1m0-pins         	D                        #         pwm2       pwm2m0-pins         	D                        $         pwm3       pwm3-pins           	D                        %         pwm4       pwm4-pins           	D                                 pwm5       pwm5-pins           	D                                 pwm6       pwm6-pins           	D                                 pwm7       pwm7-pins           	D                                 pwm8       pwm8m0-pins         	D      	                          pwm9       pwm9m0-pins         	D      
                          pwm10      pwm10m0-pins            	D                                pwm11      pwm11m0-pins            	D                                pwm12      pwm12m0-pins            	D                                pwm13      pwm13m0-pins            	D                                pwm14      pwm14m0-pins            	D                                pwm15      pwm15m0-pins            	D                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  	D                                                            M      sdmmc0-clk          	D                       N      sdmmc0-cmd          	D                       O      sdmmc0-det          	D                        P         sdmmc1        sdmmc2        spdif      spdifm0-tx          	D                       q         spi0       spi0m0-pins       0  	D                                                  {      spi0m0-cs0          	D                        y      spi0m0-cs1          	D                        z         spi1       spi1m0-pins       0  	D                                               ~      spi1m0-cs0          	D                       |      spi1m0-cs1          	D                       }         spi2       spi2m0-pins       0  	D                                                     spi2m0-cs0          	D                             spi2m0-cs1          	D                                spi3       spi3m0-pins       0  	D                              
                       spi3m0-cs0          	D                             spi3m0-cs1          	D                                tsadc      tsadc-shutorg           	D                              tsadc-pin           	D                                  uart0      uart0-xfer           	D                                     !         uart1      uart1m0-xfer             	D                                            uart2      uart2m0-xfer             	D                                              uart3      uart3m0-xfer             	D                                             uart4      uart4m0-xfer             	D                                            uart5      uart5m0-xfer             	D                                            uart6      uart6m0-xfer             	D                                            uart7      uart7m0-xfer             	D                                            uart8      uart8m0-xfer             	D                                            uart9      uart9m0-xfer             	D                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       eeprom     eeprom-wc-n         	D                        t         rtc    rtcic-int-l         	D                         u         usb    u2-a-vbus-en            	D                               u3-a-vbus-en            	D                          opp-table-0          ,operating-points-v2          	R              opp-408000000           	]    Q         	d P P 0        	r  @      opp-600000000           	]    #F         	d P P 0        	r  @      opp-816000000           	]    0,         	d P P 0        	r  @         	      opp-1104000000          	]    Aʹ         	d   0        	r  @      opp-1416000000          	]    Tfr         	d   0        	r  @      opp-1608000000          	]    _"         	d   0        	r  @      opp-1800000000          	]    kI         	d 0 0 0        	r  @         opp-table-1          ,operating-points-v2            =   opp-200000000           	]             	d P P B@      opp-300000000           	]             	d P P B@      opp-400000000           	]    ׄ         	d P P B@      opp-600000000           	]    #F         	d   B@      opp-700000000           	]    )'         	d ~ ~ B@      opp-800000000           	]    /         	d B@ B@ B@         chosen          	serial2:1500000n8         gpio-leds         
   ,gpio-leds      act-led         	                  	mmc1          rsv-led         	                  	none             regulator-3v3-vcc-sys            ,regulator-fixed         vcc3v3_sys                             2Z         2Z        Q                    regulator-5v0-vcc-sys            ,regulator-fixed         vcc5v0_sys                             LK@         LK@                 regulator-5v0-vcc-usb-host           ,regulator-fixed          	        	                  default                    vcc5v0_usb_host          LK@         LK@        Q                       	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc1 mmc0 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon maximum-speed interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf #sound-dai-cells system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-off-in-suspend fcs,suspend-voltage-selector regulator-ramp-delay vin-supply dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names iommus #iommu-cells reset-names rockchip,disable-mmu-reset fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-sd-highspeed disable-wp vmmc-supply vqmmc-supply cap-mmc-highspeed mmc-hs200-1_8v non-removable dma-names arm,pl330-periph-burst #dma-cells interrupts-extended polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells #io-channel-cells rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend stdout-path gpios linux,default-trigger enable-active-high 