    8    (            3                                                                       ,laptop        !   9ASUS Zenbook A14 (UX3407QA, LCD)          F   ?asus,zenbook-a14-ux3407qa-lcd asus,zenbook-a14-ux3407qa qcom,x1p42100      chosen        clocks     xo-board             ?fixed-clock          J          Z             g        sleep-clk            ?fixed-clock          J           Z             g   )      bi-tcxo-div2-clk             ?fixed-factor-clock           Z             o                v                        g   (      bi-tcxo-ao-div2-clk          ?fixed-factor-clock           Z             o               v                        g           cpus                                 cpu@0            cpu          ?qcom,oryon                            psci                                         
   psci perf            g      l2-cache             ?cache                                  g            cpu@100          cpu          ?qcom,oryon                           psci                                         
   psci perf            g         cpu@200          cpu          ?qcom,oryon                           psci                                         
   psci perf            g         cpu@300          cpu          ?qcom,oryon                           psci                                         
   psci perf            g         cpu@10000            cpu          ?qcom,oryon                           psci                	            
            
   psci perf            g      l2-cache             ?cache                                  g   	         cpu@10100            cpu          ?qcom,oryon                          psci                	                        
   psci perf            g         cpu@10200            cpu          ?qcom,oryon                          psci                	                        
   psci perf            g         cpu@10300            cpu          ?qcom,oryon                          psci                	                        
   psci perf            g         cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3                           idle-states          psci       cpu-sleep-0          ?arm,idle-state          ret                    -           >  @        N  X         g            domain-idle-states     cluster-sleep-0          ?domain-idle-state             D        -  ^        >          N  	         g   !      cluster-sleep-1          ?domain-idle-state             T        -          >          N  X         g   "            dummy-sink           ?arm,coresight-dummy-sink       in-ports       port       endpoint            _            g  G               firmware       scm          ?qcom,scm-x1e80100 qcom,scm          o                          }              g        scmi          	   ?arm,scmi                                 tx rx                                              protocol@13                                 g               interconnect-0           ?qcom,x1e80100-clk-virt                                 g   4      interconnect-1           ?qcom,x1e80100-mc-virt                                  g         memory@80000000          memory                                pmu          ?arm,armv8-pmuv3                        psci             ?arm,psci-1.0             smc    power-domain-cpu0                                               g         power-domain-cpu1                                               g         power-domain-cpu2                                               g         power-domain-cpu3                                               g         power-domain-cpu4                                                g   
      power-domain-cpu5                                                g         power-domain-cpu6                                                g         power-domain-cpu7                                                g         power-domain-cpu-cluster0                          !   "            #         g         power-domain-cpu-cluster1                          !   "            #         g          power-domain-system                      g   #         reserved-memory                                      gunyah-hyp@80000000                                          g        hyp-elf-package@80800000                                             g        ncc@80a00000                        @                    g        cpucp-log@80e00000                                          g        cpucp@80e40000                      T                    g        reserved-region@81380000                 8                        tags-region@81400000                 @                           g        xbl-dtlog@81a00000                                          g        xbl-ramdump@81a40000                                            g        aop-image@81c00000                                          g        aop-cmd-db@81c60000          ?qcom,cmd-db                                         g        aop-config@81c80000                                         g        tme-crash-dump@81ca0000                                         g        tme-log@81ce0000                         @                   g        uefi-log@81ce4000                @                          g        secdata-apss@81cff000                                          g        pdp-ns-shared@81e00000                                          g        gpu-prr@81f00000                                            g        tpm-control@81f10000                                            g        usb-ucsi-shared@81f20000                                            g        pld-pep@81f30000                         `                   g        pld-gmu@81f36000                 `                          g        pld-pdp@81f37000                 p                          g        tz-stat@82700000                 p                           g        xbl-tmp-buffer@82800000                                         g        adsp-rpc-remote-heap@84b00000                                           g        spu-secure-shared-memory@85300000                0                           g        adsp-boot-dtb@866c0000               l                           g        spss-region@86700000                 p       @                    g        adsp-boot@86b00000                                          g        video@87700000               p       p                    g         adspslpi@87e00000                                          g         q6-adsp-dtb@8b800000                                            g         cdsp@8b900000                                           g        q6-cdsp-dtb@8d900000                                            g        gpu-microcode@8d9fe000                                          g         cvp@8da00000                        p                    g        camera@8e100000                                         g        av1-encoder@8e900000                        p                    g        reserved-region@8f000000                                          wpss@8fa00000                                          g        q6-wpss-dtb@91300000                 0                           g        xbl-sc@d8000000                                          g        reserved-region@d8040000                        
                 qtee@d80e0000                       R                    g        ta@d8600000              `                          g        tags@e1000000                       j                    g        llcc-lpi@ff800000                       `                    g        smem@ffe00000         
   ?qcom,smem                                  	   $                     g        linux,cma            ?shared-dma-pool                                           opp-table-qup100mhz          ?operating-points-v2          g   @   opp-75000000            1    xh        8   %      opp-100000000           1             8   &         opp-table-qup120mhz          ?operating-points-v2          g   9   opp-75000000            1    xh        8   %      opp-120000000           1    '         8   &         smp2p-adsp           ?qcom,smp2p          F   '                    '              Z            d            s      master-kernel           master-kernel                       g         slave-kernel            slave-kernel                                 g            smp2p-cdsp           ?qcom,smp2p          F   '                    '              Z   ^          d            s      master-kernel           master-kernel                       g        slave-kernel            slave-kernel                                 g           soc@0            ?simple-bus                                                                                                  g     clock-controller@100000       $   ?qcom,x1p42100-gcc qcom,x1e80100-gcc                                  o   (   )   *   +   ,   -       .       /       0                                                                                                                            1             Z                                  g   3      mailbox@408000           ?qcom,x1e80100-ipcc qcom,ipcc                  @                                                                  g   '      dma-controller@800000         *   ?qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                    >                      2  6          	  $disabled             g   7      geniqup@8c0000           ?qcom,geni-se-qup                                     o   3      3           +m-ahb s-ahb            2  #                                              $okay             g     i2c@880000           ?qcom,geni-i2c                         @               (            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7              7                  Otx rx           Y   8        cdefault                                 	  $disabled             g        spi@880000           ?qcom,geni-spi                         @               (            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   9         J   7              7                  Otx rx           Y   :   ;        cdefault                                 	  $disabled             g        i2c@884000           ?qcom,geni-i2c                 @       @               )            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   <        cdefault                                 	  $disabled             g        spi@884000           ?qcom,geni-spi                 @       @               )            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   9         J   7             7                 Otx rx           Y   =   >        cdefault                                 	  $disabled             g        i2c@888000           ?qcom,geni-i2c                        @               *            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   ?        cdefault                                 	  $disabled             g         spi@888000           ?qcom,geni-spi                        @               *            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   A   B        cdefault                                 	  $disabled             g        i2c@88c000           ?qcom,geni-i2c                        @               +            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   C        cdefault                                 	  $disabled             g        spi@88c000           ?qcom,geni-spi                        @               +            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   D   E        cdefault                                 	  $disabled             g        i2c@890000           ?qcom,geni-i2c                         @               ,            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   F        cdefault                                 	  $disabled             g        spi@890000           ?qcom,geni-spi                         @               ,            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   G   H        cdefault                                 	  $disabled             g        i2c@894000           ?qcom,geni-i2c                 @       @               -            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   I        cdefault                                 	  $disabled             g        spi@894000           ?qcom,geni-spi                 @       @               -            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   J   K        cdefault                                 	  $disabled             g        serial@894000            ?qcom,geni-debug-uart                  @       @               -            o   3           +se        0  o   4         4         5         6              7qup-core qup-config             1            q   @        Y   L        cdefault         $okay             g        i2c@898000           ?qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   M        cdefault                                 	  $disabled             g  	      spi@898000           ?qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   N   O        cdefault                                 	  $disabled             g  
      i2c@89c000           ?qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   P        cdefault                                 	  $disabled             g        spi@89c000           ?qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   Q   R        cdefault                                 	  $disabled             g           dma-controller@a00000         *   ?qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                 	         
                                                                                                          >                      2  6          	  $disabled             g   T      geniqup@ac0000           ?qcom,geni-se-qup                                     o   3      3           +m-ahb s-ahb            2  #                                              $okay             g     i2c@a80000           ?qcom,geni-i2c                         @                            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T              T                  Otx rx           Y   U        cdefault                                   $okay             J          g     keyboard@15          ?hid-over-i2c                                   F   V   C           Y   W        cdefault                   spi@a80000           ?qcom,geni-spi                         @                            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   9         J   T              T                  Otx rx           Y   X   Y        cdefault                                 	  $disabled             g        i2c@a84000           ?qcom,geni-i2c                 @       @               !            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   Z        cdefault                                 	  $disabled             g        spi@a84000           ?qcom,geni-spi                 @       @               !            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   9         J   T             T                 Otx rx           Y   [   \        cdefault                                 	  $disabled             g        i2c@a88000           ?qcom,geni-i2c                        @               "            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   ]        cdefault                                 	  $disabled             g        spi@a88000           ?qcom,geni-spi                        @               "            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   ^   _        cdefault                                 	  $disabled             g        i2c@a8c000           ?qcom,geni-i2c                        @               #            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   `        cdefault                                 	  $disabled             g        spi@a8c000           ?qcom,geni-spi                        @               #            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   a   b        cdefault                                 	  $disabled             g        i2c@a90000           ?qcom,geni-i2c                         @               $            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   c        cdefault                                 	  $disabled             g        spi@a90000           ?qcom,geni-spi                         @               $            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   d   e        cdefault                                 	  $disabled             g        i2c@a94000           ?qcom,geni-i2c                 @       @               %            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   f        cdefault                                 	  $disabled             g        spi@a94000           ?qcom,geni-spi                 @       @               %            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   g   h        cdefault                                 	  $disabled             g        i2c@a98000           ?qcom,geni-i2c                        @               &            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   i        cdefault                                 	  $disabled             g        spi@a98000           ?qcom,geni-spi                        @               &            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   j   k        cdefault                                 	  $disabled             g        serial@a98000            ?qcom,geni-uart                       @               &            o   3           +se        0  o   4         4         5         6              7qup-core qup-config             1            q   @        Y   l        cdefault         $okay             g     bluetooth            ?qcom,wcn6855-bt            m           n           o           p           q           r           s           t        " -         i2c@a9c000           ?qcom,geni-i2c                        @               '            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   u        cdefault                                 	  $disabled             g        spi@a9c000           ?qcom,geni-spi                        @               '            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   v   w        cdefault                                 	  $disabled             g           dma-controller@b00000         *   ?qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                        L         M         N         O         P         Q         R         S         T         U         V         W                         >                      2  V          	  $disabled             g   x      geniqup@bc0000           ?qcom,geni-se-qup                                     o   3      3           +m-ahb s-ahb            2  C                                              $okay             g     i2c@b80000           ?qcom,geni-i2c                         @               u            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x              x                  Otx rx           Y   y        cdefault                                   $okay             J          g      touchpad@15          ?hid-over-i2c                                   F   V              Y   z        cdefault                   spi@b80000           ?qcom,geni-spi                         @               u            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   9         J   x              x                  Otx rx           Y   {   |        cdefault                                 	  $disabled             g  !      i2c@b84000           ?qcom,geni-i2c                 @       @               G            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x             x                 Otx rx           Y   }        cdefault                                 	  $disabled             g  "      spi@b84000           ?qcom,geni-spi                 @       @               G            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   9         J   x             x                 Otx rx           Y   ~           cdefault                                 	  $disabled             g  #      i2c@b88000           ?qcom,geni-i2c                        @               H            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x             x                 Otx rx           Y           cdefault                                 	  $disabled             g  $      serial@b88000            ?qcom,geni-uart                       @               H            o   3           +se        0  o   4         4         5         6              7qup-core qup-config             1            q   @        Y           cdefault       	  $disabled             g  %      spi@b88000           ?qcom,geni-spi                        @               H            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   x             x                 Otx rx           Y              cdefault                                 	  $disabled             g  &      i2c@b8c000           ?qcom,geni-i2c                        @               I            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x             x                 Otx rx           Y           cdefault                                   $okay             J          g  '   typec-mux@8          ?parade,ps8833 parade,ps8830                      o      
        ,           7           D           U           b           o           |      
           Y           cdefault                      ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g            port@2                 endpoint            _            g                    spi@b8c000           ?qcom,geni-spi                        @               I            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   x             x                 Otx rx           Y              cdefault                                 	  $disabled             g  (      i2c@b90000           ?qcom,geni-i2c                         @               J            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x             x                 Otx rx           Y           cdefault                                   $okay             J          g  )   hdtl@17          ?hid-over-i2c                                   F   V   _           Y           cdefault                   spi@b90000           ?qcom,geni-spi                         @               J            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   x             x                 Otx rx           Y              cdefault                                 	  $disabled             g  *      i2c@b94000           ?qcom,geni-i2c                 @       @               K            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x             x                 Otx rx           Y           cdefault                                   $okay             J          g  +   redriver@4f          ?nxp,ptn3222             O                                          |   V              Y           cdefault          g            spi@b94000           ?qcom,geni-spi                 @       @               K            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   x             x                 Otx rx           Y              cdefault                                 	  $disabled             g  ,      i2c@b98000           ?qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x             x                 Otx rx           Y           cdefault                                 	  $disabled             g  -      spi@b98000           ?qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   x             x                 Otx rx           Y              cdefault                                 	  $disabled             g  .      i2c@b9c000           ?qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   x             x                 Otx rx           Y           cdefault                                   $okay             J          g  /   typec-mux@8          ?parade,ps8833 parade,ps8830                      o              ,           7           D           U           b           o           |   V              Y           cdefault                      ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g            port@2                 endpoint            _            g                    spi@b9c000           ?qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   x             x                 Otx rx           Y              cdefault                                 	  $disabled             g  0         thermal-sensor@c271000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '            "                 F                             uplow critical                                 g        thermal-sensor@c272000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '             "0                F                             uplow critical                                 g        thermal-sensor@c273000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '0            "@                F                             uplow critical                                 g        thermal-sensor@c274000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '@            "P                F                             uplow critical                              	  $disabled             g  1      phy@fd3000        8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy               0       T                     o              +ref            3   6        $okay            ,                                  g         phy@fd5000           ?qcom,x1e80100-qmp-usb3-dp-phy                 P       @           o   3            3     3          +aux ref com_aux usb3_pipe               3              3   D   3   O        phy common           Z                       +                 $okay            7           G            g   .   ports                                port@0                  endpoint            _            g            port@1                 endpoint            _            g            port@2                 endpoint            _            g                 phy@fd9000        8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o              +ref            3   7        $okay            ,                                  g         phy@fda000           ?qcom,x1e80100-qmp-usb3-dp-phy                        @           o   3            3  "   3  #        +aux ref com_aux usb3_pipe               3              3   E   3   P        phy common           Z                       +                 $okay            7           G            g   /   ports                                port@0                  endpoint            _            g            port@1                 endpoint            _            g            port@2                 endpoint            _            g                 phy@fde000        8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o              +ref            3   8      	  $disabled             g         phy@fdf000           ?qcom,x1e80100-qmp-usb3-dp-phy                        @           o   3  $         3  &   3  '        +aux ref com_aux usb3_pipe               3              3   F   3   Q        phy common           Z                       +               	  $disabled             g   0   ports                                port@0                  endpoint             g  2         port@1                 endpoint            _            g            port@2                 endpoint            _            g                 interconnect@1500000             ?qcom,x1e80100-cnoc-main              P       D                                g         interconnect@1600000             ?qcom,x1e80100-cnoc-cfg               `        f                                g   6      interconnect@1680000             ?qcom,x1e80100-system-noc                 h                                      g  3      interconnect@16c0000             ?qcom,x1e80100-pcie-south-anoc                l        Ѐ                               g         interconnect@16d0000             ?qcom,x1e80100-pcie-center-anoc               m        p                                g  4      interconnect@16e0000             ?qcom,x1e80100-aggre1-noc                 n       D                                g   S      interconnect@1700000             ?qcom,x1e80100-aggre2-noc                 p                                       g         interconnect@1740000             ?qcom,x1e80100-pcie-north-anoc                t                                       g         interconnect@1750000             ?qcom,x1e80100-usb-center-anoc                u                                        g  5      interconnect@1760000             ?qcom,x1e80100-usb-north-anoc                 v        p                               g         interconnect@1770000             ?qcom,x1e80100-usb-south-anoc                 w                                       g         interconnect@1780000             ?qcom,x1e80100-mmss-noc               x                                       g         pcie@1bd0000             pci          ?qcom,pcie-x1e80100        `               0     x              x @           x             x             0                Wparf dbi elbi atu config mhi                                   T                 x                 x0      x0              @      @       @           a                k        x                    l                                     D                                                 y         /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                  8   o   3   T   3   V   3   W   3   ^   3   _   3      3   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   T        $       0  o                      5                       7pcie-mem cpu-pcie              3      3           pci link_down               3              *        pciephy         UUUUUUUUUUUUUUUU        UUUUUUUU        q         	  $disabled             g  6   opp-table            ?operating-points-v2          g      opp-2500000-1           1     &%        8   %         А                    opp-5000000-1           1     LK@        8   %                              opp-10000000-1          1             8   %         B@                    opp-20000000-1          1    1-         8   %                             opp-5000000-2           1     LK@        8   %                              opp-10000000-2          1             8   %         B@                    opp-20000000-2          1    1-         8   %                             opp-40000000-2          1    bZ         8   %         =	                     opp-8000000-3           1     z         8   &                             opp-16000000-3          1     $         8   &         h                    opp-32000000-3          1    H         8   &         <                    opp-64000000-3          1    А         8   &         x-                    opp-16000000-4          1     $         8   &         h                    opp-32000000-4          1    H         8   &         <                    opp-64000000-4          1    А         8   &         x-                    opp-128000000-4         1              8   &         _(                       pcie@0           pci          ?pciclass,0604                                        a                                                 g  7         pci@1bf8000          pci          ?qcom,pcie-x1e80100        `              0     p              p @           p             p                             Wparf dbi elbi atu config mhi                                   8                 p                 p0      p0                a                k        x                                         l                          E         F         G         H         I         J                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                            K                                   L                                   M                                            8   o   3   v   3   x   3   y   3      3      3      3   "      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   v        $       0  o                     5                       7pcie-mem cpu-pcie              3   "   3   #        pci link_down               3   
        8              -        pciephy         UUUUUUUU        UUUU        $okay            $   V              0   V              ;           Y           cdefault          g  8      phy@1bfc000       "   ?qcom,x1p42100-qmp-gen4x4-pcie-phy                                             0   o   3   z   3   x      
   3   {   3   }   3         $  +aux cfg_ahb ref rchng pipe pipediv2            3   %   3   $        phy phy_nocsr              3   {                     3   	        L                  Z            `pcie6a_pipe_clk                     $okay            7           G            g   -      pci@1c00000          pci          ?qcom,pcie-x1e80100        `               0     ~             ~ @           ~             ~             0                Wparf dbi elbi atu config mhi                                   8                 ~                 ~0      ~0                a                k        x                    l         ^          _          `          Y          V          R          M          N                   /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                             F                                    G                                    H                                    I         8   o   3   k   3   m   3   n   3   t   3   u   3      3   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   k        $       0  o                     5                       7pcie-mem cpu-pcie              3      3           pci link_down               3           8              ,        pciephy         UUUU      	  $disabled             g  9      phy@1c06000       "   ?qcom,x1e80100-qmp-gen3x2-pcie-phy                `               0   o   3   k   3   m         3   o   3   q   3   s      $  +aux cfg_ahb ref rchng pipe pipediv2            3       3           phy phy_nocsr              3   o                     3            Z            `pcie5_pipe_clk                    	  $disabled             g   ,      pci@1c08000          pci          ?qcom,pcie-x1e80100        `              0     |             | @           |             |                             Wparf dbi elbi atu config mhi                                   8                 |                 |0      |0                a                k        x                                         l                                                                                                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                  8   o   3   `   3   b   3   c   3   i   3   j   3      3   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   `        $       0  o                     5                       7pcie-mem cpu-pcie              3      3           pci link_down               3           8              +        pciephy         UUUU        $okay            $   V              0   V              Y           cdefault          g  :   pcie@0           pci                                      a                                                 g  ;   wifi@0           ?pci17cb,1103                                           m        s                         o           p           q           r           s           t        UX3407Q             phy@1c0e000       "   ?qcom,x1e80100-qmp-gen3x2-pcie-phy                               0   o   3   `   3   b          3   d   3   f   3   h      $  +aux cfg_ahb ref rchng pipe pipediv2            3      3           phy phy_nocsr              3   d                     3            Z            `pcie4_pipe_clk                      $okay            7           G            g   +      hwlock@1f40000           ?qcom,tcsr-mutex                                           g   $      clock-controller@1fc0000             ?qcom,x1e80100-tcsr syscon                                  o                Z                       g         gpu@3d00000       !   ?qcom,adreno-43030c00 qcom,adreno          0                                              #  Wkgsl_3d0_reg_memory cx_mem cx_dbgc                ,                                        q                                          
  speed_bin           o   5                         7gfx-mem         $okay             g     zap-shader                   5  qcom/x1p42100/ASUSTeK/zenbook-a14/qcdxkmsucpurwa.mbn             g  <      opp-table         /   ?operating-points-v2-adreno operating-points-v2           g      opp-1250000000          1    J|                            *_        "         opp-550000000           1     U                    \k        ._        "         opp-1400000000          1    SrN                             )_        "         opp-1107000000          1    Az                            *_        "         opp-1014000000          1    <pi                   ۳        *_        "         opp-940000000           1    8C           @         ۳        *_        "         opp-825000000           1    1,@                            +_        "         opp-720000000           1    *T                             ,_        "         opp-666000000-0         1    'Z                    |c        -_        "         opp-666000000-1         1    'Z                             -_        "         opp-380000000           1    W            @         -        /_        "         opp-280000000           1    v            8                  /_        "               gmu@3d6a000       '   ?qcom,adreno-gmu-x145.0 qcom,adreno-gmu        0       ֠      P                  (                 Wgmu rscc gmu_pdc                  0         1           hfi gmu       8   o                      3   $   3   7                  !  +ahb gmu cxo axi memnoc hub demet                                   cx gx                             3           q            g      opp-table            ?operating-points-v2          g      opp-550000000           1     U                 opp-220000000           1                @            clock-controller@3d90000             ?qcom,x1p42100-gpucc                                o   (   3   5   3   6         Z                                  g         iommu@3da0000         B   ?qcom,x1e80100-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                 <           I        8                                                                                                                                      >         ?         @         A                                                                                     o         3   7   3   8               +hlos bus iface ahb                           k         g         interconnect@26400000            ?qcom,x1e80100-gem-noc                &@       1                                g   5      interconnect@320c0000            ?qcom,x1e80100-nsp-noc                2                                       g        remoteproc@6800000           ?qcom,x1e80100-adsp-pas                              <  F                                                    #  wdog fatal ready handover stop-ack           o               +xo              1      1            lcx lmx         o                                         3           \               mstop            $okay          a  qcom/x1p42100/ASUSTeK/zenbook-a14/qcadsp8380.mbn qcom/x1p42100/ASUSTeK/zenbook-a14/adsp_dtbs.elf             g  =   glink-edge          F   '                     '               lpass           s      fastrpc          ?qcom,fastrpc            fastrpcglink-apps-dsp           adsp                                          compute-cb@3             ?qcom,fastrpc-compute-cb                        2        2  c             k      compute-cb@4             ?qcom,fastrpc-compute-cb                        2        2  d             k      compute-cb@5             ?qcom,fastrpc-compute-cb                        2        2  e             k      compute-cb@6             ?qcom,fastrpc-compute-cb                        2        2  f             k      compute-cb@7             ?qcom,fastrpc-compute-cb                        2        2  g             k         gpr       	   ?qcom,gpr          
  adsp_apps                                                         service@1            ?qcom,q6apm                                  avs/audio msm/adsp/audio_pd          g     bedais           ?qcom,q6apm-lpass-dais                       g        dais             ?qcom,q6apm-dais            2        2  a             g  >         service@2            ?qcom,q6prm                      avs/audio msm/adsp/audio_pd          g  ?   clock-controller             ?qcom,q6prm-lpass-clocks          Z            g                     codec@6aa0000         :   ?qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   o      D         f         g              +mclk macro dcodec fsgen          Z          
  `wsa2-mclk                      WSA2             g         soundwire@6ab0000            ?qcom,soundwire-v2.0.0                                  o           +iface                             WSA2            Y           cdefault                       swr_audio_cgcr                        	        &   ?   ?                ;             N           a           s                                                                                                 	  $disabled             g  @      codec@6ac0000         8   ?qcom,x1e80100-lpass-rx-macro qcom,sm8550-lpass-rx-macro                             (   o      @         f         g              +mclk macro dcodec fsgen          Z            `mclk                        g         soundwire@6ad0000            ?qcom,soundwire-v2.0.0                                  o           +iface                             RX          Y           cdefault                        swr_audio_cgcr                                &                     ;           N            a         s                                                                                 $okay             g     codec@0,4            ?sdw20217010d00                                                  g           codec@6ae0000         8   ?qcom,x1e80100-lpass-tx-macro qcom,sm8550-lpass-tx-macro                             (   o      9         f         g              +mclk macro dcodec fsgen          Z            `mclk                        g         codec@6b00000         :   ?qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   o      B         f         g              +mclk macro dcodec fsgen          Z            `mclk                       WSA          g         soundwire@6b10000            ?qcom,soundwire-v2.0.0                                  o           +iface                             WSA         Y              cdefault                       swr_audio_cgcr                        	        &   ?   ?                ;             N           a           s                                                                                                   $okay             g     speaker@0,0          ?sdw20217020400                           |                           	  SpkrLeft            	            	           	               
            g        speaker@0,1          ?sdw20217020400                          |                           
  SpkrRight           	            	           	                           g           clock-controller@6b6c000          6   ?qcom,x1e80100-lpassaudiocc qcom,sc8280xp-lpassaudiocc                                 Z                       g         soundwire@6d30000            ?qcom,soundwire-v2.0.0                                  o           +iface                                     core wakeup         TX                         swr_audio_cgcr          Y           cdefault                               	/             ;              N               a           s                                                                                              $okay             g     codec@0,3            ?sdw20217010d00                          	H                     g           codec@6d44000         8   ?qcom,x1e80100-lpass-va-macro qcom,sm8550-lpass-va-macro              @              $   o      9         f         g           +mclk macro dcodec            Z            `fsgen                      Y           cdefault         	]           	m I>          g         pinctrl@6e80000       >   ?qcom,x1e80100-lpass-lpi-pinctrl qcom,sm8550-lpass-lpi-pinctrl                              %                  o      f         g           +core audio           	        	           	                       g      tx-swr-active-state          g      clk-pins            	gpio0           	swr_tx_clk          	           	            	      data-pins           	gpio1 gpio2         	swr_tx_data         	           	            	         rx-swr-active-state          g      clk-pins            	gpio3           	swr_rx_clk          	           	            	      data-pins           	gpio4 gpio5         	swr_rx_data         	           	            	         dmic01-default-state             g      clk-pins            	gpio6         
  	dmic1_clk           	            	      data-pins           	gpio7           	dmic1_data          	            	         dmic23-default-state             g  A   clk-pins            	gpio8         
  	dmic2_clk           	            	      data-pins           	gpio9           	dmic2_data          	            	         wsa-swr-active-state             g      clk-pins            	gpio10          	wsa_swr_clk         	           	            	      data-pins           	gpio11          	wsa_swr_data            	           	            	         wsa2-swr-active-state            g      clk-pins            	gpio15          	wsa2_swr_clk            	           	            	      data-pins           	gpio16          	wsa2_swr_data           	           	            	         spkr-01-sd-n-active-state           	gpio12          	gpio            	            	         
         g            clock-controller@6ea0000          ,   ?qcom,x1e80100-lpasscc qcom,sc8280xp-lpasscc                                Z                       g         interconnect@7e40000             ?qcom,x1e80100-lpass-ag-noc                                                      g  B      interconnect@7400000             ?qcom,x1e80100-lpass-lpiaon-noc               @                                      g  C      interconnect@7430000             ?qcom,x1e80100-lpass-lpicx-noc                C                                       g         mmc@8804000       &   ?qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                            hc_irq pwr_irq           o   3      3                  +iface core xo              2               
 d,        
!h            1            q         0  o                     5         6              7sdhc-ddr cpu-sdhc           
1            k      	  $disabled             g  D   opp-table            ?operating-points-v2          g      opp-19200000            1    $         8         opp-50000000            1            8   %      opp-100000000           1             8   &      opp-202000000           1    
F        8               mmc@8844000       &   ?qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                           hc_irq pwr_irq           o   3      3                  +iface core xo              2  `            
 d,        
!h            1            q         0  o                     5         6              7sdhc-ddr cpu-sdhc           
1            k      	  $disabled             g  E   opp-table            ?operating-points-v2          g      opp-19200000            1    $         8         opp-50000000            1            8   %      opp-100000000           1             8   &      opp-202000000           1    
F        8               phy@88e0000       8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o      	        +ref            3   9      	  $disabled             g         phy@88e1000       8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                     T                     o              +ref            3   4        $okay            ,                       g         phy@88e2000       8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o              +ref            3   5        $okay            ,                                  g         phy@88e3000          ?qcom,x1e80100-qmp-usb3-uni-phy               0                   o   3            3     3          +aux ref com_aux pipe               3   G   3   L        phy phy_phy             3            Z            `usb_mp_phy0_pipe_clk                        $okay            7           G            g         phy@88e5000          ?qcom,x1e80100-qmp-usb3-uni-phy               P                   o   3            3     3          +aux ref com_aux pipe               3   H   3   M        phy phy_phy             3            Z            `usb_mp_phy1_pipe_clk                        $okay            7           G            g         usb@a0f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
              H   o   3      3     3      3     3     3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3          $        4  F         r         :         9         
         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           8              3   A      0  o                     5         6   %           7usb-ddr apps-usb                                                     	  $disabled             g  F   usb@a000000       
   ?snps,dwc3                
                        a              2                    0            usb2-phy usb3-phy            
;         
T         
l         
         
         k         g  G   ports                                port@0                  endpoint             g  H         port@1                 endpoint            _            g                     usb@a2f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
/                                                H   o   3      3      3      3      3      3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3      3           $        (  F                   2         1         &  pwr_event dp_hs_phy_irq dm_hs_phy_irq               3           8              3   =      0  o                      5         6   "           7usb-ddr apps-usb             
               	  $disabled             g  I   usb@a200000       
   ?snps,dwc3                
                                       2                       	  usb2-phy            
high-speed           
         
         k         g  J   port       endpoint             g  K               usb@a4f8800           ?qcom,x1e80100-dwc3-mp qcom,dwc3              
O              H   o   3      3      3      3     3     3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3           $          F         9            :            5            8         4         3         6         5         7         8         l  pwr_event_1 pwr_event_2 hs_phy_1 hs_phy_2 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 ss_phy_1 ss_phy_2             3           8              3   >      0  o                     5         6   &           7usb-ddr apps-usb                                                       $okay             g  L   usb@a400000       
   ?snps,dwc3                
@                       3              2                                   usb2-0 usb3-0 usb2-1 usb3-1         
host             
;         
T         
l         
         
         k         g  M         usb@a6f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
o              H   o   3      3     3      3  
   3     3      3      3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3          $        4  F         s         =                           1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           8              3   ?                                                   $okay             g  N   usb@a600000       
   ?snps,dwc3                
`                       c              2                     .            usb2-phy usb3-phy            
;         
T         
l         
         
         k        
host             g  O   ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g                     usb@a8f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
              H   o   3      3     3      3     3     3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3          $        4  F         t         <                  /         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           8              3   @      0  o                     5         6   $           7usb-ddr apps-usb                                                       $okay             g  P   usb@a800000       
   ?snps,dwc3                
                       e              2  `                  /            usb2-phy usb3-phy            
;         
T         
l         
         
         k        
host             g  Q   ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g                     video-codec@aa00000       $   ?qcom,x1e80100-iris qcom,sm8550-iris              
                                                     1   
   1            venus vcodec0 mxc mmcx          q            o   3  Y                     +iface core vcodec0_core       0  o   5         6   *                             7cpu-cfg video-mem                         3   X        bus            2  @       2  G             k      	  $disabled             g  R   opp-table            ?operating-points-v2          g      opp-192000000           1    q         8            opp-240000000           1    N         8   &   %      opp-338000000           1    %x        8   &   &      opp-366000000           1    з        8            opp-444000000           1    v         8            opp-481000000           1    z@        8                  clock-controller@aaf0000             ?qcom,x1e80100-videocc                
                  o   (   3  X            1      1   
        8   %   %         Z                                  g         display-subsystem@ae00000            ?qcom,x1e80100-mdss               
                 Wmdss                   S            o         3   &      :                     H  o            5                            5         6              7mdp0-mem mdp1-mem cpu-cfg                              2                                                                    $okay             g      display-controller@ae01000           ?qcom,x1e80100-dpu                 
           
               	  Wmdp vbif            F             (   o   3   &            =      :      F        +nrt_bus iface lut core vsync            q               1            g  S   ports                                port@0                  endpoint            _           g           port@4                 endpoint            _           g  
         port@5                 endpoint            _           g           port@6                 endpoint            _           g              opp-table            ?operating-points-v2          g      opp-200000000           1             8   %      opp-325000000           1    _@        8   &      opp-375000000           1    Z        8         opp-514000000           1            8         opp-575000000           1    "E        8              displayport-controller@ae90000           ?qcom,x1e80100-dp          P       
             
            
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                F            0   o                                          J  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                     
   .      .      .           q              1              .           dp                      $okay             g  T   ports                                port@0                  endpoint            _           g           port@1                 endpoint            
                     _               `=         Av    1          g               opp-table            ?operating-points-v2          g     opp-160000000           1    	h         8   %      opp-270000000           1    ߀        8   &      opp-540000000           1     /         8         opp-810000000           1    0G        8               displayport-controller@ae98000           ?qcom,x1e80100-dp          P       
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   /      /      /           q  	            1              /           dp                      $okay             g  U   ports                                port@0                  endpoint            _  
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                   q              1                     dp          $okay            Y          cdefault          g  W   ports                                port@0                  endpoint            _           g           port@1                 endpoint            
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   ?edp-panel                     %           g  X   port       endpoint            _           g                       phy@aec2a00          ?qcom,x1e80100-dp-phy          @       
*           
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&            
                 o      "                    +aux cfg_ahb ref             1            Z                     	  $disabled             g  Y      phy@aec5a00          ?qcom,x1e80100-dp-phy          @       
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P                o      -                    +aux cfg_ahb ref             1            Z                       $okay            7           G            g        clock-controller@af00000             ?qcom,x1e80100-dispcc                 
               d   o   (     3   %   )                   .      .      /      /      0      0                          1           8   %         Z                                  g         interrupt-controller@b220000             ?qcom,x1e80100-pdc qcom,pdc                "             @        d      H  /         *   *         /  
   4   c  a                 0                                             g         power-management@c300000          %   ?qcom,x1e80100-aoss-qmp qcom,aoss-qmp                 0                      '        F   '                      '                 Z             g         sram@c3f0000             ?qcom,rpmh-stats              ?               arbiter@c400000          ?qcom,x1e80100-spmi-pmic-arb       0       @        0     P       @      D                 Wcore chnls obsrvr           ?            G                                               g  Z   spmi@c42d000                  B       @     L               
  Wcnfg intr           periph_irq          F                                                                g  [   pmic@0           ?qcom,pm8550 qcom,spmi-pmic                                                      g  \   pon@1300             ?qcom,pmk8350-pon                         	  Whlos pbs             g  ]   pwrkey           ?qcom,pmk8350-pwrkey                              T   t         g  ^      resin            ?qcom,pmk8350-resin                             	  $disabled             g  _         rtc@6100             ?qcom,pmk8350-rtc               a   b       
  Wrtc alarm                  b               _         m         g  `      nvram@7100           ?qcom,spmi-sdam             q                                        q             g  a   reboot-reason@48                H                          g  b         nvram@7e00           ?qcom,spmi-sdam             ~                                        ~             g  c   charge-limit-en@73              s            g  d      charge-limit-end@75             u            g  e      charge-limit-delta@76               v            g  f         gpio@8800         !   ?qcom,pmk8550-gpio qcom,spmi-gpio                         	        	                     	                                g     edp-bl-pwm-state            	gpio5           	func3            g           pwm          ?qcom,pmk8550-pwm                       $okay             g           pmic@1           ?qcom,pm8550 qcom,spmi-pmic                                                     g  g   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800             ?qcom,pm8550-gpio qcom,spmi-gpio                      	        	                      	                                g      rtmr0-reset-n-active-state          	gpio10          	normal                      	                           g         usb0-3p3-reg-en-state           	gpio11          	normal                      	                           g           led-controller@ee00       *   ?qcom,pm8550-flash-led qcom,spmi-flash-led                     	  $disabled             g  h      pwm       !   ?qcom,pm8550-pwm qcom,pm8350c-pwm                     	  $disabled             g  i         pmic@2           ?qcom,pm8550 qcom,spmi-pmic                                                     g  j   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         "   ?qcom,pm8550ve-gpio qcom,spmi-gpio                        	        	                     	                                g           pmic@3           ?qcom,pmc8380 qcom,spmi-pmic                                                    g  k   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   ?qcom,pmc8380-gpio qcom,spmi-gpio                         	        	             
        	                                g     edp-bl-en-state         	gpio4           	normal                                        g        edp-bl-reg-en-state         	gpio10          	normal           g              pmic@4           ?qcom,pmc8380 qcom,spmi-pmic                                                    g  l   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   ?qcom,pmc8380-gpio qcom,spmi-gpio                         	        	             
        	                                g           pmic@5           ?qcom,pmc8380 qcom,spmi-pmic                                                    g  m   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   ?qcom,pmc8380-gpio qcom,spmi-gpio                         	        	             
        	                                g     usb0-pwr-1p15-reg-en-state          	gpio8           	normal                      	                           g              pmic@8           ?qcom,pm8550 qcom,spmi-pmic                                                     g  n   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         "   ?qcom,pm8550ve-gpio qcom,spmi-gpio                        	        	                     	                                g     misc-3p3-reg-en-state           	gpio6           	normal                      	                                               g              pmic@9           ?qcom,pm8550 qcom,spmi-pmic              	                                       g  o   temp-alarm@a00           ?qcom,spmi-temp-alarm               
            	   
                            g        gpio@8800         "   ?qcom,pm8550ve-gpio qcom,spmi-gpio                        	        	                     	                                g     usb0-1p8-reg-en-state           	gpio8           	normal                      	                           g              pmic@c           ?qcom,pm8010 qcom,spmi-pmic                                                  	  $disabled             g  p   temp-alarm@2400          ?qcom,spmi-temp-alarm               $               $                            g              spmi@c432000                  C        @     M               
  Wcnfg intr           periph_irq          F                                                                g  q   pmic@7           ?qcom,smb2360 qcom,spmi-pmic                                                   $okay             g  r   phy@fd00             ?qcom,smb2360-eusb2-repeater                                                       g            pmic@a           ?qcom,smb2360 qcom,spmi-pmic             
                                      $okay             g  s   phy@fd00             ?qcom,smb2360-eusb2-repeater                                             !         g            pmic@b           ?qcom,smb2360 qcom,spmi-pmic                                                 	  $disabled             g  t   phy@fd00             ?qcom,smb2360-eusb2-repeater                                  g  u         pmic@c           ?qcom,smb2360 qcom,spmi-pmic                                                 	  $disabled             g  v   phy@fd00             ?qcom,smb2360-eusb2-repeater                                  g  w               pinctrl@f100000          ?qcom,x1e80100-tlmm                                                   	        	                               	   V                                 ,      Z            g   V   edp0-hpd-default-state          	gpio119       	  	edp0_hot             	         g        qup-i2c0-data-clk-state         	gpio0 gpio1       	  	qup0_se0            	                      g   y      qup-i2c1-data-clk-state         	gpio4 gpio5       	  	qup0_se1            	                      g   }      qup-i2c2-data-clk-state         	gpio8 gpio9       	  	qup0_se2            	                      g         qup-i2c3-data-clk-state         	gpio12 gpio13         	  	qup0_se3            	                      g         qup-i2c4-data-clk-state         	gpio16 gpio17         	  	qup0_se4            	                      g         qup-i2c5-data-clk-state         	gpio20 gpio21         	  	qup0_se5            	                      g         qup-i2c6-data-clk-state         	gpio24 gpio25         	  	qup0_se6            	                      g         qup-i2c7-data-clk-state         	gpio14 gpio15         	  	qup0_se7            	                      g         qup-i2c8-data-clk-state         	gpio32 gpio33         	  	qup1_se0            	                      g   U      qup-i2c9-data-clk-state         	gpio36 gpio37         	  	qup1_se1            	                      g   Z      qup-i2c10-data-clk-state            	gpio40 gpio41         	  	qup1_se2            	                      g   ]      qup-i2c11-data-clk-state            	gpio44 gpio45         	  	qup1_se3            	                      g   `      qup-i2c12-data-clk-state            	gpio48 gpio49         	  	qup1_se4            	                      g   c      qup-i2c13-data-clk-state            	gpio52 gpio53         	  	qup1_se5            	                      g   f      qup-i2c14-data-clk-state            	gpio56 gpio57         	  	qup1_se6            	                      g   i      qup-i2c15-data-clk-state            	gpio54 gpio55         	  	qup1_se7            	                      g   u      qup-i2c16-data-clk-state            	gpio64 gpio65         	  	qup2_se0            	                      g   8      qup-i2c17-data-clk-state            	gpio68 gpio69         	  	qup2_se1            	                      g   <      qup-i2c18-data-clk-state            	gpio72 gpio73         	  	qup2_se2            	                      g   ?      qup-i2c19-data-clk-state            	gpio76 gpio77         	  	qup2_se3            	                      g   C      qup-i2c20-data-clk-state            	gpio80 gpio81         	  	qup2_se4            	                      g   F      qup-i2c21-data-clk-state            	gpio84 gpio85         	  	qup2_se5            	                      g   I      qup-i2c22-data-clk-state            	gpio88 gpio89         	  	qup2_se6            	                      g   M      qup-i2c23-data-clk-state            	gpio86 gpio87         	  	qup2_se7            	                      g   P      qup-spi0-cs-state           	gpio3         	  	qup0_se0            	            	         g   |      qup-spi0-data-clk-state         	gpio0 gpio1 gpio2         	  	qup0_se0            	            	         g   {      qup-spi1-cs-state           	gpio7         	  	qup0_se1            	            	         g         qup-spi1-data-clk-state         	gpio4 gpio5 gpio6         	  	qup0_se1            	            	         g   ~      qup-spi2-cs-state           	gpio11        	  	qup0_se2            	            	         g         qup-spi2-data-clk-state         	gpio8 gpio9 gpio10        	  	qup0_se2            	            	         g         qup-spi3-cs-state           	gpio15        	  	qup0_se3            	            	         g         qup-spi3-data-clk-state         	gpio12 gpio13 gpio14          	  	qup0_se3            	            	         g         qup-spi4-cs-state           	gpio19        	  	qup0_se4            	            	         g         qup-spi4-data-clk-state         	gpio16 gpio17 gpio18          	  	qup0_se4            	            	         g         qup-spi5-cs-state           	gpio23        	  	qup0_se5            	            	         g         qup-spi5-data-clk-state         	gpio20 gpio21 gpio22          	  	qup0_se5            	            	         g         qup-spi6-cs-state           	gpio27        	  	qup0_se6            	            	         g         qup-spi6-data-clk-state         	gpio24 gpio25 gpio26          	  	qup0_se6            	            	         g         qup-spi7-cs-state           	gpio13        	  	qup0_se7            	            	         g         qup-spi7-data-clk-state         	gpio14 gpio15 gpio12          	  	qup0_se7            	            	         g         qup-spi8-cs-state           	gpio35        	  	qup1_se0            	            	         g   Y      qup-spi8-data-clk-state         	gpio32 gpio33 gpio34          	  	qup1_se0            	            	         g   X      qup-spi9-cs-state           	gpio39        	  	qup1_se1            	            	         g   \      qup-spi9-data-clk-state         	gpio36 gpio37 gpio38          	  	qup1_se1            	            	         g   [      qup-spi10-cs-state          	gpio43        	  	qup1_se2            	            	         g   _      qup-spi10-data-clk-state            	gpio40 gpio41 gpio42          	  	qup1_se2            	            	         g   ^      qup-spi11-cs-state          	gpio47        	  	qup1_se3            	            	         g   b      qup-spi11-data-clk-state            	gpio44 gpio45 gpio46          	  	qup1_se3            	            	         g   a      qup-spi12-cs-state          	gpio51        	  	qup1_se4            	            	         g   e      qup-spi12-data-clk-state            	gpio48 gpio49 gpio50          	  	qup1_se4            	            	         g   d      qup-spi13-cs-state          	gpio55        	  	qup1_se5            	            	         g   h      qup-spi13-data-clk-state            	gpio52 gpio53 gpio54          	  	qup1_se5            	            	         g   g      qup-spi14-cs-state          	gpio59        	  	qup1_se6            	            	         g   k      qup-spi14-data-clk-state            	gpio56 gpio57 gpio58          	  	qup1_se6            	            	         g   j      qup-spi15-cs-state          	gpio53        	  	qup1_se7            	            	         g   w      qup-spi15-data-clk-state            	gpio54 gpio55 gpio52          	  	qup1_se7            	            	         g   v      qup-spi16-cs-state          	gpio67        	  	qup2_se0            	            	         g   ;      qup-spi16-data-clk-state            	gpio64 gpio65 gpio66          	  	qup2_se0            	            	         g   :      qup-spi17-cs-state          	gpio71        	  	qup2_se1            	            	         g   >      qup-spi17-data-clk-state            	gpio68 gpio69 gpio70          	  	qup2_se1            	            	         g   =      qup-spi18-cs-state          	gpio75        	  	qup2_se2            	            	         g   B      qup-spi18-data-clk-state            	gpio72 gpio73 gpio74          	  	qup2_se2            	            	         g   A      qup-spi19-cs-state          	gpio79        	  	qup2_se3            	            	         g   E      qup-spi19-data-clk-state            	gpio76 gpio77 gpio78          	  	qup2_se3            	            	         g   D      qup-spi20-cs-state          	gpio83        	  	qup2_se4            	            	         g   H      qup-spi20-data-clk-state            	gpio80 gpio81 gpio82          	  	qup2_se4            	            	         g   G      qup-spi21-cs-state          	gpio87        	  	qup2_se5            	            	         g   K      qup-spi21-data-clk-state            	gpio84 gpio85 gpio86          	  	qup2_se5            	            	         g   J      qup-spi22-cs-state          	gpio91        	  	qup2_se6            	            	         g   O      qup-spi22-data-clk-state            	gpio88 gpio89 gpio90          	  	qup2_se6            	            	         g   N      qup-spi23-cs-state          	gpio85        	  	qup2_se7            	            	         g   R      qup-spi23-data-clk-state            	gpio86 gpio87 gpio84          	  	qup2_se7            	            	         g   Q      qup-uart2-default-state          g      cts-pins            	gpio8         	  	qup0_se2            	            	      rts-pins            	gpio9         	  	qup0_se2            	            	      tx-pins         	gpio10        	  	qup0_se2            	            	      rx-pins         	gpio11        	  	qup0_se2            	            	         qup-uart14-default-state             g   l   cts-pins            	gpio56        	  	qup1_se6             	      rts-pins            	gpio57        	  	qup1_se6            	            	      tx-pins         	gpio58        	  	qup1_se6            	            	      rx-pins         	gpio59        	  	qup1_se6                      qup-uart21-default-state             g   L   tx-pins         	gpio86        	  	qup2_se5            	            	      rx-pins         	gpio87        	  	qup2_se5            	            	         sdc2-default-state           g  x   clk-pins          	  	sdc2_clk            	            	      cmd-pins          	  	sdc2_cmd            	   
               data-pins         
  	sdc2_data           	   
                  sdc2-sleep-state             g  y   clk-pins          	  	sdc2_clk            	            	      cmd-pins          	  	sdc2_cmd            	                  data-pins         
  	sdc2_data           	                     cam-indicator-en-state          	gpio110         	gpio            	            	         g        edp-reg-en-state            	gpio70          	gpio            	            	         g        eusb6-reset-n-state         	gpio184         	gpio            	            	         
         g         hall-int-n-state            	gpio92          	gpio             	         g        hdtl-default-state          	gpio95          	gpio             g         kybd-default-state          	gpio67          	gpio                      g   W      nvme-reg-en-state           	gpio18          	gpio            	            	         g        pcie4-default-state          g      clkreq-n-pins           	gpio147       
  	pcie4_clk           	                  perst-n-pins            	gpio146         	gpio            	            	      wake-n-pins         	gpio148         	gpio            	                     pcie6a-default-state             g      clkreq-n-pins           	gpio153         	pcie6a_clk          	                  perst-n-pins            	gpio152         	gpio            	            	      wake-n-pins         	gpio154         	gpio            	                     rtmr1-reset-n-active-state          	gpio176         	gpio            	            	         g         tpad-default-state          	gpio3           	gpio             	         g   z      usb1-pwr-1p15-reg-en-state          	gpio188         	gpio            	            	         g        usb1-pwr-1p8-reg-en-state           	gpio175         	gpio            	            	         g        usb1-pwr-3p3-reg-en-state           	gpio186         	gpio            	            	         g        wcd-reset-n-active-state            	gpio191         	gpio            	            	         
         g        wcn-bt-en-state         	gpio116         	gpio            	            	         g        wcn-sw-en-state         	gpio214         	gpio            	            	         g        wcn-wlan-en-state           	gpio117         	gpio            	            	         g           stm@10002000              ?arm,coresight-stm arm,primecell                             (                 Wstm-base stm-stimulus-base           o         	  +apb_pclk       out-ports      port       endpoint            _  "         g  )               tpdm@10003000         "   ?qcom,coresight-tpdm arm,primecell                 0                 o         	  +apb_pclk            &            <          	  $disabled       out-ports      port       endpoint            _  #         g  $               tpda@10004000         "   ?qcom,coresight-tpda arm,primecell                 @                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  $         g  #         port@1                 endpoint            _  %         g  '            out-ports      port       endpoint            _  &         g  (               tpdm@1000f000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  '         g  %               funnel@10041000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@6                 endpoint            _  (         g  &         port@7                 endpoint            _  )         g  "            out-ports      port       endpoint            _  *         g  /               funnel@10042000       +   ?arm,coresight-dynamic-funnel arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@2                 endpoint            _  +         g  u         port@5                 endpoint            _  ,         g  ?         port@6                 endpoint            _  -         g  g            out-ports      port       endpoint            _  .         g  0               funnel@10045000       +   ?arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  /         g  *         port@1                 endpoint            _  0         g  .            out-ports      port       endpoint            _  1         g  B               tpdm@10800000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  2         g  k               tpdm@1082c000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            N            d       out-ports      port       endpoint            _  3         g  `               tpdm@10841000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  4         g  ^               tpdm@10844000         "   ?qcom,coresight-tpdm arm,primecell                @                 o         	  +apb_pclk            N            d       out-ports      port       endpoint            _  5         g  6               funnel@10846000       +   ?arm,coresight-dynamic-funnel arm,primecell               `                 o         	  +apb_pclk       in-ports       port       endpoint            _  6         g  5            out-ports      port       endpoint            _  7         g  ]               cti@1098b000              ?arm,coresight-cti arm,primecell                               o         	  +apb_pclk          tpdm@109d0000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            N            d          	  $disabled       out-ports      port       endpoint            _  8         g  _               tpdm@10ac0000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            N            d          	  $disabled       out-ports      port       endpoint            _  9         g  ;               tpdm@10ac1000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  :         g  <               tpda@10ac4000         "   ?qcom,coresight-tpda arm,primecell                @                 o         	  +apb_pclk       in-ports                                 port@8                 endpoint            _  ;         g  9         port@9              	   endpoint            _  <         g  :            out-ports      port       endpoint            _  =         g  >               funnel@10ac5000       +   ?arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports       port       endpoint            _  >         g  =            out-ports      port       endpoint            _  ?         g  ,               funnel@10b04000       +   ?arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk       in-ports                                 port@3                 endpoint            _  @         g  W         port@6                 endpoint            _  A         g  M         port@7                 endpoint            _  B         g  1            out-ports      port       endpoint            _  C         g  D               tmc@10b05000              ?arm,coresight-tmc arm,primecell              P                 o         	  +apb_pclk             g  z   in-ports       port       endpoint            _  D         g  C            out-ports      port       endpoint            _  E         g  F               replicator@10b06000       /   ?arm,coresight-dynamic-replicator arm,primecell               `                 o         	  +apb_pclk       in-ports       port       endpoint            _  F         g  E            out-ports      port       endpoint            _  G         g                  tpda@10b08000         "   ?qcom,coresight-tpda arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  H         g  N         port@1                 endpoint            _  I         g  O         port@2                 endpoint            _  J         g  P         port@3                 endpoint            _  K         g  Q         port@4                 endpoint            _  L         g  R            out-ports      port       endpoint            _  M         g  A               tpdm@10b09000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  N         g  H               tpdm@10b0a000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  O         g  I               tpdm@10b0b000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  P         g  J               tpdm@10b0c000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  Q         g  K               tpdm@10b0d000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            N            d       out-ports      port       endpoint            _  R         g  L               tpdm@10b20000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            N            d          	  $disabled       out-ports      port       endpoint            _  S         g  T               tpda@10b23000         "   ?qcom,coresight-tpda arm,primecell                0                 o         	  +apb_pclk          	  $disabled       in-ports       port       endpoint            _  T         g  S            out-ports      port       endpoint            _  U         g  V               funnel@10b24000       +   ?arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk          	  $disabled       in-ports       port       endpoint            _  V         g  U            out-ports      port       endpoint            _  W         g  @               tpdm@10c08000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            N            d       out-ports      port       endpoint            _  X         g  Y               funnel@10c0b000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  Y         g  X            out-ports      port       endpoint            _  Z         g  j               tpdm@10c28000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            N            d       out-ports      port       endpoint            _  [         g  a               tpdm@10c29000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  \         g  b               tpda@10c2b000         "   ?qcom,coresight-tpda arm,primecell                °                 o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  ]         g  7         port@13                endpoint            _  ^         g  4         port@14                endpoint            _  _         g  8         port@15                endpoint            _  `         g  3         port@1a                endpoint            _  a         g  [         port@1b                endpoint            _  b         g  \            out-ports      port       endpoint            _  c         g  d               funnel@10c2c000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  d         g  c         port@4                 endpoint            _  e         g  p         port@5                 endpoint            _  f         g  w            out-ports      port       endpoint            _  g         g  -               tpdm@10c38000         "   ?qcom,coresight-tpdm arm,primecell                À                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  h         g  l               tpdm@10c39000         "   ?qcom,coresight-tpdm arm,primecell                Ð                 o         	  +apb_pclk            &   @        <       out-ports      port       endpoint            _  i         g  m               tpda@10c3c000         "   ?qcom,coresight-tpda arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  j         g  Z         port@f                 endpoint            _  k         g  2         port@10                endpoint            _  l         g  h         port@11                endpoint            _  m         g  i            out-ports      port       endpoint            _  n         g  o               funnel@10c3d000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports       port       endpoint            _  o         g  n            out-ports      port       endpoint            _  p         g  e               tpdm@10cc1000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &   @        <            N            d          	  $disabled       out-ports      port       endpoint            _  q         g  r               tpda@10cc4000         "   ?qcom,coresight-tpda arm,primecell                @                 o         	  +apb_pclk       in-ports                                 port@2                 endpoint            _  r         g  q            out-ports      port       endpoint            _  s         g  t               funnel@10cc5000       +   ?arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports       port       endpoint            _  t         g  s            out-ports      port       endpoint            _  u         g  +               funnel@10d04000       +   ?arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk       in-ports                                 port@6                 endpoint            _  v         g              out-ports      port       endpoint            _  w         g  f               tpdm@10d08000         "   ?qcom,coresight-tpdm arm,primecell                Ѐ                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  x         g                 tpdm@10d09000         "   ?qcom,coresight-tpdm arm,primecell                А                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  y         g                 tpdm@10d0a000         "   ?qcom,coresight-tpdm arm,primecell                Р                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  z         g                 tpdm@10d0b000         "   ?qcom,coresight-tpdm arm,primecell                а                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  {         g                 tpdm@10d0c000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  |         g                 tpdm@10d0d000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  }         g                 tpdm@10d0e000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _  ~         g                 tpdm@10d0f000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            &            <       out-ports      port       endpoint            _           g                 tpda@10d12000         "   ?qcom,coresight-tpda arm,primecell                                  o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _           g  x         port@1                 endpoint            _           g  y         port@2                 endpoint            _           g  z         port@3                 endpoint            _           g  {         port@4                 endpoint            _           g  |         port@5                 endpoint            _           g  }         port@6                 endpoint            _           g  ~         port@7                 endpoint            _           g              out-ports      port       endpoint            _           g                 funnel@10d13000       +   ?arm,coresight-dynamic-funnel arm,primecell               0                 o         	  +apb_pclk       in-ports       port       endpoint            _           g              out-ports      port       endpoint            _           g  v               iommu@15000000        1   ?qcom,x1e80100-smmu-500 qcom,smmu-500 arm,mmu-500                                         A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                  <           I            k         g   2      iommu@15400000           ?arm,smmu-v3              @                 <         $                                        eventq gerror cmdq-sync          k      	  $reserved             g  {      interrupt-controller@17000000            ?arm,gic-v3                                     0                	                               v                                                             g      msi-controller@17040000          ?arm,gic-v3-its                                                     g            mailbox@17430000             ?qcom,x1e80100-cpucp-mbox                  C                                                            g         rsc@17500000             ?qcom,rpmh-rsc         0       P             Q             R                 Wdrv-0 drv-1 drv-2         $                                                                                               	  apps_rsc                #         g  |   bcm-voter            ?qcom,bcm-voter           g         clock-controller             ?qcom,x1e80100-rpmh-clk           o          +xo           Z            g         power-controller             ?qcom,x1e80100-rpmhpd            q                      g   1   opp-table            ?operating-points-v2          g     opp-16                      g  }      opp-48             0         g         opp-52             4         g  ~      opp-56             8         g         opp-60             <         g        opp-64             @         g   %      opp-80             P         g        opp-128                     g   &      opp-144                     g        opp-192                     g         opp-256                     g         opp-320           @         g        opp-336           P         g        opp-384                    g         opp-416                    g              regulators-0             ?qcom,pm8550-rpmh-regulators         b                                         *          @          R          c          t                         bob1          
  vreg_bob1            -          <l                    g        bob2          
  vreg_bob2            &5@         -                     g        ldo1            vreg_l1b_1p8             w@         w@                    g         ldo2            vreg_l2b_3p0             .          .                     g         ldo4            vreg_l4b_1p8             w@         w@                    g         ldo6            vreg_l6b_1p8             w@         -*                    g        ldo8            vreg_l8b_3p0             .          .                     g        ldo9            vreg_l9b_2p9             -*         -*                    g        ldo10           vreg_l10b_1p8            w@         w@                    g        ldo12           vreg_l12b_1p2            O         O                             g         ldo13           vreg_l13b_3p0            .          .                     g         ldo14           vreg_l14b_3p0            .          .                     g  !      ldo15           vreg_l15b_1p8            w@         w@                             g         ldo17           vreg_l17b_2p5            &5@         &5@                    g           regulators-1             ?qcom,pm8550ve-rpmh-regulators           c                               '          5     smps4           vreg_s4c_1p8             R                              g        ldo1            vreg_l1c_1p2             O         O                    g        ldo2            vreg_l2c_0p8             m         m                    g        ldo3            vreg_l3c_0p9                                          g            regulators-2             ?qcom,pmc8380-rpmh-regulators            d                               '          C     ldo1            vreg_l1d_0p8             m         m                    g         ldo2            vreg_l2d_0p9                                          g         ldo3            vreg_l3d_1p8             w@         w@                    g           regulators-3             ?qcom,pmc8380-rpmh-regulators            e                     '     ldo2            vreg_l2e_0p8             m         m                    g         ldo3            vreg_l3e_1p2             O         O                    g            regulators-4             ?qcom,pmc8380-rpmh-regulators            f                               '          C     smps1           vreg_s1f_0p7             
`                             g           regulators-6             ?qcom,pm8550ve-rpmh-regulators           i                               '          C          Q     smps1           vreg_s1i_0p9                      	                    g        smps2           vreg_s2i_1p0             B@                             g        ldo1            vreg_l1i_1p8             w@         w@                    g        ldo2            vreg_l2i_1p2             O         O                    g        ldo3            vreg_l3i_0p8             m         m                    g            regulators-7             ?qcom,pm8550ve-rpmh-regulators           j                               '          _     smps5           vreg_s5j_1p2             *@                             g        ldo1            vreg_l1j_0p9                                          g         ldo2            vreg_l2j_1p2             *@         *@                    g         ldo3            vreg_l3j_0p8             m         m                    g               timer@17800000           ?arm,armv7-timer-mem                                                                               frame@17801000                                                                m          frame@17803000               0                   	           m         	  $disabled          frame@17805000               P                   
           m         	  $disabled          frame@17807000               p                              m         	  $disabled          frame@17809000                                             m         	  $disabled          frame@1780b000                                             m         	  $disabled          frame@1780d000                                             m         	  $disabled             sram@18b4e000         
   ?mmio-sram                                                                              g     scp-sram-section@0           ?arm,scmi-shmem                           g         scp-sram-section@200             ?arm,scmi-shmem                          g            watchdog@1c840000            ?arm,sbsa-gwdt                                                                   g        efuse@221c8000        !   ?qcom,x1e80100-qfprom qcom,qfprom                 "                                          g     gpu-speed-bin@119                               	         g            pmu@24091000          0   ?qcom,x1e80100-llcc-bwmon qcom,sc7280-llcc-bwmon              $	                       Q           o                           q     opp-table            ?operating-points-v2          g     opp-0            5       opp-1            !b      opp-2            .       opp-3            ^       opp-4            hL       opp-5                   opp-6                   opp-7                   opp-8                    opp-9                        pmu@240b5400          *   ?qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $T                      E           o   5         5              q           g     opp-table            ?operating-points-v2          g     opp-0            I>       opp-1            q@      opp-2            |       opp-3                   opp-4            Ȁ      opp-5           `@            pmu@240b6400          *   ?qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $d                      E           o   5         5              q        system-cache-controller@25000000             ?qcom,x1e80100-llcc               %               %               %@              %`              %              %              %              %              &               &                   Wllcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base llcc_broadcast_and_base               
         remoteproc@32300000          ?qcom,x1e80100-cdsp-pas               20               @  F         B                                          #  wdog fatal ready handover stop-ack           o               +xo              1       1   
   1            cx mxc nsp          o                                      3           \              mstop            $okay          a  qcom/x1p42100/ASUSTeK/zenbook-a14/qccdsp8380.mbn qcom/x1p42100/ASUSTeK/zenbook-a14/cdsp_dtbs.elf             g     glink-edge          F   '                     '               cdsp            s      fastrpc          ?qcom,fastrpc            fastrpcglink-apps-dsp           cdsp                                          compute-cb@1             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@2             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@3             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@4             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@5             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@6             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@7             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@8             ?qcom,fastrpc-compute-cb                        2               k      compute-cb@10            ?qcom,fastrpc-compute-cb             
           2               k      compute-cb@11            ?qcom,fastrpc-compute-cb                        2               k      compute-cb@12            ?qcom,fastrpc-compute-cb                        2               k      compute-cb@13            ?qcom,fastrpc-compute-cb                        2               k               phy@1bd4000       "   ?qcom,x1p42100-qmp-gen4x4-pcie-phy                 @             `               0   o   3   X   3   V         3   Y   3   [   3   ]      $  +aux cfg_ahb ref rchng pipe pipediv2            3      3           phy phy_nocsr              3   Y                     3            Z            `pcie3_pipe_clk                    	  $disabled             g   *         timer            ?arm,armv8-timer       0                                   
         thermal-zones            g     aoss0-thermal           z         trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                cpu0-0-top-thermal          z        trips      trip-point0          8                	   4critical                cpu0-0-btm-thermal          z        trips      trip-point0          8                	   4critical                cpu0-1-top-thermal          z        trips      trip-point0          8                	   4critical                cpu0-1-btm-thermal          z        trips      trip-point0          8                	   4critical                cpu0-2-top-thermal          z        trips      trip-point0          8                	   4critical                cpu0-2-btm-thermal          z        trips      trip-point0          8                	   4critical                cpu0-3-top-thermal          z        trips      trip-point0          8                	   4critical                cpu0-3-btm-thermal          z        trips      trip-point0          8                	   4critical                cpuss0-top-thermal          z     	   trips      trip-point0          8                	   4critical                cpuss0-btm-thermal          z     
   trips      trip-point0          8                	   4critical                mem-thermal         z        trips      trip-point0          _                   4hot       trip-point1          8                  	   4critical                video-thermal           z        trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                aoss1-thermal           z         trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                cpu1-0-top-thermal          z        trips      trip-point0          8                	   4critical                cpu1-0-btm-thermal          z        trips      trip-point0          8                	   4critical                cpu1-1-top-thermal          z        trips      trip-point0          8                	   4critical                cpu1-1-btm-thermal          z        trips      trip-point0          8                	   4critical                cpu1-2-top-thermal          z        trips      trip-point0          8                	   4critical                cpu1-2-btm-thermal          z        trips      trip-point0          8                	   4critical                cpu1-3-top-thermal          z        trips      trip-point0          8                	   4critical                cpu1-3-btm-thermal          z        trips      trip-point0          8                	   4critical                cpuss1-top-thermal          z     	   trips      trip-point0          8                	   4critical                cpuss1-btm-thermal          z     
   trips      trip-point0          8                	   4critical                aoss2-thermal           z         trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                nsp0-thermal            z        trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                nsp1-thermal            z        trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                nsp2-thermal            z        trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                nsp3-thermal            z        trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                gpuss-0-thermal                    z        cooling-maps       map0                                 trips      trip-point0          s                   4passive          g        trip-point1          8                	   4critical                gpuss-1-thermal                    z        cooling-maps       map0                                 trips      trip-point0          s                   4passive          g        trip-point1          8                	   4critical                gpuss-2-thermal                    z        cooling-maps       map0                                 trips      trip-point0          s                   4passive          g        trip-point1          8                	   4critical                gpuss-3-thermal                    z        cooling-maps       map0                                 trips      trip-point0          s                   4passive          g        trip-point1          8                	   4critical                camera0-thermal         z     	   trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                camera1-thermal         z     
   trips      trip-point0          _                   4hot       trip-point1          8                	   4critical                pm8550-thermal             d        z     trips      trip0            s                     4passive       trip1            8                     4hot             pm8550ve-2-thermal             d        z     trips      trip0            s                     4passive       trip1            8                     4hot             pmc8380-3-thermal              d        z     trips      trip0            s                     4passive       trip1            8                     4hot             pmc8380-4-thermal              d        z     trips      trip0            s                     4passive       trip1            8                     4hot             pmc8380-5-thermal              d        z     trips      trip0            s                     4passive       trip1            8                     4hot             pm8550ve-8-thermal             d        z     trips      trip0            s                     4passive       trip1            8                     4hot             pm8550ve-9-thermal             d        z     trips      trip0            s                     4passive       trip1            8                     4hot             pm8010-thermal             d        z     trips      trip0            s                     4passive       trip1            8                     4hot                aliases       $  /soc@0/geniqup@8c0000/serial@894000       $  /soc@0/geniqup@ac0000/serial@a98000       audio-codec          ?qcom,wcd9385-codec          Y          cdefault          w@         w@         w@        # w@         ; $ I                   b           P                            |   V                                    	                                 g        gpio-keys         
   ?gpio-keys           Y          cdefault    switch-lid          lid            V   \                      T                                 leds          
   ?gpio-leds           Y          cdefault    led-camera-indicator            white:camera-indicator        
  	indicator           )               V   n            /none            Eoff          S         pmic-glink        @   ?qcom,x1e80100-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink         c   V   y       V   {                                 connector@0          ?usb-c-connector                      udual            dual       ports                                port@0                  endpoint            _           g            port@1                 endpoint            _           g            port@2                 endpoint            _           g                  connector@1          ?usb-c-connector                     udual            dual       ports                                port@0                  endpoint            _           g            port@1                 endpoint            _           g            port@2                 endpoint            _           g                     sound            ?qcom,x1e80100-sndcard            9X1E80100-ASUS-Zenbook-A14           SpkrLeft IN WSA WSA_SPK1 OUT SpkrRight IN WSA WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC2 MIC BIAS2 VA DMIC0 MIC BIAS1 VA DMIC1 MIC BIAS1 VA DMIC0 VA MIC BIAS1 VA DMIC1 VA MIC BIAS1 TX SWR_INPUT1 ADC2_OUTPUT     va-dai-link         VA Capture     codec                        cpu              n      platform                       wcd-capture-dai-link            WCD Capture    codec                                  cpu              x      platform                       wcd-playback-dai-link           WCD Playback       codec                                    cpu              q      platform                       wsa-dai-link            WSA Playback       codec                                  cpu              i      platform                          regulator-edp-3p3            ?regulator-fixed         VREG_EDP_3P3             2Z         2Z           V   F                     Y          cdefault                   g        regulator-misc-3p3           ?regulator-fixed         VREG_MISC_3P3            2Z         2Z                                  Y          cdefault                            g        regulator-nvme           ?regulator-fixed         VREG_NVME_3P3            2Z         2Z           V                        Y          cdefault                   g         regulator-rtmr0-1p15             ?regulator-fixed         VREG_RTMR0_1P15          0         0                                  Y          cdefault                   g         regulator-rtmr0-1p8          ?regulator-fixed         VREG_RTMR0_1P8           w@         w@                                  Y          cdefault                   g         regulator-rtmr0-3p3          ?regulator-fixed         VREG_RTMR0_3P3           2Z         2Z                                   Y          cdefault                   g         regulator-rtmr1-1p15             ?regulator-fixed         VREG_RTMR1_1P15          0         0           V                        Y          cdefault                   g         regulator-rtmr1-1p8          ?regulator-fixed         VREG_RTMR1_1P8           w@         w@           V                        Y          cdefault                   g         regulator-rtmr1-3p3          ?regulator-fixed         VREG_RTMR1_3P3           2Z         2Z           V                        Y          cdefault                   g         regulator-vph-pwr            ?regulator-fixed         vph_pwr          8u          8u                            g        regulator-wcn-0p95           ?regulator-fixed         VREG_WCN_0P95            ~         ~                   g        regulator-wcn-1p9            ?regulator-fixed         VREG_WCN_1P9                                         g        regulator-wcn-3p3            ?regulator-fixed         VREG_WCN_3P3             2Z         2Z           V                        Y          cdefault                   g        wcn6855-pmu          ?qcom,wcn6855-pmu                      o                                                  #          3          E          V          g   V   t            w   V   u            Y            cdefault    regulators     ldo0            vreg_pmu_rfa_cmn_0p8             g   r      ldo1            vreg_pmu_aon_0p8             g   m      ldo2            vreg_pmu_wlcx_0p8            g   s      ldo3            vreg_pmu_wlmx_0p8            g   t      ldo4            vreg_pmu_btcmx_0p8           g   n      ldo5            vreg_pmu_pcie_1p8            g         ldo6            vreg_pmu_pcie_0p9            g         ldo7            vreg_pmu_rfa_0p8             g   o      ldo8            vreg_pmu_rfa_1p2             g   p      ldo9            vreg_pmu_rfa_1p7             g   q            backlight            ?pwm-backlight                  [        j                           Y            cdefault          g        regulator-edp-bl             ?regulator-fixed         VBL9             6         6             
                     Y          cdefault                   g        __symbols__         /clocks/xo-board            /clocks/sleep-clk           /clocks/bi-tcxo-div2-clk            /clocks/bi-tcxo-ao-div2-clk         /cpus/cpu@0         /cpus/cpu@0/l2-cache            /cpus/cpu@100           /cpus/cpu@200           /cpus/cpu@300           /cpus/cpu@10000         /cpus/cpu@10000/l2-cache            /cpus/cpu@10100         /cpus/cpu@10200         /cpus/cpu@10300         /cpus/idle-states/cpu-sleep-0         )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1          #  /dummy-sink/in-ports/port/endpoint          /firmware/scm           /firmware/scmi/protocol@13          (/interconnect-0         1/interconnect-1         9/psci/power-domain-cpu0         A/psci/power-domain-cpu1         I/psci/power-domain-cpu2         Q/psci/power-domain-cpu3         Y/psci/power-domain-cpu4         a/psci/power-domain-cpu5         i/psci/power-domain-cpu6         q/psci/power-domain-cpu7          y/psci/power-domain-cpu-cluster0          /psci/power-domain-cpu-cluster1         /psci/power-domain-system         %  /reserved-memory/gunyah-hyp@80000000          *  /reserved-memory/hyp-elf-package@80800000           /reserved-memory/ncc@80a00000         $  /reserved-memory/cpucp-log@80e00000          /reserved-memory/cpucp@80e40000       &  /reserved-memory/tags-region@81400000         $  /reserved-memory/xbl-dtlog@81a00000       &  /reserved-memory/xbl-ramdump@81a40000         $  /reserved-memory/aop-image@81c00000       %  /reserved-memory/aop-cmd-db@81c60000          %  "/reserved-memory/aop-config@81c80000          )  1/reserved-memory/tme-crash-dump@81ca0000          "  D/reserved-memory/tme-log@81ce0000         #  P/reserved-memory/uefi-log@81ce4000        '  ]/reserved-memory/secdata-apss@81cff000        (  n/reserved-memory/pdp-ns-shared@81e00000       "  /reserved-memory/gpu-prr@81f00000         &  /reserved-memory/tpm-control@81f10000         *  /reserved-memory/usb-ucsi-shared@81f20000         "  /reserved-memory/pld-pep@81f30000         "  /reserved-memory/pld-gmu@81f36000         "  /reserved-memory/pld-pdp@81f37000         "  /reserved-memory/tz-stat@82700000         )  /reserved-memory/xbl-tmp-buffer@82800000          /  /reserved-memory/adsp-rpc-remote-heap@84b00000        3  /reserved-memory/spu-secure-shared-memory@85300000        (  )/reserved-memory/adsp-boot-dtb@866c0000       &  ;/reserved-memory/spss-region@86700000         $  K/reserved-memory/adsp-boot@86b00000          Y/reserved-memory/video@87700000       #  c/reserved-memory/adspslpi@87e00000        &  p/reserved-memory/q6-adsp-dtb@8b800000           /reserved-memory/cdsp@8b900000        &  /reserved-memory/q6-cdsp-dtb@8d900000         (  /reserved-memory/gpu-microcode@8d9fe000         /reserved-memory/cvp@8da00000         !  /reserved-memory/camera@8e100000          &  /reserved-memory/av1-encoder@8e900000           /reserved-memory/wpss@8fa00000        &  /reserved-memory/q6-wpss-dtb@91300000         !  /reserved-memory/xbl-sc@d8000000            /reserved-memory/qtee@d80e0000          /reserved-memory/ta@d8600000            /reserved-memory/tags@e1000000        #  /reserved-memory/llcc-lpi@ff800000          /reserved-memory/smem@ffe00000          "/opp-table-qup100mhz            7/opp-table-qup120mhz            L/smp2p-adsp/master-kernel           [/smp2p-adsp/slave-kernel            i/smp2p-cdsp/master-kernel           x/smp2p-cdsp/slave-kernel            /soc@0          /soc@0/clock-controller@100000          /soc@0/mailbox@408000           /soc@0/dma-controller@800000            /soc@0/geniqup@8c0000         !  /soc@0/geniqup@8c0000/i2c@880000          !  /soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  /soc@0/geniqup@8c0000/spi@884000          !  /soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  /soc@0/geniqup@8c0000/i2c@890000          !  /soc@0/geniqup@8c0000/spi@890000          !  /soc@0/geniqup@8c0000/i2c@894000          !  /soc@0/geniqup@8c0000/spi@894000          $  /soc@0/geniqup@8c0000/serial@894000       !  /soc@0/geniqup@8c0000/i2c@898000          !  /soc@0/geniqup@8c0000/spi@898000          !  /soc@0/geniqup@8c0000/i2c@89c000          !  /soc@0/geniqup@8c0000/spi@89c000            /soc@0/dma-controller@a00000            /soc@0/geniqup@ac0000         !  /soc@0/geniqup@ac0000/i2c@a80000          !  !/soc@0/geniqup@ac0000/spi@a80000          !  &/soc@0/geniqup@ac0000/i2c@a84000          !  +/soc@0/geniqup@ac0000/spi@a84000          !  0/soc@0/geniqup@ac0000/i2c@a88000          !  6/soc@0/geniqup@ac0000/spi@a88000          !  </soc@0/geniqup@ac0000/i2c@a8c000          !  B/soc@0/geniqup@ac0000/spi@a8c000          !  H/soc@0/geniqup@ac0000/i2c@a90000          !  N/soc@0/geniqup@ac0000/spi@a90000          !  T/soc@0/geniqup@ac0000/i2c@a94000          !  Z/soc@0/geniqup@ac0000/spi@a94000          !  `/soc@0/geniqup@ac0000/i2c@a98000          !  f/soc@0/geniqup@ac0000/spi@a98000          $  l/soc@0/geniqup@ac0000/serial@a98000       !  s/soc@0/geniqup@ac0000/i2c@a9c000          !  y/soc@0/geniqup@ac0000/spi@a9c000            /soc@0/dma-controller@b00000            /soc@0/geniqup@bc0000         !  /soc@0/geniqup@bc0000/i2c@b80000          !  /soc@0/geniqup@bc0000/spi@b80000          !  /soc@0/geniqup@bc0000/i2c@b84000          !  /soc@0/geniqup@bc0000/spi@b84000          !  /soc@0/geniqup@bc0000/i2c@b88000          $  /soc@0/geniqup@bc0000/serial@b88000       !  /soc@0/geniqup@bc0000/spi@b88000          !  /soc@0/geniqup@bc0000/i2c@b8c000          C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b8c000          !  /soc@0/geniqup@bc0000/i2c@b90000          !   /soc@0/geniqup@bc0000/spi@b90000          !  /soc@0/geniqup@bc0000/i2c@b94000          -  
/soc@0/geniqup@bc0000/i2c@b94000/redriver@4f          !  /soc@0/geniqup@bc0000/spi@b94000          !  /soc@0/geniqup@bc0000/i2c@b98000          !  #/soc@0/geniqup@bc0000/spi@b98000          !  (/soc@0/geniqup@bc0000/i2c@b9c000          C  -/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@0/endpoint        C  @/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@1/endpoint        C  R/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@2/endpoint        !  j/soc@0/geniqup@bc0000/spi@b9c000            o/soc@0/thermal-sensor@c271000           v/soc@0/thermal-sensor@c272000           }/soc@0/thermal-sensor@c273000           /soc@0/thermal-sensor@c274000           /soc@0/phy@fd3000           /soc@0/phy@fd5000         (  /soc@0/phy@fd5000/ports/port@0/endpoint       (  /soc@0/phy@fd5000/ports/port@1/endpoint       (  /soc@0/phy@fd5000/ports/port@2/endpoint         /soc@0/phy@fd9000           /soc@0/phy@fda000         (  /soc@0/phy@fda000/ports/port@0/endpoint       (  )/soc@0/phy@fda000/ports/port@1/endpoint       (  D/soc@0/phy@fda000/ports/port@2/endpoint         [/soc@0/phy@fde000           k/soc@0/phy@fdf000         (  |/soc@0/phy@fdf000/ports/port@0/endpoint       (  /soc@0/phy@fdf000/ports/port@1/endpoint       (  /soc@0/phy@fdf000/ports/port@2/endpoint         /soc@0/interconnect@1500000         /soc@0/interconnect@1600000         /soc@0/interconnect@1680000         /soc@0/interconnect@16c0000         /soc@0/interconnect@16d0000         /soc@0/interconnect@16e0000         /soc@0/interconnect@1700000         /soc@0/interconnect@1740000         */soc@0/interconnect@1750000         :/soc@0/interconnect@1760000         I/soc@0/interconnect@1770000         X/soc@0/interconnect@1780000         a/soc@0/pcie@1bd0000         g/soc@0/pcie@1bd0000/opp-table           w/soc@0/pcie@1bd0000/pcie@0          /soc@0/pci@1bf8000          /soc@0/phy@1bfc000          /soc@0/pci@1c00000          /soc@0/phy@1c06000          /soc@0/pci@1c08000          /soc@0/pci@1c08000/pcie@0           /soc@0/phy@1c0e000          /soc@0/hwlock@1f40000            /soc@0/clock-controller@1fc0000         /soc@0/gpu@3d00000          /soc@0/gpu@3d00000/zap-shader           /soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          /soc@0/gmu@3d6a000/opp-table             /soc@0/clock-controller@3d90000         /soc@0/iommu@3da0000            /soc@0/interconnect@26400000            /soc@0/interconnect@320c0000            !/soc@0/remoteproc@6800000         3  1/soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  7/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  B/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  K/soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  Q/soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         Y/soc@0/codec@6aa0000            i/soc@0/soundwire@6ab0000            n/soc@0/codec@6ac0000            |/soc@0/soundwire@6ad0000          #  /soc@0/soundwire@6ad0000/codec@0,4          /soc@0/codec@6ae0000            /soc@0/codec@6b00000            /soc@0/soundwire@6b10000          %  /soc@0/soundwire@6b10000/speaker@0,0          %  /soc@0/soundwire@6b10000/speaker@0,1             /soc@0/clock-controller@6b6c000         /soc@0/soundwire@6d30000          #  /soc@0/soundwire@6d30000/codec@0,3          /soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  /soc@0/pinctrl@6e80000/tx-swr-active-state        +   /soc@0/pinctrl@6e80000/rx-swr-active-state        ,  /soc@0/pinctrl@6e80000/dmic01-default-state       ,  /soc@0/pinctrl@6e80000/dmic23-default-state       ,  ,/soc@0/pinctrl@6e80000/wsa-swr-active-state       -  ;/soc@0/pinctrl@6e80000/wsa2-swr-active-state          1  K/soc@0/pinctrl@6e80000/spkr-01-sd-n-active-state             _/soc@0/clock-controller@6ea0000         g/soc@0/interconnect@7e40000         t/soc@0/interconnect@7400000         /soc@0/interconnect@7430000         /soc@0/mmc@8804000          /soc@0/mmc@8804000/opp-table            /soc@0/mmc@8844000          /soc@0/mmc@8844000/opp-table            /soc@0/phy@88e0000          /soc@0/phy@88e1000          /soc@0/phy@88e2000          /soc@0/phy@88e3000          /soc@0/phy@88e5000          	/soc@0/usb@a0f8800          /soc@0/usb@a0f8800/usb@a000000        5  "/soc@0/usb@a0f8800/usb@a000000/ports/port@0/endpoint          5  4/soc@0/usb@a0f8800/usb@a000000/ports/port@1/endpoint            F/soc@0/usb@a2f8800          L/soc@0/usb@a2f8800/usb@a200000        -  W/soc@0/usb@a2f8800/usb@a200000/port/endpoint            e/soc@0/usb@a4f8800          l/soc@0/usb@a4f8800/usb@a400000          x/soc@0/usb@a6f8800          /soc@0/usb@a6f8800/usb@a600000        5  /soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  /soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint            /soc@0/usb@a8f8800          /soc@0/usb@a8f8800/usb@a800000        5  /soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint          5  /soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint            /soc@0/video-codec@aa00000        %  /soc@0/video-codec@aa00000/opp-table             /soc@0/clock-controller@aaf0000       !  /soc@0/display-subsystem@ae00000          <  /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  +/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpoint         R  :/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpoint         R  I/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpoint         F  X/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  f/soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  o/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  {/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000       V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@1/endpoint         J  '/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table         N  :/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/aux-bus/panel         \  @/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/aux-bus/panel/port/endpoint         M/soc@0/phy@aec2a00          Z/soc@0/phy@aec5a00           g/soc@0/clock-controller@af00000       $  n/soc@0/interrupt-controller@b220000          r/soc@0/power-management@c300000         {/soc@0/arbiter@c400000        $  /soc@0/arbiter@c400000/spmi@c42d000       +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0        4  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300       ;  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin         4  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@6100       6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100         G  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@48        6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00         I  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-en@73          J  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-end@75         L  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-delta@76       5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800          F  ./soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800/edp-bl-pwm-state         /  9/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm        +  E/soc@0/arbiter@c400000/spmi@c42d000/pmic@1        :  L/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a00         5  ^/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800          P  k/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-state       K  y/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/usb0-3p3-reg-en-state        ?  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00        /  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800          E   /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800/edp-bl-en-state          I   /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800/edp-bl-reg-en-state          +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@4        :   $/soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a00         5   9/soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800          +   I/soc@0/arbiter@c400000/spmi@c42d000/pmic@5        :   S/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a00         5   h/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800          P   x/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/usb0-pwr-1p15-reg-en-state       +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800          K   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800/misc-3p3-reg-en-state        +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800          K  !/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/usb0-1p8-reg-en-state        +  !/soc@0/arbiter@c400000/spmi@c42d000/pmic@c        ;  !/soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400        $  !*/soc@0/arbiter@c400000/spmi@c432000       +  !4/soc@0/arbiter@c400000/spmi@c432000/pmic@7        4  !>/soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00       +  !W/soc@0/arbiter@c400000/spmi@c432000/pmic@a        4  !a/soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00       +  !z/soc@0/arbiter@c400000/spmi@c432000/pmic@b        4  !/soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00       +  !/soc@0/arbiter@c400000/spmi@c432000/pmic@c        4  !/soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00         /soc@0/pinctrl@f100000        .  !/soc@0/pinctrl@f100000/edp0-hpd-default-state         /  !/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  "+/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  "=/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  "O/soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  "a/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  "s/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  "/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state       0  #
/soc@0/pinctrl@f100000/qup-i2c17-data-clk-state       0  #/soc@0/pinctrl@f100000/qup-i2c18-data-clk-state       0  #0/soc@0/pinctrl@f100000/qup-i2c19-data-clk-state       0  #C/soc@0/pinctrl@f100000/qup-i2c20-data-clk-state       0  #V/soc@0/pinctrl@f100000/qup-i2c21-data-clk-state       0  #i/soc@0/pinctrl@f100000/qup-i2c22-data-clk-state       0  #|/soc@0/pinctrl@f100000/qup-i2c23-data-clk-state       )  #/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  $/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  $%/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  $1/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  $C/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  $O/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  $a/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  $m/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  $/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  $/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  $/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  %(/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  %;/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  %H/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       *  %[/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  %h/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       *  %{/soc@0/pinctrl@f100000/qup-spi16-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi16-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi17-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi17-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi18-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi18-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi19-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi19-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi20-cs-state         0  &/soc@0/pinctrl@f100000/qup-spi20-data-clk-state       *  &/soc@0/pinctrl@f100000/qup-spi21-cs-state         0  &(/soc@0/pinctrl@f100000/qup-spi21-data-clk-state       *  &;/soc@0/pinctrl@f100000/qup-spi22-cs-state         0  &H/soc@0/pinctrl@f100000/qup-spi22-data-clk-state       *  &[/soc@0/pinctrl@f100000/qup-spi23-cs-state         0  &h/soc@0/pinctrl@f100000/qup-spi23-data-clk-state       /  &{/soc@0/pinctrl@f100000/qup-uart2-default-state        0  &/soc@0/pinctrl@f100000/qup-uart14-default-state       0  &/soc@0/pinctrl@f100000/qup-uart21-default-state       *  &/soc@0/pinctrl@f100000/sdc2-default-state         (  &/soc@0/pinctrl@f100000/sdc2-sleep-state       .  &/soc@0/pinctrl@f100000/cam-indicator-en-state         (  &/soc@0/pinctrl@f100000/edp-reg-en-state       +  &/soc@0/pinctrl@f100000/eusb6-reset-n-state        (  &/soc@0/pinctrl@f100000/hall-int-n-state       *  '/soc@0/pinctrl@f100000/hdtl-default-state         *  '/soc@0/pinctrl@f100000/kybd-default-state         )  '"/soc@0/pinctrl@f100000/nvme-reg-en-state          +  './soc@0/pinctrl@f100000/pcie4-default-state        ,  '</soc@0/pinctrl@f100000/pcie6a-default-state       2  'K/soc@0/pinctrl@f100000/rtmr1-reset-n-active-state         *  'Y/soc@0/pinctrl@f100000/tpad-default-state         2  'f/soc@0/pinctrl@f100000/usb1-pwr-1p15-reg-en-state         1  '{/soc@0/pinctrl@f100000/usb1-pwr-1p8-reg-en-state          1  '/soc@0/pinctrl@f100000/usb1-pwr-3p3-reg-en-state          0  '/soc@0/pinctrl@f100000/wcd-reset-n-active-state       '  '/soc@0/pinctrl@f100000/wcn-bt-en-state        '  '/soc@0/pinctrl@f100000/wcn-sw-en-state        )  '/soc@0/pinctrl@f100000/wcn-wlan-en-state          ,  '/soc@0/stm@10002000/out-ports/port/endpoint       -  '/soc@0/tpdm@10003000/out-ports/port/endpoint          .  '/soc@0/tpda@10004000/in-ports/port@0/endpoint         .  '/soc@0/tpda@10004000/in-ports/port@1/endpoint         -  ( /soc@0/tpda@10004000/out-ports/port/endpoint          -  (/soc@0/tpdm@1000f000/out-ports/port/endpoint          0  (/soc@0/funnel@10041000/in-ports/port@6/endpoint       0  ((/soc@0/funnel@10041000/in-ports/port@7/endpoint       /  (4/soc@0/funnel@10041000/out-ports/port/endpoint        0  (@/soc@0/funnel@10042000/in-ports/port@2/endpoint       0  (L/soc@0/funnel@10042000/in-ports/port@5/endpoint       0  (X/soc@0/funnel@10042000/in-ports/port@6/endpoint       /  (d/soc@0/funnel@10042000/out-ports/port/endpoint        0  (p/soc@0/funnel@10045000/in-ports/port@0/endpoint       0  (/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  (/soc@0/funnel@10045000/out-ports/port/endpoint        -  (/soc@0/tpdm@10800000/out-ports/port/endpoint          -  (/soc@0/tpdm@1082c000/out-ports/port/endpoint          -  (/soc@0/tpdm@10841000/out-ports/port/endpoint          -  (/soc@0/tpdm@10844000/out-ports/port/endpoint          .  (/soc@0/funnel@10846000/in-ports/port/endpoint         /  (/soc@0/funnel@10846000/out-ports/port/endpoint        -  )/soc@0/tpdm@109d0000/out-ports/port/endpoint          -  )/soc@0/tpdm@10ac0000/out-ports/port/endpoint          -  )/soc@0/tpdm@10ac1000/out-ports/port/endpoint          .  ),/soc@0/tpda@10ac4000/in-ports/port@8/endpoint         .  ):/soc@0/tpda@10ac4000/in-ports/port@9/endpoint         -  )H/soc@0/tpda@10ac4000/out-ports/port/endpoint          .  )V/soc@0/funnel@10ac5000/in-ports/port/endpoint         /  )f/soc@0/funnel@10ac5000/out-ports/port/endpoint        0  )v/soc@0/funnel@10b04000/in-ports/port@3/endpoint       0  )/soc@0/funnel@10b04000/in-ports/port@6/endpoint       0  )/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  )/soc@0/funnel@10b04000/out-ports/port/endpoint          )/soc@0/tmc@10b05000       +  )/soc@0/tmc@10b05000/in-ports/port/endpoint        ,  )/soc@0/tmc@10b05000/out-ports/port/endpoint       2  )/soc@0/replicator@10b06000/in-ports/port/endpoint         3  )/soc@0/replicator@10b06000/out-ports/port/endpoint        .  )/soc@0/tpda@10b08000/in-ports/port@0/endpoint         .  )/soc@0/tpda@10b08000/in-ports/port@1/endpoint         .  */soc@0/tpda@10b08000/in-ports/port@2/endpoint         .  */soc@0/tpda@10b08000/in-ports/port@3/endpoint         .  */soc@0/tpda@10b08000/in-ports/port@4/endpoint         -  *,/soc@0/tpda@10b08000/out-ports/port/endpoint          -  *:/soc@0/tpdm@10b09000/out-ports/port/endpoint          -  *I/soc@0/tpdm@10b0a000/out-ports/port/endpoint          -  *X/soc@0/tpdm@10b0b000/out-ports/port/endpoint          -  *g/soc@0/tpdm@10b0c000/out-ports/port/endpoint          -  *v/soc@0/tpdm@10b0d000/out-ports/port/endpoint          -  */soc@0/tpdm@10b20000/out-ports/port/endpoint          ,  */soc@0/tpda@10b23000/in-ports/port/endpoint       -  */soc@0/tpda@10b23000/out-ports/port/endpoint          .  */soc@0/funnel@10b24000/in-ports/port/endpoint         /  */soc@0/funnel@10b24000/out-ports/port/endpoint        -  */soc@0/tpdm@10c08000/out-ports/port/endpoint          0  */soc@0/funnel@10c0b000/in-ports/port@4/endpoint       /  */soc@0/funnel@10c0b000/out-ports/port/endpoint        -  +/soc@0/tpdm@10c28000/out-ports/port/endpoint          -  +/soc@0/tpdm@10c29000/out-ports/port/endpoint          .  + /soc@0/tpda@10c2b000/in-ports/port@4/endpoint         /  +//soc@0/tpda@10c2b000/in-ports/port@13/endpoint        /  +?/soc@0/tpda@10c2b000/in-ports/port@14/endpoint        /  +O/soc@0/tpda@10c2b000/in-ports/port@15/endpoint        /  +_/soc@0/tpda@10c2b000/in-ports/port@1a/endpoint        /  +o/soc@0/tpda@10c2b000/in-ports/port@1b/endpoint        -  +/soc@0/tpda@10c2b000/out-ports/port/endpoint          0  +/soc@0/funnel@10c2c000/in-ports/port@0/endpoint       0  +/soc@0/funnel@10c2c000/in-ports/port@4/endpoint       0  +/soc@0/funnel@10c2c000/in-ports/port@5/endpoint       /  +/soc@0/funnel@10c2c000/out-ports/port/endpoint        -  +/soc@0/tpdm@10c38000/out-ports/port/endpoint          -  +/soc@0/tpdm@10c39000/out-ports/port/endpoint          .  +/soc@0/tpda@10c3c000/in-ports/port@4/endpoint         .  ,/soc@0/tpda@10c3c000/in-ports/port@f/endpoint         /  ,/soc@0/tpda@10c3c000/in-ports/port@10/endpoint        /  ,!/soc@0/tpda@10c3c000/in-ports/port@11/endpoint        -  ,1/soc@0/tpda@10c3c000/out-ports/port/endpoint          .  ,@/soc@0/funnel@10c3d000/in-ports/port/endpoint         /  ,Q/soc@0/funnel@10c3d000/out-ports/port/endpoint        -  ,b/soc@0/tpdm@10cc1000/out-ports/port/endpoint          .  ,r/soc@0/tpda@10cc4000/in-ports/port@2/endpoint         -  ,/soc@0/tpda@10cc4000/out-ports/port/endpoint          .  ,/soc@0/funnel@10cc5000/in-ports/port/endpoint         /  ,/soc@0/funnel@10cc5000/out-ports/port/endpoint        0  ,/soc@0/funnel@10d04000/in-ports/port@6/endpoint       /  ,/soc@0/funnel@10d04000/out-ports/port/endpoint        -  ,/soc@0/tpdm@10d08000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d09000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0a000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0b000/out-ports/port/endpoint          -  -/soc@0/tpdm@10d0c000/out-ports/port/endpoint          -  -/soc@0/tpdm@10d0d000/out-ports/port/endpoint          -  -,/soc@0/tpdm@10d0e000/out-ports/port/endpoint          -  -;/soc@0/tpdm@10d0f000/out-ports/port/endpoint          .  -J/soc@0/tpda@10d12000/in-ports/port@0/endpoint         .  -X/soc@0/tpda@10d12000/in-ports/port@1/endpoint         .  -f/soc@0/tpda@10d12000/in-ports/port@2/endpoint         .  -t/soc@0/tpda@10d12000/in-ports/port@3/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@4/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@5/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@6/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@7/endpoint         -  -/soc@0/tpda@10d12000/out-ports/port/endpoint          .  -/soc@0/funnel@10d13000/in-ports/port/endpoint         /  -/soc@0/funnel@10d13000/out-ports/port/endpoint          -/soc@0/iommu@15000000           -/soc@0/iommu@15400000         %  -/soc@0/interrupt-controller@17000000          =  ./soc@0/interrupt-controller@17000000/msi-controller@17040000            .	/soc@0/mailbox@17430000         ./soc@0/rsc@17500000         ./soc@0/rsc@17500000/bcm-voter         %  .,/soc@0/rsc@17500000/clock-controller          %  .3/soc@0/rsc@17500000/power-controller          /  .:/soc@0/rsc@17500000/power-controller/opp-table        6  .K/soc@0/rsc@17500000/power-controller/opp-table/opp-16         6  .Z/soc@0/rsc@17500000/power-controller/opp-table/opp-48         6  .m/soc@0/rsc@17500000/power-controller/opp-table/opp-52         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-56         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-60         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-64         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-80         7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-128        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-144        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-192        7  //soc@0/rsc@17500000/power-controller/opp-table/opp-256        7  //soc@0/rsc@17500000/power-controller/opp-table/opp-320        7  /,/soc@0/rsc@17500000/power-controller/opp-table/opp-336        7  />/soc@0/rsc@17500000/power-controller/opp-table/opp-384        7  /O/soc@0/rsc@17500000/power-controller/opp-table/opp-416        &  /c/soc@0/rsc@17500000/regulators-0/bob1         &  /m/soc@0/rsc@17500000/regulators-0/bob2         &  /w/soc@0/rsc@17500000/regulators-0/ldo1         &  //soc@0/rsc@17500000/regulators-0/ldo2         &  //soc@0/rsc@17500000/regulators-0/ldo4         &  //soc@0/rsc@17500000/regulators-0/ldo6         &  //soc@0/rsc@17500000/regulators-0/ldo8         &  //soc@0/rsc@17500000/regulators-0/ldo9         '  //soc@0/rsc@17500000/regulators-0/ldo10        '  //soc@0/rsc@17500000/regulators-0/ldo12        '  //soc@0/rsc@17500000/regulators-0/ldo13        '  //soc@0/rsc@17500000/regulators-0/ldo14        '  //soc@0/rsc@17500000/regulators-0/ldo15        '  0/soc@0/rsc@17500000/regulators-0/ldo17        '  0/soc@0/rsc@17500000/regulators-1/smps4        &  0&/soc@0/rsc@17500000/regulators-1/ldo1         &  03/soc@0/rsc@17500000/regulators-1/ldo2         &  0@/soc@0/rsc@17500000/regulators-1/ldo3         &  0M/soc@0/rsc@17500000/regulators-2/ldo1         &  0Z/soc@0/rsc@17500000/regulators-2/ldo2         &  0g/soc@0/rsc@17500000/regulators-2/ldo3         &  0t/soc@0/rsc@17500000/regulators-3/ldo2         &  0/soc@0/rsc@17500000/regulators-3/ldo3         '  0/soc@0/rsc@17500000/regulators-4/smps1        '  0/soc@0/rsc@17500000/regulators-6/smps1        '  0/soc@0/rsc@17500000/regulators-6/smps2        &  0/soc@0/rsc@17500000/regulators-6/ldo1         &  0/soc@0/rsc@17500000/regulators-6/ldo2         &  0/soc@0/rsc@17500000/regulators-6/ldo3         '  0/soc@0/rsc@17500000/regulators-7/smps5        &  0/soc@0/rsc@17500000/regulators-7/ldo1         &  0/soc@0/rsc@17500000/regulators-7/ldo2         &  1/soc@0/rsc@17500000/regulators-7/ldo3           1/soc@0/sram@18b4e000          (  1/soc@0/sram@18b4e000/scp-sram-section@0       *  1#/soc@0/sram@18b4e000/scp-sram-section@200           11/soc@0/watchdog@1c840000            1?/soc@0/efuse@221c8000         (  1F/soc@0/efuse@221c8000/gpu-speed-bin@119         1T/soc@0/pmu@24091000/opp-table           1i/soc@0/pmu@240b5400         1x/soc@0/pmu@240b5400/opp-table           1/soc@0/remoteproc@32300000          1/soc@0/phy@1bd4000        1  1/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-3-thermal/trips/trip-point0            1/audio-codec          .  1/pmic-glink/connector@0/ports/port@0/endpoint         .  1/pmic-glink/connector@0/ports/port@1/endpoint         .  2/pmic-glink/connector@0/ports/port@2/endpoint         .  2*/pmic-glink/connector@1/ports/port@0/endpoint         .  2?/pmic-glink/connector@1/ports/port@1/endpoint         .  2T/pmic-glink/connector@1/ports/port@2/endpoint           2n/regulator-edp-3p3          2{/regulator-misc-3p3         2/regulator-nvme         2/regulator-rtmr0-1p15           2/regulator-rtmr0-1p8            2/regulator-rtmr0-3p3            2/regulator-rtmr1-1p15           2/regulator-rtmr1-1p8            2/regulator-rtmr1-3p3            2/regulator-vph-pwr          2/regulator-wcn-0p95         3
/regulator-wcn-1p9          3/regulator-wcn-3p3          3$/wcn6855-pmu/regulators/ldo0            39/wcn6855-pmu/regulators/ldo1            3J/wcn6855-pmu/regulators/ldo2            3\/wcn6855-pmu/regulators/ldo3            3n/wcn6855-pmu/regulators/ldo4            3/wcn6855-pmu/regulators/ldo5            3/wcn6855-pmu/regulators/ldo6            3/wcn6855-pmu/regulators/ldo7            3/wcn6855-pmu/regulators/ldo8            3/wcn6855-pmu/regulators/ldo9            %/backlight          3/regulator-edp-bl            	interrupt-parent #address-cells #size-cells chassis-type model compatible clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us remote-endpoint interconnects qcom,dload-mode mboxes mbox-names shmem #power-domain-cells #interconnect-cells qcom,bcm-voters interrupts domain-idle-states ranges no-map hwlocks size reusable linux,cma-default opp-hz required-opps interrupts-extended qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names operating-points-v2 hid-descr-addr wakeup-source vddaon-supply vddbtcmx-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply vddrfacmn-supply vddwlcx-supply vddwlmx-supply max-speed vdd-supply vdd33-supply vdd33-cap-supply vddar-supply vddat-supply vddio-supply reset-gpios retimer-switch orientation-switch #phy-cells vdd3v3-supply vdd1v8-supply interrupt-names #qcom,sensors #thermal-sensor-cells resets vdda12-supply phys reset-names mode-switch vdda-phy-supply vdda-pll-supply reg-names bus-range dma-coherent linux,pci-domain num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates phy-names eq-presets-8gts eq-presets-16gts opp-peak-kBps opp-level msi-map perst-gpios wake-gpios vddpe-3v3-supply qcom,4ln-config-sel clock-output-names vddpcie0p9-supply vddpcie1p8-supply qcom,calibration-variant #hwlock-cells qcom,gmu #cooling-cells nvmem-cells nvmem-cell-names memory-region firmware-name qcom,opp-acd-level opp-supported-hw qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain sound-name-prefix qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping vdd-micb-supply qcom,dmic-sample-rate gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,usb3_lpm_capable snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk qcom,select-utmi-as-pipe-clk maximum-speed dr_mode assigned-clock-parents data-lanes link-frequencies power-supply backlight qcom,pdc-ranges qcom,ee qcom,channel linux,code qcom,no-alarm qcom,uefi-rtc-info bits #pwm-cells power-source input-disable output-enable drive-push-pull qcom,drive-strength vdd18-supply vdd3-supply wakeup-parent gpio-reserved-ranges bias-pull-up qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num #redistributor-regions redistributor-stride msi-controller #msi-cells qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-always-on vdd-l1-supply vdd-l2-supply vdd-l3-supply vdd-s4-supply vdd-s1-supply vdd-s2-supply vdd-s5-supply frame-number thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device serial0 serial1 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply linux,input-type wakeup-event-action color linux,default-trigger default-state panic-indicator orientation-gpios power-role data-role audio-routing link-name sound-dai gpio enable-active-high regulator-boot-on vin-supply vddpcie1p3-supply vddpcie1p9-supply vddpmu-supply vddpmucx-supply vddpmumx-supply vddrfa0p95-supply vddrfa1p3-supply vddrfa1p9-supply bt-enable-gpios wlan-enable-gpios pwms xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 cpu1 cpu2 cpu3 cpu4 l2_1 cpu5 cpu6 cpu7 cluster_c4 cluster_cl4 cluster_cl5 eud_in scm scmi_dvfs clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cluster_pd0 cluster_pd1 system_pd gunyah_hyp_mem hyp_elf_package_mem ncc_mem cpucp_log_mem cpucp_mem tags_mem xbl_dtlog_mem xbl_ramdump_mem aop_image_mem aop_cmd_db_mem aop_config_mem tme_crash_dump_mem tme_log_mem uefi_log_mem secdata_apss_mem pdp_ns_shared_mem gpu_prr_mem tpm_control_mem usb_ucsi_shared_mem pld_pep_mem pld_gmu_mem pld_pdp_mem tz_stat_mem xbl_tmp_buffer_mem adsp_rpc_remote_heap_mem spu_secure_shared_memory_mem adsp_boot_dtb_mem spss_region_mem adsp_boot_mem video_mem adspslpi_mem q6_adsp_dtb_mem cdsp_mem q6_cdsp_dtb_mem gpu_microcode_mem cvp_mem camera_mem av1_encoder_mem wpss_mem q6_wpss_dtb_mem xbl_sc_mem qtee_mem ta_mem tags_mem1 llcc_lpi_mem smem_mem qup_opp_table_100mhz qup_opp_table_120mhz smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in soc gcc ipcc gpi_dma2 qupv3_2 i2c16 spi16 i2c17 spi17 i2c18 spi18 i2c19 spi19 i2c20 spi20 i2c21 spi21 uart21 i2c22 spi22 i2c23 spi23 gpi_dma1 qupv3_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 i2c14 spi14 uart14 i2c15 spi15 gpi_dma0 qupv3_0 i2c0 spi0 i2c1 spi1 i2c2 uart2 spi2 i2c3 retimer_ss0_ss_out retimer_ss0_ss_in retimer_ss0_con_sbu_out spi3 i2c4 spi4 i2c5 eusb6_repeater spi5 i2c6 spi6 i2c7 retimer_ss1_ss_out retimer_ss1_ss_in retimer_ss1_con_sbu_out spi7 tsens0 tsens1 tsens2 tsens3 usb_1_ss0_hsphy usb_1_ss0_qmpphy usb_1_ss0_qmpphy_out usb_1_ss0_qmpphy_usb_ss_in usb_1_ss0_qmpphy_dp_in usb_1_ss1_hsphy usb_1_ss1_qmpphy usb_1_ss1_qmpphy_out usb_1_ss1_qmpphy_usb_ss_in usb_1_ss1_qmpphy_dp_in usb_1_ss2_hsphy usb_1_ss2_qmpphy usb_1_ss2_qmpphy_out usb_1_ss2_qmpphy_usb_ss_in usb_1_ss2_qmpphy_dp_in cnoc_main config_noc system_noc pcie_south_anoc pcie_center_anoc aggre1_noc aggre2_noc pcie_north_anoc usb_center_anoc usb_north_anoc usb_south_anoc mmss_noc pcie3 pcie3_opp_table pcie3_port pcie6a pcie6a_phy pcie5 pcie5_phy pcie4 pcie4_port0 pcie4_phy tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu gem_noc nsp_noc remoteproc_adsp q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 left_spkr right_spkr lpass_audiocc swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_01_sd_n_active lpasscc lpass_ag_noc lpass_lpiaon_noc lpass_lpicx_noc sdhc_2 sdhc2_opp_table sdhc_4 sdhc4_opp_table usb_2_hsphy usb_mp_hsphy0 usb_mp_hsphy1 usb_mp_qmpphy0 usb_mp_qmpphy1 usb_1_ss2 usb_1_ss2_dwc3 usb_1_ss2_dwc3_hs usb_1_ss2_dwc3_ss usb_2 usb_2_dwc3 usb_2_dwc3_hs usb_mp usb_mp_dwc3 usb_1_ss0 usb_1_ss0_dwc3 usb_1_ss0_dwc3_hs usb_1_ss0_dwc3_ss usb_1_ss1 usb_1_ss1_dwc3 usb_1_ss1_dwc3_hs usb_1_ss1_dwc3_ss iris iris_opp_table videocc mdss mdss_mdp mdss_intf0_out mdss_intf4_out mdss_intf5_out mdss_intf6_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dp0_opp_table mdss_dp1 mdss_dp1_in mdss_dp1_out mdss_dp1_opp_table mdss_dp2 mdss_dp2_in mdss_dp2_out mdss_dp2_opp_table mdss_dp3 mdss_dp3_in mdss_dp3_out mdss_dp3_opp_table panel edp_panel_in mdss_dp2_phy mdss_dp3_phy dispcc pdc aoss_qmp spmi spmi_bus0 pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_sdam_15 charge_limit_en charge_limit_end charge_limit_delta pmk8550_gpios edp_bl_pwm pmk8550_pwm pm8550 pm8550_temp_alarm pm8550_gpios rtmr0_default usb0_3p3_reg_en pm8550_flash pm8550_pwm pm8550ve_2 pm8550ve_2_temp_alarm pm8550ve_2_gpios pmc8380_3 pmc8380_3_temp_alarm pmc8380_3_gpios edp_bl_en edp_bl_reg_en pmc8380_4 pmc8380_4_temp_alarm pmc8380_4_gpios pmc8380_5 pmc8380_5_temp_alarm pmc8380_5_gpios usb0_pwr_1p15_reg_en pm8550ve_8 pm8550ve_8_temp_alarm pm8550ve_8_gpios misc_3p3_reg_en pm8550ve_9 pm8550ve_9_temp_alarm pm8550ve_9_gpios usb0_1p8_reg_en pm8010 pm8010_temp_alarm spmi_bus1 smb2360_0 smb2360_0_eusb2_repeater smb2360_1 smb2360_1_eusb2_repeater smb2360_2 smb2360_2_eusb2_repeater smb2360_3 smb2360_3_eusb2_repeater edp0_hpd_default qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_i2c15_data_clk qup_i2c16_data_clk qup_i2c17_data_clk qup_i2c18_data_clk qup_i2c19_data_clk qup_i2c20_data_clk qup_i2c21_data_clk qup_i2c22_data_clk qup_i2c23_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_spi15_cs qup_spi15_data_clk qup_spi16_cs qup_spi16_data_clk qup_spi17_cs qup_spi17_data_clk qup_spi18_cs qup_spi18_data_clk qup_spi19_cs qup_spi19_data_clk qup_spi20_cs qup_spi20_data_clk qup_spi21_cs qup_spi21_data_clk qup_spi22_cs qup_spi22_data_clk qup_spi23_cs qup_spi23_data_clk qup_uart2_default qup_uart14_default qup_uart21_default sdc2_default sdc2_sleep cam_indicator_en edp_reg_en eusb6_reset_n hall_int_n_default hdtl_default kybd_default nvme_reg_en pcie4_default pcie6a_default rtmr1_default tpad_default usb1_pwr_1p15_reg_en usb1_pwr_1p8_reg_en usb1_pwr_3p3_reg_en wcd_default wcn_bt_en wcn_sw_en wcn_wlan_en stm_out dcc_tpdm_out qdss_tpda_in0 qdss_tpda_in1 qdss_tpda_out qdss_tpdm_out funnel0_in6 funnel0_in7 funnel0_out funnel1_in2 funnel1_in5 funnel1_in6 funnel1_out qdss_funnel_in0 qdss_funnel_in1 qdss_funnel_out mxa_tpdm_out gcc_tpdm_out prng_tpdm_out lpass_cx_tpdm_out lpass_cx_funnel_in0 lpass_cx_funnel_out qm_tpdm_out dlst_tpdm0_out dlst_tpdm1_out dlst_tpda_in8 dlst_tpda_in9 dlst_tpda_out dlst_funnel_in0 dlst_funnel_out aoss_funnel_in3 aoss_funnel_in6 aoss_funnel_in7 aoss_funnel_out etf0 etf0_in etf0_out swao_rep_in swao_rep_out1 aoss_tpda_in0 aoss_tpda_in1 aoss_tpda_in2 aoss_tpda_in3 aoss_tpda_in4 aoss_tpda_out aoss_tpdm0_out aoss_tpdm1_out aoss_tpdm2_out aoss_tpdm3_out aoss_tpdm4_out lpicc_tpdm_out ddr_lpi_tpda_in ddr_lpi_tpda_out ddr_lpi_funnel_in0 ddr_lpi_funnel_out mm_tpdm_out mm_funnel_in4 mm_funnel_out dlct1_tpdm_out ipcc_tpdm_out dlct1_tpda_in4 dlct1_tpda_in19 dlct1_tpda_in20 dlct1_tpda_in21 dlct1_tpda_in26 dlct1_tpda_in27 dlct1_tpda_out dlct1_funnel_in0 dlct1_funnel_in4 dlct1_funnel_in5 dlct1_funnel_out dlct2_tpdm0_out dlct2_tpdm1_out dlct2_tpda_in4 dlct2_tpda_in15 dlct2_tpda_in16 dlct2_tpda_in17 dlct2_tpda_out dlct2_funnel_in0 dlct2_funnel_out tmess_tpdm1_out tmess_tpda_in2 tmess_tpda_out tmess_funnel_in0 tmess_funnel_out ddr_funnel0_in6 ddr_funnel0_out llcc0_tpdm_out llcc1_tpdm_out llcc2_tpdm_out llcc3_tpdm_out llcc4_tpdm_out llcc5_tpdm_out llcc6_tpdm_out llcc7_tpdm_out llcc_tpda_in0 llcc_tpda_in1 llcc_tpda_in2 llcc_tpda_in3 llcc_tpda_in4 llcc_tpda_in5 llcc_tpda_in6 llcc_tpda_in7 llcc_tpda_out ddr_funnel1_in0 ddr_funnel1_out apps_smmu pcie_smmu intc gic_its cpucp_mbox apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b_1p8 vreg_l2b_3p0 vreg_l4b_1p8 vreg_l6b_1p8 vreg_l8b_3p0 vreg_l9b_2p9 vreg_l10b_1p8 vreg_l12b_1p2 vreg_l13b_3p0 vreg_l14b_3p0 vreg_l15b_1p8 vreg_l17b_2p5 vreg_s4c_1p8 vreg_l1c_1p2 vreg_l2c_0p8 vreg_l3c_0p9 vreg_l1d_0p8 vreg_l2d_0p9 vreg_l3d_1p8 vreg_l2e_0p8 vreg_l3e_1p2 vreg_s1f_0p7 vreg_s1i_0p9 vreg_s2i_1p0 vreg_l1i_1p8 vreg_l2i_1p2 vreg_l3i_0p8 vreg_s5j_1p2 vreg_l1j_0p9 vreg_l2j_1p2 vreg_l3j_0p8 sram cpu_scp_lpri0 cpu_scp_lpri1 sbsa_watchdog qfprom gpu_speed_bin llcc_bwmon_opp_table bwmon_cluster2 cpu_bwmon_opp_table remoteproc_cdsp pcie3_phy gpuss0_alert0 gpuss1_alert0 gpuss2_alert0 gpuss3_alert0 wcd938x pmic_glink_ss0_hs_in pmic_glink_ss0_ss_in pmic_glink_ss0_con_sbu_in pmic_glink_ss1_hs_in pmic_glink_ss1_ss_in pmic_glink_ss1_con_sbu_in vreg_edp_3p3 vreg_misc_3p3 vreg_nvme vreg_rtmr0_1p15 vreg_rtmr0_1p8 vreg_rtmr0_3p3 vreg_rtmr1_1p15 vreg_rtmr1_1p8 vreg_rtmr1_3p3 vreg_vph_pwr vreg_wcn_0p95 vreg_wcn_1p9 vreg_wcn_3p3 vreg_pmu_rfa_cmn_0p8 vreg_pmu_aon_0p8 vreg_pmu_wlcx_0p8 vreg_pmu_wlmx_0p8 vreg_pmu_btcmx_0p8 vreg_pmu_pcie_1p8 vreg_pmu_pcie_0p9 vreg_pmu_rfa_0p8 vreg_pmu_rfa_1p2 vreg_pmu_rfa_1p7 vreg_edp_bl 