 F   8    (            2 d                                                                   )   ,Qualcomm Technologies, Inc. X1P42100 CRD              2qcom,x1p42100-crd qcom,x1p42100    chosen           =serial0:115200n8          clocks     xo-board             2fixed-clock          I          Y             f        sleep-clk            2fixed-clock          I           Y             f   )      bi-tcxo-div2-clk             2fixed-factor-clock           Y             n                u                        f   (      bi-tcxo-ao-div2-clk          2fixed-factor-clock           Y             n               u                        f           cpus                                 cpu@0            cpu          2qcom,oryon                            psci                                         
   psci perf            f      l2-cache             2cache                                  f            cpu@100          cpu          2qcom,oryon                           psci                                         
   psci perf            f         cpu@200          cpu          2qcom,oryon                           psci                                         
   psci perf            f         cpu@300          cpu          2qcom,oryon                           psci                                         
   psci perf            f         cpu@10000            cpu          2qcom,oryon                           psci                	            
            
   psci perf            f      l2-cache             2cache                                  f   	         cpu@10100            cpu          2qcom,oryon                          psci                	                        
   psci perf            f         cpu@10200            cpu          2qcom,oryon                          psci                	                        
   psci perf            f         cpu@10300            cpu          2qcom,oryon                          psci                	                        
   psci perf            f         cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3                           idle-states          psci       cpu-sleep-0          2arm,idle-state          ret                    ,           =  @        M  X         f            domain-idle-states     cluster-sleep-0          2domain-idle-state             D        ,  ^        =          M  	         f   !      cluster-sleep-1          2domain-idle-state             T        ,          =          M  X         f   "            dummy-sink           2arm,coresight-dummy-sink       in-ports       port       endpoint            ^            f  M               firmware       scm          2qcom,scm-x1e80100 qcom,scm          n                          |              f        scmi          	   2arm,scmi                                 tx rx                                              protocol@13                                 f               interconnect-0           2qcom,x1e80100-clk-virt                                 f   4      interconnect-1           2qcom,x1e80100-mc-virt                                  f         memory@80000000          memory                                pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0             smc    power-domain-cpu0                                               f         power-domain-cpu1                                               f         power-domain-cpu2                                               f         power-domain-cpu3                                               f         power-domain-cpu4                                                f   
      power-domain-cpu5                                                f         power-domain-cpu6                                                f         power-domain-cpu7                                                f         power-domain-cpu-cluster0                          !   "            #         f         power-domain-cpu-cluster1                          !   "            #         f          power-domain-system                      f   #         reserved-memory                                      gunyah-hyp@80000000                                          f        hyp-elf-package@80800000                                             f        ncc@80a00000                        @                    f        cpucp-log@80e00000                                          f        cpucp@80e40000                      T                    f        reserved-region@81380000                 8                        tags-region@81400000                 @                           f        xbl-dtlog@81a00000                                          f        xbl-ramdump@81a40000                                            f        aop-image@81c00000                                          f        aop-cmd-db@81c60000          2qcom,cmd-db                                         f        aop-config@81c80000                                         f        tme-crash-dump@81ca0000                                         f        tme-log@81ce0000                         @                   f        uefi-log@81ce4000                @                          f        secdata-apss@81cff000                                          f        pdp-ns-shared@81e00000                                          f        gpu-prr@81f00000                                            f        tpm-control@81f10000                                            f        usb-ucsi-shared@81f20000                                            f        pld-pep@81f30000                         `                   f        pld-gmu@81f36000                 `                          f        pld-pdp@81f37000                 p                          f        tz-stat@82700000                 p                           f        xbl-tmp-buffer@82800000                                         f        adsp-rpc-remote-heap@84b00000                                           f        spu-secure-shared-memory@85300000                0                           f        adsp-boot-dtb@866c0000               l                           f        spss-region@86700000                 p       @                    f        adsp-boot@86b00000                                          f        video@87700000               p       p                    f         adspslpi@87e00000                                          f         q6-adsp-dtb@8b800000                                            f         cdsp@8b900000                                           f        q6-cdsp-dtb@8d900000                                            f        gpu-microcode@8d9fe000                                          f         cvp@8da00000                        p                    f        camera@8e100000                                         f        av1-encoder@8e900000                        p                    f        reserved-region@8f000000                                          wpss@8fa00000                                          f        q6-wpss-dtb@91300000                 0                           f        xbl-sc@d8000000                                          f        reserved-region@d8040000                        
                 qtee@d80e0000                       R                    f        ta@d8600000              `                          f        tags@e1000000                       j                    f        llcc-lpi@ff800000                       `                    f         smem@ffe00000         
   2qcom,smem                                     $                     f        linux,cma            2shared-dma-pool                                           opp-table-qup100mhz          2operating-points-v2          f   @   opp-75000000            0    xh        7   %      opp-100000000           0             7   &         opp-table-qup120mhz          2operating-points-v2          f   9   opp-75000000            0    xh        7   %      opp-120000000           0    '         7   &         smp2p-adsp           2qcom,smp2p          E   '                    '              Y            c            r      master-kernel           master-kernel                       f         slave-kernel            slave-kernel                                 f            smp2p-cdsp           2qcom,smp2p          E   '                    '              Y   ^          c            r      master-kernel           master-kernel                       f        slave-kernel            slave-kernel                                 f           soc@0            2simple-bus                                                                                                  f     clock-controller@100000       $   2qcom,x1p42100-gcc qcom,x1e80100-gcc                                  n   (   )   *   +   ,   -       .       /       0                                                                                                                            1             Y                                  f   3      mailbox@408000           2qcom,x1e80100-ipcc qcom,ipcc                  @                                                                  f   '      dma-controller@800000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                     >                      2  6          	  #disabled             f   7      geniqup@8c0000           2qcom,geni-se-qup                                     n   3      3           *m-ahb s-ahb            2  #                                              #okay             f     i2c@880000           2qcom,geni-i2c                         @               (            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7              7                  Ntx rx           X   8        bdefault                                 	  #disabled             f        spi@880000           2qcom,geni-spi                         @               (            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   9         I   7              7                  Ntx rx           X   :   ;        bdefault                                 	  #disabled             f        i2c@884000           2qcom,geni-i2c                 @       @               )            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7             7                 Ntx rx           X   <        bdefault                                 	  #disabled             f        spi@884000           2qcom,geni-spi                 @       @               )            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   9         I   7             7                 Ntx rx           X   =   >        bdefault                                 	  #disabled             f        i2c@888000           2qcom,geni-i2c                        @               *            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7             7                 Ntx rx           X   ?        bdefault                                 	  #disabled             f        spi@888000           2qcom,geni-spi                        @               *            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   @         I   7             7                 Ntx rx           X   A   B        bdefault                                 	  #disabled             f  	      i2c@88c000           2qcom,geni-i2c                        @               +            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7             7                 Ntx rx           X   C        bdefault                                 	  #disabled             f  
      spi@88c000           2qcom,geni-spi                        @               +            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   @         I   7             7                 Ntx rx           X   D   E        bdefault                                 	  #disabled             f        i2c@890000           2qcom,geni-i2c                         @               ,            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7             7                 Ntx rx           X   F        bdefault                                 	  #disabled             f        spi@890000           2qcom,geni-spi                         @               ,            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   @         I   7             7                 Ntx rx           X   G   H        bdefault                                 	  #disabled             f        i2c@894000           2qcom,geni-i2c                 @       @               -            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7             7                 Ntx rx           X   I        bdefault                                 	  #disabled             f        spi@894000           2qcom,geni-spi                 @       @               -            n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   @         I   7             7                 Ntx rx           X   J   K        bdefault                                 	  #disabled             f        serial@894000            2qcom,geni-debug-uart                  @       @               -            n   3           *se        0  n   4         4         5         6              6qup-core qup-config             1            p   @        X   L        bdefault         #okay             f        i2c@898000           2qcom,geni-i2c                        @                           n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7             7                 Ntx rx           X   M        bdefault                                 	  #disabled             f        spi@898000           2qcom,geni-spi                        @                           n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   @         I   7             7                 Ntx rx           X   N   O        bdefault                                 	  #disabled             f        i2c@89c000           2qcom,geni-i2c                        @                           n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            7   %         I   7             7                 Ntx rx           X   P        bdefault                                 	  #disabled             f        spi@89c000           2qcom,geni-spi                        @                           n   3           *se        H  n   4         4         5         6                                6qup-core qup-config qup-memory              1            p   @         I   7             7                 Ntx rx           X   Q   R        bdefault                                 	  #disabled             f           dma-controller@a00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                 	         
                                                                                                           >                      2  6          	  #disabled             f   T      geniqup@ac0000           2qcom,geni-se-qup                                     n   3      3           *m-ahb s-ahb            2  #                                              #okay             f     i2c@a80000           2qcom,geni-i2c                         @                            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T              T                  Ntx rx           X   U        bdefault                                   #okay             I          f     touchscreen@10           2hid-over-i2c                                   E   V   3              W           X        X   Y        bdefault          spi@a80000           2qcom,geni-spi                         @                            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   9         I   T              T                  Ntx rx           X   Z   [        bdefault                                 	  #disabled             f        i2c@a84000           2qcom,geni-i2c                 @       @               !            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T             T                 Ntx rx           X   \        bdefault                                 	  #disabled             f        spi@a84000           2qcom,geni-spi                 @       @               !            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   9         I   T             T                 Ntx rx           X   ]   ^        bdefault                                 	  #disabled             f        i2c@a88000           2qcom,geni-i2c                        @               "            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T             T                 Ntx rx           X   _        bdefault                                 	  #disabled             f        spi@a88000           2qcom,geni-spi                        @               "            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   @         I   T             T                 Ntx rx           X   `   a        bdefault                                 	  #disabled             f        i2c@a8c000           2qcom,geni-i2c                        @               #            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T             T                 Ntx rx           X   b        bdefault                                 	  #disabled             f        spi@a8c000           2qcom,geni-spi                        @               #            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   @         I   T             T                 Ntx rx           X   c   d        bdefault                                 	  #disabled             f        i2c@a90000           2qcom,geni-i2c                         @               $            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T             T                 Ntx rx           X   e        bdefault                                 	  #disabled             f        spi@a90000           2qcom,geni-spi                         @               $            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   @         I   T             T                 Ntx rx           X   f   g        bdefault                                 	  #disabled             f        i2c@a94000           2qcom,geni-i2c                 @       @               %            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T             T                 Ntx rx           X   h        bdefault                                 	  #disabled             f         spi@a94000           2qcom,geni-spi                 @       @               %            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   @         I   T             T                 Ntx rx           X   i   j        bdefault                                 	  #disabled             f  !      i2c@a98000           2qcom,geni-i2c                        @               &            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T             T                 Ntx rx           X   k        bdefault                                 	  #disabled             f  "      spi@a98000           2qcom,geni-spi                        @               &            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   @         I   T             T                 Ntx rx           X   l   m        bdefault                                 	  #disabled             f  #      serial@a98000            2qcom,geni-uart                       @               &            n   3           *se        0  n   4         4         5         6              6qup-core qup-config             1            p   @        X   n        bdefault       	  #disabled             f  $      i2c@a9c000           2qcom,geni-i2c                        @               '            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            7   %         I   T             T                 Ntx rx           X   o        bdefault                                 	  #disabled             f  %      spi@a9c000           2qcom,geni-spi                        @               '            n   3           *se        H  n   4         4         5         6         S                       6qup-core qup-config qup-memory              1            p   @         I   T             T                 Ntx rx           X   p   q        bdefault                                 	  #disabled             f  &         dma-controller@b00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                        L         M         N         O         P         Q         R         S         T         U         V         W                          >                      2  V          	  #disabled             f   r      geniqup@bc0000           2qcom,geni-se-qup                                     n   3      3           *m-ahb s-ahb            2  C                                              #okay             f  '   i2c@b80000           2qcom,geni-i2c                         @               u            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r              r                  Ntx rx           X   s        bdefault                                   #okay             I          f  (   touchpad@15          2hid-over-i2c                                   E   V                 W           t        X   u        bdefault                keyboard@3a          2hid-over-i2c                :                   E   V   C              W           t        X   v        bdefault                   spi@b80000           2qcom,geni-spi                         @               u            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   9         I   r              r                  Ntx rx           X   w   x        bdefault                                 	  #disabled             f  )      i2c@b84000           2qcom,geni-i2c                 @       @               G            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r             r                 Ntx rx           X   y        bdefault                                   #okay             I          f  *   typec-mux@8          2parade,ps8830                        n                 z           {           {           z           z           |           V              X   }        bdefault          	            ports                                port@0                  endpoint            ^   ~         f           port@1                 endpoint            ^            f            port@2                 endpoint            ^            f                    spi@b84000           2qcom,geni-spi                 @       @               G            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   9         I   r             r                 Ntx rx           X              bdefault                                 	  #disabled             f  +      i2c@b88000           2qcom,geni-i2c                        @               H            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r             r                 Ntx rx           X           bdefault                                 	  #disabled             f  ,      serial@b88000            2qcom,geni-uart                       @               H            n   3           *se        0  n   4         4         5         6              6qup-core qup-config             1            p   @        X           bdefault       	  #disabled             f  -      spi@b88000           2qcom,geni-spi                        @               H            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   @         I   r             r                 Ntx rx           X              bdefault                                 	  #disabled             f  .      i2c@b8c000           2qcom,geni-i2c                        @               I            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r             r                 Ntx rx           X           bdefault                                   #okay             I          f  /   typec-mux@8          2parade,ps8830                        n      
                                                                                
           X           bdefault                   	   ports                                port@0                  endpoint            ^            f           port@1                 endpoint            ^            f            port@2                 endpoint            ^            f                    spi@b8c000           2qcom,geni-spi                        @               I            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   @         I   r             r                 Ntx rx           X              bdefault                                 	  #disabled             f  0      i2c@b90000           2qcom,geni-i2c                         @               J            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r             r                 Ntx rx           X           bdefault                                 	  #disabled             f  1      spi@b90000           2qcom,geni-spi                         @               J            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   @         I   r             r                 Ntx rx           X              bdefault                                 	  #disabled             f  2      i2c@b94000           2qcom,geni-i2c                 @       @               K            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r             r                 Ntx rx           X           bdefault                                   #okay             I          f  3   redriver@4f          2nxp,ptn3222             O        +           9              V              X           bdefault         G             f            spi@b94000           2qcom,geni-spi                 @       @               K            n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   @         I   r             r                 Ntx rx           X              bdefault                                 	  #disabled             f  4      i2c@b98000           2qcom,geni-i2c                        @                           n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r             r                 Ntx rx           X           bdefault                                 	  #disabled             f  5      spi@b98000           2qcom,geni-spi                        @                           n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   @         I   r             r                 Ntx rx           X              bdefault                                 	  #disabled             f  6      i2c@b9c000           2qcom,geni-i2c                        @                           n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            7   %         I   r             r                 Ntx rx           X           bdefault                                   #okay             I          f  7   typec-mux@8          2parade,ps8830                        n                                                                                   V              X           bdefault                   	   ports                                port@0                  endpoint            ^            f           port@1                 endpoint            ^            f            port@2                 endpoint            ^            f                    spi@b9c000           2qcom,geni-spi                        @                           n   3           *se        H  n   4         4         5         6                                 6qup-core qup-config qup-memory              1            p   @         I   r             r                 Ntx rx           X              bdefault                                 	  #disabled             f  8         thermal-sensor@c271000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '            "                 E                             Ruplow critical          b           p            f        thermal-sensor@c272000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '             "0                E                             Ruplow critical          b           p            f        thermal-sensor@c273000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '0            "@                E                             Ruplow critical          b           p            f        thermal-sensor@c274000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '@            "P                E                             Ruplow critical          b           p         	  #disabled             f  9      phy@fd3000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy               0       T        G             n              *ref            3   6        #okay                                              f         phy@fd5000           2qcom,x1e80100-qmp-usb3-dp-phy                 P       @           n   3            3     3          *aux ref com_aux usb3_pipe               3              3   D   3   O        phy common           Y           G                     	        #okay                                   f   .   ports                                port@0                  endpoint            ^            f            port@1                 endpoint            ^            f            port@2                 endpoint            ^            f                 phy@fd9000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T        G             n              *ref            3   7        #okay                                              f         phy@fda000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           n   3            3  "   3  #        *aux ref com_aux usb3_pipe               3              3   E   3   P        phy common           Y           G                     	        #okay                                   f   /   ports                                port@0                  endpoint            ^            f            port@1                 endpoint            ^            f            port@2                 endpoint            ^            f                 phy@fde000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T        G             n              *ref            3   8        #okay                                              f         phy@fdf000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           n   3  $         3  &   3  '        *aux ref com_aux usb3_pipe               3              3   F   3   Q        phy common           Y           G                     	        #okay                                   f   0   ports                                port@0                  endpoint            ^            f            port@1                 endpoint            ^            f            port@2                 endpoint            ^            f                 interconnect@1500000             2qcom,x1e80100-cnoc-main              P       D                                f         interconnect@1600000             2qcom,x1e80100-cnoc-cfg               `        f                                f   6      interconnect@1680000             2qcom,x1e80100-system-noc                 h                                      f  :      interconnect@16c0000             2qcom,x1e80100-pcie-south-anoc                l        Ѐ                               f         interconnect@16d0000             2qcom,x1e80100-pcie-center-anoc               m        p                                f  ;      interconnect@16e0000             2qcom,x1e80100-aggre1-noc                 n       D                                f   S      interconnect@1700000             2qcom,x1e80100-aggre2-noc                 p                                       f         interconnect@1740000             2qcom,x1e80100-pcie-north-anoc                t                                       f         interconnect@1750000             2qcom,x1e80100-usb-center-anoc                u                                        f  <      interconnect@1760000             2qcom,x1e80100-usb-north-anoc                 v        p                               f         interconnect@1770000             2qcom,x1e80100-usb-south-anoc                 w                                       f         interconnect@1780000             2qcom,x1e80100-mmss-noc               x                                       f         pcie@1bd0000                                 2      {               pci          2qcom,pcie-x1e80100        `               0     x              x @           x             x             0                parf dbi elbi atu config mhi                                   T                 x                 x0      x0              @      @       @                                              
         l                                     D                                                 y         /  Rmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                            '                                                                                                                                                      8   n   3   T   3   V   3   W   3   ^   3   _   3      3   !      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi         5   3   T        E$       0  n                      5                       6pcie-mem cpu-pcie              3      3           pci link_down               3              *        Zpciephy         dUUUUUUUUUUUUUUUU        tUUUUUUUU        p         	  #disabled             f  =   opp-table            2operating-points-v2          f      opp-2500000-1           0     &%        7   %         А                    opp-5000000-1           0     LK@        7   %                              opp-10000000-1          0             7   %         B@                    opp-20000000-1          0    1-         7   %                             opp-5000000-2           0     LK@        7   %                              opp-10000000-2          0             7   %         B@                    opp-20000000-2          0    1-         7   %                             opp-40000000-2          0    bZ         7   %         =	                     opp-8000000-3           0     z         7   &                             opp-16000000-3          0     $         7   &         h                    opp-32000000-3          0    H         7   &         <                    opp-64000000-3          0    А         7   &         x-                    opp-16000000-4          0     $         7   &         h                    opp-32000000-4          0    H         7   &         <                    opp-64000000-4          0    А         7   &         x-                    opp-128000000-4         0              7   &         _(                       pcie@0           pci          2pciclass,0604                                                                                         f  >         pci@1bf8000         2      {               pci          2qcom,pcie-x1e80100        `              0     p              p @           p             p                             parf dbi elbi atu config mhi                                   8                 p                 p0      p0                                                   
                              l                          E         F         G         H         I         J                  /  Rmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                            '                                K                                   L                                   M                                            8   n   3   v   3   x   3   y   3      3      3      3   "      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi         5   3   v        E$       0  n                     5                       6pcie-mem cpu-pcie              3   "   3   #        pci link_down               3   
        7              -        Zpciephy         dUUUUUUUU        tUUUU        #okay               V                 V                         bdefault         X            f  ?      phy@1bfc000       "   2qcom,x1p42100-qmp-gen4x4-pcie-phy                                             0   n   3   z   3   x      
   3   {   3   }   3         $  *aux cfg_ahb ref rchng pipe pipediv2            3   %   3   $        phy phy_nocsr           5   3   {        E             3   	                          Y            pcie6a_pipe_clk         G            #okay                                   f   -      pci@1c00000                              2      {               pci          2qcom,pcie-x1e80100        `               0     ~             ~ @           ~             ~             0                parf dbi elbi atu config mhi                                   8                 ~                 ~0      ~0                                                   
         l         ^          _          `          Y          V          R          M          N                   /  Rmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                            '                                 F                                    G                                    H                                    I         8   n   3   k   3   m   3   n   3   t   3   u   3      3   !      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi         5   3   k        E$       0  n                     5                       6pcie-mem cpu-pcie              3      3           pci link_down               3           7              ,        Zpciephy         dUUUU        #okay               V                 V                         X           bdefault          f  @      phy@1c06000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                `               0   n   3   k   3   m         3   o   3   q   3   s      $  *aux cfg_ahb ref rchng pipe pipediv2            3       3           phy phy_nocsr           5   3   o        E             3            Y            pcie5_pipe_clk          G            #okay                                   f   ,      pci@1c08000         2      {               pci          2qcom,pcie-x1e80100        `              0     |             | @           |             |                             parf dbi elbi atu config mhi                                   8                 |                 |0      |0                                                   
                              l                                                                                                  /  Rmsi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                            '                                                                                                                                                      8   n   3   `   3   b   3   c   3   i   3   j   3      3   !      <  *aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi         5   3   `        E$       0  n                     5                       6pcie-mem cpu-pcie              3      3           pci link_down               3           7              +        Zpciephy         dUUUU        #okay               V                 V              X           bdefault          f  A   pcie@0           pci                                                                                       f  B         phy@1c0e000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                               0   n   3   `   3   b          3   d   3   f   3   h      $  *aux cfg_ahb ref rchng pipe pipediv2            3      3           phy phy_nocsr           5   3   d        E             3            Y            pcie4_pipe_clk          G            #okay                                   f   +      hwlock@1f40000           2qcom,tcsr-mutex                                           f   $      clock-controller@1fc0000             2qcom,x1e80100-tcsr syscon                                  n                Y                       f         gpu@3d00000       !   2qcom,adreno-43030c00 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                ,                                        p                                          
  &speed_bin           n   5                         6gfx-mem         #okay             f     zap-shader        	  #disabled           7           Eqcom/x1p42100/gen71500_zap.mbn           f  C      opp-table         /   2operating-points-v2-adreno operating-points-v2           f      opp-1250000000          0    J|                            S*_        f         opp-550000000           0     U                    \k        S._        f         opp-1400000000          0    SrN                             S)_        f         opp-1107000000          0    Az                            S*_        f         opp-1014000000          0    <pi                   ۳        S*_        f         opp-940000000           0    8C           @         ۳        S*_        f         opp-825000000           0    1,@                            S+_        f         opp-720000000           0    *T                             S,_        f         opp-666000000-0         0    'Z                    |c        S-_        f         opp-666000000-1         0    'Z                             S-_        f         opp-380000000           0    W            @         -        S/_        f         opp-280000000           0    v            8                  S/_        f               gmu@3d6a000       '   2qcom,adreno-gmu-x145.0 qcom,adreno-gmu        0       ֠      P                  (                 gmu rscc gmu_pdc                  0         1           Rhfi gmu       8   n                      3   $   3   7                  !  *ahb gmu cxo axi memnoc hub demet                                   cx gx                             w           p            f      opp-table            2operating-points-v2          f      opp-550000000           0     U                 opp-220000000           0                @            clock-controller@3d90000             2qcom,x1p42100-gpucc                                n   (   3   5   3   6         Y                                  f         iommu@3da0000         B   2qcom,x1e80100-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                    8                                                                                                                                      >         ?         @         A                                                                                     n         3   7   3   8               *hlos bus iface ahb                                    f         interconnect@26400000            2qcom,x1e80100-gem-noc                &@       1                                f   5      interconnect@320c0000            2qcom,x1e80100-nsp-noc                2                                       f        remoteproc@6800000           2qcom,x1e80100-adsp-pas                              <  E                                                    #  Rwdog fatal ready handover stop-ack           n               *xo              1      1            lcx lmx         n                           7              w                          stop            #okay          2  Eqcom/x1e80100/adsp.mbn qcom/x1e80100/adsp_dtb.mbn            f  D   glink-edge          E   '                     '               lpass           r      fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           adsp                                          compute-cb@3             2qcom,fastrpc-compute-cb                        2        2  c                   compute-cb@4             2qcom,fastrpc-compute-cb                        2        2  d                   compute-cb@5             2qcom,fastrpc-compute-cb                        2        2  e                   compute-cb@6             2qcom,fastrpc-compute-cb                        2        2  f                   compute-cb@7             2qcom,fastrpc-compute-cb                        2        2  g                      gpr       	   2qcom,gpr          
  adsp_apps                                                         service@1            2qcom,q6apm                                  "avs/audio msm/adsp/audio_pd          f     bedais           2qcom,q6apm-lpass-dais                       f        dais             2qcom,q6apm-dais            2        2  a             f  E         service@2            2qcom,q6prm                      "avs/audio msm/adsp/audio_pd          f  F   clock-controller             2qcom,q6prm-lpass-clocks          Y            f                     codec@6aa0000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   n      D         f         g              *mclk macro dcodec fsgen          Y          
  wsa2-mclk                      9WSA2             f         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                  n           *iface                             WSA2            X              bdefault                       swr_audio_cgcr          K           Z   	        j   ?   ?                                                                                                                                                      #okay             f     speaker@0,0          2sdw20217020400                                                        9WooferRight         /   X        >   t        L               
            f        speaker@0,1          2sdw20217020400                                                       9TweeterRight            /   X        >   t        L                           f           codec@6ac0000         8   2qcom,x1e80100-lpass-rx-macro qcom,sm8550-lpass-rx-macro                             (   n      @         f         g              *mclk macro dcodec fsgen          Y            mclk                        f         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                  n           *iface                             RX          X           bdefault                        swr_audio_cgcr          K           Z           j                                                                                                                                      #okay             f     codec@0,4            2sdw20217010d00                          ^                        f           codec@6ae0000         8   2qcom,x1e80100-lpass-tx-macro qcom,sm8550-lpass-tx-macro                             (   n      9         f         g              *mclk macro dcodec fsgen          Y            mclk                        f         codec@6b00000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   n      B         f         g              *mclk macro dcodec fsgen          Y            mclk                       9WSA          f         soundwire@6b10000            2qcom,soundwire-v2.0.0                                  n           *iface                             WSA         X              bdefault                       swr_audio_cgcr          K           Z   	        j   ?   ?                                                                                                                                                      #okay             f     speaker@0,0          2sdw20217020400                                                        9WooferLeft          /   X        >   t        L               
            f        speaker@0,1          2sdw20217020400                                                       9TweeterLeft         /   X        >   t        L                           f           clock-controller@6b6c000          6   2qcom,x1e80100-lpassaudiocc qcom,sc8280xp-lpassaudiocc                                 Y                       f         soundwire@6d30000            2qcom,soundwire-v2.0.0                                  n           *iface                                     Rcore wakeup         TX                         swr_audio_cgcr          X           bdefault         K           Z           s                                                                                                                                                   #okay             f     codec@0,3            2sdw20217010d00                                               f           codec@6d44000         8   2qcom,x1e80100-lpass-va-macro qcom,sm8550-lpass-va-macro              @              $   n      9         f         g           *mclk macro dcodec            Y            fsgen                      X              bdefault                     I>          f         pinctrl@6e80000       >   2qcom,x1e80100-lpass-lpi-pinctrl qcom,sm8550-lpass-lpi-pinctrl                              %                  n      f         g           *core audio                                                     f      tx-swr-active-state          f      clk-pins            gpio0           swr_tx_clk                     	            	      data-pins           gpio1 gpio2         swr_tx_data                    	            	#         rx-swr-active-state          f      clk-pins            gpio3           swr_rx_clk                     	            	      data-pins           gpio4 gpio5         swr_rx_data                    	            	#         dmic01-default-state             f      clk-pins            gpio6         
  dmic1_clk                       	1      data-pins           gpio7           dmic1_data                      	=         dmic23-default-state             f      clk-pins            gpio8         
  dmic2_clk                       	1      data-pins           gpio9           dmic2_data                      	=         wsa-swr-active-state             f      clk-pins            gpio10          wsa_swr_clk                    	            	      data-pins           gpio11          wsa_swr_data                       	            	#         wsa2-swr-active-state            f      clk-pins            gpio15          wsa2_swr_clk                       	            	      data-pins           gpio16          wsa2_swr_data                      	            	#         spkr-01-sd-n-active-state           gpio12          gpio                        	         	J         f         spkr-23-sd-n-active-state           gpio13          gpio                        	         	J         f            clock-controller@6ea0000          ,   2qcom,x1e80100-lpasscc qcom,sc8280xp-lpasscc                                Y                       f         interconnect@7e40000             2qcom,x1e80100-lpass-ag-noc                                                      f  G      interconnect@7400000             2qcom,x1e80100-lpass-lpiaon-noc               @                                      f  H      interconnect@7430000             2qcom,x1e80100-lpass-lpicx-noc                C                                       f         mmc@8804000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                            Rhc_irq pwr_irq           n   3      3                  *iface core xo              2               	U d,        	eh            1            p         0  n                     5         6              6sdhc-ddr cpu-sdhc           	u                  	  #disabled             f  I   opp-table            2operating-points-v2          f      opp-19200000            0    $         7         opp-50000000            0            7   %      opp-100000000           0             7   &      opp-202000000           0    
F        7               mmc@8844000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                           Rhc_irq pwr_irq           n   3      3                  *iface core xo              2  `            	U d,        	eh            1            p         0  n                     5         6              6sdhc-ddr cpu-sdhc           	u                  	  #disabled             f  J   opp-table            2operating-points-v2          f      opp-19200000            0    $         7         opp-50000000            0            7   %      opp-100000000           0             7   &      opp-202000000           0    
F        7               phy@88e0000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T        G             n      	        *ref            3   9      	  #disabled             f         phy@88e1000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                     T        G             n              *ref            3   4        #okay                                   f         phy@88e2000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T        G             n              *ref            3   5        #okay                                              f         phy@88e3000          2qcom,x1e80100-qmp-usb3-uni-phy               0                   n   3            3     3          *aux ref com_aux pipe               3   G   3   L        phy phy_phy             3            Y            usb_mp_phy0_pipe_clk            G            #okay                                   f         phy@88e5000          2qcom,x1e80100-qmp-usb3-uni-phy               P                   n   3            3     3          *aux ref com_aux pipe               3   H   3   M        phy phy_phy             3            Y            usb_mp_phy1_pipe_clk            G            #okay                                   f         usb@a0f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   n   3      3     3      3     3     3      3       3      3         R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys           5   3     3          E$        4  E         r         :         9         
         1  Rpwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           7              3   A      0  n                     5         6   %           6usb-ddr apps-usb                                                       #okay             f  K   usb@a000000       
   2snps,dwc3                
                        a              2                    0            Zusb2-phy usb3-phy            	         	         	         	         	                 	host             f  L   ports                                port@0                  endpoint            ^            f           port@1                 endpoint            ^            f                     usb@a2f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
/                                                H   n   3      3      3      3      3      3      3       3      3         R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys           5   3      3           E$        (  E                   2         1         &  Rpwr_event dp_hs_phy_irq dm_hs_phy_irq               3           7              3   =      0  n                      5         6   "           6usb-ddr apps-usb             	               	  #disabled             f  M   usb@a200000       
   2snps,dwc3                
                                       2                       	  Zusb2-phy            
high-speed           	         	                  f  N   port       endpoint             f  O               usb@a4f8800           2qcom,x1e80100-dwc3-mp qcom,dwc3              
O              H   n   3      3      3      3     3     3      3       3      3         R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys           5   3     3           E$          E         9            :            5            8         4         3         6         5         7         8         l  Rpwr_event_1 pwr_event_2 hs_phy_1 hs_phy_2 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 ss_phy_1 ss_phy_2             3           7              3   >      0  n                     5         6   &           6usb-ddr apps-usb                                                       #okay             f  P   usb@a400000       
   2snps,dwc3                
@                       3              2                                   Zusb2-0 usb3-0 usb2-1 usb3-1         	host             	         	         	         	         	                  f  Q         usb@a6f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
o              H   n   3      3     3      3  
   3     3      3      3      3         R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys           5   3     3          E$        4  E         s         =                           1  Rpwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           7              3   ?                                                   #okay             f  R   usb@a600000       
   2snps,dwc3                
`                       c              2                     .            Zusb2-phy usb3-phy            	         	         	         	         	                 	host             f  S   ports                                port@0                  endpoint            ^            f           port@1                 endpoint            ^            f                     usb@a8f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   n   3      3     3      3     3     3      3       3      3         R  *cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys           5   3     3          E$        4  E         t         <                  /         1  Rpwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           7              3   @      0  n                     5         6   $           6usb-ddr apps-usb                                                       #okay             f  T   usb@a800000       
   2snps,dwc3                
                       e              2  `                  /            Zusb2-phy usb3-phy            	         	         	         	         	                 	host             f  U   ports                                port@0                  endpoint            ^            f           port@1                 endpoint            ^            f                     video-codec@aa00000       $   2qcom,x1e80100-iris qcom,sm8550-iris              
                                                     1   
   1            venus vcodec0 mxc mmcx          p            n   3  Y                     *iface core vcodec0_core       0  n   5         6   *                             6cpu-cfg video-mem           7              3   X        bus            2  @       2  G                   	  #disabled             f  V   opp-table            2operating-points-v2          f      opp-192000000           0    q         7          opp-240000000           0    N         7   &   %      opp-338000000           0    %x        7   &   &      opp-366000000           0    з        7            opp-444000000           0    v         7            opp-481000000           0    z@        7                clock-controller@aaf0000             2qcom,x1e80100-videocc                
                  n   (   3  X            1      1   
        7   %   %         Y                                  f         display-subsystem@ae00000            2qcom,x1e80100-mdss               
                 mdss                   S            n        3   &     :                    H  n            5                            5         6              6mdp0-mem mdp1-mem cpu-cfg                             2                                                                    #okay             f     display-controller@ae01000           2qcom,x1e80100-dpu                 
           
               	  mdp vbif            E            (   n   3   &          =     :     F        *nrt_bus iface lut core vsync            p              1            f  W   ports                                port@0                  endpoint            ^           f           port@4                 endpoint            ^           f           port@5                 endpoint            ^           f           port@6                 endpoint            ^  	         f              opp-table            2operating-points-v2          f     opp-200000000           0             7   %      opp-325000000           0    _@        7   &      opp-375000000           0    Z        7         opp-514000000           0            7         opp-575000000           0    "E        7  
            displayport-controller@ae90000           2qcom,x1e80100-dp          P       
             
            
            
            
                E           0   n                                    J  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel           5                       
)   .      .      .           p              1              .           Zdp                      #okay             f  X   ports                                port@0                  endpoint            ^           f           port@1                 endpoint            
@                     ^           
K    `=         Av    1          f               opp-table            2operating-points-v2          f     opp-160000000           0    	h         7   %      opp-270000000           0    ߀        7   &      opp-540000000           0     /         7         opp-810000000           0    0G        7               displayport-controller@ae98000           2qcom,x1e80100-dp          P       
            
            
            
            
                E           0   n                                    J  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel           5                        
)   /      /      /           p              1              /           Zdp                      #okay             f  Y   ports                                port@0                  endpoint            ^           f           port@1                 endpoint            
@                     ^           
K    `=         Av    1          f               opp-table            2operating-points-v2          f     opp-160000000           0    	h         7   %      opp-270000000           0    ߀        7   &      opp-540000000           0     /         7         opp-810000000           0    0G        7               displayport-controller@ae9a000           2qcom,x1e80100-dp          P       
            
            
            
            
                E           0   n          "     $     '     (     *      J  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel           5     %     )     +        
)   0      0      0           p              1              0           Zdp                      #okay             f  Z   ports                                port@0                  endpoint            ^           f  	         port@1                 endpoint            
@                     ^           
K    `=         Av    1          f               opp-table            2operating-points-v2          f     opp-160000000           0    	h         7   %      opp-270000000           0    ߀        7   &      opp-540000000           0     /         7         opp-810000000           0    0G        7               displayport-controller@aea0000           2qcom,x1e80100-dp          P       
             
            
            
            
                E           (   n          -     /     2     3      ;  *core_iface core_aux ctrl_link ctrl_link_iface stream_pixel          5     0     4        
)                   p              1                     Zdp          #okay            X          bdefault          f  [   ports                                port@0                  endpoint            ^           f           port@1                 endpoint            
@                      
K    `=         Av    1         ^           f              opp-table            2operating-points-v2          f     opp-160000000           0    	h         7   %      opp-270000000           0    ߀        7   &      opp-540000000           0     /         7         opp-810000000           0    0G        7            aux-bus    panel         &   2samsung,atna45af01 samsung,atna33xc20           
\                 
i          X          bdefault    port       endpoint            ^           f                       phy@aec2a00          2qcom,x1e80100-dp-phy          @       
*           
"            
&            
                 n     "                   *aux cfg_ahb ref             1            Y           G          	  #disabled             f  \      phy@aec5a00          2qcom,x1e80100-dp-phy          @       
Z           
R            
V            
P                n     -                   *aux cfg_ahb ref             1            Y           G            #okay                                   f        clock-controller@af00000             2qcom,x1e80100-dispcc                 
               d   n   (     3   %   )                   .      .      /      /      0      0                          1           7   %         Y                                  f        interrupt-controller@b220000             2qcom,x1e80100-pdc qcom,pdc                "             @        d      H  
v         *   *         /  
   4   c  a                 0                                             f         power-management@c300000          %   2qcom,x1e80100-aoss-qmp qcom,aoss-qmp                 0                      '        E   '                      '                 Y             f         sram@c3f0000             2qcom,rpmh-stats              ?               arbiter@c400000          2qcom,x1e80100-spmi-pmic-arb       0       @        0     P       @      D                 core chnls obsrvr           
            
                                               f  ]   spmi@c42d000                  B       @     L               
  cnfg intr           Rperiph_irq          E                                                                f  ^   pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                      f  _   pon@1300             2qcom,pmk8350-pon                         	  hlos pbs             f  `   pwrkey           2qcom,pmk8350-pwrkey                              
   t         f  a      resin            2qcom,pmk8350-resin                             	  #disabled             f  b         rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                  b               
         
         f  c      nvram@7100           2qcom,spmi-sdam             q                                        q             f  d   reboot-reason@48                H           
               f  e         nvram@7e00           2qcom,spmi-sdam             ~                                        ~             f  f   charge-limit-en@73              s            f        charge-limit-end@75             u            f        charge-limit-delta@76               v            f           gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                                                                                      f        pwm          2qcom,pmk8550-pwm            
         	  #disabled             f  g         pmic@1           2qcom,pm8550 qcom,spmi-pmic                                                     f  h   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               p             f        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                                                                                    f      kypd-vol-up-n-state         gpio6           normal          
            
         	=         f        rtmr0-reset-n-active-state          gpio10          normal          
            	         
         
         f         usb0-3p3-reg-en-state           gpio11          normal          
            	         
         
         f           led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  #disabled             f  i      pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            
         	  #disabled             f  j         pmic@2           2qcom,pm8550 qcom,spmi-pmic                                                     f  k   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               p             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                                                                     f           pmic@3           2qcom,pmc8380 qcom,spmi-pmic                                                    f  l   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               p             f        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                                              
                                        f     edp-bl-en-state         gpio4           normal          
            
         
         f              pmic@4           2qcom,pmc8380 qcom,spmi-pmic                                                    f  m   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               p             f        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                                               
                                        f            pmic@5           2qcom,pmc8380 qcom,spmi-pmic                                                    f  n   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               p             f        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                                   !           
                                        f  !   usb0-pwr-1p15-reg-en-state          gpio8           normal          
            	         
         
         f              pmic@8           2qcom,pm8550 qcom,spmi-pmic                                                     f  o   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
               p             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                  "                                                   f  "   misc-3p3-reg-en-state           gpio6           normal           	         
         
                 
                       f              pmic@9           2qcom,pm8550 qcom,spmi-pmic              	                                       f  p   temp-alarm@a00           2qcom,spmi-temp-alarm               
            	   
               p             f        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                  #                                                   f  #   usb0-1p8-reg-en-state           gpio8           normal          
            	         
         
         f              pmic@c           2qcom,pm8010 qcom,spmi-pmic                                                  	  #disabled             f  q   temp-alarm@2400          2qcom,spmi-temp-alarm               $               $               p             f              spmi@c432000                  C        @     M               
  cnfg intr           Rperiph_irq          E                                                                f  r   pmic@7           2qcom,smb2360 qcom,spmi-pmic                                                   #okay             f  s   phy@fd00             2qcom,smb2360-eusb2-repeater                     G            1  $        >  %         f            pmic@a           2qcom,smb2360 qcom,spmi-pmic             
                                      #okay             f  t   phy@fd00             2qcom,smb2360-eusb2-repeater                     G            1  $        >  &         f            pmic@b           2qcom,smb2360 qcom,spmi-pmic                                                   #okay             f  u   phy@fd00             2qcom,smb2360-eusb2-repeater                     G            1  $        >  '         f            pmic@c           2qcom,smb2360 qcom,spmi-pmic                                                 	  #disabled             f  v   phy@fd00             2qcom,smb2360-eusb2-repeater                     G             f  w               pinctrl@f100000          2qcom,x1e80100-tlmm                                                                                             V                   J           X   "      ,                  f   V   edp0-hpd-default-state          gpio119       	  edp0_hot             	         f        qup-i2c0-data-clk-state         gpio0 gpio1       	  qup0_se0                       
           f   s      qup-i2c1-data-clk-state         gpio4 gpio5       	  qup0_se1                       
           f   y      qup-i2c2-data-clk-state         gpio8 gpio9       	  qup0_se2                       
           f         qup-i2c3-data-clk-state         gpio12 gpio13         	  qup0_se3                       
           f         qup-i2c4-data-clk-state         gpio16 gpio17         	  qup0_se4                       
           f         qup-i2c5-data-clk-state         gpio20 gpio21         	  qup0_se5                       
           f         qup-i2c6-data-clk-state         gpio24 gpio25         	  qup0_se6                       
           f         qup-i2c7-data-clk-state         gpio14 gpio15         	  qup0_se7                       
           f         qup-i2c8-data-clk-state         gpio32 gpio33         	  qup1_se0                       
           f   U      qup-i2c9-data-clk-state         gpio36 gpio37         	  qup1_se1                       
           f   \      qup-i2c10-data-clk-state            gpio40 gpio41         	  qup1_se2                       
           f   _      qup-i2c11-data-clk-state            gpio44 gpio45         	  qup1_se3                       
           f   b      qup-i2c12-data-clk-state            gpio48 gpio49         	  qup1_se4                       
           f   e      qup-i2c13-data-clk-state            gpio52 gpio53         	  qup1_se5                       
           f   h      qup-i2c14-data-clk-state            gpio56 gpio57         	  qup1_se6                       
           f   k      qup-i2c15-data-clk-state            gpio54 gpio55         	  qup1_se7                       
           f   o      qup-i2c16-data-clk-state            gpio64 gpio65         	  qup2_se0                       
           f   8      qup-i2c17-data-clk-state            gpio68 gpio69         	  qup2_se1                       
           f   <      qup-i2c18-data-clk-state            gpio72 gpio73         	  qup2_se2                       
           f   ?      qup-i2c19-data-clk-state            gpio76 gpio77         	  qup2_se3                       
           f   C      qup-i2c20-data-clk-state            gpio80 gpio81         	  qup2_se4                       
           f   F      qup-i2c21-data-clk-state            gpio84 gpio85         	  qup2_se5                       
           f   I      qup-i2c22-data-clk-state            gpio88 gpio89         	  qup2_se6                       
           f   M      qup-i2c23-data-clk-state            gpio86 gpio87         	  qup2_se7                       
           f   P      qup-spi0-cs-state           gpio3         	  qup0_se0                        	         f   x      qup-spi0-data-clk-state         gpio0 gpio1 gpio2         	  qup0_se0                        	         f   w      qup-spi1-cs-state           gpio7         	  qup0_se1                        	         f         qup-spi1-data-clk-state         gpio4 gpio5 gpio6         	  qup0_se1                        	         f         qup-spi2-cs-state           gpio11        	  qup0_se2                        	         f         qup-spi2-data-clk-state         gpio8 gpio9 gpio10        	  qup0_se2                        	         f         qup-spi3-cs-state           gpio15        	  qup0_se3                        	         f         qup-spi3-data-clk-state         gpio12 gpio13 gpio14          	  qup0_se3                        	         f         qup-spi4-cs-state           gpio19        	  qup0_se4                        	         f         qup-spi4-data-clk-state         gpio16 gpio17 gpio18          	  qup0_se4                        	         f         qup-spi5-cs-state           gpio23        	  qup0_se5                        	         f         qup-spi5-data-clk-state         gpio20 gpio21 gpio22          	  qup0_se5                        	         f         qup-spi6-cs-state           gpio27        	  qup0_se6                        	         f         qup-spi6-data-clk-state         gpio24 gpio25 gpio26          	  qup0_se6                        	         f         qup-spi7-cs-state           gpio13        	  qup0_se7                        	         f         qup-spi7-data-clk-state         gpio14 gpio15 gpio12          	  qup0_se7                        	         f         qup-spi8-cs-state           gpio35        	  qup1_se0                        	         f   [      qup-spi8-data-clk-state         gpio32 gpio33 gpio34          	  qup1_se0                        	         f   Z      qup-spi9-cs-state           gpio39        	  qup1_se1                        	         f   ^      qup-spi9-data-clk-state         gpio36 gpio37 gpio38          	  qup1_se1                        	         f   ]      qup-spi10-cs-state          gpio43        	  qup1_se2                        	         f   a      qup-spi10-data-clk-state            gpio40 gpio41 gpio42          	  qup1_se2                        	         f   `      qup-spi11-cs-state          gpio47        	  qup1_se3                        	         f   d      qup-spi11-data-clk-state            gpio44 gpio45 gpio46          	  qup1_se3                        	         f   c      qup-spi12-cs-state          gpio51        	  qup1_se4                        	         f   g      qup-spi12-data-clk-state            gpio48 gpio49 gpio50          	  qup1_se4                        	         f   f      qup-spi13-cs-state          gpio55        	  qup1_se5                        	         f   j      qup-spi13-data-clk-state            gpio52 gpio53 gpio54          	  qup1_se5                        	         f   i      qup-spi14-cs-state          gpio59        	  qup1_se6                        	         f   m      qup-spi14-data-clk-state            gpio56 gpio57 gpio58          	  qup1_se6                        	         f   l      qup-spi15-cs-state          gpio53        	  qup1_se7                        	         f   q      qup-spi15-data-clk-state            gpio54 gpio55 gpio52          	  qup1_se7                        	         f   p      qup-spi16-cs-state          gpio67        	  qup2_se0                        	         f   ;      qup-spi16-data-clk-state            gpio64 gpio65 gpio66          	  qup2_se0                        	         f   :      qup-spi17-cs-state          gpio71        	  qup2_se1                        	         f   >      qup-spi17-data-clk-state            gpio68 gpio69 gpio70          	  qup2_se1                        	         f   =      qup-spi18-cs-state          gpio75        	  qup2_se2                        	         f   B      qup-spi18-data-clk-state            gpio72 gpio73 gpio74          	  qup2_se2                        	         f   A      qup-spi19-cs-state          gpio79        	  qup2_se3                        	         f   E      qup-spi19-data-clk-state            gpio76 gpio77 gpio78          	  qup2_se3                        	         f   D      qup-spi20-cs-state          gpio83        	  qup2_se4                        	         f   H      qup-spi20-data-clk-state            gpio80 gpio81 gpio82          	  qup2_se4                        	         f   G      qup-spi21-cs-state          gpio87        	  qup2_se5                        	         f   K      qup-spi21-data-clk-state            gpio84 gpio85 gpio86          	  qup2_se5                        	         f   J      qup-spi22-cs-state          gpio91        	  qup2_se6                        	         f   O      qup-spi22-data-clk-state            gpio88 gpio89 gpio90          	  qup2_se6                        	         f   N      qup-spi23-cs-state          gpio85        	  qup2_se7                        	         f   R      qup-spi23-data-clk-state            gpio86 gpio87 gpio84          	  qup2_se7                        	         f   Q      qup-uart2-default-state          f      cts-pins            gpio8         	  qup0_se2                        	      rts-pins            gpio9         	  qup0_se2                        	      tx-pins         gpio10        	  qup0_se2                        	      rx-pins         gpio11        	  qup0_se2                        	         qup-uart14-default-state             f   n   cts-pins            gpio56        	  qup1_se6             	#      rts-pins            gpio57        	  qup1_se6                        	      tx-pins         gpio58        	  qup1_se6                        	      rx-pins         gpio59        	  qup1_se6             
         qup-uart21-default-state             f   L   tx-pins         gpio86        	  qup2_se5                        	      rx-pins         gpio87        	  qup2_se5                        	         sdc2-default-state           f  x   clk-pins          	  sdc2_clk                        	      cmd-pins          	  sdc2_cmd               
         
      data-pins         
  sdc2_data              
         
         sdc2-sleep-state             f  y   clk-pins          	  sdc2_clk                        	      cmd-pins          	  sdc2_cmd                        
      data-pins         
  sdc2_data                       
         edp-reg-en-state            gpio70          gpio                        	         f        eusb6-reset-n-state         gpio184         gpio                        	         	J         f         hall-int-n-state            gpio92          gpio             	         f        kybd-default-state          gpio67          gpio             	         f   v      nvme-reg-en-state           gpio18          gpio                        	         f        pcie4-default-state          f      clkreq-n-pins           gpio147       
  pcie4_clk                       
      perst-n-pins            gpio146         gpio                        	      wake-n-pins         gpio148         gpio                        
         pcie5-default-state          f      clkreq-n-pins           gpio150       
  pcie5_clk                       
      perst-n-pins            gpio149         gpio                        	      wake-n-pins         gpio151         gpio                        
         pcie6a-default-state             f      clkreq-n-pins           gpio153         pcie6a_clk                      
      perst-n-pins            gpio152         gpio                        	      wake-n-pins         gpio154         gpio                        
         rtmr1-reset-n-active-state          gpio176         gpio                        	         f         rtmr2-reset-n-active-state          gpio185         gpio                        	         f   }      tpad-default-state          gpio3           gpio             	         f   u      ts0-default-state            f   Y   int-n-pins          gpio51          gpio             	      reset-n-pins            gpio48          gpio             	1                    usb1-pwr-1p15-reg-en-state          gpio188         gpio                        	         f        usb1-pwr-1p8-reg-en-state           gpio175         gpio                        	         f        usb1-pwr-3p3-reg-en-state           gpio186         gpio                        	         f        usb2-pwr-1p15-reg-en-state          gpio189         gpio                        	         f        usb2-pwr-1p8-reg-en-state           gpio126         gpio                        	         f        usb2-pwr-3p3-reg-en-state           gpio187         gpio                        	         f        wcd-reset-n-active-state            gpio191         gpio                        	         	J         f        wwan-sw-en-state            gpio221         gpio                        	         f           stm@10002000              2arm,coresight-stm arm,primecell                             (                 stm-base stm-stimulus-base           n         	  *apb_pclk       out-ports      port       endpoint            ^  (         f  /               tpdm@10003000         "   2qcom,coresight-tpdm arm,primecell                 0                 n         	  *apb_pclk            m                      	  #disabled       out-ports      port       endpoint            ^  )         f  *               tpda@10004000         "   2qcom,coresight-tpda arm,primecell                 @                 n         	  *apb_pclk       in-ports                                 port@0                  endpoint            ^  *         f  )         port@1                 endpoint            ^  +         f  -            out-ports      port       endpoint            ^  ,         f  .               tpdm@1000f000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  *apb_pclk            m                   out-ports      port       endpoint            ^  -         f  +               funnel@10041000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  *apb_pclk       in-ports                                 port@6                 endpoint            ^  .         f  ,         port@7                 endpoint            ^  /         f  (            out-ports      port       endpoint            ^  0         f  5               funnel@10042000       +   2arm,coresight-dynamic-funnel arm,primecell                                 n         	  *apb_pclk       in-ports                                 port@2                 endpoint            ^  1         f  {         port@5                 endpoint            ^  2         f  E         port@6                 endpoint            ^  3         f  m            out-ports      port       endpoint            ^  4         f  6               funnel@10045000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 n         	  *apb_pclk       in-ports                                 port@0                  endpoint            ^  5         f  0         port@1                 endpoint            ^  6         f  4            out-ports      port       endpoint            ^  7         f  H               tpdm@10800000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  8         f  q               tpdm@1082c000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk                               out-ports      port       endpoint            ^  9         f  f               tpdm@10841000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^  :         f  d               tpdm@10844000         "   2qcom,coresight-tpdm arm,primecell                @                 n         	  *apb_pclk                               out-ports      port       endpoint            ^  ;         f  <               funnel@10846000       +   2arm,coresight-dynamic-funnel arm,primecell               `                 n         	  *apb_pclk       in-ports       port       endpoint            ^  <         f  ;            out-ports      port       endpoint            ^  =         f  c               cti@1098b000              2arm,coresight-cti arm,primecell                               n         	  *apb_pclk          tpdm@109d0000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  *apb_pclk                                  	  #disabled       out-ports      port       endpoint            ^  >         f  e               tpdm@10ac0000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  *apb_pclk                                  	  #disabled       out-ports      port       endpoint            ^  ?         f  A               tpdm@10ac1000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  @         f  B               tpda@10ac4000         "   2qcom,coresight-tpda arm,primecell                @                 n         	  *apb_pclk       in-ports                                 port@8                 endpoint            ^  A         f  ?         port@9              	   endpoint            ^  B         f  @            out-ports      port       endpoint            ^  C         f  D               funnel@10ac5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 n         	  *apb_pclk       in-ports       port       endpoint            ^  D         f  C            out-ports      port       endpoint            ^  E         f  2               funnel@10b04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 n         	  *apb_pclk       in-ports                                 port@3                 endpoint            ^  F         f  ]         port@6                 endpoint            ^  G         f  S         port@7                 endpoint            ^  H         f  7            out-ports      port       endpoint            ^  I         f  J               tmc@10b05000              2arm,coresight-tmc arm,primecell              P                 n         	  *apb_pclk             f  z   in-ports       port       endpoint            ^  J         f  I            out-ports      port       endpoint            ^  K         f  L               replicator@10b06000       /   2arm,coresight-dynamic-replicator arm,primecell               `                 n         	  *apb_pclk       in-ports       port       endpoint            ^  L         f  K            out-ports      port       endpoint            ^  M         f                  tpda@10b08000         "   2qcom,coresight-tpda arm,primecell                                 n         	  *apb_pclk       in-ports                                 port@0                  endpoint            ^  N         f  T         port@1                 endpoint            ^  O         f  U         port@2                 endpoint            ^  P         f  V         port@3                 endpoint            ^  Q         f  W         port@4                 endpoint            ^  R         f  X            out-ports      port       endpoint            ^  S         f  G               tpdm@10b09000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  T         f  N               tpdm@10b0a000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  U         f  O               tpdm@10b0b000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  V         f  P               tpdm@10b0c000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  W         f  Q               tpdm@10b0d000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk                               out-ports      port       endpoint            ^  X         f  R               tpdm@10b20000         "   2qcom,coresight-tpdm arm,primecell                                  n         	  *apb_pclk                                  	  #disabled       out-ports      port       endpoint            ^  Y         f  Z               tpda@10b23000         "   2qcom,coresight-tpda arm,primecell                0                 n         	  *apb_pclk          	  #disabled       in-ports       port       endpoint            ^  Z         f  Y            out-ports      port       endpoint            ^  [         f  \               funnel@10b24000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 n         	  *apb_pclk          	  #disabled       in-ports       port       endpoint            ^  \         f  [            out-ports      port       endpoint            ^  ]         f  F               tpdm@10c08000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk                               out-ports      port       endpoint            ^  ^         f  _               funnel@10c0b000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  *apb_pclk       in-ports                                 port@4                 endpoint            ^  _         f  ^            out-ports      port       endpoint            ^  `         f  p               tpdm@10c28000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk                               out-ports      port       endpoint            ^  a         f  g               tpdm@10c29000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  b         f  h               tpda@10c2b000         "   2qcom,coresight-tpda arm,primecell                °                 n         	  *apb_pclk       in-ports                                 port@4                 endpoint            ^  c         f  =         port@13                endpoint            ^  d         f  :         port@14                endpoint            ^  e         f  >         port@15                endpoint            ^  f         f  9         port@1a                endpoint            ^  g         f  a         port@1b                endpoint            ^  h         f  b            out-ports      port       endpoint            ^  i         f  j               funnel@10c2c000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  *apb_pclk       in-ports                                 port@0                  endpoint            ^  j         f  i         port@4                 endpoint            ^  k         f  v         port@5                 endpoint            ^  l         f  }            out-ports      port       endpoint            ^  m         f  3               tpdm@10c38000         "   2qcom,coresight-tpdm arm,primecell                À                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  n         f  r               tpdm@10c39000         "   2qcom,coresight-tpdm arm,primecell                Ð                 n         	  *apb_pclk            m   @               out-ports      port       endpoint            ^  o         f  s               tpda@10c3c000         "   2qcom,coresight-tpda arm,primecell                                 n         	  *apb_pclk       in-ports                                 port@4                 endpoint            ^  p         f  `         port@f                 endpoint            ^  q         f  8         port@10                endpoint            ^  r         f  n         port@11                endpoint            ^  s         f  o            out-ports      port       endpoint            ^  t         f  u               funnel@10c3d000       +   2arm,coresight-dynamic-funnel arm,primecell                                n         	  *apb_pclk       in-ports       port       endpoint            ^  u         f  t            out-ports      port       endpoint            ^  v         f  k               tpdm@10cc1000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m   @                                          	  #disabled       out-ports      port       endpoint            ^  w         f  x               tpda@10cc4000         "   2qcom,coresight-tpda arm,primecell                @                 n         	  *apb_pclk       in-ports                                 port@2                 endpoint            ^  x         f  w            out-ports      port       endpoint            ^  y         f  z               funnel@10cc5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 n         	  *apb_pclk       in-ports       port       endpoint            ^  z         f  y            out-ports      port       endpoint            ^  {         f  1               funnel@10d04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 n         	  *apb_pclk       in-ports                                 port@6                 endpoint            ^  |         f              out-ports      port       endpoint            ^  }         f  l               tpdm@10d08000         "   2qcom,coresight-tpdm arm,primecell                Ѐ                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^  ~         f                 tpdm@10d09000         "   2qcom,coresight-tpdm arm,primecell                А                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^           f                 tpdm@10d0a000         "   2qcom,coresight-tpdm arm,primecell                Р                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^           f                 tpdm@10d0b000         "   2qcom,coresight-tpdm arm,primecell                а                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^           f                 tpdm@10d0c000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^           f                 tpdm@10d0d000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^           f                 tpdm@10d0e000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^           f                 tpdm@10d0f000         "   2qcom,coresight-tpdm arm,primecell                                 n         	  *apb_pclk            m                   out-ports      port       endpoint            ^           f                 tpda@10d12000         "   2qcom,coresight-tpda arm,primecell                                  n         	  *apb_pclk       in-ports                                 port@0                  endpoint            ^           f  ~         port@1                 endpoint            ^           f           port@2                 endpoint            ^           f           port@3                 endpoint            ^           f           port@4                 endpoint            ^           f           port@5                 endpoint            ^           f           port@6                 endpoint            ^           f           port@7                 endpoint            ^           f              out-ports      port       endpoint            ^           f                 funnel@10d13000       +   2arm,coresight-dynamic-funnel arm,primecell               0                 n         	  *apb_pclk       in-ports       port       endpoint            ^           f              out-ports      port       endpoint            ^           f  |               iommu@15000000        1   2qcom,x1e80100-smmu-500 qcom,smmu-500 arm,mmu-500                                         A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                                                  f   2      iommu@15400000           2arm,smmu-v3              @                          $                                        Reventq gerror cmdq-sync                  #okay ved         f  {      interrupt-controller@17000000            2arm,gic-v3                                     0                	                                                                                            f      msi-controller@17040000          2arm,gic-v3-its                                                     f            mailbox@17430000             2qcom,x1e80100-cpucp-mbox                  C                                                            f         rsc@17500000             2qcom,rpmh-rsc         0       P             Q             R                 drv-0 drv-1 drv-2         $                                                                                               	  apps_rsc                #         f  |   bcm-voter            2qcom,bcm-voter           f         clock-controller             2qcom,x1e80100-rpmh-clk           n          *xo           Y            f         power-controller             2qcom,x1e80100-rpmhpd            p                      f   1   opp-table            2operating-points-v2          f     opp-16                      f  }      opp-48             0         f         opp-52             4         f  ~      opp-56             8         f        opp-60             <         f        opp-64             @         f   %      opp-80             P         f        opp-128                     f   &      opp-144                     f        opp-192                     f         opp-256                     f         opp-320           @         f  
      opp-336           P         f        opp-384                    f        opp-416                    f              regulators-0             2qcom,pm8550-rpmh-regulators         /b           <          L          \          q                                                                 bob1          
  vreg_bob1            -          <l        '            f        bob2          
  vreg_bob2            &5@         -         '            f        ldo1            vreg_l1b_1p8             w@         w@        '            f         ldo2            vreg_l2b_3p0             .          /M`        '            f  %      ldo4            vreg_l4b_1p8             w@         w@        '            f         ldo5            vreg_l5b_3p0             -         -        '            f        ldo6            vreg_l6b_1p8             w@         -*        '            f        ldo7            vreg_l7b_2p8             *         *        '            f        ldo8            vreg_l8b_3p0             .          .         '            f  '      ldo9            vreg_l9b_2p9             -*         -*        '            f        ldo10           vreg_l10b_1p8            w@         w@        '            f        ldo12           vreg_l12b_1p2            O         O        '            >         f   t      ldo13           vreg_l13b_3p0            .          /M`        '            f         ldo14           vreg_l14b_3p0            .          .         '            f  &      ldo15           vreg_l15b_1p8            w@         w@        '            >         f   X      ldo16           vreg_l16b_2p9            ,o          ,o         '            f        ldo17           vreg_l17b_2p5            &5@         &5@        '            f           regulators-1             2qcom,pm8550ve-rpmh-regulators           /c           R          `          n          |     smps4           vreg_s4c_1p8             R                  '            f        ldo1            vreg_l1c_1p2             O         O        '            f        ldo2            vreg_l2c_0p8             m         	        '            f        ldo3            vreg_l3c_0p8             m         	        '            f            regulators-2             2qcom,pmc8380-rpmh-regulators            /d           R          `          n               ldo1            vreg_l1d_0p8             m         	        '            f         ldo2            vreg_l2d_0p9                      	        '            f         ldo3            vreg_l3d_1p8             w@         w@        '            f  $         regulators-3             2qcom,pmc8380-rpmh-regulators            /e           `          n     ldo2            vreg_l2e_0p8             m         	        '            f         ldo3            vreg_l3e_1p2             O         O        '            f            regulators-4             2qcom,pmc8380-rpmh-regulators            /f           R          `          n               smps1           vreg_s1f_0p7             
`                 '            f        ldo1            vreg_l1f_1p0                                '            f        ldo2            vreg_l2f_1p0                                '            f        ldo3            vreg_l3f_1p0                                '            f           regulators-6             2qcom,pm8550ve-rpmh-regulators           /i           R          `          n                         smps1           vreg_s1i_0p9                      	        '            f        smps2           vreg_s2i_1p0             B@                 '            f        ldo1            vreg_l1i_1p8             w@         w@        '            f        ldo2            vreg_l2i_1p2             O         O        '            f        ldo3            vreg_l3i_0p8             m         	        '            f            regulators-7             2qcom,pm8550ve-rpmh-regulators           /j           R          `          n               smps5           vreg_s5j_1p2             *@                 '            f        ldo1            vreg_l1j_0p8             m         	        '            f         ldo2            vreg_l2j_1p2             *@         *@        '            f         ldo3            vreg_l3j_0p8             m         	        '            f               timer@17800000           2arm,armv7-timer-mem                                                                               frame@17801000                                                                          frame@17803000               0                   	                    	  #disabled          frame@17805000               P                   
                    	  #disabled          frame@17807000               p                                       	  #disabled          frame@17809000                                                      	  #disabled          frame@1780b000                                                      	  #disabled          frame@1780d000                                                      	  #disabled             sram@18b4e000         
   2mmio-sram                                                                              f     scp-sram-section@0           2arm,scmi-shmem                           f         scp-sram-section@200             2arm,scmi-shmem                          f            watchdog@1c840000         	  #disabled gwd         2arm,sbsa-gwdt                                                                   f        efuse@221c8000        !   2qcom,x1e80100-qfprom qcom,qfprom                 "                                          f     gpu-speed-bin@119                         
      	         f            pmu@24091000          0   2qcom,x1e80100-llcc-bwmon qcom,sc7280-llcc-bwmon              $	                       Q           n                           p     opp-table            2operating-points-v2          f     opp-0            5       opp-1            !b      opp-2            .       opp-3            ^       opp-4            hL       opp-5                   opp-6                   opp-7                   opp-8                    opp-9                        pmu@240b5400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $T                      E           n   5         5              p           f     opp-table            2operating-points-v2          f     opp-0            I>       opp-1            q@      opp-2            |       opp-3                   opp-4            Ȁ      opp-5           `@            pmu@240b6400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $d                      E           n   5         5              p        system-cache-controller@25000000             2qcom,x1e80100-llcc               %               %               %@              %`              %              %              %              %              &               &                   llcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base llcc_broadcast_and_base               
         remoteproc@32300000          2qcom,x1e80100-cdsp-pas               20               @  E         B                                          #  Rwdog fatal ready handover stop-ack           n               *xo              1       1   
   1            cx mxc nsp          n                          7            w                         stop            #okay          2  Eqcom/x1e80100/cdsp.mbn qcom/x1e80100/cdsp_dtb.mbn            f     glink-edge          E   '                     '               cdsp            r      fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           cdsp                                          compute-cb@1             2qcom,fastrpc-compute-cb                        2                     compute-cb@2             2qcom,fastrpc-compute-cb                        2                     compute-cb@3             2qcom,fastrpc-compute-cb                        2                     compute-cb@4             2qcom,fastrpc-compute-cb                        2                     compute-cb@5             2qcom,fastrpc-compute-cb                        2                     compute-cb@6             2qcom,fastrpc-compute-cb                        2                     compute-cb@7             2qcom,fastrpc-compute-cb                        2                     compute-cb@8             2qcom,fastrpc-compute-cb                        2                     compute-cb@10            2qcom,fastrpc-compute-cb             
           2                     compute-cb@11            2qcom,fastrpc-compute-cb                        2                     compute-cb@12            2qcom,fastrpc-compute-cb                        2                     compute-cb@13            2qcom,fastrpc-compute-cb                        2                              phy@1bd4000       "   2qcom,x1p42100-qmp-gen4x4-pcie-phy                 @             `               0   n   3   X   3   V         3   Y   3   [   3   ]      $  *aux cfg_ahb ref rchng pipe pipediv2            3      3           phy phy_nocsr           5   3   Y        E             3            Y            pcie3_pipe_clk          G          	  #disabled             f   *         timer            2arm,armv8-timer       0                                   
         thermal-zones            f     aoss0-thermal                    trips      trip-point0          _                   hot       trip-point1          8                	   critical                cpu0-0-top-thermal                  trips      trip-point0          8                	   critical                cpu0-0-btm-thermal                  trips      trip-point0          8                	   critical                cpu0-1-top-thermal                  trips      trip-point0          8                	   critical                cpu0-1-btm-thermal                  trips      trip-point0          8                	   critical                cpu0-2-top-thermal                  trips      trip-point0          8                	   critical                cpu0-2-btm-thermal                  trips      trip-point0          8                	   critical                cpu0-3-top-thermal                  trips      trip-point0          8                	   critical                cpu0-3-btm-thermal                  trips      trip-point0          8                	   critical                cpuss0-top-thermal               	   trips      trip-point0          8                	   critical                cpuss0-btm-thermal               
   trips      trip-point0          8                	   critical                mem-thermal                 trips      trip-point0          _                   hot       trip-point1          8                  	   critical                video-thermal                   trips      trip-point0          _                   hot       trip-point1          8                	   critical                aoss1-thermal                    trips      trip-point0          _                   hot       trip-point1          8                	   critical                cpu1-0-top-thermal                  trips      trip-point0          8                	   critical                cpu1-0-btm-thermal                  trips      trip-point0          8                	   critical                cpu1-1-top-thermal                  trips      trip-point0          8                	   critical                cpu1-1-btm-thermal                  trips      trip-point0          8                	   critical                cpu1-2-top-thermal                  trips      trip-point0          8                	   critical                cpu1-2-btm-thermal                  trips      trip-point0          8                	   critical                cpu1-3-top-thermal                  trips      trip-point0          8                	   critical                cpu1-3-btm-thermal                  trips      trip-point0          8                	   critical                cpuss1-top-thermal               	   trips      trip-point0          8                	   critical                cpuss1-btm-thermal               
   trips      trip-point0          8                	   critical                aoss2-thermal                    trips      trip-point0          _                   hot       trip-point1          8                	   critical                nsp0-thermal                    trips      trip-point0          _                   hot       trip-point1          8                	   critical                nsp1-thermal                    trips      trip-point0          _                   hot       trip-point1          8                	   critical                nsp2-thermal                    trips      trip-point0          _                   hot       trip-point1          8                	   critical                nsp3-thermal                    trips      trip-point0          _                   hot       trip-point1          8                	   critical                gpuss-0-thermal                            cooling-maps       map0                                 trips      trip-point0          s                   passive          f        trip-point1          8                	   critical                gpuss-1-thermal                            cooling-maps       map0                                 trips      trip-point0          s                   passive          f        trip-point1          8                	   critical                gpuss-2-thermal                            cooling-maps       map0                                 trips      trip-point0          s                   passive          f        trip-point1          8                	   critical                gpuss-3-thermal                            cooling-maps       map0                                 trips      trip-point0          s                   passive          f        trip-point1          8                	   critical                camera0-thermal              	   trips      trip-point0          _                   hot       trip-point1          8                	   critical                camera1-thermal              
   trips      trip-point0          _                   hot       trip-point1          8                	   critical                pm8550-thermal             d             trips      trip0            s                     passive       trip1            8                     hot             pm8550ve-2-thermal             d             trips      trip0            s                     passive       trip1            8                     hot             pmc8380-3-thermal              d             trips      trip0            s                     passive       trip1            8                     hot             pmc8380-4-thermal              d             trips      trip0            s                     passive       trip1            8                     hot             pmc8380-5-thermal              d             trips      trip0            s                     passive       trip1            8                     hot             pm8550ve-8-thermal             d             trips      trip0            s                     passive       trip1            8                     hot             pm8550ve-9-thermal             d             trips      trip0            s                     passive       trip1            8                     hot             pm8010-thermal             d             trips      trip0            s                     passive       trip1            8                     hot                aliases       $  /soc@0/geniqup@8c0000/serial@894000       audio-codec          2qcom,wcd9385-codec          bdefault         X           w@        2 w@        J w@        b w@         z $ I                              P                                V                 X           X        >   X        /                      f        gpio-keys         
   2gpio-keys           X            bdefault    key-vol-up        
  volume_up                            
   s               switch-lid          lid            V   \           C           
                     T            pmic-glink        @   2qcom,x1e80100-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink                                 $  h   V   y       V   {       V   }                        4  &charge_limit_en charge_limit_end charge_limit_delta    connector@0          2usb-c-connector                      zdual            dual       ports                                port@0                  endpoint            ^           f            port@1                 endpoint            ^           f            port@2                 endpoint            ^           f                  connector@1          2usb-c-connector                     zdual            dual       ports                                port@0                  endpoint            ^           f            port@1                 endpoint            ^           f            port@2                 endpoint            ^           f                  connector@2          2usb-c-connector                     zdual            dual       ports                                port@0                  endpoint            ^           f            port@1                 endpoint            ^           f   ~         port@2                 endpoint            ^           f                     sound            2qcom,x1e80100-sndcard            ,X1E80100-CRD           WooferLeft IN WSA WSA_SPK1 OUT TweeterLeft IN WSA WSA_SPK2 OUT WooferRight IN WSA2 WSA_SPK2 OUT TweeterRight IN WSA2 WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC2 MIC BIAS2 VA DMIC0 MIC BIAS3 VA DMIC1 MIC BIAS3 VA DMIC2 MIC BIAS1 VA DMIC3 MIC BIAS1 TX SWR_INPUT1 ADC2_OUTPUT    wcd-playback-dai-link           WCD Playback       cpu              q      codec                                    platform                       wcd-capture-dai-link            WCD Capture    cpu              x      codec                                  platform                       wsa-dai-link            WSA Playback       cpu              i      codec         0                                          platform                       va-dai-link         VA Capture     cpu              n      codec                        platform                          regulator-edp-3p3            2regulator-fixed         VREG_EDP_3P3             2Z         2Z           V   F                     X          bdefault                   f        regulator-misc-3p3           2regulator-fixed         VREG_MISC_3P3            2Z         2Z          "                        bdefault         X                    >         f   W      regulator-nvme           2regulator-fixed         VREG_NVME_3P3            2Z         2Z           V                        bdefault         X                    f         regulator-rtmr0-1p15             2regulator-fixed         VREG_RTMR0_1P15          0         0          !                        X          bdefault                   f         regulator-rtmr0-1p8          2regulator-fixed         VREG_RTMR0_1P8           w@         w@          #                        X          bdefault                   f         regulator-rtmr0-3p3          2regulator-fixed         VREG_RTMR0_3P3           2Z         2Z                                   X          bdefault                   f         regulator-rtmr1-1p15             2regulator-fixed         VREG_RTMR1_1P15          0         0           V                        X          bdefault                   f         regulator-rtmr1-1p8          2regulator-fixed         VREG_RTMR1_1P8           w@         w@           V                        X          bdefault                   f         regulator-rtmr1-3p3          2regulator-fixed         VREG_RTMR1_3P3           2Z         2Z           V                        X          bdefault                   f         regulator-rtmr2-1p15             2regulator-fixed         VREG_RTMR2_1P15          0         0           V                        X          bdefault                   f   z      regulator-rtmr2-1p8          2regulator-fixed         VREG_RTMR2_1P8           w@         w@           V   ~                     X          bdefault                   f   |      regulator-rtmr2-3p3          2regulator-fixed         VREG_RTMR2_3P3           2Z         2Z           V                        X          bdefault                   f   {      regulator-vph-pwr            2regulator-fixed         vph_pwr          8u          8u          >                  f        regulator-wwan           2regulator-fixed         SDX_VPH_PWR          2Z         2Z           V                        X          bdefault                   f         __symbols__         /clocks/xo-board            /clocks/sleep-clk           /clocks/bi-tcxo-div2-clk            /clocks/bi-tcxo-ao-div2-clk         /cpus/cpu@0         /cpus/cpu@0/l2-cache            /cpus/cpu@100           /cpus/cpu@200           /cpus/cpu@300           $/cpus/cpu@10000         )/cpus/cpu@10000/l2-cache            ./cpus/cpu@10100         3/cpus/cpu@10200         8/cpus/cpu@10300         =/cpus/idle-states/cpu-sleep-0         )  H/cpus/domain-idle-states/cluster-sleep-0          )  T/cpus/domain-idle-states/cluster-sleep-1          #  `/dummy-sink/in-ports/port/endpoint          g/firmware/scm           k/firmware/scmi/protocol@13          u/interconnect-0         ~/interconnect-1         /psci/power-domain-cpu0         /psci/power-domain-cpu1         /psci/power-domain-cpu2         /psci/power-domain-cpu3         /psci/power-domain-cpu4         /psci/power-domain-cpu5         /psci/power-domain-cpu6         /psci/power-domain-cpu7          /psci/power-domain-cpu-cluster0          /psci/power-domain-cpu-cluster1         /psci/power-domain-system         %  /reserved-memory/gunyah-hyp@80000000          *  /reserved-memory/hyp-elf-package@80800000           /reserved-memory/ncc@80a00000         $  /reserved-memory/cpucp-log@80e00000          !/reserved-memory/cpucp@80e40000       &  +/reserved-memory/tags-region@81400000         $  4/reserved-memory/xbl-dtlog@81a00000       &  B/reserved-memory/xbl-ramdump@81a40000         $  R/reserved-memory/aop-image@81c00000       %  `/reserved-memory/aop-cmd-db@81c60000          %  o/reserved-memory/aop-config@81c80000          )  ~/reserved-memory/tme-crash-dump@81ca0000          "  /reserved-memory/tme-log@81ce0000         #  /reserved-memory/uefi-log@81ce4000        '  /reserved-memory/secdata-apss@81cff000        (  /reserved-memory/pdp-ns-shared@81e00000       "  /reserved-memory/gpu-prr@81f00000         &  /reserved-memory/tpm-control@81f10000         *  /reserved-memory/usb-ucsi-shared@81f20000         "  /reserved-memory/pld-pep@81f30000         "  	/reserved-memory/pld-gmu@81f36000         "  /reserved-memory/pld-pdp@81f37000         "  !/reserved-memory/tz-stat@82700000         )  -/reserved-memory/xbl-tmp-buffer@82800000          /  @/reserved-memory/adsp-rpc-remote-heap@84b00000        3  Y/reserved-memory/spu-secure-shared-memory@85300000        (  v/reserved-memory/adsp-boot-dtb@866c0000       &  /reserved-memory/spss-region@86700000         $  /reserved-memory/adsp-boot@86b00000          /reserved-memory/video@87700000       #  /reserved-memory/adspslpi@87e00000        &  /reserved-memory/q6-adsp-dtb@8b800000           /reserved-memory/cdsp@8b900000        &  /reserved-memory/q6-cdsp-dtb@8d900000         (  /reserved-memory/gpu-microcode@8d9fe000         /reserved-memory/cvp@8da00000         !   /reserved-memory/camera@8e100000          &  /reserved-memory/av1-encoder@8e900000           /reserved-memory/wpss@8fa00000        &  $/reserved-memory/q6-wpss-dtb@91300000         !  4/reserved-memory/xbl-sc@d8000000            ?/reserved-memory/qtee@d80e0000          H/reserved-memory/ta@d8600000            O/reserved-memory/tags@e1000000        #  Y/reserved-memory/llcc-lpi@ff800000          f/reserved-memory/smem@ffe00000          o/opp-table-qup100mhz            /opp-table-qup120mhz            /smp2p-adsp/master-kernel           /smp2p-adsp/slave-kernel            /smp2p-cdsp/master-kernel           /smp2p-cdsp/slave-kernel            /soc@0          /soc@0/clock-controller@100000          /soc@0/mailbox@408000           /soc@0/dma-controller@800000            /soc@0/geniqup@8c0000         !  /soc@0/geniqup@8c0000/i2c@880000          !  /soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  /soc@0/geniqup@8c0000/spi@884000          !  	/soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  !/soc@0/geniqup@8c0000/i2c@890000          !  '/soc@0/geniqup@8c0000/spi@890000          !  -/soc@0/geniqup@8c0000/i2c@894000          !  3/soc@0/geniqup@8c0000/spi@894000          $  9/soc@0/geniqup@8c0000/serial@894000       !  @/soc@0/geniqup@8c0000/i2c@898000          !  F/soc@0/geniqup@8c0000/spi@898000          !  L/soc@0/geniqup@8c0000/i2c@89c000          !  R/soc@0/geniqup@8c0000/spi@89c000            X/soc@0/dma-controller@a00000            a/soc@0/geniqup@ac0000         !  i/soc@0/geniqup@ac0000/i2c@a80000          !  n/soc@0/geniqup@ac0000/spi@a80000          !  s/soc@0/geniqup@ac0000/i2c@a84000          !  x/soc@0/geniqup@ac0000/spi@a84000          !  }/soc@0/geniqup@ac0000/i2c@a88000          !  /soc@0/geniqup@ac0000/spi@a88000          !  /soc@0/geniqup@ac0000/i2c@a8c000          !  /soc@0/geniqup@ac0000/spi@a8c000          !  /soc@0/geniqup@ac0000/i2c@a90000          !  /soc@0/geniqup@ac0000/spi@a90000          !  /soc@0/geniqup@ac0000/i2c@a94000          !  /soc@0/geniqup@ac0000/spi@a94000          !  /soc@0/geniqup@ac0000/i2c@a98000          !  /soc@0/geniqup@ac0000/spi@a98000          $  /soc@0/geniqup@ac0000/serial@a98000       !  /soc@0/geniqup@ac0000/i2c@a9c000          !  /soc@0/geniqup@ac0000/spi@a9c000            /soc@0/dma-controller@b00000            /soc@0/geniqup@bc0000         !  /soc@0/geniqup@bc0000/i2c@b80000          !  /soc@0/geniqup@bc0000/spi@b80000          !  /soc@0/geniqup@bc0000/i2c@b84000          C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b84000/typec-mux@8/ports/port@2/endpoint        !  )/soc@0/geniqup@bc0000/spi@b84000          !  ./soc@0/geniqup@bc0000/i2c@b88000          $  3/soc@0/geniqup@bc0000/serial@b88000       !  9/soc@0/geniqup@bc0000/spi@b88000          !  >/soc@0/geniqup@bc0000/i2c@b8c000          C  C/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@0/endpoint        C  V/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@1/endpoint        C  h/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b8c000          !  /soc@0/geniqup@bc0000/i2c@b90000          !  /soc@0/geniqup@bc0000/spi@b90000          !  /soc@0/geniqup@bc0000/i2c@b94000          -  /soc@0/geniqup@bc0000/i2c@b94000/redriver@4f          !  /soc@0/geniqup@bc0000/spi@b94000          !  /soc@0/geniqup@bc0000/i2c@b98000          !  /soc@0/geniqup@bc0000/spi@b98000          !  /soc@0/geniqup@bc0000/i2c@b9c000          C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b9c000            /soc@0/thermal-sensor@c271000            /soc@0/thermal-sensor@c272000           /soc@0/thermal-sensor@c273000           /soc@0/thermal-sensor@c274000           /soc@0/phy@fd3000           %/soc@0/phy@fd5000         (  6/soc@0/phy@fd5000/ports/port@0/endpoint       (  K/soc@0/phy@fd5000/ports/port@1/endpoint       (  f/soc@0/phy@fd5000/ports/port@2/endpoint         }/soc@0/phy@fd9000           /soc@0/phy@fda000         (  /soc@0/phy@fda000/ports/port@0/endpoint       (  /soc@0/phy@fda000/ports/port@1/endpoint       (  /soc@0/phy@fda000/ports/port@2/endpoint         /soc@0/phy@fde000           /soc@0/phy@fdf000         (  /soc@0/phy@fdf000/ports/port@0/endpoint       (  /soc@0/phy@fdf000/ports/port@1/endpoint       (  6/soc@0/phy@fdf000/ports/port@2/endpoint         M/soc@0/interconnect@1500000         W/soc@0/interconnect@1600000         b/soc@0/interconnect@1680000         m/soc@0/interconnect@16c0000         }/soc@0/interconnect@16d0000         /soc@0/interconnect@16e0000         /soc@0/interconnect@1700000         /soc@0/interconnect@1740000         /soc@0/interconnect@1750000         /soc@0/interconnect@1760000         /soc@0/interconnect@1770000         /soc@0/interconnect@1780000         /soc@0/pcie@1bd0000         /soc@0/pcie@1bd0000/opp-table           /soc@0/pcie@1bd0000/pcie@0          /soc@0/pci@1bf8000          /soc@0/phy@1bfc000          /soc@0/pci@1c00000          $/soc@0/phy@1c06000          ./soc@0/pci@1c08000          4/soc@0/pci@1c08000/pcie@0           @/soc@0/phy@1c0e000          J/soc@0/hwlock@1f40000            U/soc@0/clock-controller@1fc0000         Z/soc@0/gpu@3d00000          ^/soc@0/gpu@3d00000/zap-shader           m/soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          {/soc@0/gmu@3d6a000/opp-table             /soc@0/clock-controller@3d90000         /soc@0/iommu@3da0000            /soc@0/interconnect@26400000            /soc@0/interconnect@320c0000            /soc@0/remoteproc@6800000         3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         /soc@0/codec@6aa0000            /soc@0/soundwire@6ab0000          %  /soc@0/soundwire@6ab0000/speaker@0,0          %  /soc@0/soundwire@6ab0000/speaker@0,1            /soc@0/codec@6ac0000            !/soc@0/soundwire@6ad0000          #  &/soc@0/soundwire@6ad0000/codec@0,4          -/soc@0/codec@6ae0000            ;/soc@0/codec@6b00000            J/soc@0/soundwire@6b10000          %  O/soc@0/soundwire@6b10000/speaker@0,0          %  [/soc@0/soundwire@6b10000/speaker@0,1             h/soc@0/clock-controller@6b6c000         v/soc@0/soundwire@6d30000          #  {/soc@0/soundwire@6d30000/codec@0,3          /soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  /soc@0/pinctrl@6e80000/tx-swr-active-state        +  /soc@0/pinctrl@6e80000/rx-swr-active-state        ,  /soc@0/pinctrl@6e80000/dmic01-default-state       ,  /soc@0/pinctrl@6e80000/dmic23-default-state       ,  /soc@0/pinctrl@6e80000/wsa-swr-active-state       -  /soc@0/pinctrl@6e80000/wsa2-swr-active-state          1  /soc@0/pinctrl@6e80000/spkr-01-sd-n-active-state          1  /soc@0/pinctrl@6e80000/spkr-23-sd-n-active-state             /soc@0/clock-controller@6ea0000         $/soc@0/interconnect@7e40000         1/soc@0/interconnect@7400000         B/soc@0/interconnect@7430000         R/soc@0/mmc@8804000          Y/soc@0/mmc@8804000/opp-table            i/soc@0/mmc@8844000          p/soc@0/mmc@8844000/opp-table            /soc@0/phy@88e0000          /soc@0/phy@88e1000          /soc@0/phy@88e2000          /soc@0/phy@88e3000          /soc@0/phy@88e5000          /soc@0/usb@a0f8800          /soc@0/usb@a0f8800/usb@a000000        5  /soc@0/usb@a0f8800/usb@a000000/ports/port@0/endpoint          5  /soc@0/usb@a0f8800/usb@a000000/ports/port@1/endpoint            /soc@0/usb@a2f8800          	/soc@0/usb@a2f8800/usb@a200000        -  /soc@0/usb@a2f8800/usb@a200000/port/endpoint            "/soc@0/usb@a4f8800          )/soc@0/usb@a4f8800/usb@a400000          5/soc@0/usb@a6f8800          ?/soc@0/usb@a6f8800/usb@a600000        5  N/soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  `/soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint            r/soc@0/usb@a8f8800          |/soc@0/usb@a8f8800/usb@a800000        5  /soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint          5  /soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint            /soc@0/video-codec@aa00000        %  /soc@0/video-codec@aa00000/opp-table             /soc@0/clock-controller@aaf0000       !  /soc@0/display-subsystem@ae00000          <  /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpoint         F  /soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  #/soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  ,/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  8/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  E/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         @  X/soc@0/display-subsystem@ae00000/displayport-controller@ae98000       V  a/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpoint         V  m/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpoint         J  z/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000       V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table         \  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/aux-bus/panel/port/endpoint         /soc@0/phy@aec2a00          /soc@0/phy@aec5a00           /soc@0/clock-controller@af00000       $  %/soc@0/interrupt-controller@b220000          )/soc@0/power-management@c300000         2/soc@0/arbiter@c400000        $  7/soc@0/arbiter@c400000/spmi@c42d000       +  A/soc@0/arbiter@c400000/spmi@c42d000/pmic@0        4  I/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300       ;  U/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey        :  `/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin         4  j/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@6100       6  v/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100         G  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@48        6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00         I  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-en@73          J  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-end@75         L  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-delta@76       5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800          /  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a00         5  
/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800          I  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/kypd-vol-up-n-state          P  %/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-state       K  3/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/usb0-3p3-reg-en-state        ?  C/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00        /  P/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm        +  [/soc@0/arbiter@c400000/spmi@c42d000/pmic@2        :  f/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a00         5  |/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800          E  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800/edp-bl-en-state          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800          P  $/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/usb0-pwr-1p15-reg-en-state       +  9/soc@0/arbiter@c400000/spmi@c42d000/pmic@8        :  D/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a00         5  Z/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800          K  k/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800/misc-3p3-reg-en-state        +  {/soc@0/arbiter@c400000/spmi@c42d000/pmic@9        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800          K  /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/usb0-1p8-reg-en-state        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@c        ;  /soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400        $  /soc@0/arbiter@c400000/spmi@c432000       +  /soc@0/arbiter@c400000/spmi@c432000/pmic@7        4  /soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00       +   /soc@0/arbiter@c400000/spmi@c432000/pmic@a        4   /soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00       +   &/soc@0/arbiter@c400000/spmi@c432000/pmic@b        4   0/soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00       +   I/soc@0/arbiter@c400000/spmi@c432000/pmic@c        4   S/soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00         /soc@0/pinctrl@f100000        .   l/soc@0/pinctrl@f100000/edp0-hpd-default-state         /   }/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /   /soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /   /soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /   /soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /   /soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /   /soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /   /soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /   /soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  !1/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  !D/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  !W/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  !j/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  !}/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       0  !/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       0  !/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state       0  !/soc@0/pinctrl@f100000/qup-i2c17-data-clk-state       0  !/soc@0/pinctrl@f100000/qup-i2c18-data-clk-state       0  !/soc@0/pinctrl@f100000/qup-i2c19-data-clk-state       0  !/soc@0/pinctrl@f100000/qup-i2c20-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c21-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c22-data-clk-state       0  "(/soc@0/pinctrl@f100000/qup-i2c23-data-clk-state       )  ";/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  "G/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  "Y/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  "e/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  "w/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  #+/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  #7/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  #I/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  #U/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  #g/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  #t/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       *  $'/soc@0/pinctrl@f100000/qup-spi16-cs-state         0  $4/soc@0/pinctrl@f100000/qup-spi16-data-clk-state       *  $G/soc@0/pinctrl@f100000/qup-spi17-cs-state         0  $T/soc@0/pinctrl@f100000/qup-spi17-data-clk-state       *  $g/soc@0/pinctrl@f100000/qup-spi18-cs-state         0  $t/soc@0/pinctrl@f100000/qup-spi18-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi19-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi19-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi20-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi20-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi21-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi21-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi22-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi22-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi23-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi23-data-clk-state       /  %'/soc@0/pinctrl@f100000/qup-uart2-default-state        0  %9/soc@0/pinctrl@f100000/qup-uart14-default-state       0  %L/soc@0/pinctrl@f100000/qup-uart21-default-state       *  %_/soc@0/pinctrl@f100000/sdc2-default-state         (  %l/soc@0/pinctrl@f100000/sdc2-sleep-state       (  %w/soc@0/pinctrl@f100000/edp-reg-en-state       +  %/soc@0/pinctrl@f100000/eusb6-reset-n-state        (  %/soc@0/pinctrl@f100000/hall-int-n-state       *  %/soc@0/pinctrl@f100000/kybd-default-state         )  %/soc@0/pinctrl@f100000/nvme-reg-en-state          +  %/soc@0/pinctrl@f100000/pcie4-default-state        +  %/soc@0/pinctrl@f100000/pcie5-default-state        ,  %/soc@0/pinctrl@f100000/pcie6a-default-state       2  %/soc@0/pinctrl@f100000/rtmr1-reset-n-active-state         2  %/soc@0/pinctrl@f100000/rtmr2-reset-n-active-state         *  &/soc@0/pinctrl@f100000/tpad-default-state         )  &/soc@0/pinctrl@f100000/ts0-default-state          2  &/soc@0/pinctrl@f100000/usb1-pwr-1p15-reg-en-state         1  &1/soc@0/pinctrl@f100000/usb1-pwr-1p8-reg-en-state          1  &E/soc@0/pinctrl@f100000/usb1-pwr-3p3-reg-en-state          2  &Y/soc@0/pinctrl@f100000/usb2-pwr-1p15-reg-en-state         1  &n/soc@0/pinctrl@f100000/usb2-pwr-1p8-reg-en-state          1  &/soc@0/pinctrl@f100000/usb2-pwr-3p3-reg-en-state          0  &/soc@0/pinctrl@f100000/wcd-reset-n-active-state       (  &/soc@0/pinctrl@f100000/wwan-sw-en-state       ,  &/soc@0/stm@10002000/out-ports/port/endpoint       -  &/soc@0/tpdm@10003000/out-ports/port/endpoint          .  &/soc@0/tpda@10004000/in-ports/port@0/endpoint         .  &/soc@0/tpda@10004000/in-ports/port@1/endpoint         -  &/soc@0/tpda@10004000/out-ports/port/endpoint          -  &/soc@0/tpdm@1000f000/out-ports/port/endpoint          0  &/soc@0/funnel@10041000/in-ports/port@6/endpoint       0  '/soc@0/funnel@10041000/in-ports/port@7/endpoint       /  '/soc@0/funnel@10041000/out-ports/port/endpoint        0  '/soc@0/funnel@10042000/in-ports/port@2/endpoint       0  '*/soc@0/funnel@10042000/in-ports/port@5/endpoint       0  '6/soc@0/funnel@10042000/in-ports/port@6/endpoint       /  'B/soc@0/funnel@10042000/out-ports/port/endpoint        0  'N/soc@0/funnel@10045000/in-ports/port@0/endpoint       0  '^/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  'n/soc@0/funnel@10045000/out-ports/port/endpoint        -  '~/soc@0/tpdm@10800000/out-ports/port/endpoint          -  '/soc@0/tpdm@1082c000/out-ports/port/endpoint          -  '/soc@0/tpdm@10841000/out-ports/port/endpoint          -  '/soc@0/tpdm@10844000/out-ports/port/endpoint          .  '/soc@0/funnel@10846000/in-ports/port/endpoint         /  '/soc@0/funnel@10846000/out-ports/port/endpoint        -  '/soc@0/tpdm@109d0000/out-ports/port/endpoint          -  '/soc@0/tpdm@10ac0000/out-ports/port/endpoint          -  '/soc@0/tpdm@10ac1000/out-ports/port/endpoint          .  (
/soc@0/tpda@10ac4000/in-ports/port@8/endpoint         .  (/soc@0/tpda@10ac4000/in-ports/port@9/endpoint         -  (&/soc@0/tpda@10ac4000/out-ports/port/endpoint          .  (4/soc@0/funnel@10ac5000/in-ports/port/endpoint         /  (D/soc@0/funnel@10ac5000/out-ports/port/endpoint        0  (T/soc@0/funnel@10b04000/in-ports/port@3/endpoint       0  (d/soc@0/funnel@10b04000/in-ports/port@6/endpoint       0  (t/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  (/soc@0/funnel@10b04000/out-ports/port/endpoint          (/soc@0/tmc@10b05000       +  (/soc@0/tmc@10b05000/in-ports/port/endpoint        ,  (/soc@0/tmc@10b05000/out-ports/port/endpoint       2  (/soc@0/replicator@10b06000/in-ports/port/endpoint         3  (/soc@0/replicator@10b06000/out-ports/port/endpoint        .  (/soc@0/tpda@10b08000/in-ports/port@0/endpoint         .  (/soc@0/tpda@10b08000/in-ports/port@1/endpoint         .  (/soc@0/tpda@10b08000/in-ports/port@2/endpoint         .  (/soc@0/tpda@10b08000/in-ports/port@3/endpoint         .  (/soc@0/tpda@10b08000/in-ports/port@4/endpoint         -  )
/soc@0/tpda@10b08000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b09000/out-ports/port/endpoint          -  )'/soc@0/tpdm@10b0a000/out-ports/port/endpoint          -  )6/soc@0/tpdm@10b0b000/out-ports/port/endpoint          -  )E/soc@0/tpdm@10b0c000/out-ports/port/endpoint          -  )T/soc@0/tpdm@10b0d000/out-ports/port/endpoint          -  )c/soc@0/tpdm@10b20000/out-ports/port/endpoint          ,  )r/soc@0/tpda@10b23000/in-ports/port/endpoint       -  )/soc@0/tpda@10b23000/out-ports/port/endpoint          .  )/soc@0/funnel@10b24000/in-ports/port/endpoint         /  )/soc@0/funnel@10b24000/out-ports/port/endpoint        -  )/soc@0/tpdm@10c08000/out-ports/port/endpoint          0  )/soc@0/funnel@10c0b000/in-ports/port@4/endpoint       /  )/soc@0/funnel@10c0b000/out-ports/port/endpoint        -  )/soc@0/tpdm@10c28000/out-ports/port/endpoint          -  )/soc@0/tpdm@10c29000/out-ports/port/endpoint          .  )/soc@0/tpda@10c2b000/in-ports/port@4/endpoint         /  */soc@0/tpda@10c2b000/in-ports/port@13/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@14/endpoint        /  *-/soc@0/tpda@10c2b000/in-ports/port@15/endpoint        /  *=/soc@0/tpda@10c2b000/in-ports/port@1a/endpoint        /  *M/soc@0/tpda@10c2b000/in-ports/port@1b/endpoint        -  *]/soc@0/tpda@10c2b000/out-ports/port/endpoint          0  *l/soc@0/funnel@10c2c000/in-ports/port@0/endpoint       0  *}/soc@0/funnel@10c2c000/in-ports/port@4/endpoint       0  */soc@0/funnel@10c2c000/in-ports/port@5/endpoint       /  */soc@0/funnel@10c2c000/out-ports/port/endpoint        -  */soc@0/tpdm@10c38000/out-ports/port/endpoint          -  */soc@0/tpdm@10c39000/out-ports/port/endpoint          .  */soc@0/tpda@10c3c000/in-ports/port@4/endpoint         .  */soc@0/tpda@10c3c000/in-ports/port@f/endpoint         /  */soc@0/tpda@10c3c000/in-ports/port@10/endpoint        /  */soc@0/tpda@10c3c000/in-ports/port@11/endpoint        -  +/soc@0/tpda@10c3c000/out-ports/port/endpoint          .  +/soc@0/funnel@10c3d000/in-ports/port/endpoint         /  +//soc@0/funnel@10c3d000/out-ports/port/endpoint        -  +@/soc@0/tpdm@10cc1000/out-ports/port/endpoint          .  +P/soc@0/tpda@10cc4000/in-ports/port@2/endpoint         -  +_/soc@0/tpda@10cc4000/out-ports/port/endpoint          .  +n/soc@0/funnel@10cc5000/in-ports/port/endpoint         /  +/soc@0/funnel@10cc5000/out-ports/port/endpoint        0  +/soc@0/funnel@10d04000/in-ports/port@6/endpoint       /  +/soc@0/funnel@10d04000/out-ports/port/endpoint        -  +/soc@0/tpdm@10d08000/out-ports/port/endpoint          -  +/soc@0/tpdm@10d09000/out-ports/port/endpoint          -  +/soc@0/tpdm@10d0a000/out-ports/port/endpoint          -  +/soc@0/tpdm@10d0b000/out-ports/port/endpoint          -  +/soc@0/tpdm@10d0c000/out-ports/port/endpoint          -  +/soc@0/tpdm@10d0d000/out-ports/port/endpoint          -  ,
/soc@0/tpdm@10d0e000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0f000/out-ports/port/endpoint          .  ,(/soc@0/tpda@10d12000/in-ports/port@0/endpoint         .  ,6/soc@0/tpda@10d12000/in-ports/port@1/endpoint         .  ,D/soc@0/tpda@10d12000/in-ports/port@2/endpoint         .  ,R/soc@0/tpda@10d12000/in-ports/port@3/endpoint         .  ,`/soc@0/tpda@10d12000/in-ports/port@4/endpoint         .  ,n/soc@0/tpda@10d12000/in-ports/port@5/endpoint         .  ,|/soc@0/tpda@10d12000/in-ports/port@6/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@7/endpoint         -  ,/soc@0/tpda@10d12000/out-ports/port/endpoint          .  ,/soc@0/funnel@10d13000/in-ports/port/endpoint         /  ,/soc@0/funnel@10d13000/out-ports/port/endpoint          ,/soc@0/iommu@15000000           ,/soc@0/iommu@15400000         %  ,/soc@0/interrupt-controller@17000000          =  ,/soc@0/interrupt-controller@17000000/msi-controller@17040000            ,/soc@0/mailbox@17430000         ,/soc@0/rsc@17500000         ,/soc@0/rsc@17500000/bcm-voter         %  -
/soc@0/rsc@17500000/clock-controller          %  -/soc@0/rsc@17500000/power-controller          /  -/soc@0/rsc@17500000/power-controller/opp-table        6  -)/soc@0/rsc@17500000/power-controller/opp-table/opp-16         6  -8/soc@0/rsc@17500000/power-controller/opp-table/opp-48         6  -K/soc@0/rsc@17500000/power-controller/opp-table/opp-52         6  -a/soc@0/rsc@17500000/power-controller/opp-table/opp-56         6  -w/soc@0/rsc@17500000/power-controller/opp-table/opp-60         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-64         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-80         7  -/soc@0/rsc@17500000/power-controller/opp-table/opp-128        7  -/soc@0/rsc@17500000/power-controller/opp-table/opp-144        7  -/soc@0/rsc@17500000/power-controller/opp-table/opp-192        7  -/soc@0/rsc@17500000/power-controller/opp-table/opp-256        7  -/soc@0/rsc@17500000/power-controller/opp-table/opp-320        7  .
/soc@0/rsc@17500000/power-controller/opp-table/opp-336        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-384        7  .-/soc@0/rsc@17500000/power-controller/opp-table/opp-416        &  .A/soc@0/rsc@17500000/regulators-0/bob1         &  .K/soc@0/rsc@17500000/regulators-0/bob2         &  .U/soc@0/rsc@17500000/regulators-0/ldo1         &  .b/soc@0/rsc@17500000/regulators-0/ldo2         &  .o/soc@0/rsc@17500000/regulators-0/ldo4         &  .|/soc@0/rsc@17500000/regulators-0/ldo5         &  ./soc@0/rsc@17500000/regulators-0/ldo6         &  ./soc@0/rsc@17500000/regulators-0/ldo7         &  ./soc@0/rsc@17500000/regulators-0/ldo8         &  ./soc@0/rsc@17500000/regulators-0/ldo9         '  ./soc@0/rsc@17500000/regulators-0/ldo10        '  ./soc@0/rsc@17500000/regulators-0/ldo12        '  ./soc@0/rsc@17500000/regulators-0/ldo13        '  ./soc@0/rsc@17500000/regulators-0/ldo14        '  ./soc@0/rsc@17500000/regulators-0/ldo15        '  //soc@0/rsc@17500000/regulators-0/ldo16        '  //soc@0/rsc@17500000/regulators-0/ldo17        '  //soc@0/rsc@17500000/regulators-1/smps4        &  /,/soc@0/rsc@17500000/regulators-1/ldo1         &  /9/soc@0/rsc@17500000/regulators-1/ldo2         &  /F/soc@0/rsc@17500000/regulators-1/ldo3         &  /S/soc@0/rsc@17500000/regulators-2/ldo1         &  /`/soc@0/rsc@17500000/regulators-2/ldo2         &  /m/soc@0/rsc@17500000/regulators-2/ldo3         &  /z/soc@0/rsc@17500000/regulators-3/ldo2         &  //soc@0/rsc@17500000/regulators-3/ldo3         '  //soc@0/rsc@17500000/regulators-4/smps1        &  //soc@0/rsc@17500000/regulators-4/ldo1         &  //soc@0/rsc@17500000/regulators-4/ldo2         &  //soc@0/rsc@17500000/regulators-4/ldo3         '  //soc@0/rsc@17500000/regulators-6/smps1        '  //soc@0/rsc@17500000/regulators-6/smps2        &  //soc@0/rsc@17500000/regulators-6/ldo1         &  //soc@0/rsc@17500000/regulators-6/ldo2         &  //soc@0/rsc@17500000/regulators-6/ldo3         '  0	/soc@0/rsc@17500000/regulators-7/smps5        &  0/soc@0/rsc@17500000/regulators-7/ldo1         &  0#/soc@0/rsc@17500000/regulators-7/ldo2         &  00/soc@0/rsc@17500000/regulators-7/ldo3           0=/soc@0/sram@18b4e000          (  0B/soc@0/sram@18b4e000/scp-sram-section@0       *  0P/soc@0/sram@18b4e000/scp-sram-section@200           0^/soc@0/watchdog@1c840000            0l/soc@0/efuse@221c8000         (  0s/soc@0/efuse@221c8000/gpu-speed-bin@119         0/soc@0/pmu@24091000/opp-table           0/soc@0/pmu@240b5400         0/soc@0/pmu@240b5400/opp-table           0/soc@0/remoteproc@32300000          0/soc@0/phy@1bd4000        1  0/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  0/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  0/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  0/thermal-zones/gpuss-3-thermal/trips/trip-point0            1/audio-codec          .  1/pmic-glink/connector@0/ports/port@0/endpoint         .  1(/pmic-glink/connector@0/ports/port@1/endpoint         .  1=/pmic-glink/connector@0/ports/port@2/endpoint         .  1W/pmic-glink/connector@1/ports/port@0/endpoint         .  1l/pmic-glink/connector@1/ports/port@1/endpoint         .  1/pmic-glink/connector@1/ports/port@2/endpoint         .  1/pmic-glink/connector@2/ports/port@0/endpoint         .  1/pmic-glink/connector@2/ports/port@1/endpoint         .  1/pmic-glink/connector@2/ports/port@2/endpoint           1/regulator-edp-3p3          1/regulator-misc-3p3         1/regulator-nvme         2/regulator-rtmr0-1p15           2/regulator-rtmr0-1p8            2#/regulator-rtmr0-3p3            22/regulator-rtmr1-1p15           2B/regulator-rtmr1-1p8            2Q/regulator-rtmr1-3p3            2`/regulator-rtmr2-1p15           2p/regulator-rtmr2-1p8            2/regulator-rtmr2-3p3            2/regulator-vph-pwr          2/regulator-wwan          	interrupt-parent #address-cells #size-cells model compatible stdout-path clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us remote-endpoint interconnects qcom,dload-mode mboxes mbox-names shmem #power-domain-cells #interconnect-cells qcom,bcm-voters interrupts domain-idle-states ranges no-map hwlocks size reusable linux,cma-default opp-hz required-opps interrupts-extended qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names operating-points-v2 hid-descr-addr vdd-supply vddl-supply wakeup-source vdd33-supply vdd33-cap-supply vddar-supply vddat-supply vddio-supply reset-gpios orientation-switch retimer-switch vdd1v8-supply vdd3v3-supply #phy-cells interrupt-names #qcom,sensors #thermal-sensor-cells resets vdda12-supply phys reset-names mode-switch vdda-phy-supply vdda-pll-supply reg-names bus-range dma-coherent linux,pci-domain num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates phy-names eq-presets-8gts eq-presets-16gts opp-peak-kBps opp-level msi-map perst-gpios wake-gpios vddpe-3v3-supply qcom,4ln-config-sel clock-output-names #hwlock-cells qcom,gmu #cooling-cells nvmem-cells nvmem-cell-names memory-region firmware-name qcom,opp-acd-level opp-supported-hw qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain sound-name-prefix qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,rx-port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping vdd-micb-supply qcom,dmic-sample-rate gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,usb3_lpm_capable snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk dr_mode qcom,select-utmi-as-pipe-clk maximum-speed assigned-clock-parents data-lanes link-frequencies enable-gpios power-supply qcom,pdc-ranges qcom,ee qcom,channel linux,code qcom,no-alarm qcom,uefi-rtc-info bits #pwm-cells power-source bias-pull-up input-disable output-enable drive-push-pull qcom,drive-strength vdd18-supply vdd3-supply wakeup-parent gpio-reserved-ranges qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num #redistributor-regions redistributor-stride msi-controller #msi-cells qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-always-on vdd-l1-supply vdd-l2-supply vdd-l3-supply vdd-s4-supply vdd-s1-supply vdd-s2-supply vdd-s5-supply frame-number thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device serial0 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply linux,input-type wakeup-event-action orientation-gpios power-role data-role audio-routing link-name sound-dai gpio enable-active-high regulator-boot-on xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 cpu1 cpu2 cpu3 cpu4 l2_1 cpu5 cpu6 cpu7 cluster_c4 cluster_cl4 cluster_cl5 eud_in scm scmi_dvfs clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cluster_pd0 cluster_pd1 system_pd gunyah_hyp_mem hyp_elf_package_mem ncc_mem cpucp_log_mem cpucp_mem tags_mem xbl_dtlog_mem xbl_ramdump_mem aop_image_mem aop_cmd_db_mem aop_config_mem tme_crash_dump_mem tme_log_mem uefi_log_mem secdata_apss_mem pdp_ns_shared_mem gpu_prr_mem tpm_control_mem usb_ucsi_shared_mem pld_pep_mem pld_gmu_mem pld_pdp_mem tz_stat_mem xbl_tmp_buffer_mem adsp_rpc_remote_heap_mem spu_secure_shared_memory_mem adsp_boot_dtb_mem spss_region_mem adsp_boot_mem video_mem adspslpi_mem q6_adsp_dtb_mem cdsp_mem q6_cdsp_dtb_mem gpu_microcode_mem cvp_mem camera_mem av1_encoder_mem wpss_mem q6_wpss_dtb_mem xbl_sc_mem qtee_mem ta_mem tags_mem1 llcc_lpi_mem smem_mem qup_opp_table_100mhz qup_opp_table_120mhz smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in soc gcc ipcc gpi_dma2 qupv3_2 i2c16 spi16 i2c17 spi17 i2c18 spi18 i2c19 spi19 i2c20 spi20 i2c21 spi21 uart21 i2c22 spi22 i2c23 spi23 gpi_dma1 qupv3_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 i2c14 spi14 uart14 i2c15 spi15 gpi_dma0 qupv3_0 i2c0 spi0 i2c1 retimer_ss2_ss_out retimer_ss2_ss_in retimer_ss2_con_sbu_out spi1 i2c2 uart2 spi2 i2c3 retimer_ss0_ss_out retimer_ss0_ss_in retimer_ss0_con_sbu_out spi3 i2c4 spi4 i2c5 eusb6_repeater spi5 i2c6 spi6 i2c7 retimer_ss1_ss_out retimer_ss1_ss_in retimer_ss1_con_sbu_out spi7 tsens0 tsens1 tsens2 tsens3 usb_1_ss0_hsphy usb_1_ss0_qmpphy usb_1_ss0_qmpphy_out usb_1_ss0_qmpphy_usb_ss_in usb_1_ss0_qmpphy_dp_in usb_1_ss1_hsphy usb_1_ss1_qmpphy usb_1_ss1_qmpphy_out usb_1_ss1_qmpphy_usb_ss_in usb_1_ss1_qmpphy_dp_in usb_1_ss2_hsphy usb_1_ss2_qmpphy usb_1_ss2_qmpphy_out usb_1_ss2_qmpphy_usb_ss_in usb_1_ss2_qmpphy_dp_in cnoc_main config_noc system_noc pcie_south_anoc pcie_center_anoc aggre1_noc aggre2_noc pcie_north_anoc usb_center_anoc usb_north_anoc usb_south_anoc mmss_noc pcie3 pcie3_opp_table pcie3_port pcie6a pcie6a_phy pcie5 pcie5_phy pcie4 pcie4_port0 pcie4_phy tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu gem_noc nsp_noc remoteproc_adsp q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 right_woofer right_tweeter lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 left_woofer left_tweeter lpass_audiocc swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_01_sd_n_active spkr_23_sd_n_active lpasscc lpass_ag_noc lpass_lpiaon_noc lpass_lpicx_noc sdhc_2 sdhc2_opp_table sdhc_4 sdhc4_opp_table usb_2_hsphy usb_mp_hsphy0 usb_mp_hsphy1 usb_mp_qmpphy0 usb_mp_qmpphy1 usb_1_ss2 usb_1_ss2_dwc3 usb_1_ss2_dwc3_hs usb_1_ss2_dwc3_ss usb_2 usb_2_dwc3 usb_2_dwc3_hs usb_mp usb_mp_dwc3 usb_1_ss0 usb_1_ss0_dwc3 usb_1_ss0_dwc3_hs usb_1_ss0_dwc3_ss usb_1_ss1 usb_1_ss1_dwc3 usb_1_ss1_dwc3_hs usb_1_ss1_dwc3_ss iris iris_opp_table videocc mdss mdss_mdp mdss_intf0_out mdss_intf4_out mdss_intf5_out mdss_intf6_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dp0_opp_table mdss_dp1 mdss_dp1_in mdss_dp1_out mdss_dp1_opp_table mdss_dp2 mdss_dp2_in mdss_dp2_out mdss_dp2_opp_table mdss_dp3 mdss_dp3_in mdss_dp3_out mdss_dp3_opp_table edp_panel_in mdss_dp2_phy mdss_dp3_phy dispcc pdc aoss_qmp spmi spmi_bus0 pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_sdam_15 charge_limit_en charge_limit_end charge_limit_delta pmk8550_gpios pmk8550_pwm pm8550 pm8550_temp_alarm pm8550_gpios kypd_vol_up_n rtmr0_default usb0_3p3_reg_en pm8550_flash pm8550_pwm pm8550ve_2 pm8550ve_2_temp_alarm pm8550ve_2_gpios pmc8380_3 pmc8380_3_temp_alarm pmc8380_3_gpios edp_bl_en pmc8380_4 pmc8380_4_temp_alarm pmc8380_4_gpios pmc8380_5 pmc8380_5_temp_alarm pmc8380_5_gpios usb0_pwr_1p15_reg_en pm8550ve_8 pm8550ve_8_temp_alarm pm8550ve_8_gpios misc_3p3_reg_en pm8550ve_9 pm8550ve_9_temp_alarm pm8550ve_9_gpios usb0_1p8_reg_en pm8010 pm8010_temp_alarm spmi_bus1 smb2360_0 smb2360_0_eusb2_repeater smb2360_1 smb2360_1_eusb2_repeater smb2360_2 smb2360_2_eusb2_repeater smb2360_3 smb2360_3_eusb2_repeater edp0_hpd_default qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_i2c15_data_clk qup_i2c16_data_clk qup_i2c17_data_clk qup_i2c18_data_clk qup_i2c19_data_clk qup_i2c20_data_clk qup_i2c21_data_clk qup_i2c22_data_clk qup_i2c23_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_spi15_cs qup_spi15_data_clk qup_spi16_cs qup_spi16_data_clk qup_spi17_cs qup_spi17_data_clk qup_spi18_cs qup_spi18_data_clk qup_spi19_cs qup_spi19_data_clk qup_spi20_cs qup_spi20_data_clk qup_spi21_cs qup_spi21_data_clk qup_spi22_cs qup_spi22_data_clk qup_spi23_cs qup_spi23_data_clk qup_uart2_default qup_uart14_default qup_uart21_default sdc2_default sdc2_sleep edp_reg_en eusb6_reset_n hall_int_n_default kybd_default nvme_reg_en pcie4_default pcie5_default pcie6a_default rtmr1_default rtmr2_default tpad_default ts0_default usb1_pwr_1p15_reg_en usb1_pwr_1p8_reg_en usb1_pwr_3p3_reg_en usb2_pwr_1p15_reg_en usb2_pwr_1p8_reg_en usb2_pwr_3p3_reg_en wcd_default wwan_sw_en stm_out dcc_tpdm_out qdss_tpda_in0 qdss_tpda_in1 qdss_tpda_out qdss_tpdm_out funnel0_in6 funnel0_in7 funnel0_out funnel1_in2 funnel1_in5 funnel1_in6 funnel1_out qdss_funnel_in0 qdss_funnel_in1 qdss_funnel_out mxa_tpdm_out gcc_tpdm_out prng_tpdm_out lpass_cx_tpdm_out lpass_cx_funnel_in0 lpass_cx_funnel_out qm_tpdm_out dlst_tpdm0_out dlst_tpdm1_out dlst_tpda_in8 dlst_tpda_in9 dlst_tpda_out dlst_funnel_in0 dlst_funnel_out aoss_funnel_in3 aoss_funnel_in6 aoss_funnel_in7 aoss_funnel_out etf0 etf0_in etf0_out swao_rep_in swao_rep_out1 aoss_tpda_in0 aoss_tpda_in1 aoss_tpda_in2 aoss_tpda_in3 aoss_tpda_in4 aoss_tpda_out aoss_tpdm0_out aoss_tpdm1_out aoss_tpdm2_out aoss_tpdm3_out aoss_tpdm4_out lpicc_tpdm_out ddr_lpi_tpda_in ddr_lpi_tpda_out ddr_lpi_funnel_in0 ddr_lpi_funnel_out mm_tpdm_out mm_funnel_in4 mm_funnel_out dlct1_tpdm_out ipcc_tpdm_out dlct1_tpda_in4 dlct1_tpda_in19 dlct1_tpda_in20 dlct1_tpda_in21 dlct1_tpda_in26 dlct1_tpda_in27 dlct1_tpda_out dlct1_funnel_in0 dlct1_funnel_in4 dlct1_funnel_in5 dlct1_funnel_out dlct2_tpdm0_out dlct2_tpdm1_out dlct2_tpda_in4 dlct2_tpda_in15 dlct2_tpda_in16 dlct2_tpda_in17 dlct2_tpda_out dlct2_funnel_in0 dlct2_funnel_out tmess_tpdm1_out tmess_tpda_in2 tmess_tpda_out tmess_funnel_in0 tmess_funnel_out ddr_funnel0_in6 ddr_funnel0_out llcc0_tpdm_out llcc1_tpdm_out llcc2_tpdm_out llcc3_tpdm_out llcc4_tpdm_out llcc5_tpdm_out llcc6_tpdm_out llcc7_tpdm_out llcc_tpda_in0 llcc_tpda_in1 llcc_tpda_in2 llcc_tpda_in3 llcc_tpda_in4 llcc_tpda_in5 llcc_tpda_in6 llcc_tpda_in7 llcc_tpda_out ddr_funnel1_in0 ddr_funnel1_out apps_smmu pcie_smmu intc gic_its cpucp_mbox apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b_1p8 vreg_l2b_3p0 vreg_l4b_1p8 vreg_l5b_3p0 vreg_l6b_1p8 vreg_l7b_2p8 vreg_l8b_3p0 vreg_l9b_2p9 vreg_l10b_1p8 vreg_l12b_1p2 vreg_l13b_3p0 vreg_l14b_3p0 vreg_l15b_1p8 vreg_l16b_2p9 vreg_l17b_2p5 vreg_s4c_1p8 vreg_l1c_1p2 vreg_l2c_0p8 vreg_l3c_0p8 vreg_l1d_0p8 vreg_l2d_0p9 vreg_l3d_1p8 vreg_l2e_0p8 vreg_l3e_1p2 vreg_s1f_0p7 vreg_l1f_1p0 vreg_l2f_1p0 vreg_l3f_1p0 vreg_s1i_0p9 vreg_s2i_1p0 vreg_l1i_1p8 vreg_l2i_1p2 vreg_l3i_0p8 vreg_s5j_1p2 vreg_l1j_0p8 vreg_l2j_1p2 vreg_l3j_0p8 sram cpu_scp_lpri0 cpu_scp_lpri1 sbsa_watchdog qfprom gpu_speed_bin llcc_bwmon_opp_table bwmon_cluster2 cpu_bwmon_opp_table remoteproc_cdsp pcie3_phy gpuss0_alert0 gpuss1_alert0 gpuss2_alert0 gpuss3_alert0 wcd938x pmic_glink_ss0_hs_in pmic_glink_ss0_ss_in pmic_glink_ss0_con_sbu_in pmic_glink_ss1_hs_in pmic_glink_ss1_ss_in pmic_glink_ss1_con_sbu_in pmic_glink_ss2_hs_in pmic_glink_ss2_ss_in pmic_glink_ss2_con_sbu_in vreg_edp_3p3 vreg_misc_3p3 vreg_nvme vreg_rtmr0_1p15 vreg_rtmr0_1p8 vreg_rtmr0_3p3 vreg_rtmr1_1p15 vreg_rtmr1_1p8 vreg_rtmr1_3p3 vreg_rtmr2_1p15 vreg_rtmr2_1p8 vreg_rtmr2_3p3 vph_pwr vreg_wwan iommu-map 