 (   8    (            3< l                                                                   %   ,Microsoft Surface Laptop 7 (15 inch)          "   2microsoft,romulus15 qcom,x1e80100      chosen        clocks     xo-board             2fixed-clock          =          M             Z        sleep-clk            2fixed-clock          =           M             Z   3      bi-tcxo-div2-clk             2fixed-factor-clock           M             b                i            t            Z   2      bi-tcxo-ao-div2-clk          2fixed-factor-clock           M             b               i            t            Z           cpus                                 cpu@0            ~cpu          2qcom,oryon                            psci                                         
   psci perf            Z      l2-cache             2cache                                  Z            cpu@100          ~cpu          2qcom,oryon                           psci                                         
   psci perf            Z         cpu@200          ~cpu          2qcom,oryon                           psci                                         
   psci perf            Z         cpu@300          ~cpu          2qcom,oryon                           psci                                         
   psci perf            Z         cpu@10000            ~cpu          2qcom,oryon                           psci                	            
            
   psci perf            Z      l2-cache             2cache                                  Z   	         cpu@10100            ~cpu          2qcom,oryon                          psci                	                        
   psci perf            Z         cpu@10200            ~cpu          2qcom,oryon                          psci                	                        
   psci perf            Z         cpu@10300            ~cpu          2qcom,oryon                          psci                	                        
   psci perf            Z         cpu@20000            ~cpu          2qcom,oryon                           psci                                        
   psci perf            Z      l2-cache             2cache                                  Z            cpu@20100            ~cpu          2qcom,oryon                          psci                                        
   psci perf            Z         cpu@20200            ~cpu          2qcom,oryon                          psci                                        
   psci perf            Z         cpu@20300            ~cpu          2qcom,oryon                          psci                                        
   psci perf            Z         cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3                        cluster2             Z     core0                     core1                     core2                     core3                           idle-states          psci       cpu-sleep-0          2arm,idle-state           ret         	                       1  @        A  X         Z   (         domain-idle-states     cluster-sleep-0          2domain-idle-state           	  D           ^        1          A  	         Z   +      cluster-sleep-1          2domain-idle-state           	  T                   1          A  X         Z   ,            dummy-sink           2arm,coresight-dummy-sink       in-ports       port       endpoint            R            Z  O               firmware       scm          2qcom,scm-x1e80100 qcom,scm          b             !              p   "           Z        scmi          	   2arm,scmi               #       #           tx rx              $   %                             protocol@13                                 Z               interconnect-0           2qcom,x1e80100-clk-virt                        &         Z   >      interconnect-1           2qcom,x1e80100-mc-virt                         &         Z   !      memory@80000000          ~memory                                pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0             smc    power-domain-cpu0                           '           (         Z         power-domain-cpu1                           '           (         Z         power-domain-cpu2                           '           (         Z         power-domain-cpu3                           '           (         Z         power-domain-cpu4                           )           (         Z   
      power-domain-cpu5                           )           (         Z         power-domain-cpu6                           )           (         Z         power-domain-cpu7                           )           (         Z         power-domain-cpu8                           *           (         Z         power-domain-cpu9                           *           (         Z         power-domain-cpu10                          *           (         Z         power-domain-cpu11                          *           (         Z         power-domain-cpu-cluster0                          +   ,            -         Z   '      power-domain-cpu-cluster1                          +   ,            -         Z   )      power-domain-cpu-cluster2                          +   ,            -         Z   *      power-domain-system                      Z   -         reserved-memory                                      gunyah-hyp@80000000                                          Z        hyp-elf-package@80800000                                             Z        ncc@80a00000                        @                    Z        cpucp-log@80e00000                                          Z        cpucp@80e40000                      T                    Z        reserved-region@81380000                 8                        tags-region@81400000                 @                           Z        xbl-dtlog@81a00000                                          Z        xbl-ramdump@81a40000                                            Z        aop-image@81c00000                                          Z        aop-cmd-db@81c60000          2qcom,cmd-db                                         Z        aop-config@81c80000                                         Z        tme-crash-dump@81ca0000                                         Z        tme-log@81ce0000                         @                   Z        uefi-log@81ce4000                @                          Z        secdata-apss@81cff000                                          Z        pdp-ns-shared@81e00000                                          Z        gpu-prr@81f00000                                            Z        tpm-control@81f10000                                            Z        usb-ucsi-shared@81f20000                                            Z        pld-pep@81f30000                         `                   Z        pld-gmu@81f36000                 `                          Z        pld-pdp@81f37000                 p                          Z        tz-stat@82700000                 p                           Z        xbl-tmp-buffer@82800000                                         Z        adsp-rpc-remote-heap@84b00000                                           Z        spu-secure-shared-memory@85300000                0                           Z        adsp-boot-dtb@866c0000               l                           Z        spss-region@86700000                 p       @                    Z        adsp-boot@86b00000                                          Z        video@87700000               p       p                    Z        adspslpi@87e00000                                          Z         q6-adsp-dtb@8b800000                                            Z         cdsp@8b900000                                           Z        q6-cdsp-dtb@8d900000                                            Z        gpu-microcode@8d9fe000                                          Z         cvp@8da00000                        p                    Z        camera@8e100000                                         Z        av1-encoder@8e900000                        p                    Z        reserved-region@8f000000                                          wpss@8fa00000                                          Z        q6-wpss-dtb@91300000                 0                           Z        xbl-sc@d8000000                                          Z        reserved-region@d8040000                        
                 qtee@d80e0000                       R                    Z         ta@d8600000              `                          Z        tags@e1000000                       j                    Z        llcc-lpi@ff800000                       `                    Z        smem@ffe00000         
   2qcom,smem                                     .                     Z        linux,cma            2shared-dma-pool                         	                  opp-table-qup100mhz          2operating-points-v2          Z   J   opp-75000000            $    xh        +   /      opp-100000000           $             +   0         opp-table-qup120mhz          2operating-points-v2          Z   C   opp-75000000            $    xh        +   /      opp-120000000           $    '         +   0         smp2p-adsp           2qcom,smp2p          9   1                    1              M            W            f      master-kernel           vmaster-kernel                       Z         slave-kernel            vslave-kernel                                 Z            smp2p-cdsp           2qcom,smp2p          9   1                    1              M   ^          W            f      master-kernel           vmaster-kernel                       Z        slave-kernel            vslave-kernel                                 Z           soc@0            2simple-bus                                                                                                  Z     clock-controller@100000          2qcom,x1e80100-gcc                                    b   2   3   4   5   6   7       8       9       :                                                                                                                            ;             M                                  Z   =      mailbox@408000           2qcom,x1e80100-ipcc qcom,ipcc                  @                                                                  Z   1      dma-controller@800000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                    >                      <  6          	  disabled             Z   A      geniqup@8c0000           2qcom,geni-se-qup                                     b   =      =           m-ahb s-ahb            <  #                                              okay             Z     i2c@880000           2qcom,geni-i2c                         @               (            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A              A                  Btx rx           L   B        Vdefault                                 	  disabled             Z        spi@880000           2qcom,geni-spi                         @               (            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   C         =   A              A                  Btx rx           L   D   E        Vdefault                                 	  disabled             Z        i2c@884000           2qcom,geni-i2c                 @       @               )            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A             A                 Btx rx           L   F        Vdefault                                 	  disabled             Z  	      spi@884000           2qcom,geni-spi                 @       @               )            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   C         =   A             A                 Btx rx           L   G   H        Vdefault                                 	  disabled             Z  
      i2c@888000           2qcom,geni-i2c                        @               *            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A             A                 Btx rx           L   I        Vdefault                                 	  disabled             Z        spi@888000           2qcom,geni-spi                        @               *            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   J         =   A             A                 Btx rx           L   K   L        Vdefault                                 	  disabled             Z        i2c@88c000           2qcom,geni-i2c                        @               +            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A             A                 Btx rx           L   M        Vdefault                                 	  disabled             Z        spi@88c000           2qcom,geni-spi                        @               +            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   J         =   A             A                 Btx rx           L   N   O        Vdefault                                 	  disabled             Z        i2c@890000           2qcom,geni-i2c                         @               ,            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A             A                 Btx rx           L   P        Vdefault                                 	  disabled             Z        spi@890000           2qcom,geni-spi                         @               ,            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   J         =   A             A                 Btx rx           L   Q   R        Vdefault                                 	  disabled             Z        i2c@894000           2qcom,geni-i2c                 @       @               -            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A             A                 Btx rx           L   S        Vdefault                                 	  disabled             Z        spi@894000           2qcom,geni-spi                 @       @               -            b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   J         =   A             A                 Btx rx           L   T   U        Vdefault                                 	  disabled             Z        serial@894000            2qcom,geni-uart                @       @               -            b   =           se        0  b   >         >         ?         @              *qup-core qup-config             ;            d   J        L   V        Vdefault       	  disabled             Z        i2c@898000           2qcom,geni-i2c                        @                           b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A             A                 Btx rx           L   W        Vdefault                                 	  disabled             Z        spi@898000           2qcom,geni-spi                        @                           b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   J         =   A             A                 Btx rx           L   X   Y        Vdefault                                 	  disabled             Z        i2c@89c000           2qcom,geni-i2c                        @                           b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            +   /         =   A             A                 Btx rx           L   Z        Vdefault                                 	  disabled             Z        spi@89c000           2qcom,geni-spi                        @                           b   =           se        H  b   >         >         ?         @                   !              *qup-core qup-config qup-memory              ;            d   J         =   A             A                 Btx rx           L   [   \        Vdefault                                 	  disabled             Z           dma-controller@a00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                 	         
                                                                                                          >                      <  6          	  disabled             Z   ^      geniqup@ac0000           2qcom,geni-se-qup                                     b   =      =           m-ahb s-ahb            <  #                                              okay             Z     i2c@a80000           2qcom,geni-i2c                         @                            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^              ^                  Btx rx           L   _        Vdefault                                 	  disabled             Z        spi@a80000           2qcom,geni-spi                         @                            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   C         =   ^              ^                  Btx rx           L   `   a        Vdefault                                 	  disabled             Z        i2c@a84000           2qcom,geni-i2c                 @       @               !            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^             ^                 Btx rx           L   b        Vdefault                                 	  disabled             Z        spi@a84000           2qcom,geni-spi                 @       @               !            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   C         =   ^             ^                 Btx rx           L   c   d        Vdefault                                 	  disabled             Z        i2c@a88000           2qcom,geni-i2c                        @               "            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^             ^                 Btx rx           L   e        Vdefault                                 	  disabled             Z        spi@a88000           2qcom,geni-spi                        @               "            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   J         =   ^             ^                 Btx rx           L   f   g        Vdefault                                 	  disabled             Z        i2c@a8c000           2qcom,geni-i2c                        @               #            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^             ^                 Btx rx           L   h        Vdefault                                 	  disabled             Z        spi@a8c000           2qcom,geni-spi                        @               #            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   J         =   ^             ^                 Btx rx           L   i   j        Vdefault                                 	  disabled             Z         i2c@a90000           2qcom,geni-i2c                         @               $            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^             ^                 Btx rx           L   k        Vdefault                                 	  disabled             Z  !      spi@a90000           2qcom,geni-spi                         @               $            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   J         =   ^             ^                 Btx rx           L   l   m        Vdefault                                 	  disabled             Z  "      i2c@a94000           2qcom,geni-i2c                 @       @               %            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^             ^                 Btx rx           L   n        Vdefault                                 	  disabled             Z  #      spi@a94000           2qcom,geni-spi                 @       @               %            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   J         =   ^             ^                 Btx rx           L   o   p        Vdefault                                 	  disabled             Z  $      i2c@a98000           2qcom,geni-i2c                        @               &            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^             ^                 Btx rx           L   q        Vdefault                                 	  disabled             Z  %      spi@a98000           2qcom,geni-spi                        @               &            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   J         =   ^             ^                 Btx rx           L   r   s        Vdefault                                 	  disabled             Z  &      serial@a98000            2qcom,geni-uart                       @               &            b   =           se        0  b   >         >         ?         @              *qup-core qup-config             ;            d   J        L   t        Vdefault         okay             Z  '   bluetooth            2qcom,wcn7850-bt         x 0            u           v           w           x           y           z           {         i2c@a9c000           2qcom,geni-i2c                        @               '            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            +   /         =   ^             ^                 Btx rx           L   |        Vdefault                                 	  disabled             Z  (      spi@a9c000           2qcom,geni-spi                        @               '            b   =           se        H  b   >         >         ?         @         ]         !              *qup-core qup-config qup-memory              ;            d   J         =   ^             ^                 Btx rx           L   }   ~        Vdefault                                 	  disabled             Z  )         dma-controller@b00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                        L         M         N         O         P         Q         R         S         T         U         V         W                         >                      <  V          	  disabled             Z         geniqup@bc0000           2qcom,geni-se-qup                                     b   =      =           m-ahb s-ahb            <  C                                              okay             Z  *   i2c@b80000           2qcom,geni-i2c                         @               u            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                   Btx rx           L           Vdefault                                   okay             =          Z  +      spi@b80000           2qcom,geni-spi                         @               u            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   C         =                                   Btx rx           L              Vdefault                                 	  disabled             Z  ,      i2c@b84000           2qcom,geni-i2c                 @       @               G            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                 Btx rx           L           Vdefault                                 	  disabled             Z  -      spi@b84000           2qcom,geni-spi                 @       @               G            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   C         =                                 Btx rx           L              Vdefault                                 	  disabled             Z  .      i2c@b88000           2qcom,geni-i2c                        @               H            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                 Btx rx           L           Vdefault                                 	  disabled             Z  /      serial@b88000            2qcom,geni-uart                       @               H            b   =           se        0  b   >         >         ?         @              *qup-core qup-config             ;            d   J        L           Vdefault         okay             Z  0   embedded-controller          2microsoft,surface-sam           9      [            =	         L           Vdefault          spi@b88000           2qcom,geni-spi                        @               H            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   J         =                                 Btx rx           L              Vdefault                                 	  disabled             Z  1      i2c@b8c000           2qcom,geni-i2c                        @               I            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                 Btx rx           L           Vdefault                                   okay             =          Z  2   typec-mux@8          2parade,ps8830                              
            b      
                              $           5           B           O           L           Vdefault          \         k   ports                                port@0                  endpoint            R            Z           port@1                 endpoint            R            Z            port@2                 endpoint            R            Z                    spi@b8c000           2qcom,geni-spi                        @               I            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   J         =                                 Btx rx           L              Vdefault                                 	  disabled             Z  3      i2c@b90000           2qcom,geni-i2c                         @               J            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                 Btx rx           L           Vdefault                                   okay             =          Z  4      spi@b90000           2qcom,geni-spi                         @               J            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   J         =                                 Btx rx           L              Vdefault                                 	  disabled             Z  5      i2c@b94000           2qcom,geni-i2c                 @       @               K            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                 Btx rx           L           Vdefault                                   okay             =          Z  6   redriver@4f          2nxp,ptn3222             O                          ~                                   Z            spi@b94000           2qcom,geni-spi                 @       @               K            b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   J         =                                 Btx rx           L              Vdefault                                 	  disabled             Z  7      i2c@b98000           2qcom,geni-i2c                        @                           b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                 Btx rx           L           Vdefault                                 	  disabled             Z  8      spi@b98000           2qcom,geni-spi                        @                           b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   J         =                                 Btx rx           L              Vdefault                                 	  disabled             Z  9      i2c@b9c000           2qcom,geni-i2c                        @                           b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            +   /         =                                 Btx rx           L           Vdefault                                   okay             =          Z  :   typec-mux@8          2parade,ps8830                                          b                                    $           5           B           O            \         k   ports                                port@0                  endpoint            R            Z           port@1                 endpoint            R            Z            port@2                 endpoint            R            Z                    spi@b9c000           2qcom,geni-spi                        @                           b   =           se        H  b   >         >         ?         @                    !              *qup-core qup-config qup-memory              ;            d   J         =                                 Btx rx           L              Vdefault                                 	  disabled             Z  ;         thermal-sensor@c271000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '            "                 9                             uplow critical                                 Z        thermal-sensor@c272000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '             "0                9                             uplow critical                                 Z        thermal-sensor@c273000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '0            "@                9                             uplow critical                                 Z        thermal-sensor@c274000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '@            "P                9                             uplow critical                                 Z        phy@fd3000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy               0       T                     b   "           ref            =   6        okay                                              Z         phy@fd5000           2qcom,x1e80100-qmp-usb3-dp-phy                 P       @           b   =            =     =          aux ref com_aux usb3_pipe               =              =   D   =   O        phy common           M                                k        okay                                   Z   8   ports                                port@0                  endpoint            R            Z            port@1                 endpoint            R            Z            port@2                 endpoint            R            Z                 phy@fd9000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     b   "           ref            =   7        okay                                              Z         phy@fda000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           b   =      "      =  "   =  #        aux ref com_aux usb3_pipe               =              =   E   =   P        phy common           M                                k        okay                                   Z   9   ports                                port@0                  endpoint            R            Z            port@1                 endpoint            R            Z            port@2                 endpoint            R            Z                 phy@fde000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     b   "           ref            =   8      	  disabled             Z         phy@fdf000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           b   =  $   "      =  &   =  '        aux ref com_aux usb3_pipe               =              =   F   =   Q        phy common           M                                k      	  disabled             Z   :   ports                                port@0                  endpoint             Z  <         port@1                 endpoint            R            Z            port@2                 endpoint            R            Z                 interconnect@1500000             2qcom,x1e80100-cnoc-main              P       D            &                    Z         interconnect@1600000             2qcom,x1e80100-cnoc-cfg               `        f            &                    Z   @      interconnect@1680000             2qcom,x1e80100-system-noc                 h                  &                    Z  =      interconnect@16c0000             2qcom,x1e80100-pcie-south-anoc                l        Ѐ           &                    Z         interconnect@16d0000             2qcom,x1e80100-pcie-center-anoc               m        p            &                    Z  >      interconnect@16e0000             2qcom,x1e80100-aggre1-noc                 n       D            &                    Z   ]      interconnect@1700000             2qcom,x1e80100-aggre2-noc                 p                   &                    Z          interconnect@1740000             2qcom,x1e80100-pcie-north-anoc                t                   &                    Z         interconnect@1750000             2qcom,x1e80100-usb-center-anoc                u                    &                    Z  ?      interconnect@1760000             2qcom,x1e80100-usb-north-anoc                 v        p           &                    Z         interconnect@1770000             2qcom,x1e80100-usb-south-anoc                 w                   &                    Z         interconnect@1780000             2qcom,x1e80100-mmss-noc               x                   &                    Z         pcie@1bd0000             ~pci          2qcom,pcie-x1e80100        `               0     x              x @           x             x             0                +parf dbi elbi atu config mhi                                   T                 x                 x0      x0              @      @       @           5                ?        L           ]         l                                     D                                                 y         /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     g                       z                                                                                                                                                      8   b   =   T   =   V   =   W   =   ^   =   _   =      =   !      <  aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   T        $       0  b             !         ?                       *pcie-mem cpu-pcie              =      =           pci link_down               =              4        pciephy         UUUUUUUUUUUUUUUU        UUUUUUUU        d           okay                                               L           Vdefault                     Z  @   opp-table            2operating-points-v2          Z      opp-2500000-1           $     &%        +   /         А                    opp-5000000-1           $     LK@        +   /                              opp-10000000-1          $             +   /         B@                    opp-20000000-1          $    1-         +   /                             opp-5000000-2           $     LK@        +   /                              opp-10000000-2          $             +   /         B@                    opp-20000000-2          $    1-         +   /                             opp-40000000-2          $    bZ         +   /         =	                     opp-8000000-3           $     z         +   0                             opp-16000000-3          $     $         +   0         h                    opp-32000000-3          $    H         +   0         <                    opp-64000000-3          $    А         +   0         x-                    opp-16000000-4          $     $         +   0         h                    opp-32000000-4          $    H         +   0         <                    opp-64000000-4          $    А         +   0         x-                    opp-128000000-4         $              +   0         _(                       pcie@0           ~pci          2pciclass,0604                                        5                                                 Z  A         phy@1be0000       "   2qcom,x1e80100-qmp-gen4x8-pcie-phy                               0   b   =   X   =   V   "      =   Y   =   [   =   ]      $  aux cfg_ahb ref rchng pipe pipediv2            =      =           phy phy_nocsr              =   Y                     =            M            pcie3_pipe_clk                      okay                                   Z   4      pci@1bf8000          ~pci          2qcom,pcie-x1e80100        `              0     p              p @           p             p                             +parf dbi elbi atu config mhi                                   8                 p                 p0      p0                5                ?        L           ]           )                   l                          E         F         G         H         I         J                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     g                       z                                K                                   L                                   M                                            8   b   =   v   =   x   =   y   =      =      =      =   "      <  aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   v        $       0  b            !         ?                       *pcie-mem cpu-pcie              =   "   =   #        pci link_down               =   
        +              7        pciephy         UUUUUUUU        UUUU        okay                                              1           L           Vdefault          Z  B      phy@1bfc000       "   2qcom,x1e80100-qmp-gen4x4-pcie-phy                                             0   b   =   z   =   x   "   
   =   {   =   }   =         $  aux cfg_ahb ref rchng pipe pipediv2            =   %   =   $        phy phy_nocsr              =   {                     =   	        B   "               M            pcie6a_pipe_clk                     okay                                   Z   7      pci@1c00000          ~pci          2qcom,pcie-x1e80100        `               0     ~             ~ @           ~             ~             0                +parf dbi elbi atu config mhi                                   8                 ~                 ~0      ~0                5                ?        L           ]         l         ^          _          `          Y          V          R          M          N                   /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     g                       z                                 F                                    G                                    H                                    I         8   b   =   k   =   m   =   n   =   t   =   u   =      =   !      <  aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   k        $       0  b            !         ?                       *pcie-mem cpu-pcie              =      =           pci link_down               =           +              6        pciephy         UUUU      	  disabled             Z  C      phy@1c06000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                `               0   b   =   k   =   m   "      =   o   =   q   =   s      $  aux cfg_ahb ref rchng pipe pipediv2            =       =           phy phy_nocsr              =   o                     =            M            pcie5_pipe_clk                    	  disabled             Z   6      pci@1c08000          ~pci          2qcom,pcie-x1e80100        `              0     |             | @           |             |                             +parf dbi elbi atu config mhi                                   8                 |                 |0      |0                5                ?        L           ]           )                   l                                                                                                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     g                       z                                                                                                                                                      8   b   =   `   =   b   =   c   =   i   =   j   =      =   !      <  aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   `        $       0  b            !         ?                       *pcie-mem cpu-pcie              =      =           pci link_down               =           +              5        pciephy         UUUU        okay             Z  D   pcie@0           ~pci                                      5                                                 Z  E   wifi@0           2pci17cb,1107                                           u           v           w           x           y           z           {        V           h               phy@1c0e000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                               0   b   =   `   =   b   "       =   d   =   f   =   h      $  aux cfg_ahb ref rchng pipe pipediv2            =      =           phy phy_nocsr              =   d                     =            M            pcie4_pipe_clk                      okay                                   Z   5      hwlock@1f40000           2qcom,tcsr-mutex                               z            Z   .      clock-controller@1fc0000             2qcom,x1e80100-tcsr syscon                                  b                M                       Z   "      gpu@3d00000       !   2qcom,adreno-43050c01 qcom,adreno          0                                              #  +kgsl_3d0_reg_memory cx_mem cx_dbgc                ,                                        d                                          
  speed_bin           b   ?          !               *gfx-mem         okay             Z     zap-shader                   *  qcom/x1e80100/microsoft/qcdxkmsuc8380.mbn            Z  F      opp-table         /   2operating-points-v2-adreno operating-points-v2           Z      opp-1500000000          $    Yh/                             ٨*_                 opp-1375000000          $    Q                            ٨*_                 opp-1250000000          $    J|                            ٨*_                 opp-1175000000          $    F	                   ۳        ٨*_                 opp-1100000000-0            $    A                    ۳        ٨*_                 opp-1100000000-1            $    A                             ٨*_                 opp-1000000000          $    ;                    ۳        ٨+_                 opp-925000000           $    7"a@          @         ۳        ٨+_                 opp-800000000           $    /                             ٨,_                 opp-744000000           $    ,X                             و._                 opp-687000000-0         $    (                    |c        و._                 opp-687000000-1         $    (                             و._                 opp-550000000           $     U                    \k        (_                 opp-390000000           $    >           @         -        (_                 opp-300000000           $                8                  +_                       gmu@3d6a000       '   2qcom,adreno-gmu-x185.1 qcom,adreno-gmu        0       ֠      P                  (                 +gmu rscc gmu_pdc                  0         1           hfi gmu       8   b                      =   $   =   7                  !  ahb gmu cxo axi memnoc hub demet                                   cx gx                                        d            Z      opp-table            2operating-points-v2          Z      opp-550000000           $     U                 opp-220000000           $                @            clock-controller@3d90000             2qcom,x1e80100-gpucc                                b   2   =   5   =   6         M                                  Z         iommu@3da0000         B   2qcom,x1e80100-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                    8                                                                                                                                      >         ?         @         A                                                                                     b         =   7   =   8               hlos bus iface ahb                           ?         Z         interconnect@26400000            2qcom,x1e80100-gem-noc                &@       1            &                    Z   ?      interconnect@320c0000            2qcom,x1e80100-nsp-noc                2                   &                    Z        remoteproc@6800000           2qcom,x1e80100-adsp-pas                              <  9                                                    #  wdog fatal ready handover stop-ack           b               xo              ;      ;            lcx lmx         b             !                                       &               7stop            okay          ]  qcom/x1e80100/microsoft/Romulus/qcadsp8380.mbn qcom/x1e80100/microsoft/Romulus/adsp_dtbs.elf             Z  G   glink-edge          9   1                     1               Mlpass           f      fastrpc          2qcom,fastrpc            Sfastrpcglink-apps-dsp           Madsp             g                             compute-cb@3             2qcom,fastrpc-compute-cb                        <        <  c             ?      compute-cb@4             2qcom,fastrpc-compute-cb                        <        <  d             ?      compute-cb@5             2qcom,fastrpc-compute-cb                        <        <  e             ?      compute-cb@6             2qcom,fastrpc-compute-cb                        <        <  f             ?      compute-cb@7             2qcom,fastrpc-compute-cb                        <        <  g             ?         gpr       	   2qcom,gpr          
  Sadsp_apps           ~                                              service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd          Z     bedais           2qcom,q6apm-lpass-dais                       Z        dais             2qcom,q6apm-dais            <        <  a             Z  H         service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd          Z  I   clock-controller             2qcom,q6prm-lpass-clocks          M            Z                     codec@6aa0000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   b      D         f         g              mclk macro dcodec fsgen          M          
  wsa2-mclk                      WSA2             Z         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                  b           iface                             MWSA2            L           Vdefault                       swr_audio_cgcr                        	           ?   ?                                        +           =           N           e                                                                           	  disabled             Z  J      codec@6ac0000         8   2qcom,x1e80100-lpass-rx-macro qcom,sm8550-lpass-rx-macro                             (   b      @         f         g              mclk macro dcodec fsgen          M            mclk                        Z         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                  b           iface                             MRX          L           Vdefault                        swr_audio_cgcr                                                                            +         =        N        e                                                                 okay             Z     codec@0,4            2sdw20217010d00                                                  Z           codec@6ae0000         8   2qcom,x1e80100-lpass-tx-macro qcom,sm8550-lpass-tx-macro                             (   b      9         f         g              mclk macro dcodec fsgen          M            mclk                        Z         codec@6b00000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   b      B         f         g              mclk macro dcodec fsgen          M            mclk                       WSA          Z         soundwire@6b10000            2qcom,soundwire-v2.0.0                                  b           iface                             MWSA         L              Vdefault                       swr_audio_cgcr                        	           ?   ?                                        +           =           N           e                                                                             okay             Z     speaker@0,0          2sdw20217020400                                                       	  SpkrLeft                                                 
            Z        speaker@0,1          2sdw20217020400                                                      
  SpkrRight                                                            Z           clock-controller@6b6c000          6   2qcom,x1e80100-lpassaudiocc qcom,sc8280xp-lpassaudiocc                                 M                       Z         soundwire@6d30000            2qcom,soundwire-v2.0.0                                  b           iface                                     core wakeup         MTX                         swr_audio_cgcr          L           Vdefault                                                                         +           =           N           e                                                                        okay             Z     codec@0,3            2sdw20217010d00                          	                     Z           codec@6d44000         8   2qcom,x1e80100-lpass-va-macro qcom,sm8550-lpass-va-macro              @              $   b      9         f         g           mclk macro dcodec            M            fsgen                      	' I>         	=           L           Vdefault          Z         pinctrl@6e80000       >   2qcom,x1e80100-lpass-lpi-pinctrl qcom,sm8550-lpass-lpi-pinctrl                              %                  b      f         g           core audio           	M        	]           	i                       Z      tx-swr-active-state          Z      clk-pins            	ugpio0           	zswr_tx_clk          	           	            	      data-pins           	ugpio1 gpio2         	zswr_tx_data         	           	            	         rx-swr-active-state          Z      clk-pins            	ugpio3           	zswr_rx_clk          	           	            	      data-pins           	ugpio4 gpio5         	zswr_rx_data         	           	            	         dmic01-default-state             Z      clk-pins            	ugpio6         
  	zdmic1_clk           	            	      data-pins           	ugpio7           	zdmic1_data          	            	         dmic23-default-state             Z  K   clk-pins            	ugpio8         
  	zdmic2_clk           	            	      data-pins           	ugpio9           	zdmic2_data          	            	         wsa-swr-active-state             Z      clk-pins            	ugpio10          	zwsa_swr_clk         	           	            	      data-pins           	ugpio11          	zwsa_swr_data            	           	            	         wsa2-swr-active-state            Z      clk-pins            	ugpio15          	zwsa2_swr_clk            	           	            	      data-pins           	ugpio16          	zwsa2_swr_data           	           	            	         spkr-01-sd-n-active-state           	ugpio12          	zgpio            	            	         	         Z            clock-controller@6ea0000          ,   2qcom,x1e80100-lpasscc qcom,sc8280xp-lpasscc                                M                       Z         interconnect@7e40000             2qcom,x1e80100-lpass-ag-noc                                  &                    Z  L      interconnect@7400000             2qcom,x1e80100-lpass-lpiaon-noc               @                  &                    Z  M      interconnect@7430000             2qcom,x1e80100-lpass-lpicx-noc                C                   &                    Z         mmc@8804000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                            hc_irq pwr_irq           b   =      =                  iface core xo              <               	 d,        	h            ;            d         0  b             !         ?         @              *sdhc-ddr cpu-sdhc           	            ?      	  disabled             Z  N   opp-table            2operating-points-v2          Z      opp-19200000            $    $         +         opp-50000000            $            +   /      opp-100000000           $             +   0      opp-202000000           $    
F        +               mmc@8844000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                           hc_irq pwr_irq           b   =      =                  iface core xo              <  `            	 d,        	h            ;            d         0  b             !         ?         @              *sdhc-ddr cpu-sdhc           	            ?      	  disabled             Z  O   opp-table            2operating-points-v2          Z      opp-19200000            $    $         +         opp-50000000            $            +   /      opp-100000000           $             +   0      opp-202000000           $    
F        +               phy@88e0000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     b   "   	        ref            =   9      	  disabled             Z         phy@88e1000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                     T                     b   "           ref            =   4        okay                                              Z         phy@88e2000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     b   "           ref            =   5        okay                                              Z         phy@88e3000          2qcom,x1e80100-qmp-usb3-uni-phy               0                   b   =            =     =          aux ref com_aux pipe               =   G   =   L        phy phy_phy             =            M            usb_mp_phy0_pipe_clk                        okay                                   Z         phy@88e5000          2qcom,x1e80100-qmp-usb3-uni-phy               P                   b   =            =     =          aux ref com_aux pipe               =   H   =   M        phy phy_phy             =            M            usb_mp_phy1_pipe_clk                        okay                                   Z         usb@a0f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   b   =      =     =      =     =     =      =       =      =         R  cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $        4  9         r         :         9         
         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           +              =   A      0  b            !         ?         @   %           *usb-ddr apps-usb             
                                        	  disabled             Z  P   usb@a000000       
   2snps,dwc3                
                        a              <                    :            usb2-phy usb3-phy            
         
,         
D         
Z         
r         ?         Z  Q   ports                                port@0                  endpoint             Z  R         port@1                 endpoint            R            Z                     usb@a2f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
/                                                H   b   =      =      =      =      =      =      =       =      =         R  cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =      =           $        (  9                   2         1         &  pwr_event dp_hs_phy_irq dm_hs_phy_irq               =           +              =   =      0  b             !         ?         @   "           *usb-ddr apps-usb             
         
      	  disabled             Z  S   usb@a200000       
   2snps,dwc3                
                                       <                       	  usb2-phy            
high-speed           
Z         
r         ?         Z  T   port       endpoint             Z  U               usb@a4f8800           2qcom,x1e80100-dwc3-mp qcom,dwc3              
O              H   b   =      =      =      =     =     =      =       =      =         R  cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =           $          9         9            :            5            8         4         3         6         5         7         8         l  pwr_event_1 pwr_event_2 hs_phy_1 hs_phy_2 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 ss_phy_1 ss_phy_2             =           +              =   >      0  b            !         ?         @   &           *usb-ddr apps-usb             
                                          okay             Z  V   usb@a400000       
   2snps,dwc3                
@                       3              <                                   usb2-0 usb3-0 usb2-1 usb3-1         
host             
         
,         
D         
Z         
r         ?         Z  W         usb@a6f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
o              H   b   =      =     =      =  
   =     =      =      =      =         R  cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $        4  9         s         =                           1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           +              =   ?         
                                          okay             Z  X   usb@a600000       
   2snps,dwc3                
`                       c              <                     8            usb2-phy usb3-phy            
         
,         
D         
Z         
r         ?        
host             Z  Y   ports                                port@0                  endpoint            R            Z           port@1                 endpoint            R            Z                     usb@a8f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   b   =      =     =      =     =     =      =       =      =         R  cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $        4  9         t         <                  /         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           +              =   @      0  b            !         ?         @   $           *usb-ddr apps-usb             
                                          okay             Z  Z   usb@a800000       
   2snps,dwc3                
                       e              <  `                  9            usb2-phy usb3-phy            
         
,         
D         
Z         
r         ?        
host             Z  [   ports                                port@0                  endpoint            R            Z           port@1                 endpoint            R            Z                     video-codec@aa00000       $   2qcom,x1e80100-iris qcom,sm8550-iris              
                                                     ;   
   ;            venus vcodec0 mxc mmcx          d            b   =  Y                     iface core vcodec0_core       0  b   ?         @   *               !              *cpu-cfg video-mem                        =   X        bus            <  @       <  G             ?      	  disabled             Z  \   opp-table            2operating-points-v2          Z      opp-192000000           $    q         +          opp-240000000           $    N         +   0   /      opp-338000000           $    %x        +   0   0      opp-366000000           $    з        +            opp-444000000           $    v         +            opp-481000000           $    z@        +                clock-controller@aaf0000             2qcom,x1e80100-videocc                
                  b   2   =  X            ;      ;   
        +   /   /         M                                  Z         display-subsystem@ae00000            2qcom,x1e80100-mdss               
                 +mdss                   S            b        =   &     :                    H  b            ?         !          !         ?         @              *mdp0-mem mdp1-mem cpu-cfg                             <                                                                    okay             Z     display-controller@ae01000           2qcom,x1e80100-dpu                 
           
               	  +mdp vbif            9            (   b   =   &          =     :     F        nrt_bus iface lut core vsync            d              ;            Z  ]   ports                                port@0                  endpoint            R           Z           port@4                 endpoint            R           Z           port@5                 endpoint            R  	         Z           port@6                 endpoint            R  
         Z              opp-table            2operating-points-v2          Z     opp-200000000           $             +   /      opp-325000000           $    _@        +   0      opp-375000000           $    Z        +         opp-514000000           $            +         opp-575000000           $    "E        +              displayport-controller@ae90000           2qcom,x1e80100-dp          P       
             
            
            
            
                9           0   b                                    J  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                  
   8      8      8           d              ;              8           dp                      okay             Z  ^   ports                                port@0                  endpoint            R           Z           port@1                 endpoint            
                     R           
    `=         Av    1          Z               opp-table            2operating-points-v2          Z     opp-160000000           $    	h         +   /      opp-270000000           $    ߀        +   0      opp-540000000           $     /         +         opp-810000000           $    0G        +               displayport-controller@ae98000           2qcom,x1e80100-dp          P       
            
            
            
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                9           0   b                                    J  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                   
   9      9      9           d              ;              9           dp                      okay             Z  _   ports                                port@0                  endpoint            R           Z           port@1                 endpoint            
                     R           
    `=         Av    1          Z               opp-table            2operating-points-v2          Z     opp-160000000           $    	h         +   /      opp-270000000           $    ߀        +   0      opp-540000000           $     /         +         opp-810000000           $    0G        +               displayport-controller@ae9a000           2qcom,x1e80100-dp          P       
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                9           0   b          "     $     '     (     *      J  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                %     )     +        
   :      :      :           d              ;              :           dp                    	  disabled             Z  `   ports                                port@0                  endpoint            R           Z  
         port@1                 endpoint            
                     R           Z               opp-table            2operating-points-v2          Z     opp-160000000           $    	h         +   /      opp-270000000           $    ߀        +   0      opp-540000000           $     /         +         opp-810000000           $    0G        +               displayport-controller@aea0000           2qcom,x1e80100-dp          P       
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            
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                9           (   b          -     /     2     3      ;  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel               0     4        
                   d              ;                     dp          okay            L          Vdefault          Z  a   ports                                port@0                  endpoint            R           Z  	         port@1                 endpoint            
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    `=         Av    1         R           Z              opp-table            2operating-points-v2          Z     opp-160000000           $    	h         +   /      opp-270000000           $    ߀        +   0      opp-540000000           $     /         +         opp-810000000           $    0G        +            aux-bus    panel         
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     port       endpoint            R           Z                       phy@aec2a00          2qcom,x1e80100-dp-phy          @       
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                 b     "        "           aux cfg_ahb ref             ;            M                     	  disabled             Z  b      phy@aec5a00          2qcom,x1e80100-dp-phy          @       
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P                b     -        "           aux cfg_ahb ref             ;            M                       okay                                   Z        clock-controller@af00000             2qcom,x1e80100-dispcc                 
               d   b   2     =   %   3                   8      8      9      9      :      :                          ;           +   /         M                                  Z        interrupt-controller@b220000             2qcom,x1e80100-pdc qcom,pdc                "             @        d      H           *   *         /  
   4   c  a                 0                                             Z         power-management@c300000          %   2qcom,x1e80100-aoss-qmp qcom,aoss-qmp                 0                      1        9   1                      1                 M             Z         sram@c3f0000             2qcom,rpmh-stats              ?               arbiter@c400000          2qcom,x1e80100-spmi-pmic-arb       0       @        0     P       @      D                 +core chnls obsrvr                                                                      Z  c   spmi@c42d000                  B       @     L               
  +cnfg intr           periph_irq          9                                                                Z  d   pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                      Z  e   pon@1300             2qcom,pmk8350-pon                         	  +hlos pbs             Z  f   pwrkey           2qcom,pmk8350-pwrkey                              ,   t         Z  g      resin            2qcom,pmk8350-resin                             	  disabled             Z  h         rtc@6100             2qcom,pmk8350-rtc               a   b       
  +rtc alarm                  b               7         E         Z  i      nvram@7100           2qcom,spmi-sdam             q                                        q             Z  j   reboot-reason@48                H           X               Z  k         nvram@7e00           2qcom,spmi-sdam             ~                                        ~             Z  l   charge-limit-en@73              s            Z  m      charge-limit-end@75             u            Z  n      charge-limit-delta@76               v            Z  o         gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                         	M        	i                     	]                                Z     edp-bl-pwm-state            	ugpio5           	zfunc3            Z           pwm          2qcom,pmk8550-pwm            ]           okay             Z           pmic@1           2qcom,pm8550 qcom,spmi-pmic                                                     Z  p   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            Z        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                      	M        	i                      	]                                Z      rtmr0-reset-n-active-state          	ugpio10          	znormal          h            Z         rtmr0-3p3-reg-en-state          	ugpio11          	znormal          h            Z           led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  disabled             Z  q      pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            ]         	  disabled             Z  r         pmic@2           2qcom,pm8550 qcom,spmi-pmic                                                     Z  s   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            Z        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	M        	i                     	]                                Z           pmic@3           2qcom,pmc8380 qcom,spmi-pmic                                                    Z  t   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            Z        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                         	M        	i              
        	]                                Z      edp-bl-en-state         	ugpio4           	znormal          h            u                  Z              pmic@4           2qcom,pmc8380 qcom,spmi-pmic                                                    Z  u   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            Z        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                         	M        	i  !           
        	]                                Z  !         pmic@5           2qcom,pmc8380 qcom,spmi-pmic                                                    Z  v   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            Z        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                         	M        	i  "           
        	]                                Z  "   rtmr0-1p15-reg-en-state         	ugpio8           	znormal          h            Z              pmic@6           2qcom,pmc8380 qcom,spmi-pmic                                                    Z  w   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            Z        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                         	M        	i  #           
        	]                                Z  #         pmic@8           2qcom,pm8550 qcom,spmi-pmic                                                     Z  x   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            Z        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	M        	i  $                   	]                                Z  $         pmic@9           2qcom,pm8550 qcom,spmi-pmic              	                                       Z  y   temp-alarm@a00           2qcom,spmi-temp-alarm               
            	   
                            Z        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	M        	i  %                   	]                                Z  %   rtmr0-1p8-reg-en-state          	ugpio8           	znormal          h            Z              pmic@c           2qcom,pm8010 qcom,spmi-pmic                                                  	  disabled             Z  z   temp-alarm@2400          2qcom,spmi-temp-alarm               $               $                            Z              spmi@c432000                  C        @     M               
  +cnfg intr           periph_irq          9                                                                Z  {   pmic@7           2qcom,smb2360 qcom,spmi-pmic                                                   okay             Z  |   phy@fd00             2qcom,smb2360-eusb2-repeater                                   &          '         Z            pmic@a           2qcom,smb2360 qcom,spmi-pmic             
                                      okay             Z  }   phy@fd00             2qcom,smb2360-eusb2-repeater                                   &          (         Z            pmic@b           2qcom,smb2360 qcom,spmi-pmic                                                   okay             Z  ~   phy@fd00             2qcom,smb2360-eusb2-repeater                                   &          )         Z            pmic@c           2qcom,smb2360 qcom,spmi-pmic                                                 	  disabled             Z     phy@fd00             2qcom,smb2360-eusb2-repeater                                  Z                 pinctrl@f100000          2qcom,x1e80100-tlmm                                                   	M        	]                               	i                                    ,                  Z      edp0-hpd-default-state          	ugpio119       	  	zedp0_hot             	         Z        qup-i2c0-data-clk-state         	ugpio0 gpio1       	  	zqup0_se0            	                      Z         qup-i2c1-data-clk-state         	ugpio4 gpio5       	  	zqup0_se1            	                      Z         qup-i2c2-data-clk-state         	ugpio8 gpio9       	  	zqup0_se2            	                      Z         qup-i2c3-data-clk-state         	ugpio12 gpio13         	  	zqup0_se3            	                      Z         qup-i2c4-data-clk-state         	ugpio16 gpio17         	  	zqup0_se4            	                      Z         qup-i2c5-data-clk-state         	ugpio20 gpio21         	  	zqup0_se5            	                      Z         qup-i2c6-data-clk-state         	ugpio24 gpio25         	  	zqup0_se6            	                      Z         qup-i2c7-data-clk-state         	ugpio14 gpio15         	  	zqup0_se7            	                      Z         qup-i2c8-data-clk-state         	ugpio32 gpio33         	  	zqup1_se0            	                      Z   _      qup-i2c9-data-clk-state         	ugpio36 gpio37         	  	zqup1_se1            	                      Z   b      qup-i2c10-data-clk-state            	ugpio40 gpio41         	  	zqup1_se2            	                      Z   e      qup-i2c11-data-clk-state            	ugpio44 gpio45         	  	zqup1_se3            	                      Z   h      qup-i2c12-data-clk-state            	ugpio48 gpio49         	  	zqup1_se4            	                      Z   k      qup-i2c13-data-clk-state            	ugpio52 gpio53         	  	zqup1_se5            	                      Z   n      qup-i2c14-data-clk-state            	ugpio56 gpio57         	  	zqup1_se6            	                      Z   q      qup-i2c15-data-clk-state            	ugpio54 gpio55         	  	zqup1_se7            	                      Z   |      qup-i2c16-data-clk-state            	ugpio64 gpio65         	  	zqup2_se0            	                      Z   B      qup-i2c17-data-clk-state            	ugpio68 gpio69         	  	zqup2_se1            	                      Z   F      qup-i2c18-data-clk-state            	ugpio72 gpio73         	  	zqup2_se2            	                      Z   I      qup-i2c19-data-clk-state            	ugpio76 gpio77         	  	zqup2_se3            	                      Z   M      qup-i2c20-data-clk-state            	ugpio80 gpio81         	  	zqup2_se4            	                      Z   P      qup-i2c21-data-clk-state            	ugpio84 gpio85         	  	zqup2_se5            	                      Z   S      qup-i2c22-data-clk-state            	ugpio88 gpio89         	  	zqup2_se6            	                      Z   W      qup-i2c23-data-clk-state            	ugpio86 gpio87         	  	zqup2_se7            	                      Z   Z      qup-spi0-cs-state           	ugpio3         	  	zqup0_se0            	            	         Z         qup-spi0-data-clk-state         	ugpio0 gpio1 gpio2         	  	zqup0_se0            	            	         Z         qup-spi1-cs-state           	ugpio7         	  	zqup0_se1            	            	         Z         qup-spi1-data-clk-state         	ugpio4 gpio5 gpio6         	  	zqup0_se1            	            	         Z         qup-spi2-cs-state           	ugpio11        	  	zqup0_se2            	            	         Z         qup-spi2-data-clk-state         	ugpio8 gpio9 gpio10        	  	zqup0_se2            	            	         Z         qup-spi3-cs-state           	ugpio15        	  	zqup0_se3            	            	         Z         qup-spi3-data-clk-state         	ugpio12 gpio13 gpio14          	  	zqup0_se3            	            	         Z         qup-spi4-cs-state           	ugpio19        	  	zqup0_se4            	            	         Z         qup-spi4-data-clk-state         	ugpio16 gpio17 gpio18          	  	zqup0_se4            	            	         Z         qup-spi5-cs-state           	ugpio23        	  	zqup0_se5            	            	         Z         qup-spi5-data-clk-state         	ugpio20 gpio21 gpio22          	  	zqup0_se5            	            	         Z         qup-spi6-cs-state           	ugpio27        	  	zqup0_se6            	            	         Z         qup-spi6-data-clk-state         	ugpio24 gpio25 gpio26          	  	zqup0_se6            	            	         Z         qup-spi7-cs-state           	ugpio13        	  	zqup0_se7            	            	         Z         qup-spi7-data-clk-state         	ugpio14 gpio15 gpio12          	  	zqup0_se7            	            	         Z         qup-spi8-cs-state           	ugpio35        	  	zqup1_se0            	            	         Z   a      qup-spi8-data-clk-state         	ugpio32 gpio33 gpio34          	  	zqup1_se0            	            	         Z   `      qup-spi9-cs-state           	ugpio39        	  	zqup1_se1            	            	         Z   d      qup-spi9-data-clk-state         	ugpio36 gpio37 gpio38          	  	zqup1_se1            	            	         Z   c      qup-spi10-cs-state          	ugpio43        	  	zqup1_se2            	            	         Z   g      qup-spi10-data-clk-state            	ugpio40 gpio41 gpio42          	  	zqup1_se2            	            	         Z   f      qup-spi11-cs-state          	ugpio47        	  	zqup1_se3            	            	         Z   j      qup-spi11-data-clk-state            	ugpio44 gpio45 gpio46          	  	zqup1_se3            	            	         Z   i      qup-spi12-cs-state          	ugpio51        	  	zqup1_se4            	            	         Z   m      qup-spi12-data-clk-state            	ugpio48 gpio49 gpio50          	  	zqup1_se4            	            	         Z   l      qup-spi13-cs-state          	ugpio55        	  	zqup1_se5            	            	         Z   p      qup-spi13-data-clk-state            	ugpio52 gpio53 gpio54          	  	zqup1_se5            	            	         Z   o      qup-spi14-cs-state          	ugpio59        	  	zqup1_se6            	            	         Z   s      qup-spi14-data-clk-state            	ugpio56 gpio57 gpio58          	  	zqup1_se6            	            	         Z   r      qup-spi15-cs-state          	ugpio53        	  	zqup1_se7            	            	         Z   ~      qup-spi15-data-clk-state            	ugpio54 gpio55 gpio52          	  	zqup1_se7            	            	         Z   }      qup-spi16-cs-state          	ugpio67        	  	zqup2_se0            	            	         Z   E      qup-spi16-data-clk-state            	ugpio64 gpio65 gpio66          	  	zqup2_se0            	            	         Z   D      qup-spi17-cs-state          	ugpio71        	  	zqup2_se1            	            	         Z   H      qup-spi17-data-clk-state            	ugpio68 gpio69 gpio70          	  	zqup2_se1            	            	         Z   G      qup-spi18-cs-state          	ugpio75        	  	zqup2_se2            	            	         Z   L      qup-spi18-data-clk-state            	ugpio72 gpio73 gpio74          	  	zqup2_se2            	            	         Z   K      qup-spi19-cs-state          	ugpio79        	  	zqup2_se3            	            	         Z   O      qup-spi19-data-clk-state            	ugpio76 gpio77 gpio78          	  	zqup2_se3            	            	         Z   N      qup-spi20-cs-state          	ugpio83        	  	zqup2_se4            	            	         Z   R      qup-spi20-data-clk-state            	ugpio80 gpio81 gpio82          	  	zqup2_se4            	            	         Z   Q      qup-spi21-cs-state          	ugpio87        	  	zqup2_se5            	            	         Z   U      qup-spi21-data-clk-state            	ugpio84 gpio85 gpio86          	  	zqup2_se5            	            	         Z   T      qup-spi22-cs-state          	ugpio91        	  	zqup2_se6            	            	         Z   Y      qup-spi22-data-clk-state            	ugpio88 gpio89 gpio90          	  	zqup2_se6            	            	         Z   X      qup-spi23-cs-state          	ugpio85        	  	zqup2_se7            	            	         Z   \      qup-spi23-data-clk-state            	ugpio86 gpio87 gpio84          	  	zqup2_se7            	            	         Z   [      qup-uart2-default-state          Z      cts-pins            	ugpio8         	  	zqup0_se2            	            	      rts-pins            	ugpio9         	  	zqup0_se2            	            	      tx-pins         	ugpio10        	  	zqup0_se2            	            	      rx-pins         	ugpio11        	  	zqup0_se2            	            	         qup-uart14-default-state             Z   t   cts-pins            	ugpio56        	  	zqup1_se6             	      rts-pins            	ugpio57        	  	zqup1_se6            	            	      tx-pins         	ugpio58        	  	zqup1_se6            	            	      rx-pins         	ugpio59        	  	zqup1_se6                      qup-uart21-default-state             Z   V   tx-pins         	ugpio86        	  	zqup2_se5            	            	      rx-pins         	ugpio87        	  	zqup2_se5            	            	         sdc2-default-state           Z     clk-pins          	  	usdc2_clk            	            	      cmd-pins          	  	usdc2_cmd            	   
               data-pins         
  	usdc2_data           	   
                  sdc2-sleep-state             Z     clk-pins          	  	usdc2_clk            	            	      cmd-pins          	  	usdc2_cmd            	                  data-pins         
  	usdc2_data           	                     hall-int-n-state            	ugpio2           	zgpio             	         Z        nvme-reg-en-state           	ugpio18          	zgpio            	            	         Z        edp-reg-en-state            	ugpio70          	zgpio            	            	         Z        ssam-state-state            	ugpio91          	zgpio             	         Z         wcn-wlan-bt-en-state            	ugpio116 gpio117         	zgpio            	            	         Z        pcie3-default-state          Z      perst-n-pins            	ugpio143         	zgpio            	            	      clkreq-n-pins           	ugpio144       
  	zpcie3_clk           	                  wake-n-pins         	ugpio145         	zgpio            	                     pcie6a-default-state             Z      perst-n-pins            	ugpio152         	zgpio            	            	      clkreq-n-pins           	ugpio153         	zpcie6a_clk          	                  wake-n-pins         	ugpio154         	zgpio            	                     rtmr1-1p8-reg-en-state          	ugpio175         	zgpio            	            	         Z        rtmr1-3p3-reg-en-state          	ugpio186         	zgpio            	            	         Z        rtmr1-1p15-reg-en-state         	ugpio188         	zgpio            	            	         Z        wcd-reset-n-active-state            	ugpio191         	zgpio            	            	         	         Z        wcn-sw-en-state         	ugpio214         	zgpio            	            	         Z        cam-indicator-en-state          	ugpio225         	zgpio            	            	         Z           stm@10002000              2arm,coresight-stm arm,primecell                             (                 +stm-base stm-stimulus-base           b         	  apb_pclk       out-ports      port       endpoint            R  *         Z  1               tpdm@10003000         "   2qcom,coresight-tpdm arm,primecell                 0                 b         	  apb_pclk                                  	  disabled       out-ports      port       endpoint            R  +         Z  ,               tpda@10004000         "   2qcom,coresight-tpda arm,primecell                 @                 b         	  apb_pclk       in-ports                                 port@0                  endpoint            R  ,         Z  +         port@1                 endpoint            R  -         Z  /            out-ports      port       endpoint            R  .         Z  0               tpdm@1000f000         "   2qcom,coresight-tpdm arm,primecell                                  b         	  apb_pclk                               out-ports      port       endpoint            R  /         Z  -               funnel@10041000       +   2arm,coresight-dynamic-funnel arm,primecell                                b         	  apb_pclk       in-ports                                 port@6                 endpoint            R  0         Z  .         port@7                 endpoint            R  1         Z  *            out-ports      port       endpoint            R  2         Z  7               funnel@10042000       +   2arm,coresight-dynamic-funnel arm,primecell                                 b         	  apb_pclk       in-ports                                 port@2                 endpoint            R  3         Z  }         port@5                 endpoint            R  4         Z  G         port@6                 endpoint            R  5         Z  o            out-ports      port       endpoint            R  6         Z  8               funnel@10045000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 b         	  apb_pclk       in-ports                                 port@0                  endpoint            R  7         Z  2         port@1                 endpoint            R  8         Z  6            out-ports      port       endpoint            R  9         Z  J               tpdm@10800000         "   2qcom,coresight-tpdm arm,primecell                                  b         	  apb_pclk               @               out-ports      port       endpoint            R  :         Z  s               tpdm@1082c000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R  ;         Z  h               tpdm@10841000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R  <         Z  f               tpdm@10844000         "   2qcom,coresight-tpdm arm,primecell                @                 b         	  apb_pclk                               out-ports      port       endpoint            R  =         Z  >               funnel@10846000       +   2arm,coresight-dynamic-funnel arm,primecell               `                 b         	  apb_pclk       in-ports       port       endpoint            R  >         Z  =            out-ports      port       endpoint            R  ?         Z  e               cti@1098b000              2arm,coresight-cti arm,primecell                               b         	  apb_pclk          tpdm@109d0000         "   2qcom,coresight-tpdm arm,primecell                                  b         	  apb_pclk                                  	  disabled       out-ports      port       endpoint            R  @         Z  g               tpdm@10ac0000         "   2qcom,coresight-tpdm arm,primecell                                  b         	  apb_pclk                                  	  disabled       out-ports      port       endpoint            R  A         Z  C               tpdm@10ac1000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk               @               out-ports      port       endpoint            R  B         Z  D               tpda@10ac4000         "   2qcom,coresight-tpda arm,primecell                @                 b         	  apb_pclk       in-ports                                 port@8                 endpoint            R  C         Z  A         port@9              	   endpoint            R  D         Z  B            out-ports      port       endpoint            R  E         Z  F               funnel@10ac5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 b         	  apb_pclk       in-ports       port       endpoint            R  F         Z  E            out-ports      port       endpoint            R  G         Z  4               funnel@10b04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 b         	  apb_pclk       in-ports                                 port@3                 endpoint            R  H         Z  _         port@6                 endpoint            R  I         Z  U         port@7                 endpoint            R  J         Z  9            out-ports      port       endpoint            R  K         Z  L               tmc@10b05000              2arm,coresight-tmc arm,primecell              P                 b         	  apb_pclk             Z     in-ports       port       endpoint            R  L         Z  K            out-ports      port       endpoint            R  M         Z  N               replicator@10b06000       /   2arm,coresight-dynamic-replicator arm,primecell               `                 b         	  apb_pclk       in-ports       port       endpoint            R  N         Z  M            out-ports      port       endpoint            R  O         Z                  tpda@10b08000         "   2qcom,coresight-tpda arm,primecell                                 b         	  apb_pclk       in-ports                                 port@0                  endpoint            R  P         Z  V         port@1                 endpoint            R  Q         Z  W         port@2                 endpoint            R  R         Z  X         port@3                 endpoint            R  S         Z  Y         port@4                 endpoint            R  T         Z  Z            out-ports      port       endpoint            R  U         Z  I               tpdm@10b09000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk               @               out-ports      port       endpoint            R  V         Z  P               tpdm@10b0a000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk               @               out-ports      port       endpoint            R  W         Z  Q               tpdm@10b0b000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk               @               out-ports      port       endpoint            R  X         Z  R               tpdm@10b0c000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk               @               out-ports      port       endpoint            R  Y         Z  S               tpdm@10b0d000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R  Z         Z  T               tpdm@10b20000         "   2qcom,coresight-tpdm arm,primecell                                  b         	  apb_pclk                                  	  disabled       out-ports      port       endpoint            R  [         Z  \               tpda@10b23000         "   2qcom,coresight-tpda arm,primecell                0                 b         	  apb_pclk          	  disabled       in-ports       port       endpoint            R  \         Z  [            out-ports      port       endpoint            R  ]         Z  ^               funnel@10b24000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 b         	  apb_pclk          	  disabled       in-ports       port       endpoint            R  ^         Z  ]            out-ports      port       endpoint            R  _         Z  H               tpdm@10c08000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R  `         Z  a               funnel@10c0b000       +   2arm,coresight-dynamic-funnel arm,primecell                                b         	  apb_pclk       in-ports                                 port@4                 endpoint            R  a         Z  `            out-ports      port       endpoint            R  b         Z  r               tpdm@10c28000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R  c         Z  i               tpdm@10c29000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk               @               out-ports      port       endpoint            R  d         Z  j               tpda@10c2b000         "   2qcom,coresight-tpda arm,primecell                °                 b         	  apb_pclk       in-ports                                 port@4                 endpoint            R  e         Z  ?         port@13                endpoint            R  f         Z  <         port@14                endpoint            R  g         Z  @         port@15                endpoint            R  h         Z  ;         port@1a                endpoint            R  i         Z  c         port@1b                endpoint            R  j         Z  d            out-ports      port       endpoint            R  k         Z  l               funnel@10c2c000       +   2arm,coresight-dynamic-funnel arm,primecell                                b         	  apb_pclk       in-ports                                 port@0                  endpoint            R  l         Z  k         port@4                 endpoint            R  m         Z  x         port@5                 endpoint            R  n         Z              out-ports      port       endpoint            R  o         Z  5               tpdm@10c38000         "   2qcom,coresight-tpdm arm,primecell                À                 b         	  apb_pclk               @               out-ports      port       endpoint            R  p         Z  t               tpdm@10c39000         "   2qcom,coresight-tpdm arm,primecell                Ð                 b         	  apb_pclk               @               out-ports      port       endpoint            R  q         Z  u               tpda@10c3c000         "   2qcom,coresight-tpda arm,primecell                                 b         	  apb_pclk       in-ports                                 port@4                 endpoint            R  r         Z  b         port@f                 endpoint            R  s         Z  :         port@10                endpoint            R  t         Z  p         port@11                endpoint            R  u         Z  q            out-ports      port       endpoint            R  v         Z  w               funnel@10c3d000       +   2arm,coresight-dynamic-funnel arm,primecell                                b         	  apb_pclk       in-ports       port       endpoint            R  w         Z  v            out-ports      port       endpoint            R  x         Z  m               tpdm@10cc1000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk               @                                          	  disabled       out-ports      port       endpoint            R  y         Z  z               tpda@10cc4000         "   2qcom,coresight-tpda arm,primecell                @                 b         	  apb_pclk       in-ports                                 port@2                 endpoint            R  z         Z  y            out-ports      port       endpoint            R  {         Z  |               funnel@10cc5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 b         	  apb_pclk       in-ports       port       endpoint            R  |         Z  {            out-ports      port       endpoint            R  }         Z  3               funnel@10d04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 b         	  apb_pclk       in-ports                                 port@6                 endpoint            R  ~         Z              out-ports      port       endpoint            R           Z  n               tpdm@10d08000         "   2qcom,coresight-tpdm arm,primecell                Ѐ                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpdm@10d09000         "   2qcom,coresight-tpdm arm,primecell                А                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpdm@10d0a000         "   2qcom,coresight-tpdm arm,primecell                Р                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpdm@10d0b000         "   2qcom,coresight-tpdm arm,primecell                а                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpdm@10d0c000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpdm@10d0d000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpdm@10d0e000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpdm@10d0f000         "   2qcom,coresight-tpdm arm,primecell                                 b         	  apb_pclk                               out-ports      port       endpoint            R           Z                 tpda@10d12000         "   2qcom,coresight-tpda arm,primecell                                  b         	  apb_pclk       in-ports                                 port@0                  endpoint            R           Z           port@1                 endpoint            R           Z           port@2                 endpoint            R           Z           port@3                 endpoint            R           Z           port@4                 endpoint            R           Z           port@5                 endpoint            R           Z           port@6                 endpoint            R           Z           port@7                 endpoint            R           Z              out-ports      port       endpoint            R           Z                 funnel@10d13000       +   2arm,coresight-dynamic-funnel arm,primecell               0                 b         	  apb_pclk       in-ports       port       endpoint            R           Z              out-ports      port       endpoint            R           Z  ~               iommu@15000000        1   2qcom,x1e80100-smmu-500 qcom,smmu-500 arm,mmu-500                                         A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                                         ?         Z   <      iommu@15400000           2arm,smmu-v3              @                          $                                        eventq gerror cmdq-sync          ?      	  reserved             Z        interrupt-controller@17000000            2arm,gic-v3                                     0                	                               *           A                                                  Z      msi-controller@17040000          2arm,gic-v3-its                                 V        e            Z            mailbox@17430000             2qcom,x1e80100-cpucp-mbox                  C                                                            Z   #      rsc@17500000             2qcom,rpmh-rsc         0       P             Q             R                 +drv-0 drv-1 drv-2         $                                        p                                                       	  Mapps_rsc                -         Z     bcm-voter            2qcom,bcm-voter           Z   &      clock-controller             2qcom,x1e80100-rpmh-clk           b          xo           M            Z         power-controller             2qcom,x1e80100-rpmhpd            d                      Z   ;   opp-table            2operating-points-v2          Z     opp-16                      Z        opp-48             0         Z         opp-52             4         Z        opp-56             8         Z        opp-60             <         Z        opp-64             @         Z   /      opp-80             P         Z        opp-128                     Z   0      opp-144                     Z        opp-192                     Z         opp-256                     Z         opp-320           @         Z        opp-336           P         Z        opp-384                    Z        opp-416                    Z              regulators-0             2qcom,pm8550-rpmh-regulators         b                                                                                 (          7          F     bob1          
  Uvreg_bob1           d -         | <l                    Z        bob2          
  Uvreg_bob2           d &5@        | -                     Z        ldo1          	  Uvreg_l1b            d w@        | w@                    Z         ldo2          	  Uvreg_l2b            d .         | .                     Z  '      ldo4          	  Uvreg_l4b            d w@        | w@                    Z         ldo5          	  Uvreg_l5b            d -        | -                    Z        ldo6          	  Uvreg_l6b            d w@        | -*                    Z        ldo7          	  Uvreg_l7b            d *        | *                    Z        ldo8          	  Uvreg_l8b            d .         | .                     Z  )      ldo9          	  Uvreg_l9b            d -*        | -*                    Z        ldo10         
  Uvreg_l10b           d w@        | w@                    Z        ldo12         
  Uvreg_l12b           d O        | O                             Z         ldo13         
  Uvreg_l13b           d .         | .                     Z         ldo14         
  Uvreg_l14b           d .         | .                     Z  (      ldo15         
  Uvreg_l15b           d w@        | w@                             Z         ldo16         
  Uvreg_l16b           d ,o         | ,o                     Z        ldo17         
  Uvreg_l17b           d &5@        | &5@                    Z           regulators-1             2qcom,pm8550ve-rpmh-regulators           c                                              smps4         	  Uvreg_s4c            d R         |                     Z        ldo1          	  Uvreg_l1c            d O        | O                    Z        ldo2          	  Uvreg_l2c            d m        | 	                    Z        ldo3          	  Uvreg_l3c            d         | 	                    Z            regulators-2             2qcom,pmc8380-rpmh-regulators            d                                              ldo1          	  Uvreg_l1d            d m        | 	                    Z         ldo2          	  Uvreg_l2d            d         | 	                    Z         ldo3          	  Uvreg_l3d            d w@        | w@                    Z  &         regulators-3             2qcom,pmc8380-rpmh-regulators            e                          ldo2          	  Uvreg_l2e            d m        | 	                    Z         ldo3          	  Uvreg_l3e            d O        | O                    Z            regulators-4             2qcom,pmc8380-rpmh-regulators            f                                              smps1         	  Uvreg_s1f            d 
`        |                     Z        ldo1          	  Uvreg_l1f            d          |                      Z        ldo2          	  Uvreg_l2f            d          |                      Z        ldo3          	  Uvreg_l3f            d          |                      Z           regulators-6             2qcom,pm8550ve-rpmh-regulators           i                                                        smps1         	  Uvreg_s1i            d         | 	                    Z        smps2         	  Uvreg_s2i            d B@        |                     Z        ldo1          	  Uvreg_l1i            d w@        | w@                    Z        ldo2          	  Uvreg_l2i            d O        | O                    Z        ldo3          	  Uvreg_l3i            d m        | 	                    Z            regulators-7             2qcom,pm8550ve-rpmh-regulators           j                                              smps5         	  Uvreg_s5j            d *@        |                     Z        ldo1          	  Uvreg_l1j            d         | 	                    Z         ldo2          	  Uvreg_l2j            d *@        | *@                    Z         ldo3          	  Uvreg_l3j            d m        | 	                    Z               timer@17800000           2arm,armv7-timer-mem                                                                               frame@17801000                                                                !          frame@17803000               0                   	           !         	  disabled          frame@17805000               P                   
           !         	  disabled          frame@17807000               p                              !         	  disabled          frame@17809000                                             !         	  disabled          frame@1780b000                                             !         	  disabled          frame@1780d000                                             !         	  disabled             sram@18b4e000         
   2mmio-sram                                                                              Z     scp-sram-section@0           2arm,scmi-shmem                           Z   $      scp-sram-section@200             2arm,scmi-shmem                          Z   %         watchdog@1c840000            2arm,sbsa-gwdt                                                                   Z        efuse@221c8000        !   2qcom,x1e80100-qfprom qcom,qfprom                 "                                          Z     gpu-speed-bin@119                         X               Z            pmu@24091000          0   2qcom,x1e80100-llcc-bwmon qcom,sc7280-llcc-bwmon              $	                       Q           b   !          !              d     opp-table            2operating-points-v2          Z     opp-0            5       opp-1            !b      opp-2            .       opp-3            ^       opp-4            hL       opp-5                   opp-6                   opp-7                   opp-8                    opp-9                        pmu@240b3400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $4                      E           b   ?         ?              d           Z        pmu@240b5400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $T                      E           b   ?         ?              d           Z     opp-table            2operating-points-v2          Z     opp-0            I>       opp-1            q@      opp-2            |       opp-3                   opp-4            Ȁ      opp-5           `@            pmu@240b6400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $d                      E           b   ?         ?              d        system-cache-controller@25000000             2qcom,x1e80100-llcc               %               %               %@              %`              %              %              %              %              &               &                   +llcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base llcc_broadcast_and_base               
         remoteproc@32300000          2qcom,x1e80100-cdsp-pas               20               @  9         B                                          #  wdog fatal ready handover stop-ack           b               xo              ;       ;   
   ;            cx mxc nsp          b            !                                     &              7stop            okay          ]  qcom/x1e80100/microsoft/Romulus/qccdsp8380.mbn qcom/x1e80100/microsoft/Romulus/cdsp_dtbs.elf             Z     glink-edge          9   1                     1               Mcdsp            f      fastrpc          2qcom,fastrpc            Sfastrpcglink-apps-dsp           Mcdsp             g                             compute-cb@1             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@2             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@3             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@4             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@5             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@6             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@7             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@8             2qcom,fastrpc-compute-cb                        <               ?      compute-cb@10            2qcom,fastrpc-compute-cb             
           <               ?      compute-cb@11            2qcom,fastrpc-compute-cb                        <               ?      compute-cb@12            2qcom,fastrpc-compute-cb                        <               ?      compute-cb@13            2qcom,fastrpc-compute-cb                        <               ?                  timer            2arm,armv8-timer       0                                   
         thermal-zones            Z     aoss0-thermal           .         trips      trip-point0         > _        J           hot       aoss0-critical          > 8        J        	   critical                cpu0-0-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu0-0-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu0-1-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu0-1-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu0-2-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu0-2-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu0-3-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu0-3-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpuss0-top-thermal          .     	   trips      cpuss2-critical         > 8        J        	   critical                cpuss0-btm-thermal          .     
   trips      cpuss2-critical         > 8        J        	   critical                mem-thermal         .        trips      trip-point0         > _        J           hot       mem-critical            > 8        J          	   critical                video-thermal           .        trips      trip-point0         > _        J           hot       video-critical          > 8        J        	   critical                aoss1-thermal           .         trips      trip-point0         > _        J           hot       aoss0-critical          > 8        J        	   critical                cpu1-0-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu1-0-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu1-1-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu1-1-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu1-2-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu1-2-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu1-3-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu1-3-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpuss1-top-thermal          .     	   trips      cpuss2-critical         > 8        J        	   critical                cpuss1-btm-thermal          .     
   trips      cpuss2-critical         > 8        J        	   critical                aoss2-thermal           .         trips      trip-point0         > _        J           hot       aoss0-critical          > 8        J        	   critical                cpu2-0-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu2-0-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu2-1-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu2-1-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu2-2-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu2-2-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu2-3-top-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpu2-3-btm-thermal          .        trips      cpu-critical            > 8        J        	   critical                cpuss2-top-thermal          .     	   trips      cpuss2-critical         > 8        J        	   critical                cpuss2-btm-thermal          .     
   trips      cpuss2-critical         > 8        J        	   critical                aoss3-thermal           .         trips      trip-point0         > _        J           hot       aoss0-critical          > 8        J        	   critical                nsp0-thermal            .        trips      trip-point0         > _        J           hot       nsp0-critical           > 8        J        	   critical                nsp1-thermal            .        trips      trip-point0         > _        J           hot       nsp1-critical           > 8        J        	   critical                nsp2-thermal            .        trips      trip-point0         > _        J           hot       nsp2-critical           > 8        J        	   critical                nsp3-thermal            .        trips      trip-point0         > _        J           hot       nsp3-critical           > 8        J        	   critical                gpuss-0-thermal         U           .        cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                gpuss-1-thermal         U           .        cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                gpuss-2-thermal         U           .        cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                gpuss-3-thermal         U           .        cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                gpuss-4-thermal         U           .     	   cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                gpuss-5-thermal         U           .     
   cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                gpuss-6-thermal         U           .        cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                gpuss-7-thermal         U           .        cooling-maps       map0            k          p           trips      trip-point0         > s        J           passive          Z        gpu-critical            > 8        J        	   critical                camera0-thermal         .        trips      trip-point0         > _        J           hot       camera0-critical            > 8        J        	   critical                camera1-thermal         .        trips      trip-point0         > _        J           hot       camera0-critical            > 8        J        	   critical                pm8550-thermal          U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pm8550ve-2-thermal          U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pmc8380-3-thermal           U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pmc8380-4-thermal           U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pmc8380-5-thermal           U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pmc8380-6-thermal           U   d        .           Z     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pm8550ve-8-thermal          U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pm8550ve-9-thermal          U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot             pm8010-thermal          U   d        .     trips      trip0           > s        J             passive       trip1           > 8        J             hot                aliases       $  /soc@0/geniqup@bc0000/serial@b88000       !  /soc@0/geniqup@bc0000/i2c@b80000          !  /soc@0/geniqup@bc0000/i2c@b8c000          !  /soc@0/geniqup@bc0000/i2c@b90000          !  /soc@0/geniqup@bc0000/i2c@b94000          !  /soc@0/geniqup@bc0000/i2c@b9c000          audio-codec          2qcom,wcd9385-codec                             w@         w@         w@         w@           $ I                   '         N  P        w                                                               L          Vdefault                     Z        backlight            2pwm-backlight                  LK@                          L            Vdefault          Z        gpio-keys         
   2gpio-keys           L          Vdefault    switch-lid                                      ,             
                    leds          
   2gpio-leds           Vdefault         L     led-camera-indicator            Mwhite:camera-indicator        
  	zindicator                                          none            off          *         pmic-glink        @   2qcom,x1e80100-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink                                   :      y          {       connector@0          2usb-c-connector                      Ldual            Wdual       ports                                port@0                  endpoint            R           Z            port@1                 endpoint            R           Z            port@2                 endpoint            R           Z                  connector@1          2usb-c-connector                     Ldual            Wdual       ports                                port@0                  endpoint            R           Z            port@1                 endpoint            R           Z            port@2                 endpoint            R           Z                     regulator-edp-3p3            2regulator-fixed         UVREG_EDP_3P3            d 2Z        | 2Z        a      F             f        L          Vdefault          y         Z        regulator-rtmr0-1p15             2regulator-fixed         UVREG_RTMR0_1P15         d 0        | 0        a  "                f        L          Vdefault          y         Z         regulator-rtmr0-1p8          2regulator-fixed         UVREG_RTMR0_1P8          d w@        | w@        a  %                f        L          Vdefault          y         Z         regulator-rtmr0-3p3          2regulator-fixed         UVREG_RTMR0_3P3          d 2Z        | 2Z        a                   f        L          Vdefault          y         Z         regulator-rtmr1-1p15             2regulator-fixed         UVREG_RTMR1_1P15         d 0        | 0        a                   f        L          Vdefault          y         Z         regulator-rtmr1-1p8          2regulator-fixed         UVREG_RTMR1_1P8          d w@        | w@        a                   f        L          Vdefault          y         Z         regulator-rtmr1-3p3          2regulator-fixed         UVREG_RTMR1_3P3          d 2Z        | 2Z        a                   f        L          Vdefault          y         Z         regulator-nvme           2regulator-fixed         UVREG_NVME_3P3           d 2Z        | 2Z        a                   f        L          Vdefault          y         Z         regulator-vph-pwr            2regulator-fixed         Uvph_pwr         d 8u         | 8u                   y         Z        regulator-wcn-0p95           2regulator-fixed         UVREG_WCN_0P95           d ~        | ~                   Z        regulator-wcn-1p9            2regulator-fixed         UVREG_WCN_1P9            d         |                    Z        regulator-wcn-3p3            2regulator-fixed         UVREG_WCN_3P3            d 2Z        | 2Z        a                   f        L          Vdefault          y         Z        sound            2qcom,x1e80100-sndcard            ,X1E80100-Romulus            SpkrLeft IN WSA WSA_SPK1 OUT SpkrRight IN WSA WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC2 MIC BIAS2 VA DMIC0 MIC BIAS3 VA DMIC1 MIC BIAS3 VA DMIC0 VA MIC BIAS3 VA DMIC1 VA MIC BIAS3 TX SWR_INPUT1 ADC2_OUTPUT     va-dai-link         VA Capture     cpu              n      codec                        platform                       wcd-capture-dai-link            WCD Capture    cpu              x      codec                                  platform                       wcd-playback-dai-link           WCD Playback       cpu              q      codec                                    platform                       wsa-dai-link            WSA Playback       cpu              i      codec                                  platform                          wcn7850-pmu          2qcom,wcn7850-pmu                      O                                                         u                  t            L          Vdefault    regulators     ldo0            Uvreg_pmu_rfa_cmn             Z   x      ldo1            Uvreg_pmu_aon_0p59            Z   u      ldo2            Uvreg_pmu_wlcx_0p8            Z   v      ldo3            Uvreg_pmu_wlmx_0p85           Z   w      ldo4            Uvreg_pmu_btcmx_0p85          Z        ldo5            Uvreg_pmu_rfa_0p8             Z   y      ldo6            Uvreg_pmu_rfa_1p2             Z   z      ldo7            Uvreg_pmu_rfa_1p8             Z   {      ldo8            Uvreg_pmu_pcie_0p9            Z         ldo9            Uvreg_pmu_pcie_1p8            Z               __symbols__         /clocks/xo-board            /clocks/sleep-clk           /clocks/bi-tcxo-div2-clk            /clocks/bi-tcxo-ao-div2-clk         /cpus/cpu@0         /cpus/cpu@0/l2-cache            "/cpus/cpu@100           '/cpus/cpu@200           ,/cpus/cpu@300           1/cpus/cpu@10000         6/cpus/cpu@10000/l2-cache            ;/cpus/cpu@10100         @/cpus/cpu@10200         E/cpus/cpu@10300         J/cpus/cpu@20000         O/cpus/cpu@20000/l2-cache            T/cpus/cpu@20100         Y/cpus/cpu@20200         _/cpus/cpu@20300         e/cpus/cpu-map/cluster2          v/cpus/idle-states/cpu-sleep-0         )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1          #  /dummy-sink/in-ports/port/endpoint          /firmware/scm           /firmware/scmi/protocol@13          /interconnect-0         /interconnect-1         /psci/power-domain-cpu0         /psci/power-domain-cpu1         /psci/power-domain-cpu2         /psci/power-domain-cpu3         /psci/power-domain-cpu4         /psci/power-domain-cpu5         /psci/power-domain-cpu6         /psci/power-domain-cpu7         /psci/power-domain-cpu8         /psci/power-domain-cpu9         /psci/power-domain-cpu10            /psci/power-domain-cpu11             !/psci/power-domain-cpu-cluster0          -/psci/power-domain-cpu-cluster1          9/psci/power-domain-cpu-cluster2         E/psci/power-domain-system         %  O/reserved-memory/gunyah-hyp@80000000          *  ^/reserved-memory/hyp-elf-package@80800000           r/reserved-memory/ncc@80a00000         $  z/reserved-memory/cpucp-log@80e00000          /reserved-memory/cpucp@80e40000       &  /reserved-memory/tags-region@81400000         $  /reserved-memory/xbl-dtlog@81a00000       &  /reserved-memory/xbl-ramdump@81a40000         $  /reserved-memory/aop-image@81c00000       %  /reserved-memory/aop-cmd-db@81c60000          %  /reserved-memory/aop-config@81c80000          )  /reserved-memory/tme-crash-dump@81ca0000          "  /reserved-memory/tme-log@81ce0000         #  /reserved-memory/uefi-log@81ce4000        '  /reserved-memory/secdata-apss@81cff000        (  "/reserved-memory/pdp-ns-shared@81e00000       "  4/reserved-memory/gpu-prr@81f00000         &  @/reserved-memory/tpm-control@81f10000         *  P/reserved-memory/usb-ucsi-shared@81f20000         "  d/reserved-memory/pld-pep@81f30000         "  p/reserved-memory/pld-gmu@81f36000         "  |/reserved-memory/pld-pdp@81f37000         "  /reserved-memory/tz-stat@82700000         )  /reserved-memory/xbl-tmp-buffer@82800000          /  /reserved-memory/adsp-rpc-remote-heap@84b00000        3  /reserved-memory/spu-secure-shared-memory@85300000        (  /reserved-memory/adsp-boot-dtb@866c0000       &  /reserved-memory/spss-region@86700000         $  /reserved-memory/adsp-boot@86b00000          /reserved-memory/video@87700000       #  /reserved-memory/adspslpi@87e00000        &  $/reserved-memory/q6-adsp-dtb@8b800000           4/reserved-memory/cdsp@8b900000        &  =/reserved-memory/q6-cdsp-dtb@8d900000         (  M/reserved-memory/gpu-microcode@8d9fe000         _/reserved-memory/cvp@8da00000         !  g/reserved-memory/camera@8e100000          &  r/reserved-memory/av1-encoder@8e900000           /reserved-memory/wpss@8fa00000        &  /reserved-memory/q6-wpss-dtb@91300000         !  /reserved-memory/xbl-sc@d8000000            /reserved-memory/qtee@d80e0000          /reserved-memory/ta@d8600000            /reserved-memory/tags@e1000000        #  /reserved-memory/llcc-lpi@ff800000          /reserved-memory/smem@ffe00000          /opp-table-qup100mhz            /opp-table-qup120mhz             /smp2p-adsp/master-kernel           /smp2p-adsp/slave-kernel            /smp2p-cdsp/master-kernel           ,/smp2p-cdsp/slave-kernel            :/soc@0          >/soc@0/clock-controller@100000          B/soc@0/mailbox@408000           G/soc@0/dma-controller@800000            P/soc@0/geniqup@8c0000         !  X/soc@0/geniqup@8c0000/i2c@880000          !  ^/soc@0/geniqup@8c0000/spi@880000          !  d/soc@0/geniqup@8c0000/i2c@884000          !  j/soc@0/geniqup@8c0000/spi@884000          !  p/soc@0/geniqup@8c0000/i2c@888000          !  v/soc@0/geniqup@8c0000/spi@888000          !  |/soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  /soc@0/geniqup@8c0000/i2c@890000          !  /soc@0/geniqup@8c0000/spi@890000          !  /soc@0/geniqup@8c0000/i2c@894000          !  /soc@0/geniqup@8c0000/spi@894000          $  /soc@0/geniqup@8c0000/serial@894000       !  /soc@0/geniqup@8c0000/i2c@898000          !  /soc@0/geniqup@8c0000/spi@898000          !  /soc@0/geniqup@8c0000/i2c@89c000          !  /soc@0/geniqup@8c0000/spi@89c000            /soc@0/dma-controller@a00000            /soc@0/geniqup@ac0000         !  /soc@0/geniqup@ac0000/i2c@a80000          !  /soc@0/geniqup@ac0000/spi@a80000          !  /soc@0/geniqup@ac0000/i2c@a84000          !  /soc@0/geniqup@ac0000/spi@a84000          !  /soc@0/geniqup@ac0000/i2c@a88000          !  /soc@0/geniqup@ac0000/spi@a88000          !  /soc@0/geniqup@ac0000/i2c@a8c000          !  /soc@0/geniqup@ac0000/spi@a8c000          !  /soc@0/geniqup@ac0000/i2c@a90000          !  /soc@0/geniqup@ac0000/spi@a90000          !  /soc@0/geniqup@ac0000/i2c@a94000          !  /soc@0/geniqup@ac0000/spi@a94000          !  /soc@0/geniqup@ac0000/i2c@a98000          !  /soc@0/geniqup@ac0000/spi@a98000          $   /soc@0/geniqup@ac0000/serial@a98000       !  '/soc@0/geniqup@ac0000/i2c@a9c000          !  -/soc@0/geniqup@ac0000/spi@a9c000            3/soc@0/dma-controller@b00000            </soc@0/geniqup@bc0000         !  /soc@0/geniqup@bc0000/i2c@b80000          !  D/soc@0/geniqup@bc0000/spi@b80000          !  I/soc@0/geniqup@bc0000/i2c@b84000          !  N/soc@0/geniqup@bc0000/spi@b84000          !  S/soc@0/geniqup@bc0000/i2c@b88000          $  X/soc@0/geniqup@bc0000/serial@b88000       !  ^/soc@0/geniqup@bc0000/spi@b88000          !  /soc@0/geniqup@bc0000/i2c@b8c000          C  c/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@0/endpoint        C  v/soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b8c000          !  /soc@0/geniqup@bc0000/i2c@b90000          !  /soc@0/geniqup@bc0000/spi@b90000          !  /soc@0/geniqup@bc0000/i2c@b94000          -  /soc@0/geniqup@bc0000/i2c@b94000/redriver@4f          !  /soc@0/geniqup@bc0000/spi@b94000          !  /soc@0/geniqup@bc0000/i2c@b98000          !  /soc@0/geniqup@bc0000/spi@b98000          !  /soc@0/geniqup@bc0000/i2c@b9c000          C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b9c000            /soc@0/thermal-sensor@c271000           
/soc@0/thermal-sensor@c272000           /soc@0/thermal-sensor@c273000           /soc@0/thermal-sensor@c274000           /soc@0/phy@fd3000           //soc@0/phy@fd5000         (  @/soc@0/phy@fd5000/ports/port@0/endpoint       (  U/soc@0/phy@fd5000/ports/port@1/endpoint       (  p/soc@0/phy@fd5000/ports/port@2/endpoint         /soc@0/phy@fd9000           /soc@0/phy@fda000         (  /soc@0/phy@fda000/ports/port@0/endpoint       (  /soc@0/phy@fda000/ports/port@1/endpoint       (  /soc@0/phy@fda000/ports/port@2/endpoint         /soc@0/phy@fde000           /soc@0/phy@fdf000         (  /soc@0/phy@fdf000/ports/port@0/endpoint       (  %/soc@0/phy@fdf000/ports/port@1/endpoint       (  @/soc@0/phy@fdf000/ports/port@2/endpoint         W/soc@0/interconnect@1500000         a/soc@0/interconnect@1600000         l/soc@0/interconnect@1680000         w/soc@0/interconnect@16c0000         /soc@0/interconnect@16d0000         /soc@0/interconnect@16e0000         /soc@0/interconnect@1700000         /soc@0/interconnect@1740000         /soc@0/interconnect@1750000         /soc@0/interconnect@1760000         /soc@0/interconnect@1770000         /soc@0/interconnect@1780000         /soc@0/pcie@1bd0000         /soc@0/pcie@1bd0000/opp-table           /soc@0/pcie@1bd0000/pcie@0          /soc@0/phy@1be0000           /soc@0/pci@1bf8000          '/soc@0/phy@1bfc000          2/soc@0/pci@1c00000          8/soc@0/phy@1c06000          B/soc@0/pci@1c08000          H/soc@0/pci@1c08000/pcie@0           T/soc@0/phy@1c0e000          ^/soc@0/hwlock@1f40000            i/soc@0/clock-controller@1fc0000         n/soc@0/gpu@3d00000          r/soc@0/gpu@3d00000/zap-shader           /soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          /soc@0/gmu@3d6a000/opp-table             /soc@0/clock-controller@3d90000         /soc@0/iommu@3da0000            /soc@0/interconnect@26400000            /soc@0/interconnect@320c0000            /soc@0/remoteproc@6800000         3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         /soc@0/codec@6aa0000            /soc@0/soundwire@6ab0000            /soc@0/codec@6ac0000            /soc@0/soundwire@6ad0000          #  /soc@0/soundwire@6ad0000/codec@0,4          &/soc@0/codec@6ae0000            4/soc@0/codec@6b00000            C/soc@0/soundwire@6b10000          %  H/soc@0/soundwire@6b10000/speaker@0,0          %  R/soc@0/soundwire@6b10000/speaker@0,1             ]/soc@0/clock-controller@6b6c000         k/soc@0/soundwire@6d30000          #  p/soc@0/soundwire@6d30000/codec@0,3          w/soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  /soc@0/pinctrl@6e80000/tx-swr-active-state        +  /soc@0/pinctrl@6e80000/rx-swr-active-state        ,  /soc@0/pinctrl@6e80000/dmic01-default-state       ,  /soc@0/pinctrl@6e80000/dmic23-default-state       ,  /soc@0/pinctrl@6e80000/wsa-swr-active-state       -  /soc@0/pinctrl@6e80000/wsa2-swr-active-state          1  /soc@0/pinctrl@6e80000/spkr-01-sd-n-active-state             /soc@0/clock-controller@6ea0000         /soc@0/interconnect@7e40000         /soc@0/interconnect@7400000         #/soc@0/interconnect@7430000         3/soc@0/mmc@8804000          :/soc@0/mmc@8804000/opp-table            J/soc@0/mmc@8844000          Q/soc@0/mmc@8844000/opp-table            a/soc@0/phy@88e0000          m/soc@0/phy@88e1000          {/soc@0/phy@88e2000          /soc@0/phy@88e3000          /soc@0/phy@88e5000          /soc@0/usb@a0f8800          /soc@0/usb@a0f8800/usb@a000000        5  /soc@0/usb@a0f8800/usb@a000000/ports/port@0/endpoint          5  /soc@0/usb@a0f8800/usb@a000000/ports/port@1/endpoint            /soc@0/usb@a2f8800          /soc@0/usb@a2f8800/usb@a200000        -  /soc@0/usb@a2f8800/usb@a200000/port/endpoint            /soc@0/usb@a4f8800          
/soc@0/usb@a4f8800/usb@a400000          /soc@0/usb@a6f8800           /soc@0/usb@a6f8800/usb@a600000        5  //soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  A/soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint            S/soc@0/usb@a8f8800          ]/soc@0/usb@a8f8800/usb@a800000        5  l/soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint          5  ~/soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint            /soc@0/video-codec@aa00000        %  /soc@0/video-codec@aa00000/opp-table             /soc@0/clock-controller@aaf0000       !  /soc@0/display-subsystem@ae00000          <  /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpoint         F  /soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  &/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         @  9/soc@0/display-subsystem@ae00000/displayport-controller@ae98000       V  B/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpoint         V  N/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpoint         J  [/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table         @  n/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000       V  w/soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000       V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table         \  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/aux-bus/panel/port/endpoint         /soc@0/phy@aec2a00          /soc@0/phy@aec5a00           /soc@0/clock-controller@af00000       $  /soc@0/interrupt-controller@b220000          
/soc@0/power-management@c300000         /soc@0/arbiter@c400000        $  /soc@0/arbiter@c400000/spmi@c42d000       +  "/soc@0/arbiter@c400000/spmi@c42d000/pmic@0        4  */soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300       ;  6/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey        :  A/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin         4  K/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@6100       6  W/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100         G  f/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@48        6  t/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00         I  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-en@73          J  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-end@75         L  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-delta@76       5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800          F  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800/edp-bl-pwm-state         /  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800          P  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-state       L  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-3p3-reg-en-state       ?  "/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00        /  //soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm        +  :/soc@0/arbiter@c400000/spmi@c42d000/pmic@2        :  E/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a00         5  [/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800          +  l/soc@0/arbiter@c400000/spmi@c42d000/pmic@3        :  v/soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800          E  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800/edp-bl-en-state          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800          M   /soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/rtmr0-1p15-reg-en-state          +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@6        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@6/temp-alarm@a00         5   4/soc@0/arbiter@c400000/spmi@c42d000/pmic@6/gpio@8800          +   D/soc@0/arbiter@c400000/spmi@c42d000/pmic@8        :   O/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a00         5   e/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800          +   v/soc@0/arbiter@c400000/spmi@c42d000/pmic@9        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800          L   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/rtmr0-1p8-reg-en-state       +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@c        ;   /soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400        $   /soc@0/arbiter@c400000/spmi@c432000       +   /soc@0/arbiter@c400000/spmi@c432000/pmic@7        4   /soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00       +   /soc@0/arbiter@c400000/spmi@c432000/pmic@a        4  !	/soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00       +  !"/soc@0/arbiter@c400000/spmi@c432000/pmic@b        4  !,/soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00       +  !E/soc@0/arbiter@c400000/spmi@c432000/pmic@c        4  !O/soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00         /soc@0/pinctrl@f100000        .  !h/soc@0/pinctrl@f100000/edp0-hpd-default-state         /  !y/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  "	/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  "-/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  "@/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  "S/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  "f/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  "y/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c17-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c18-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c19-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c20-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c21-data-clk-state       0  #/soc@0/pinctrl@f100000/qup-i2c22-data-clk-state       0  #$/soc@0/pinctrl@f100000/qup-i2c23-data-clk-state       )  #7/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  #C/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  #U/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  #a/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  #s/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  $	/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  $'/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  $3/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  $E/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  $Q/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  $c/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  $p/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       *  %#/soc@0/pinctrl@f100000/qup-spi16-cs-state         0  %0/soc@0/pinctrl@f100000/qup-spi16-data-clk-state       *  %C/soc@0/pinctrl@f100000/qup-spi17-cs-state         0  %P/soc@0/pinctrl@f100000/qup-spi17-data-clk-state       *  %c/soc@0/pinctrl@f100000/qup-spi18-cs-state         0  %p/soc@0/pinctrl@f100000/qup-spi18-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi19-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi19-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi20-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi20-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi21-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi21-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi22-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi22-data-clk-state       *  &/soc@0/pinctrl@f100000/qup-spi23-cs-state         0  &/soc@0/pinctrl@f100000/qup-spi23-data-clk-state       /  &#/soc@0/pinctrl@f100000/qup-uart2-default-state        0  &5/soc@0/pinctrl@f100000/qup-uart14-default-state       0  &H/soc@0/pinctrl@f100000/qup-uart21-default-state       *  &[/soc@0/pinctrl@f100000/sdc2-default-state         (  &h/soc@0/pinctrl@f100000/sdc2-sleep-state       (  &s/soc@0/pinctrl@f100000/hall-int-n-state       )  &/soc@0/pinctrl@f100000/nvme-reg-en-state          (  &/soc@0/pinctrl@f100000/edp-reg-en-state       (  &/soc@0/pinctrl@f100000/ssam-state-state       ,  &/soc@0/pinctrl@f100000/wcn-wlan-bt-en-state       +  &/soc@0/pinctrl@f100000/pcie3-default-state        ,  &/soc@0/pinctrl@f100000/pcie6a-default-state       .  &/soc@0/pinctrl@f100000/rtmr1-1p8-reg-en-state         .  &/soc@0/pinctrl@f100000/rtmr1-3p3-reg-en-state         /  &/soc@0/pinctrl@f100000/rtmr1-1p15-reg-en-state        0  '/soc@0/pinctrl@f100000/wcd-reset-n-active-state       '  '/soc@0/pinctrl@f100000/wcn-sw-en-state        .  '/soc@0/pinctrl@f100000/cam-indicator-en-state         ,  '//soc@0/stm@10002000/out-ports/port/endpoint       -  '7/soc@0/tpdm@10003000/out-ports/port/endpoint          .  'D/soc@0/tpda@10004000/in-ports/port@0/endpoint         .  'R/soc@0/tpda@10004000/in-ports/port@1/endpoint         -  '`/soc@0/tpda@10004000/out-ports/port/endpoint          -  'n/soc@0/tpdm@1000f000/out-ports/port/endpoint          0  '|/soc@0/funnel@10041000/in-ports/port@6/endpoint       0  '/soc@0/funnel@10041000/in-ports/port@7/endpoint       /  '/soc@0/funnel@10041000/out-ports/port/endpoint        0  '/soc@0/funnel@10042000/in-ports/port@2/endpoint       0  '/soc@0/funnel@10042000/in-ports/port@5/endpoint       0  '/soc@0/funnel@10042000/in-ports/port@6/endpoint       /  '/soc@0/funnel@10042000/out-ports/port/endpoint        0  '/soc@0/funnel@10045000/in-ports/port@0/endpoint       0  '/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  '/soc@0/funnel@10045000/out-ports/port/endpoint        -  ( /soc@0/tpdm@10800000/out-ports/port/endpoint          -  (/soc@0/tpdm@1082c000/out-ports/port/endpoint          -  (/soc@0/tpdm@10841000/out-ports/port/endpoint          -  ((/soc@0/tpdm@10844000/out-ports/port/endpoint          .  (:/soc@0/funnel@10846000/in-ports/port/endpoint         /  (N/soc@0/funnel@10846000/out-ports/port/endpoint        -  (b/soc@0/tpdm@109d0000/out-ports/port/endpoint          -  (n/soc@0/tpdm@10ac0000/out-ports/port/endpoint          -  (}/soc@0/tpdm@10ac1000/out-ports/port/endpoint          .  (/soc@0/tpda@10ac4000/in-ports/port@8/endpoint         .  (/soc@0/tpda@10ac4000/in-ports/port@9/endpoint         -  (/soc@0/tpda@10ac4000/out-ports/port/endpoint          .  (/soc@0/funnel@10ac5000/in-ports/port/endpoint         /  (/soc@0/funnel@10ac5000/out-ports/port/endpoint        0  (/soc@0/funnel@10b04000/in-ports/port@3/endpoint       0  (/soc@0/funnel@10b04000/in-ports/port@6/endpoint       0  (/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  )/soc@0/funnel@10b04000/out-ports/port/endpoint          )/soc@0/tmc@10b05000       +  )/soc@0/tmc@10b05000/in-ports/port/endpoint        ,  )#/soc@0/tmc@10b05000/out-ports/port/endpoint       2  ),/soc@0/replicator@10b06000/in-ports/port/endpoint         3  )8/soc@0/replicator@10b06000/out-ports/port/endpoint        .  )F/soc@0/tpda@10b08000/in-ports/port@0/endpoint         .  )T/soc@0/tpda@10b08000/in-ports/port@1/endpoint         .  )b/soc@0/tpda@10b08000/in-ports/port@2/endpoint         .  )p/soc@0/tpda@10b08000/in-ports/port@3/endpoint         .  )~/soc@0/tpda@10b08000/in-ports/port@4/endpoint         -  )/soc@0/tpda@10b08000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b09000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0a000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0b000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0c000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0d000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b20000/out-ports/port/endpoint          ,  )/soc@0/tpda@10b23000/in-ports/port/endpoint       -  */soc@0/tpda@10b23000/out-ports/port/endpoint          .  */soc@0/funnel@10b24000/in-ports/port/endpoint         /  *(/soc@0/funnel@10b24000/out-ports/port/endpoint        -  *;/soc@0/tpdm@10c08000/out-ports/port/endpoint          0  *G/soc@0/funnel@10c0b000/in-ports/port@4/endpoint       /  *U/soc@0/funnel@10c0b000/out-ports/port/endpoint        -  *c/soc@0/tpdm@10c28000/out-ports/port/endpoint          -  *r/soc@0/tpdm@10c29000/out-ports/port/endpoint          .  */soc@0/tpda@10c2b000/in-ports/port@4/endpoint         /  */soc@0/tpda@10c2b000/in-ports/port@13/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@14/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@15/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@1a/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@1b/endpoint        -  */soc@0/tpda@10c2b000/out-ports/port/endpoint          0  */soc@0/funnel@10c2c000/in-ports/port@0/endpoint       0  */soc@0/funnel@10c2c000/in-ports/port@4/endpoint       0  +/soc@0/funnel@10c2c000/in-ports/port@5/endpoint       /  +!/soc@0/funnel@10c2c000/out-ports/port/endpoint        -  +2/soc@0/tpdm@10c38000/out-ports/port/endpoint          -  +B/soc@0/tpdm@10c39000/out-ports/port/endpoint          .  +R/soc@0/tpda@10c3c000/in-ports/port@4/endpoint         .  +a/soc@0/tpda@10c3c000/in-ports/port@f/endpoint         /  +q/soc@0/tpda@10c3c000/in-ports/port@10/endpoint        /  +/soc@0/tpda@10c3c000/in-ports/port@11/endpoint        -  +/soc@0/tpda@10c3c000/out-ports/port/endpoint          .  +/soc@0/funnel@10c3d000/in-ports/port/endpoint         /  +/soc@0/funnel@10c3d000/out-ports/port/endpoint        -  +/soc@0/tpdm@10cc1000/out-ports/port/endpoint          .  +/soc@0/tpda@10cc4000/in-ports/port@2/endpoint         -  +/soc@0/tpda@10cc4000/out-ports/port/endpoint          .  +/soc@0/funnel@10cc5000/in-ports/port/endpoint         /  ,/soc@0/funnel@10cc5000/out-ports/port/endpoint        0  ,/soc@0/funnel@10d04000/in-ports/port@6/endpoint       /  ,"/soc@0/funnel@10d04000/out-ports/port/endpoint        -  ,2/soc@0/tpdm@10d08000/out-ports/port/endpoint          -  ,A/soc@0/tpdm@10d09000/out-ports/port/endpoint          -  ,P/soc@0/tpdm@10d0a000/out-ports/port/endpoint          -  ,_/soc@0/tpdm@10d0b000/out-ports/port/endpoint          -  ,n/soc@0/tpdm@10d0c000/out-ports/port/endpoint          -  ,}/soc@0/tpdm@10d0d000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0e000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0f000/out-ports/port/endpoint          .  ,/soc@0/tpda@10d12000/in-ports/port@0/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@1/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@2/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@3/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@4/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@5/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@6/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@7/endpoint         -  -/soc@0/tpda@10d12000/out-ports/port/endpoint          .  -(/soc@0/funnel@10d13000/in-ports/port/endpoint         /  -8/soc@0/funnel@10d13000/out-ports/port/endpoint          -H/soc@0/iommu@15000000           -R/soc@0/iommu@15400000         %  -\/soc@0/interrupt-controller@17000000          =  -a/soc@0/interrupt-controller@17000000/msi-controller@17040000            -i/soc@0/mailbox@17430000         -t/soc@0/rsc@17500000         -}/soc@0/rsc@17500000/bcm-voter         %  -/soc@0/rsc@17500000/clock-controller          %  -/soc@0/rsc@17500000/power-controller          /  -/soc@0/rsc@17500000/power-controller/opp-table        6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-16         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-48         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-52         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-56         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-60         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-64         6  ."/soc@0/rsc@17500000/power-controller/opp-table/opp-80         7  .8/soc@0/rsc@17500000/power-controller/opp-table/opp-128        7  .G/soc@0/rsc@17500000/power-controller/opp-table/opp-144        7  .Y/soc@0/rsc@17500000/power-controller/opp-table/opp-192        7  .k/soc@0/rsc@17500000/power-controller/opp-table/opp-256        7  .z/soc@0/rsc@17500000/power-controller/opp-table/opp-320        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-336        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-384        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-416        &  ./soc@0/rsc@17500000/regulators-0/bob1         &  ./soc@0/rsc@17500000/regulators-0/bob2         &  ./soc@0/rsc@17500000/regulators-0/ldo1         &  ./soc@0/rsc@17500000/regulators-0/ldo2         &  ./soc@0/rsc@17500000/regulators-0/ldo4         &  ./soc@0/rsc@17500000/regulators-0/ldo5         &  ./soc@0/rsc@17500000/regulators-0/ldo6         &  //soc@0/rsc@17500000/regulators-0/ldo7         &  //soc@0/rsc@17500000/regulators-0/ldo8         &  //soc@0/rsc@17500000/regulators-0/ldo9         '  //soc@0/rsc@17500000/regulators-0/ldo10        '  /)/soc@0/rsc@17500000/regulators-0/ldo12        '  /3/soc@0/rsc@17500000/regulators-0/ldo13        '  /=/soc@0/rsc@17500000/regulators-0/ldo14        '  /G/soc@0/rsc@17500000/regulators-0/ldo15        '  /Q/soc@0/rsc@17500000/regulators-0/ldo16        '  /[/soc@0/rsc@17500000/regulators-0/ldo17        '  /e/soc@0/rsc@17500000/regulators-1/smps4        &  /n/soc@0/rsc@17500000/regulators-1/ldo1         &  /w/soc@0/rsc@17500000/regulators-1/ldo2         &  //soc@0/rsc@17500000/regulators-1/ldo3         &  //soc@0/rsc@17500000/regulators-2/ldo1         &  //soc@0/rsc@17500000/regulators-2/ldo2         &  //soc@0/rsc@17500000/regulators-2/ldo3         &  //soc@0/rsc@17500000/regulators-3/ldo2         &  //soc@0/rsc@17500000/regulators-3/ldo3         '  //soc@0/rsc@17500000/regulators-4/smps1        &  //soc@0/rsc@17500000/regulators-4/ldo1         &  //soc@0/rsc@17500000/regulators-4/ldo2         &  //soc@0/rsc@17500000/regulators-4/ldo3         '  //soc@0/rsc@17500000/regulators-6/smps1        '  //soc@0/rsc@17500000/regulators-6/smps2        &  //soc@0/rsc@17500000/regulators-6/ldo1         &  //soc@0/rsc@17500000/regulators-6/ldo2         &  //soc@0/rsc@17500000/regulators-6/ldo3         '  0/soc@0/rsc@17500000/regulators-7/smps5        &  0/soc@0/rsc@17500000/regulators-7/ldo1         &  0/soc@0/rsc@17500000/regulators-7/ldo2         &  0"/soc@0/rsc@17500000/regulators-7/ldo3           0+/soc@0/sram@18b4e000          (  00/soc@0/sram@18b4e000/scp-sram-section@0       *  0>/soc@0/sram@18b4e000/scp-sram-section@200           0L/soc@0/watchdog@1c840000            0Z/soc@0/efuse@221c8000         (  0a/soc@0/efuse@221c8000/gpu-speed-bin@119         0o/soc@0/pmu@24091000/opp-table           0/soc@0/pmu@240b3400         0/soc@0/pmu@240b5400         0/soc@0/pmu@240b5400/opp-table           0/soc@0/remoteproc@32300000          0/thermal-zones        1  0/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  0/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  0/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  0/thermal-zones/gpuss-3-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-4-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-5-thermal/trips/trip-point0          1  1(/thermal-zones/gpuss-6-thermal/trips/trip-point0          1  16/thermal-zones/gpuss-7-thermal/trips/trip-point0          !  1D/thermal-zones/pmc8380-6-thermal            1V/audio-codec            
/backlight        .  1^/pmic-glink/connector@0/ports/port@0/endpoint         .  1s/pmic-glink/connector@0/ports/port@1/endpoint         .  1/pmic-glink/connector@0/ports/port@2/endpoint         .  1/pmic-glink/connector@1/ports/port@0/endpoint         .  1/pmic-glink/connector@1/ports/port@1/endpoint         .  1/pmic-glink/connector@1/ports/port@2/endpoint           1/regulator-edp-3p3          1/regulator-rtmr0-1p15           2/regulator-rtmr0-1p8            2/regulator-rtmr0-3p3            2!/regulator-rtmr1-1p15           21/regulator-rtmr1-1p8            2@/regulator-rtmr1-3p3            2O/regulator-nvme         2Y/regulator-vph-pwr          2a/regulator-wcn-0p95         2o/regulator-wcn-1p9          2|/regulator-wcn-3p3          2/wcn7850-pmu/regulators/ldo0            2/wcn7850-pmu/regulators/ldo1            2/wcn7850-pmu/regulators/ldo2            2/wcn7850-pmu/regulators/ldo3            2/wcn7850-pmu/regulators/ldo4            2/wcn7850-pmu/regulators/ldo5            2/wcn7850-pmu/regulators/ldo6            3/wcn7850-pmu/regulators/ldo7            3/wcn7850-pmu/regulators/ldo8            3*/wcn7850-pmu/regulators/ldo9             	interrupt-parent #address-cells #size-cells model compatible clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us remote-endpoint interconnects qcom,dload-mode mboxes mbox-names shmem #power-domain-cells #interconnect-cells qcom,bcm-voters interrupts domain-idle-states ranges no-map hwlocks size reusable linux,cma-default opp-hz required-opps interrupts-extended qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names operating-points-v2 max-speed vddaon-supply vddwlcx-supply vddwlmx-supply vddrfacmn-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply current-speed reset-gpios vdd-supply vdd33-supply vdd33-cap-supply vddar-supply vddat-supply vddio-supply retimer-switch orientation-switch vdd3v3-supply vdd1v8-supply #phy-cells interrupt-names #qcom,sensors #thermal-sensor-cells resets vdda12-supply phys reset-names mode-switch vdda-phy-supply vdda-pll-supply reg-names bus-range dma-coherent linux,pci-domain num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates phy-names eq-presets-8gts eq-presets-16gts perst-gpios wake-gpios max-link-speed opp-peak-kBps opp-level clock-output-names msi-map vddpe-3v3-supply qcom,4ln-config-sel vddpcie0p9-supply vddpcie1p8-supply #hwlock-cells qcom,gmu #cooling-cells nvmem-cells nvmem-cell-names memory-region firmware-name qcom,opp-acd-level opp-supported-hw qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain sound-name-prefix qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping qcom,dmic-sample-rate vdd-micb-supply gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width wakeup-source snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,usb3_lpm_capable snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk qcom,select-utmi-as-pipe-clk maximum-speed dr_mode assigned-clock-parents data-lanes link-frequencies backlight power-supply qcom,pdc-ranges qcom,ee qcom,channel linux,code qcom,no-alarm qcom,uefi-rtc-info bits #pwm-cells power-source input-disable output-enable vdd18-supply vdd3-supply wakeup-parent gpio-reserved-ranges bias-pull-up qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num #redistributor-regions redistributor-stride msi-controller #msi-cells qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-always-on vdd-l1-supply vdd-l2-supply vdd-l3-supply vdd-s4-supply vdd-s1-supply vdd-s2-supply vdd-s5-supply frame-number thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device serial0 i2c0 i2c3 i2c4 i2c5 i2c7 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply pwms enable-gpios linux,input-type wakeup-event-action color linux,default-trigger default-state panic-indicator orientation-gpios power-role data-role gpio enable-active-high regulator-boot-on vin-supply audio-routing link-name sound-dai vdddig-supply wlan-enable-gpios bt-enable-gpios xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 cpu1 cpu2 cpu3 cpu4 l2_1 cpu5 cpu6 cpu7 cpu8 l2_2 cpu9 cpu10 cpu11 cpu_map_cluster2 cluster_c4 cluster_cl4 cluster_cl5 eud_in scm scmi_dvfs clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cpu_pd8 cpu_pd9 cpu_pd10 cpu_pd11 cluster_pd0 cluster_pd1 cluster_pd2 system_pd gunyah_hyp_mem hyp_elf_package_mem ncc_mem cpucp_log_mem cpucp_mem tags_mem xbl_dtlog_mem xbl_ramdump_mem aop_image_mem aop_cmd_db_mem aop_config_mem tme_crash_dump_mem tme_log_mem uefi_log_mem secdata_apss_mem pdp_ns_shared_mem gpu_prr_mem tpm_control_mem usb_ucsi_shared_mem pld_pep_mem pld_gmu_mem pld_pdp_mem tz_stat_mem xbl_tmp_buffer_mem adsp_rpc_remote_heap_mem spu_secure_shared_memory_mem adsp_boot_dtb_mem spss_region_mem adsp_boot_mem video_mem adspslpi_mem q6_adsp_dtb_mem cdsp_mem q6_cdsp_dtb_mem gpu_microcode_mem cvp_mem camera_mem av1_encoder_mem wpss_mem q6_wpss_dtb_mem xbl_sc_mem qtee_mem ta_mem tags_mem1 llcc_lpi_mem smem_mem qup_opp_table_100mhz qup_opp_table_120mhz smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in soc gcc ipcc gpi_dma2 qupv3_2 i2c16 spi16 i2c17 spi17 i2c18 spi18 i2c19 spi19 i2c20 spi20 i2c21 spi21 uart21 i2c22 spi22 i2c23 spi23 gpi_dma1 qupv3_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 i2c14 spi14 uart14 i2c15 spi15 gpi_dma0 qupv3_0 spi0 i2c1 spi1 i2c2 uart2 spi2 retimer_ss0_ss_out retimer_ss0_ss_in retimer_ss0_con_sbu_out spi3 spi4 ptn3222 spi5 i2c6 spi6 retimer_ss1_ss_out retimer_ss1_ss_in retimer_ss1_con_sbu_out spi7 tsens0 tsens1 tsens2 tsens3 usb_1_ss0_hsphy usb_1_ss0_qmpphy usb_1_ss0_qmpphy_out usb_1_ss0_qmpphy_usb_ss_in usb_1_ss0_qmpphy_dp_in usb_1_ss1_hsphy usb_1_ss1_qmpphy usb_1_ss1_qmpphy_out usb_1_ss1_qmpphy_usb_ss_in usb_1_ss1_qmpphy_dp_in usb_1_ss2_hsphy usb_1_ss2_qmpphy usb_1_ss2_qmpphy_out usb_1_ss2_qmpphy_usb_ss_in usb_1_ss2_qmpphy_dp_in cnoc_main config_noc system_noc pcie_south_anoc pcie_center_anoc aggre1_noc aggre2_noc pcie_north_anoc usb_center_anoc usb_north_anoc usb_south_anoc mmss_noc pcie3 pcie3_opp_table pcie3_port pcie3_phy pcie6a pcie6a_phy pcie5 pcie5_phy pcie4 pcie4_port0 pcie4_phy tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu gem_noc nsp_noc remoteproc_adsp q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 left_spkr right_spkr lpass_audiocc swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_01_sd_n_active lpasscc lpass_ag_noc lpass_lpiaon_noc lpass_lpicx_noc sdhc_2 sdhc2_opp_table sdhc_4 sdhc4_opp_table usb_2_hsphy usb_mp_hsphy0 usb_mp_hsphy1 usb_mp_qmpphy0 usb_mp_qmpphy1 usb_1_ss2 usb_1_ss2_dwc3 usb_1_ss2_dwc3_hs usb_1_ss2_dwc3_ss usb_2 usb_2_dwc3 usb_2_dwc3_hs usb_mp usb_mp_dwc3 usb_1_ss0 usb_1_ss0_dwc3 usb_1_ss0_dwc3_hs usb_1_ss0_dwc3_ss usb_1_ss1 usb_1_ss1_dwc3 usb_1_ss1_dwc3_hs usb_1_ss1_dwc3_ss iris iris_opp_table videocc mdss mdss_mdp mdss_intf0_out mdss_intf4_out mdss_intf5_out mdss_intf6_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dp0_opp_table mdss_dp1 mdss_dp1_in mdss_dp1_out mdss_dp1_opp_table mdss_dp2 mdss_dp2_in mdss_dp2_out mdss_dp2_opp_table mdss_dp3 mdss_dp3_in mdss_dp3_out mdss_dp3_opp_table edp_panel_in mdss_dp2_phy mdss_dp3_phy dispcc pdc aoss_qmp spmi spmi_bus0 pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_sdam_15 charge_limit_en charge_limit_end charge_limit_delta pmk8550_gpios edp_bl_pwm pmk8550_pwm pm8550 pm8550_temp_alarm pm8550_gpios rtmr0_default rtmr0_3p3_reg_en pm8550_flash pm8550_pwm pm8550ve_2 pm8550ve_2_temp_alarm pm8550ve_2_gpios pmc8380_3 pmc8380_3_temp_alarm pmc8380_3_gpios edp_bl_en pmc8380_4 pmc8380_4_temp_alarm pmc8380_4_gpios pmc8380_5 pmc8380_5_temp_alarm pmc8380_5_gpios rtmr0_1p15_reg_en pmc8380_6 pmc8380_6_temp_alarm pmc8380_6_gpios pm8550ve_8 pm8550ve_8_temp_alarm pm8550ve_8_gpios pm8550ve_9 pm8550ve_9_temp_alarm pm8550ve_9_gpios rtmr0_1p8_reg_en pm8010 pm8010_temp_alarm spmi_bus1 smb2360_0 smb2360_0_eusb2_repeater smb2360_1 smb2360_1_eusb2_repeater smb2360_2 smb2360_2_eusb2_repeater smb2360_3 smb2360_3_eusb2_repeater edp0_hpd_default qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_i2c15_data_clk qup_i2c16_data_clk qup_i2c17_data_clk qup_i2c18_data_clk qup_i2c19_data_clk qup_i2c20_data_clk qup_i2c21_data_clk qup_i2c22_data_clk qup_i2c23_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_spi15_cs qup_spi15_data_clk qup_spi16_cs qup_spi16_data_clk qup_spi17_cs qup_spi17_data_clk qup_spi18_cs qup_spi18_data_clk qup_spi19_cs qup_spi19_data_clk qup_spi20_cs qup_spi20_data_clk qup_spi21_cs qup_spi21_data_clk qup_spi22_cs qup_spi22_data_clk qup_spi23_cs qup_spi23_data_clk qup_uart2_default qup_uart14_default qup_uart21_default sdc2_default sdc2_sleep hall_int_n_default nvme_reg_en edp_reg_en ssam_state wcn_wlan_bt_en pcie3_default pcie6a_default rtmr1_1p8_reg_en rtmr1_3p3_reg_en rtmr1_1p15_reg_en wcd_default wcn_sw_en cam_indicator_en stm_out dcc_tpdm_out qdss_tpda_in0 qdss_tpda_in1 qdss_tpda_out qdss_tpdm_out funnel0_in6 funnel0_in7 funnel0_out funnel1_in2 funnel1_in5 funnel1_in6 funnel1_out qdss_funnel_in0 qdss_funnel_in1 qdss_funnel_out mxa_tpdm_out gcc_tpdm_out prng_tpdm_out lpass_cx_tpdm_out lpass_cx_funnel_in0 lpass_cx_funnel_out qm_tpdm_out dlst_tpdm0_out dlst_tpdm1_out dlst_tpda_in8 dlst_tpda_in9 dlst_tpda_out dlst_funnel_in0 dlst_funnel_out aoss_funnel_in3 aoss_funnel_in6 aoss_funnel_in7 aoss_funnel_out etf0 etf0_in etf0_out swao_rep_in swao_rep_out1 aoss_tpda_in0 aoss_tpda_in1 aoss_tpda_in2 aoss_tpda_in3 aoss_tpda_in4 aoss_tpda_out aoss_tpdm0_out aoss_tpdm1_out aoss_tpdm2_out aoss_tpdm3_out aoss_tpdm4_out lpicc_tpdm_out ddr_lpi_tpda_in ddr_lpi_tpda_out ddr_lpi_funnel_in0 ddr_lpi_funnel_out mm_tpdm_out mm_funnel_in4 mm_funnel_out dlct1_tpdm_out ipcc_tpdm_out dlct1_tpda_in4 dlct1_tpda_in19 dlct1_tpda_in20 dlct1_tpda_in21 dlct1_tpda_in26 dlct1_tpda_in27 dlct1_tpda_out dlct1_funnel_in0 dlct1_funnel_in4 dlct1_funnel_in5 dlct1_funnel_out dlct2_tpdm0_out dlct2_tpdm1_out dlct2_tpda_in4 dlct2_tpda_in15 dlct2_tpda_in16 dlct2_tpda_in17 dlct2_tpda_out dlct2_funnel_in0 dlct2_funnel_out tmess_tpdm1_out tmess_tpda_in2 tmess_tpda_out tmess_funnel_in0 tmess_funnel_out ddr_funnel0_in6 ddr_funnel0_out llcc0_tpdm_out llcc1_tpdm_out llcc2_tpdm_out llcc3_tpdm_out llcc4_tpdm_out llcc5_tpdm_out llcc6_tpdm_out llcc7_tpdm_out llcc_tpda_in0 llcc_tpda_in1 llcc_tpda_in2 llcc_tpda_in3 llcc_tpda_in4 llcc_tpda_in5 llcc_tpda_in6 llcc_tpda_in7 llcc_tpda_out ddr_funnel1_in0 ddr_funnel1_out apps_smmu pcie_smmu intc gic_its cpucp_mbox apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b vreg_l2b vreg_l4b vreg_l5b vreg_l6b vreg_l7b vreg_l8b vreg_l9b vreg_l10b vreg_l12b vreg_l13b vreg_l14b vreg_l15b vreg_l16b vreg_l17b vreg_s4c vreg_l1c vreg_l2c vreg_l3c vreg_l1d vreg_l2d vreg_l3d vreg_l2e vreg_l3e vreg_s1f vreg_l1f vreg_l2f vreg_l3f vreg_s1i vreg_s2i vreg_l1i vreg_l2i vreg_l3i vreg_s5j vreg_l1j vreg_l2j vreg_l3j sram cpu_scp_lpri0 cpu_scp_lpri1 sbsa_watchdog qfprom gpu_speed_bin llcc_bwmon_opp_table bwmon_cluster0 bwmon_cluster2 cpu_bwmon_opp_table remoteproc_cdsp thermal_zones gpuss0_alert0 gpuss1_alert0 gpuss2_alert0 gpuss3_alert0 gpuss4_alert0 gpuss5_alert0 gpuss6_alert0 gpuss7_alert0 pmc8380_6_thermal wcd938x pmic_glink_ss0_hs_in pmic_glink_ss0_ss_in pmic_glink_ss0_con_sbu_in pmic_glink_ss1_hs_in pmic_glink_ss1_ss_in pmic_glink_ss1_con_sbu_in vreg_edp_3p3 vreg_rtmr0_1p15 vreg_rtmr0_1p8 vreg_rtmr0_3p3 vreg_rtmr1_1p15 vreg_rtmr1_1p8 vreg_rtmr1_3p3 vreg_nvme vph_pwr vreg_wcn_0p95 vreg_wcn_1p9 vreg_wcn_3p3 vreg_pmu_rfa_cmn vreg_pmu_aon_0p59 vreg_pmu_wlcx_0p8 vreg_pmu_wlmx_0p85 vreg_pmu_btcmx_0p85 vreg_pmu_rfa_0p8 vreg_pmu_rfa_1p2 vreg_pmu_rfa_1p8 vreg_pmu_pcie_0p9 vreg_pmu_pcie_1p8 