 2   8    (            4b `                                                                      ,laptop           9Dell Latitude 7455        !   ?dell,latitude-7455 qcom,x1e80100       chosen        clocks     xo-board             ?fixed-clock          J          Z             g        sleep-clk            ?fixed-clock          J           Z             g   3      bi-tcxo-div2-clk             ?fixed-factor-clock           Z             o                v                        g   2      bi-tcxo-ao-div2-clk          ?fixed-factor-clock           Z             o               v                        g  (         cpus                                 cpu@0            cpu          ?qcom,oryon                            psci                                         
   psci perf            g      l2-cache             ?cache                                  g            cpu@100          cpu          ?qcom,oryon                           psci                                         
   psci perf            g         cpu@200          cpu          ?qcom,oryon                           psci                                         
   psci perf            g         cpu@300          cpu          ?qcom,oryon                           psci                                         
   psci perf            g         cpu@10000            cpu          ?qcom,oryon                           psci                	            
            
   psci perf            g      l2-cache             ?cache                                  g   	         cpu@10100            cpu          ?qcom,oryon                          psci                	                        
   psci perf            g         cpu@10200            cpu          ?qcom,oryon                          psci                	                        
   psci perf            g         cpu@10300            cpu          ?qcom,oryon                          psci                	                        
   psci perf            g         cpu@20000            cpu          ?qcom,oryon                           psci                                        
   psci perf            g      l2-cache             ?cache                                  g            cpu@20100            cpu          ?qcom,oryon                          psci                                        
   psci perf            g         cpu@20200            cpu          ?qcom,oryon                          psci                                        
   psci perf            g         cpu@20300            cpu          ?qcom,oryon                          psci                                        
   psci perf            g         cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3                        cluster2             g     core0                     core1                     core2                     core3                           idle-states          psci       cpu-sleep-0          ?arm,idle-state          ret                    -           >  @        N  X         g   (         domain-idle-states     cluster-sleep-0          ?domain-idle-state             D        -  ^        >          N  	         g   +      cluster-sleep-1          ?domain-idle-state             T        -          >          N  X         g   ,            dummy-sink           ?arm,coresight-dummy-sink       in-ports       port       endpoint            _            g  Y               firmware       scm          ?qcom,scm-x1e80100 qcom,scm          o             !              }   "           g        scmi          	   ?arm,scmi               #       #           tx rx              $   %                             protocol@13                                 g               interconnect-0           ?qcom,x1e80100-clk-virt                        &         g   >      interconnect-1           ?qcom,x1e80100-mc-virt                         &         g   !      memory@80000000          memory                                pmu          ?arm,armv8-pmuv3                        psci             ?arm,psci-1.0             smc    power-domain-cpu0                           '           (         g         power-domain-cpu1                           '           (         g         power-domain-cpu2                           '           (         g         power-domain-cpu3                           '           (         g         power-domain-cpu4                           )           (         g   
      power-domain-cpu5                           )           (         g         power-domain-cpu6                           )           (         g         power-domain-cpu7                           )           (         g         power-domain-cpu8                           *           (         g         power-domain-cpu9                           *           (         g         power-domain-cpu10                          *           (         g         power-domain-cpu11                          *           (         g         power-domain-cpu-cluster0                          +   ,            -         g   '      power-domain-cpu-cluster1                          +   ,            -         g   )      power-domain-cpu-cluster2                          +   ,            -         g   *      power-domain-system                      g   -         reserved-memory                                      gunyah-hyp@80000000                                          g        hyp-elf-package@80800000                                             g        ncc@80a00000                        @                    g        cpucp-log@80e00000                                          g        cpucp@80e40000                      T                    g        reserved-region@81380000                 8                        tags-region@81400000                 @                           g        xbl-dtlog@81a00000                                          g        xbl-ramdump@81a40000                                            g        aop-image@81c00000                                          g        aop-cmd-db@81c60000          ?qcom,cmd-db                                         g        aop-config@81c80000                                         g        tme-crash-dump@81ca0000                                         g        tme-log@81ce0000                         @                   g        uefi-log@81ce4000                @                          g        secdata-apss@81cff000                                          g        pdp-ns-shared@81e00000                                          g        gpu-prr@81f00000                                            g        tpm-control@81f10000                                            g        usb-ucsi-shared@81f20000                                            g        pld-pep@81f30000                         `                   g        pld-gmu@81f36000                 `                          g        pld-pdp@81f37000                 p                          g        tz-stat@82700000                 p                           g        xbl-tmp-buffer@82800000                                         g        adsp-rpc-remote-heap@84b00000                                           g         spu-secure-shared-memory@85300000                0                           g        adsp-boot-dtb@866c0000               l                           g        spss-region@86700000                 p       @                    g        adsp-boot@86b00000                                          g        video@87700000               p       p                    g        adspslpi@87e00000                                          g         q6-adsp-dtb@8b800000                                            g         cdsp@8b900000                                           g        q6-cdsp-dtb@8d900000                                            g        gpu-microcode@8d9fe000                                          g         cvp@8da00000                        p                    g        camera@8e100000                                         g        av1-encoder@8e900000                        p                    g        reserved-region@8f000000                                          wpss@8fa00000                                          g        q6-wpss-dtb@91300000                 0                           g  	      xbl-sc@d8000000                                          g  
      reserved-region@d8040000                        
                 qtee@d80e0000                       R                    g        ta@d8600000              `                          g        tags@e1000000                       j                    g        llcc-lpi@ff800000                       `                    g        smem@ffe00000         
   ?qcom,smem                                  	   .                     g        linux,cma            ?shared-dma-pool                                           opp-table-qup100mhz          ?operating-points-v2          g   J   opp-75000000            1    xh        8   /      opp-100000000           1             8   0         opp-table-qup120mhz          ?operating-points-v2          g   C   opp-75000000            1    xh        8   /      opp-120000000           1    '         8   0         smp2p-adsp           ?qcom,smp2p          F   1                    1              Z            d            s      master-kernel           master-kernel                       g         slave-kernel            slave-kernel                                 g            smp2p-cdsp           ?qcom,smp2p          F   1                    1              Z   ^          d            s      master-kernel           master-kernel                       g        slave-kernel            slave-kernel                                 g           soc@0            ?simple-bus                                                                                                  g     clock-controller@100000          ?qcom,x1e80100-gcc                                    o   2   3   4   5   6   7       8       9       :                                                                                                                            ;             Z                                  g   =      mailbox@408000           ?qcom,x1e80100-ipcc qcom,ipcc                  @                                                                  g   1      dma-controller@800000         *   ?qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                    >                      <  6          	  $disabled             g   A      geniqup@8c0000           ?qcom,geni-se-qup                                     o   =      =           +m-ahb s-ahb            <  #                                              $okay             g     i2c@880000           ?qcom,geni-i2c                         @               (            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A              A                  Otx rx           Y   B        cdefault                                 	  $disabled             g        spi@880000           ?qcom,geni-spi                         @               (            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   C         J   A              A                  Otx rx           Y   D   E        cdefault                                 	  $disabled             g        i2c@884000           ?qcom,geni-i2c                 @       @               )            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A             A                 Otx rx           Y   F        cdefault                                 	  $disabled             g        spi@884000           ?qcom,geni-spi                 @       @               )            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   C         J   A             A                 Otx rx           Y   G   H        cdefault                                 	  $disabled             g        i2c@888000           ?qcom,geni-i2c                        @               *            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A             A                 Otx rx           Y   I        cdefault                                 	  $disabled             g        spi@888000           ?qcom,geni-spi                        @               *            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   J         J   A             A                 Otx rx           Y   K   L        cdefault                                 	  $disabled             g        i2c@88c000           ?qcom,geni-i2c                        @               +            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A             A                 Otx rx           Y   M        cdefault                                 	  $disabled             g        spi@88c000           ?qcom,geni-spi                        @               +            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   J         J   A             A                 Otx rx           Y   N   O        cdefault                                 	  $disabled             g        i2c@890000           ?qcom,geni-i2c                         @               ,            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A             A                 Otx rx           Y   P        cdefault                                   $okay             J          g        spi@890000           ?qcom,geni-spi                         @               ,            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   J         J   A             A                 Otx rx           Y   Q   R        cdefault                                 	  $disabled             g        i2c@894000           ?qcom,geni-i2c                 @       @               -            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A             A                 Otx rx           Y   S        cdefault                                 	  $disabled             g        spi@894000           ?qcom,geni-spi                 @       @               -            o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   J         J   A             A                 Otx rx           Y   T   U        cdefault                                 	  $disabled             g        serial@894000            ?qcom,geni-uart                @       @               -            o   =           +se        0  o   >         >         ?         @              7qup-core qup-config             ;            q   J        Y   V        cdefault       	  $disabled             g        i2c@898000           ?qcom,geni-i2c                        @                           o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A             A                 Otx rx           Y   W        cdefault                                 	  $disabled             g        spi@898000           ?qcom,geni-spi                        @                           o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   J         J   A             A                 Otx rx           Y   X   Y        cdefault                                 	  $disabled             g         i2c@89c000           ?qcom,geni-i2c                        @                           o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            8   /         J   A             A                 Otx rx           Y   Z        cdefault                                 	  $disabled             g  !      spi@89c000           ?qcom,geni-spi                        @                           o   =           +se        H  o   >         >         ?         @                   !              7qup-core qup-config qup-memory              ;            q   J         J   A             A                 Otx rx           Y   [   \        cdefault                                 	  $disabled             g  "         dma-controller@a00000         *   ?qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                 	         
                                                                                                          >                      <  6          	  $disabled             g   ^      geniqup@ac0000           ?qcom,geni-se-qup                                     o   =      =           +m-ahb s-ahb            <  #                                              $okay             g  #   i2c@a80000           ?qcom,geni-i2c                         @                            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^              ^                  Otx rx           Y   _        cdefault                                   $okay             J          g  $   touchscreen@9            ?hid-over-i2c                	                   F   `   3           Y   a        cdefault          spi@a80000           ?qcom,geni-spi                         @                            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   C         J   ^              ^                  Otx rx           Y   b   c        cdefault                                 	  $disabled             g  %      i2c@a84000           ?qcom,geni-i2c                 @       @               !            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^             ^                 Otx rx           Y   d        cdefault                                 	  $disabled             g  &      spi@a84000           ?qcom,geni-spi                 @       @               !            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   C         J   ^             ^                 Otx rx           Y   e   f        cdefault                                 	  $disabled             g  '      i2c@a88000           ?qcom,geni-i2c                        @               "            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^             ^                 Otx rx           Y   g        cdefault                                 	  $disabled             g  (      spi@a88000           ?qcom,geni-spi                        @               "            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   J         J   ^             ^                 Otx rx           Y   h   i        cdefault                                 	  $disabled             g  )      i2c@a8c000           ?qcom,geni-i2c                        @               #            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^             ^                 Otx rx           Y   j        cdefault                                 	  $disabled             g  *      spi@a8c000           ?qcom,geni-spi                        @               #            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   J         J   ^             ^                 Otx rx           Y   k   l        cdefault                                 	  $disabled             g  +      i2c@a90000           ?qcom,geni-i2c                         @               $            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^             ^                 Otx rx           Y   m        cdefault                                 	  $disabled             g  ,      spi@a90000           ?qcom,geni-spi                         @               $            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   J         J   ^             ^                 Otx rx           Y   n   o        cdefault                                 	  $disabled             g  -      i2c@a94000           ?qcom,geni-i2c                 @       @               %            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^             ^                 Otx rx           Y   p        cdefault                                 	  $disabled             g  .      spi@a94000           ?qcom,geni-spi                 @       @               %            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   J         J   ^             ^                 Otx rx           Y   q   r        cdefault                                 	  $disabled             g  /      i2c@a98000           ?qcom,geni-i2c                        @               &            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^             ^                 Otx rx           Y   s        cdefault                                 	  $disabled             g  0      spi@a98000           ?qcom,geni-spi                        @               &            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   J         J   ^             ^                 Otx rx           Y   t   u        cdefault                                 	  $disabled             g  1      serial@a98000            ?qcom,geni-uart                       @               &            o   =           +se        0  o   >         >         ?         @              7qup-core qup-config             ;            q   J        Y   v        cdefault         $okay             g  2   bluetooth            ?qcom,wcn7850-bt          0            w           x           y           z           {           |           }         i2c@a9c000           ?qcom,geni-i2c                        @               '            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            8   /         J   ^             ^                 Otx rx           Y   ~        cdefault                                 	  $disabled             g  3      spi@a9c000           ?qcom,geni-spi                        @               '            o   =           +se        H  o   >         >         ?         @         ]         !              7qup-core qup-config qup-memory              ;            q   J         J   ^             ^                 Otx rx           Y              cdefault                                 	  $disabled             g  4         dma-controller@b00000         *   ?qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                        L         M         N         O         P         Q         R         S         T         U         V         W                         >                      <  V          	  $disabled             g         geniqup@bc0000           ?qcom,geni-se-qup                                     o   =      =           +m-ahb s-ahb            <  C                                              $okay             g  5   i2c@b80000           ?qcom,geni-i2c                         @               u            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                   Otx rx           Y           cdefault                                   $okay             J          g  6   keyboard@5           ?hid-over-i2c                                    F   `   C           Y           cdefault                touchpad@2c          ?hid-over-i2c                ,                    F   `              Y           cdefault                   spi@b80000           ?qcom,geni-spi                         @               u            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   C         J                                   Otx rx           Y              cdefault                                 	  $disabled             g  7      i2c@b84000           ?qcom,geni-i2c                 @       @               G            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                 Otx rx           Y           cdefault                                 	  $disabled             g  8      spi@b84000           ?qcom,geni-spi                 @       @               G            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   C         J                                 Otx rx           Y              cdefault                                 	  $disabled             g  9      i2c@b88000           ?qcom,geni-i2c                        @               H            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                 Otx rx           Y           cdefault                                 	  $disabled             g  :      serial@b88000            ?qcom,geni-uart                       @               H            o   =           +se        0  o   >         >         ?         @              7qup-core qup-config             ;            q   J        Y           cdefault       	  $disabled             g  ;      spi@b88000           ?qcom,geni-spi                        @               H            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   J         J                                 Otx rx           Y              cdefault                                 	  $disabled             g  <      i2c@b8c000           ?qcom,geni-i2c                        @               I            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                 Otx rx           Y           cdefault                                   $okay             J          g  =   typec-mux@8          ?parade,ps8833 parade,ps8830                      o      
                   '           4           E           R           _           l      
           Y           cdefault          x            ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g            port@2                 endpoint            _            g                    spi@b8c000           ?qcom,geni-spi                        @               I            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   J         J                                 Otx rx           Y              cdefault                                 	  $disabled             g  >      i2c@b90000           ?qcom,geni-i2c                         @               J            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                 Otx rx           Y           cdefault                                 	  $disabled             g  ?      spi@b90000           ?qcom,geni-spi                         @               J            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   J         J                                 Otx rx           Y              cdefault                                 	  $disabled             g  @      i2c@b94000           ?qcom,geni-i2c                 @       @               K            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                 Otx rx           Y           cdefault                                   $okay             J          g  A   redriver@43          ?nxp,ptn3222             C                                          l   `              Y           cdefault          g         redriver@4f          ?nxp,ptn3222             O                                          l   `              Y           cdefault          g            spi@b94000           ?qcom,geni-spi                 @       @               K            o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   J         J                                 Otx rx           Y              cdefault                                 	  $disabled             g  B      i2c@b98000           ?qcom,geni-i2c                        @                           o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                 Otx rx           Y           cdefault                                 	  $disabled             g  C      spi@b98000           ?qcom,geni-spi                        @                           o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   J         J                                 Otx rx           Y              cdefault                                 	  $disabled             g  D      i2c@b9c000           ?qcom,geni-i2c                        @                           o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            8   /         J                                 Otx rx           Y           cdefault                                   $okay             J          g  E   typec-mux@8          ?parade,ps8833 parade,ps8830                      o                         '           4           E           R           _           l   `              Y           cdefault          x            ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g            port@2                 endpoint            _            g                    spi@b9c000           ?qcom,geni-spi                        @                           o   =           +se        H  o   >         >         ?         @                    !              7qup-core qup-config qup-memory              ;            q   J         J                                 Otx rx           Y              cdefault                                 	  $disabled             g  F         thermal-sensor@c271000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '            "                 F                             uplow critical                                 g        thermal-sensor@c272000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '             "0                F                             uplow critical                                 g        thermal-sensor@c273000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '0            "@                F                             uplow critical                                 g        thermal-sensor@c274000        "   ?qcom,x1e80100-tsens qcom,tsens-v2                 '@            "P                F                             uplow critical                                 g        phy@fd3000        8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy               0       T                     o   "           +ref            =   6        $okay                                  
            g        phy@fd5000           ?qcom,x1e80100-qmp-usb3-dp-phy                 P       @           o   =            =     =          +aux ref com_aux usb3_pipe               =              =   D   =   O        phy common           Z                                        $okay            '           7            g   8   ports                                port@0                  endpoint            _            g            port@1                 endpoint            _            g           port@2                 endpoint            _            g                 phy@fd9000        8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o   "           +ref            =   7        $okay                                  
            g        phy@fda000           ?qcom,x1e80100-qmp-usb3-dp-phy                        @           o   =      "      =  "   =  #        +aux ref com_aux usb3_pipe               =              =   E   =   P        phy common           Z                                        $okay            '           7            g   9   ports                                port@0                  endpoint            _            g            port@1                 endpoint            _            g           port@2                 endpoint            _            g                 phy@fde000        8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o   "           +ref            =   8      	  $disabled             g         phy@fdf000           ?qcom,x1e80100-qmp-usb3-dp-phy                        @           o   =  $   "      =  &   =  '        +aux ref com_aux usb3_pipe               =              =   F   =   Q        phy common           Z                                      	  $disabled             g   :   ports                                port@0                  endpoint             g  G         port@1                 endpoint            _            g            port@2                 endpoint            _            g                 interconnect@1500000             ?qcom,x1e80100-cnoc-main              P       D            &                    g         interconnect@1600000             ?qcom,x1e80100-cnoc-cfg               `        f            &                    g   @      interconnect@1680000             ?qcom,x1e80100-system-noc                 h                  &                    g  H      interconnect@16c0000             ?qcom,x1e80100-pcie-south-anoc                l        Ѐ           &                    g         interconnect@16d0000             ?qcom,x1e80100-pcie-center-anoc               m        p            &                    g  I      interconnect@16e0000             ?qcom,x1e80100-aggre1-noc                 n       D            &                    g   ]      interconnect@1700000             ?qcom,x1e80100-aggre2-noc                 p                   &                    g          interconnect@1740000             ?qcom,x1e80100-pcie-north-anoc                t                   &                    g         interconnect@1750000             ?qcom,x1e80100-usb-center-anoc                u                    &                    g  J      interconnect@1760000             ?qcom,x1e80100-usb-north-anoc                 v        p           &                    g         interconnect@1770000             ?qcom,x1e80100-usb-south-anoc                 w                   &                    g         interconnect@1780000             ?qcom,x1e80100-mmss-noc               x                   &                    g        pcie@1bd0000                                 4X                     pci          ?qcom,pcie-x1e80100        `               0     x              x @           x             x             0                Gparf dbi elbi atu config mhi                                   T                 x                 x0      x0              @      @       @           Q                [        h           y         l                                     D                                                 y         /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                  8   o   =   T   =   V   =   W   =   ^   =   _   =      =   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   T        $       0  o             !         ?                       7pcie-mem cpu-pcie              =      =           pci link_down               =           
   4        pciephy         UUUUUUUUUUUUUUUU        UUUUUUUU        q         	  $disabled             g  K   opp-table            ?operating-points-v2          g      opp-2500000-1           1     &%        8   /         А                    opp-5000000-1           1     LK@        8   /                              opp-10000000-1          1             8   /         B@                    opp-20000000-1          1    1-         8   /                             opp-5000000-2           1     LK@        8   /                              opp-10000000-2          1             8   /         B@                    opp-20000000-2          1    1-         8   /                             opp-40000000-2          1    bZ         8   /         =	                     opp-8000000-3           1     z         8   0                             opp-16000000-3          1     $         8   0         h                    opp-32000000-3          1    H         8   0         <                    opp-64000000-3          1    А         8   0         x-                    opp-16000000-4          1     $         8   0         h                    opp-32000000-4          1    H         8   0         <                    opp-64000000-4          1    А         8   0         x-                    opp-128000000-4         1              8   0         _(                       pcie@0           pci          ?pciclass,0604                                        Q                                                 g  L         phy@1be0000       "   ?qcom,x1e80100-qmp-gen4x8-pcie-phy                               0   o   =   X   =   V   "      =   Y   =   [   =   ]      $  +aux cfg_ahb ref rchng pipe pipediv2            =      =           phy phy_nocsr              =   Y                     =            Z            pcie3_pipe_clk                    	  $disabled             g   4      pci@1bf8000         4X                     pci          ?qcom,pcie-x1e80100        `              0     p              p @           p             p                             Gparf dbi elbi atu config mhi                                   8                 p                 p0      p0                Q                [        h           y                              l                          E         F         G         H         I         J                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                            K                                   L                                   M                                            8   o   =   v   =   x   =   y   =      =      =      =   "      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   v        $       0  o            !         ?                       7pcie-mem cpu-pcie              =   "   =   #        pci link_down               =   
        8           
   7        pciephy         UUUUUUUU        UUUU        $okay            '   `              3   `              >           Y           cdefault          g  M      phy@1bfc000       "   ?qcom,x1e80100-qmp-gen4x4-pcie-phy                                             0   o   =   z   =   x   "   
   =   {   =   }   =         $  +aux cfg_ahb ref rchng pipe pipediv2            =   %   =   $        phy phy_nocsr              =   {                     =   	        O   "               Z            pcie6a_pipe_clk                     $okay            '           7            g   7      pci@1c00000                              4X                     pci          ?qcom,pcie-x1e80100        `               0     ~             ~ @           ~             ~             0                Gparf dbi elbi atu config mhi                                   8                 ~                 ~0      ~0                Q                [        h           y         l         ^          _          `          Y          V          R          M          N                   /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                             F                                    G                                    H                                    I         8   o   =   k   =   m   =   n   =   t   =   u   =      =   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   k        $       0  o            !         ?                       7pcie-mem cpu-pcie              =      =           pci link_down               =           8           
   6        pciephy         UUUU      	  $disabled             g  N      phy@1c06000       "   ?qcom,x1e80100-qmp-gen3x2-pcie-phy                `               0   o   =   k   =   m   "      =   o   =   q   =   s      $  +aux cfg_ahb ref rchng pipe pipediv2            =       =           phy phy_nocsr              =   o                     =            Z            pcie5_pipe_clk                    	  $disabled             g   6      pci@1c08000         4X                     pci          ?qcom,pcie-x1e80100        `              0     |             | @           |             |                             Gparf dbi elbi atu config mhi                                   8                 |                 |0      |0                Q                [        h           y                              l                                                                                                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                  8   o   =   `   =   b   =   c   =   i   =   j   =      =   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            =   `        $       0  o            !         ?                       7pcie-mem cpu-pcie              =      =           pci link_down               =           8           
   5        pciephy         UUUU        $okay            '   `              3   `              Y           cdefault          g  O   pcie@0           pci                                      Q                                                 g  P   wifi@0           ?pci17cb,1107                                           w           x           y           z           {           |           }        c           u               phy@1c0e000       "   ?qcom,x1e80100-qmp-gen3x2-pcie-phy                               0   o   =   `   =   b   "       =   d   =   f   =   h      $  +aux cfg_ahb ref rchng pipe pipediv2            =      =           phy phy_nocsr              =   d                     =            Z            pcie4_pipe_clk                      $okay            '           7            g   5      hwlock@1f40000           ?qcom,tcsr-mutex                                           g   .      clock-controller@1fc0000             ?qcom,x1e80100-tcsr syscon                                  o                Z                       g   "      gpu@3d00000       !   ?qcom,adreno-43050c01 qcom,adreno          0                                              #  Gkgsl_3d0_reg_memory cx_mem cx_dbgc                ,                                        q                                          
  speed_bin           o   ?          !               7gfx-mem         $okay             g     zap-shader        	  $disabled   3                 3  qcom/x1e80100/dell/latitude-7455/qcdxkmsuc8380.mbn           g  Q      opp-table         /   ?operating-points-v2-adreno operating-points-v2           g      opp-1500000000          1    Yh/                             *_                 opp-1375000000          1    Q                            *_                 opp-1250000000          1    J|                            *_                 opp-1175000000          1    F	                   ۳        *_                 opp-1100000000-0            1    A                    ۳        *_                 opp-1100000000-1            1    A                             *_                 opp-1000000000          1    ;                    ۳        +_                 opp-925000000           1    7"a@          @         ۳        +_                 opp-800000000           1    /                             ,_                 opp-744000000           1    ,X                             ._                 opp-687000000-0         1    (                    |c        ._                 opp-687000000-1         1    (                             ._                 opp-550000000           1     U                    \k        (_                 opp-390000000           1    >           @         -        (_                 opp-300000000           1                8                  +_                       gmu@3d6a000       '   ?qcom,adreno-gmu-x185.1 qcom,adreno-gmu        0       ֠      P                  (                 Ggmu rscc gmu_pdc                  0         1           hfi gmu       8   o                      =   $   =   7                  !  +ahb gmu cxo axi memnoc hub demet                                   cx gx                             
           q            g      opp-table            ?operating-points-v2          g      opp-550000000           1     U                 opp-220000000           1                @            clock-controller@3d90000             ?qcom,x1e80100-gpucc                                o   2   =   5   =   6         Z                                  g         iommu@3da0000         B   ?qcom,x1e80100-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                     8                                                                                                                                      >         ?         @         A                                                                                     o         =   7   =   8               +hlos bus iface ahb                           [         g         interconnect@26400000            ?qcom,x1e80100-gem-noc                &@       1            &                    g   ?      interconnect@320c0000            ?qcom,x1e80100-nsp-noc                2                   &                    g        remoteproc@6800000           ?qcom,x1e80100-adsp-pas                              <  F                                                    #  wdog fatal ready handover stop-ack           o               +xo              ;      ;            lcx lmx         o             !                            
           3               Dstop            $okay          _  qcom/x1e80100/dell/latitude-7455/qcadsp8380.mbn qcom/x1e80100/dell/latitude-7455/adsp_dtbs.elf           g  R   glink-edge          F   1                     1               Zlpass           s      fastrpc          ?qcom,fastrpc            `fastrpcglink-apps-dsp           Zadsp             t                             compute-cb@3             ?qcom,fastrpc-compute-cb                        <        <  c             [      compute-cb@4             ?qcom,fastrpc-compute-cb                        <        <  d             [      compute-cb@5             ?qcom,fastrpc-compute-cb                        <        <  e             [      compute-cb@6             ?qcom,fastrpc-compute-cb                        <        <  f             [      compute-cb@7             ?qcom,fastrpc-compute-cb                        <        <  g             [         gpr       	   ?qcom,gpr          
  `adsp_apps                                                         service@1            ?qcom,q6apm                                  avs/audio msm/adsp/audio_pd          g     bedais           ?qcom,q6apm-lpass-dais                       g        dais             ?qcom,q6apm-dais            <        <  a             g  S         service@2            ?qcom,q6prm                      avs/audio msm/adsp/audio_pd          g  T   clock-controller             ?qcom,q6prm-lpass-clocks          Z            g                     codec@6aa0000         :   ?qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   o      D         f         g              +mclk macro dcodec fsgen          Z          
  wsa2-mclk                      WSA2             g         soundwire@6ab0000            ?qcom,soundwire-v2.0.0                                  o           +iface                             ZWSA2            Y              cdefault                       swr_audio_cgcr                        	           ?   ?                             %           8           J           [           r                                                                             $okay             g     speaker@0,0          ?sdw20217020400                           l                             WooferRight                                              
            g        speaker@0,1          ?sdw20217020400                          l                             TweeterRight                                                             g           codec@6ac0000         8   ?qcom,x1e80100-lpass-rx-macro qcom,sm8550-lpass-rx-macro                             (   o      @         f         g              +mclk macro dcodec fsgen          Z            mclk                        g         soundwire@6ad0000            ?qcom,soundwire-v2.0.0                                  o           +iface                             ZRX          Y           cdefault                        swr_audio_cgcr                                                                %            8         J        [        r                                                                 $okay             g     codec@0,4            ?sdw20217010d00                                                  g           codec@6ae0000         8   ?qcom,x1e80100-lpass-tx-macro qcom,sm8550-lpass-tx-macro                             (   o      9         f         g              +mclk macro dcodec fsgen          Z            mclk                        g         codec@6b00000         :   ?qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   o      B         f         g              +mclk macro dcodec fsgen          Z            mclk                       WSA          g         soundwire@6b10000            ?qcom,soundwire-v2.0.0                                  o           +iface                             ZWSA         Y              cdefault                       swr_audio_cgcr                        	           ?   ?                             %           8           J           [           r                                                                             $okay             g     speaker@0,0          ?sdw20217020400                           l                             WooferLeft                                               
            g        speaker@0,1          ?sdw20217020400                          l                             TweeterLeft                                                          g           clock-controller@6b6c000          6   ?qcom,x1e80100-lpassaudiocc qcom,sc8280xp-lpassaudiocc                                 Z                       g         soundwire@6d30000            ?qcom,soundwire-v2.0.0                                  o           +iface                                     core wakeup         ZTX                         swr_audio_cgcr          Y           cdefault                               	                           %               8           J           [           r                                                                        $okay             g     codec@0,3            ?sdw20217010d00                          	                     g           codec@6d44000         8   ?qcom,x1e80100-lpass-va-macro qcom,sm8550-lpass-va-macro              @              $   o      9         f         g           +mclk macro dcodec            Z            fsgen                      Y           cdefault         	4           	D I>          g         pinctrl@6e80000       >   ?qcom,x1e80100-lpass-lpi-pinctrl qcom,sm8550-lpass-lpi-pinctrl                              %                  o      f         g           +core audio           	Z        	j           	v                       g      tx-swr-active-state          g      clk-pins            	gpio0           	swr_tx_clk          	           	            	      data-pins           	gpio1 gpio2         	swr_tx_data         	           	            	         rx-swr-active-state          g      clk-pins            	gpio3           	swr_rx_clk          	           	            	      data-pins           	gpio4 gpio5         	swr_rx_data         	           	            	         dmic01-default-state             g      clk-pins            	gpio6         
  	dmic1_clk           	            	      data-pins           	gpio7           	dmic1_data          	            	         dmic23-default-state             g  U   clk-pins            	gpio8         
  	dmic2_clk           	            	      data-pins           	gpio9           	dmic2_data          	            	         wsa-swr-active-state             g      clk-pins            	gpio10          	wsa_swr_clk         	           	            	      data-pins           	gpio11          	wsa_swr_data            	           	            	         wsa2-swr-active-state            g      clk-pins            	gpio15          	wsa2_swr_clk            	           	            	      data-pins           	gpio16          	wsa2_swr_data           	           	            	         spkr-01-sd-n-active-state           	gpio12          	gpio            	            	         	         g         spkr-23-sd-n-active-state           	gpio13          	gpio            	            	         	         g            clock-controller@6ea0000          ,   ?qcom,x1e80100-lpasscc qcom,sc8280xp-lpasscc                                Z                       g         interconnect@7e40000             ?qcom,x1e80100-lpass-ag-noc                                  &                    g  V      interconnect@7400000             ?qcom,x1e80100-lpass-lpiaon-noc               @                  &                    g  W      interconnect@7430000             ?qcom,x1e80100-lpass-lpicx-noc                C                   &                    g         mmc@8804000       &   ?qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                            hc_irq pwr_irq           o   =      =                  +iface core xo              <               	 d,        	h            ;            q         0  o             !         ?         @              7sdhc-ddr cpu-sdhc           
            [        $okay            
   `   G           Y              
              cdefault sleep           
%           
1            
>         
F         g  X   opp-table            ?operating-points-v2          g      opp-19200000            1    $         8         opp-50000000            1            8   /      opp-100000000           1             8   0      opp-202000000           1    
F        8               mmc@8844000       &   ?qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                           hc_irq pwr_irq           o   =      =                  +iface core xo              <  `            	 d,        	h            ;            q         0  o             !         ?         @              7sdhc-ddr cpu-sdhc           
            [      	  $disabled             g  Y   opp-table            ?operating-points-v2          g      opp-19200000            1    $         8         opp-50000000            1            8   /      opp-100000000           1             8   0      opp-202000000           1    
F        8               phy@88e0000       8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o   "   	        +ref            =   9        $okay                                  
            g         phy@88e1000       8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                     T                     o   "           +ref            =   4        $okay                                  
            g         phy@88e2000       8   ?qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o   "           +ref            =   5        $okay                                   g        phy@88e3000          ?qcom,x1e80100-qmp-usb3-uni-phy               0                   o   =            =     =          +aux ref com_aux pipe               =   G   =   L        phy phy_phy             =            Z            usb_mp_phy0_pipe_clk                        $okay            '           7            g         phy@88e5000          ?qcom,x1e80100-qmp-usb3-uni-phy               P                   o   =            =     =          +aux ref com_aux pipe               =   H   =   M        phy phy_phy             =            Z            usb_mp_phy1_pipe_clk                        $okay            '           7            g        usb@a0f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
              H   o   =      =     =      =     =     =      =       =      =         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $        4  F         r         :         9         
         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           8              =   A      0  o            !         ?         @   %           7usb-ddr apps-usb                                                     	  $disabled             g  Z   usb@a000000       
   ?snps,dwc3                
                        a              <              
      :            usb2-phy usb3-phy            
M         
f         
~         
         
         [         g  [   ports                                port@0                  endpoint             g  \         port@1                 endpoint            _            g                     usb@a2f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
/                                                H   o   =      =      =      =      =      =      =       =      =         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =      =           $        (  F                   2         1         &  pwr_event dp_hs_phy_irq dm_hs_phy_irq               =           8              =   =      0  o             !         ?         @   "           7usb-ddr apps-usb             
                 $okay             g  ]   usb@a200000       
   ?snps,dwc3                
                                       <              
         	  usb2-phy            
high-speed           
         
         [        
host             g  ^   port       endpoint             g  _               usb@a4f8800           ?qcom,x1e80100-dwc3-mp qcom,dwc3              
O              H   o   =      =      =      =     =     =      =       =      =         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =           $          F         9            :            5            8         4         3         6         5         7         8         l  pwr_event_1 pwr_event_2 hs_phy_1 hs_phy_2 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 ss_phy_1 ss_phy_2             =           8              =   >      0  o            !         ?         @   &           7usb-ddr apps-usb                                                       $okay             g  `   usb@a400000       
   ?snps,dwc3                
@                       3              <               
                  usb2-0 usb3-0 usb2-1 usb3-1         
host             
M         
f         
~         
         
         [         g  a         usb@a6f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
o              H   o   =      =     =      =  
   =     =      =      =      =         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $        4  F         s         =                           1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           8              =   ?                                                   $okay             g  b   usb@a600000       
   ?snps,dwc3                
`                       c              <               
     8            usb2-phy usb3-phy            
M         
f         
~         
         
         [        
host             g  c   ports                                port@0                  endpoint            _           g           port@1                 endpoint            _           g                     usb@a8f8800          ?qcom,x1e80100-dwc3 qcom,dwc3                 
              H   o   =      =     =      =     =     =      =       =      =         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              =     =          $        4  F         t         <                  /         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                =           8              =   @      0  o            !         ?         @   $           7usb-ddr apps-usb                                                       $okay             g  d   usb@a800000       
   ?snps,dwc3                
                       e              <  `            
     9            usb2-phy usb3-phy            
M         
f         
~         
         
         [        
host             g  e   ports                                port@0                  endpoint            _           g           port@1                 endpoint            _           g                     video-codec@aa00000       $   ?qcom,x1e80100-iris qcom,sm8550-iris              
                                       	      	      ;   
   ;            venus vcodec0 mxc mmcx          q  
         o   =  Y  	     	            +iface core vcodec0_core       0  o   ?         @   *              !              7cpu-cfg video-mem                        =   X        bus            <  @       <  G             [      	  $disabled         /  qcom/x1e80100/dell/latitude-7455/qcvss8380.mbn           g  f   opp-table            ?operating-points-v2          g  
   opp-192000000           1    q         8          opp-240000000           1    N         8   0   /      opp-338000000           1    %x        8   0   0      opp-366000000           1    з        8            opp-444000000           1    v         8            opp-481000000           1    z@        8                clock-controller@aaf0000             ?qcom,x1e80100-videocc                
                  o   2   =  X            ;      ;   
        8   /   /         Z                                  g  	      display-subsystem@ae00000            ?qcom,x1e80100-mdss               
                 Gmdss                   S            o        =   &     :                    H  o           ?         !          !         ?         @              7mdp0-mem mdp1-mem cpu-cfg                             <                                                                    $okay             g     display-controller@ae01000           ?qcom,x1e80100-dpu                 
           
               	  Gmdp vbif            F            (   o   =   &          =     :     F        +nrt_bus iface lut core vsync            q              ;            g  g   ports                                port@0                  endpoint            _           g           port@4                 endpoint            _           g           port@5                 endpoint            _           g  #         port@6                 endpoint            _           g              opp-table            ?operating-points-v2          g     opp-200000000           1             8   /      opp-325000000           1    _@        8   0      opp-375000000           1    Z        8         opp-514000000           1            8         opp-575000000           1    "E        8              displayport-controller@ae90000           ?qcom,x1e80100-dp          P       
             
            
            
            
                F           0   o                                    J  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                  
   8      8      8           q              ;           
   8           dp                      $okay             g  h   ports                                port@0                  endpoint            _           g           port@1                 endpoint                                 _               `=         Av    1          g               opp-table            ?operating-points-v2          g     opp-160000000           1    	h         8   /      opp-270000000           1    ߀        8   0      opp-540000000           1     /         8         opp-810000000           1    0G        8               displayport-controller@ae98000           ?qcom,x1e80100-dp          P       
            
            
            
            
                F           0   o                                    J  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                   
   9      9      9           q              ;           
   9           dp                      $okay             g  i   ports                                port@0                  endpoint            _           g           port@1                 endpoint                                 _               `=         Av    1          g               opp-table            ?operating-points-v2          g     opp-160000000           1    	h         8   /      opp-270000000           1    ߀        8   0      opp-540000000           1     /         8         opp-810000000           1    0G        8               displayport-controller@ae9a000           ?qcom,x1e80100-dp          P       
            
            
            
            
                F           0   o          "     $     '     (     *      J  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                %     )     +        
   :      :      :           q              ;           
   :           dp                    	  $disabled             g  j   ports                                port@0                  endpoint            _           g           port@1                 endpoint                                 _           g               opp-table            ?operating-points-v2          g     opp-160000000           1    	h         8   /      opp-270000000           1    ߀        8   0      opp-540000000           1     /         8         opp-810000000           1    0G        8               displayport-controller@aea0000           ?qcom,x1e80100-dp          P       
             
            
            
            
                F           (   o          -     /     2     3      ;  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel               0     4        
                     q  !            ;           
           dp          $okay            Y  "        cdefault          g  k   ports                                port@0                  endpoint            _  #         g           port@1                 endpoint                                      `=         Av    1         _  $         g  '            opp-table            ?operating-points-v2          g  !   opp-160000000           1    	h         8   /      opp-270000000           1    ߀        8   0      opp-540000000           1     /         8         opp-810000000           1    0G        8            aux-bus    panel         
   ?edp-panel           *   `   J            7  %        Y  &        cdefault    port       endpoint            _  '         g  $                     phy@aec2a00          ?qcom,x1e80100-dp-phy          @       
*           
"            
&            
                 o     "        "           +aux cfg_ahb ref             ;            Z                     	  $disabled             g  l      phy@aec5a00          ?qcom,x1e80100-dp-phy          @       
Z           
R            
V            
P                o     -        "           +aux cfg_ahb ref             ;            Z                       $okay            '           7            g         clock-controller@af00000             ?qcom,x1e80100-dispcc                 
               d   o   2  (   =   %   3                   8      8      9      9      :      :                            ;           8   /         Z                                  g        interrupt-controller@b220000             ?qcom,x1e80100-pdc qcom,pdc                "             @        d      H  D         *   *         /  
   4   c  a                 0                                             g         power-management@c300000          %   ?qcom,x1e80100-aoss-qmp qcom,aoss-qmp                 0                      1        F   1                      1                 Z             g         sram@c3f0000             ?qcom,rpmh-stats              ?               arbiter@c400000          ?qcom,x1e80100-spmi-pmic-arb       0       @        0     P       @      D                 Gcore chnls obsrvr           T            \                                               g  m   spmi@c42d000                  B       @     L               
  Gcnfg intr           periph_irq          F                                                                g  n   pmic@0           ?qcom,pm8550 qcom,spmi-pmic                                                      g  o   pon@1300             ?qcom,pmk8350-pon                         	  Ghlos pbs             g  p   pwrkey           ?qcom,pmk8350-pwrkey                              i   t         g  q      resin            ?qcom,pmk8350-resin                             	  $disabled             g  r         rtc@6100             ?qcom,pmk8350-rtc               a   b       
  Grtc alarm                  b               t                  g  s      nvram@7100           ?qcom,spmi-sdam             q                                        q             g  t   reboot-reason@48                H                          g  u         nvram@7e00           ?qcom,spmi-sdam             ~                                        ~             g  v   charge-limit-en@73              s            g  w      charge-limit-end@75             u            g  x      charge-limit-delta@76               v            g  y         gpio@8800         !   ?qcom,pmk8550-gpio qcom,spmi-gpio                         	Z        	v  )                   	j                                g  )      pwm          ?qcom,pmk8550-pwm                     	  $disabled             g  z         pmic@1           ?qcom,pm8550 qcom,spmi-pmic                                                     g  {   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800             ?qcom,pm8550-gpio qcom,spmi-gpio                      	Z        	v                      	j                                g      rtmr0-reset-n-active-state          	gpio10          	normal                      	                           g         usb0-3p3-reg-en-state           	gpio11          	normal                      	                           g           led-controller@ee00       *   ?qcom,pm8550-flash-led qcom,spmi-flash-led                     	  $disabled             g  |      pwm       !   ?qcom,pm8550-pwm qcom,pm8350c-pwm                     	  $disabled             g  }         pmic@2           ?qcom,pm8550 qcom,spmi-pmic                                                     g  ~   temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         "   ?qcom,pm8550ve-gpio qcom,spmi-gpio                        	Z        	v  *                   	j                                g  *         pmic@3           ?qcom,pmc8380 qcom,spmi-pmic                                                    g     temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   ?qcom,pmc8380-gpio qcom,spmi-gpio                         	Z        	v  +           
        	j                                g  +         pmic@4           ?qcom,pmc8380 qcom,spmi-pmic                                                    g     temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   ?qcom,pmc8380-gpio qcom,spmi-gpio                         	Z        	v  ,           
        	j                                g  ,         pmic@5           ?qcom,pmc8380 qcom,spmi-pmic                                                    g     temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   ?qcom,pmc8380-gpio qcom,spmi-gpio                         	Z        	v  -           
        	j                                g  -   usb0-pwr-1p15-reg-en-state          	gpio8           	normal                      	                           g              pmic@6           ?qcom,pmc8380 qcom,spmi-pmic                                                    g     temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   ?qcom,pmc8380-gpio qcom,spmi-gpio                         	Z        	v  .           
        	j                                g  .         pmic@8           ?qcom,pm8550 qcom,spmi-pmic                                                     g     temp-alarm@a00           ?qcom,spmi-temp-alarm               
               
                            g        gpio@8800         "   ?qcom,pm8550ve-gpio qcom,spmi-gpio                        	Z        	v  /                   	j                                g  /         pmic@9           ?qcom,pm8550 qcom,spmi-pmic              	                                       g     temp-alarm@a00           ?qcom,spmi-temp-alarm               
            	   
                            g        gpio@8800         "   ?qcom,pm8550ve-gpio qcom,spmi-gpio                        	Z        	v  0                   	j                                g  0   usb0-1p8-reg-en-state           	gpio8           	normal                      	                           g              pmic@c           ?qcom,pm8010 qcom,spmi-pmic                                                  	  $disabled             g     temp-alarm@2400          ?qcom,spmi-temp-alarm               $               $                            g              spmi@c432000                  C        @     M               
  Gcnfg intr           periph_irq          F                                                                g     pmic@7           ?qcom,smb2360 qcom,spmi-pmic                                                   $okay             g     phy@fd00             ?qcom,smb2360-eusb2-repeater                                   1          2         g            pmic@a           ?qcom,smb2360 qcom,spmi-pmic             
                                      $okay             g     phy@fd00             ?qcom,smb2360-eusb2-repeater                                   1          3         g            pmic@b           ?qcom,smb2360 qcom,spmi-pmic                                                 	  $disabled             g     phy@fd00             ?qcom,smb2360-eusb2-repeater                                  g           pmic@c           ?qcom,smb2360 qcom,spmi-pmic                                                 	  $disabled             g     phy@fd00             ?qcom,smb2360-eusb2-repeater                                  g                 pinctrl@f100000          ?qcom,x1e80100-tlmm                                                   	Z        	j                               	v   `                                 ,      L                  g   `   edp0-hpd-default-state          	gpio119       	  	edp0_hot             	         g  "      qup-i2c0-data-clk-state         	gpio0 gpio1       	  	qup0_se0            	           
           g         qup-i2c1-data-clk-state         	gpio4 gpio5       	  	qup0_se1            	           
           g         qup-i2c2-data-clk-state         	gpio8 gpio9       	  	qup0_se2            	           
           g         qup-i2c3-data-clk-state         	gpio12 gpio13         	  	qup0_se3            	           
           g         qup-i2c4-data-clk-state         	gpio16 gpio17         	  	qup0_se4            	           
           g         qup-i2c5-data-clk-state         	gpio20 gpio21         	  	qup0_se5            	           
           g         qup-i2c6-data-clk-state         	gpio24 gpio25         	  	qup0_se6            	           
           g         qup-i2c7-data-clk-state         	gpio14 gpio15         	  	qup0_se7            	           
           g         qup-i2c8-data-clk-state         	gpio32 gpio33         	  	qup1_se0            	           
           g   _      qup-i2c9-data-clk-state         	gpio36 gpio37         	  	qup1_se1            	           
           g   d      qup-i2c10-data-clk-state            	gpio40 gpio41         	  	qup1_se2            	           
           g   g      qup-i2c11-data-clk-state            	gpio44 gpio45         	  	qup1_se3            	           
           g   j      qup-i2c12-data-clk-state            	gpio48 gpio49         	  	qup1_se4            	           
           g   m      qup-i2c13-data-clk-state            	gpio52 gpio53         	  	qup1_se5            	           
           g   p      qup-i2c14-data-clk-state            	gpio56 gpio57         	  	qup1_se6            	           
           g   s      qup-i2c15-data-clk-state            	gpio54 gpio55         	  	qup1_se7            	           
           g   ~      qup-i2c16-data-clk-state            	gpio64 gpio65         	  	qup2_se0            	           
           g   B      qup-i2c17-data-clk-state            	gpio68 gpio69         	  	qup2_se1            	           
           g   F      qup-i2c18-data-clk-state            	gpio72 gpio73         	  	qup2_se2            	           
           g   I      qup-i2c19-data-clk-state            	gpio76 gpio77         	  	qup2_se3            	           
           g   M      qup-i2c20-data-clk-state            	gpio80 gpio81         	  	qup2_se4            	           
           g   P      qup-i2c21-data-clk-state            	gpio84 gpio85         	  	qup2_se5            	           
           g   S      qup-i2c22-data-clk-state            	gpio88 gpio89         	  	qup2_se6            	           
           g   W      qup-i2c23-data-clk-state            	gpio86 gpio87         	  	qup2_se7            	           
           g   Z      qup-spi0-cs-state           	gpio3         	  	qup0_se0            	            	         g         qup-spi0-data-clk-state         	gpio0 gpio1 gpio2         	  	qup0_se0            	            	         g         qup-spi1-cs-state           	gpio7         	  	qup0_se1            	            	         g         qup-spi1-data-clk-state         	gpio4 gpio5 gpio6         	  	qup0_se1            	            	         g         qup-spi2-cs-state           	gpio11        	  	qup0_se2            	            	         g         qup-spi2-data-clk-state         	gpio8 gpio9 gpio10        	  	qup0_se2            	            	         g         qup-spi3-cs-state           	gpio15        	  	qup0_se3            	            	         g         qup-spi3-data-clk-state         	gpio12 gpio13 gpio14          	  	qup0_se3            	            	         g         qup-spi4-cs-state           	gpio19        	  	qup0_se4            	            	         g         qup-spi4-data-clk-state         	gpio16 gpio17 gpio18          	  	qup0_se4            	            	         g         qup-spi5-cs-state           	gpio23        	  	qup0_se5            	            	         g         qup-spi5-data-clk-state         	gpio20 gpio21 gpio22          	  	qup0_se5            	            	         g         qup-spi6-cs-state           	gpio27        	  	qup0_se6            	            	         g         qup-spi6-data-clk-state         	gpio24 gpio25 gpio26          	  	qup0_se6            	            	         g         qup-spi7-cs-state           	gpio13        	  	qup0_se7            	            	         g         qup-spi7-data-clk-state         	gpio14 gpio15 gpio12          	  	qup0_se7            	            	         g         qup-spi8-cs-state           	gpio35        	  	qup1_se0            	            	         g   c      qup-spi8-data-clk-state         	gpio32 gpio33 gpio34          	  	qup1_se0            	            	         g   b      qup-spi9-cs-state           	gpio39        	  	qup1_se1            	            	         g   f      qup-spi9-data-clk-state         	gpio36 gpio37 gpio38          	  	qup1_se1            	            	         g   e      qup-spi10-cs-state          	gpio43        	  	qup1_se2            	            	         g   i      qup-spi10-data-clk-state            	gpio40 gpio41 gpio42          	  	qup1_se2            	            	         g   h      qup-spi11-cs-state          	gpio47        	  	qup1_se3            	            	         g   l      qup-spi11-data-clk-state            	gpio44 gpio45 gpio46          	  	qup1_se3            	            	         g   k      qup-spi12-cs-state          	gpio51        	  	qup1_se4            	            	         g   o      qup-spi12-data-clk-state            	gpio48 gpio49 gpio50          	  	qup1_se4            	            	         g   n      qup-spi13-cs-state          	gpio55        	  	qup1_se5            	            	         g   r      qup-spi13-data-clk-state            	gpio52 gpio53 gpio54          	  	qup1_se5            	            	         g   q      qup-spi14-cs-state          	gpio59        	  	qup1_se6            	            	         g   u      qup-spi14-data-clk-state            	gpio56 gpio57 gpio58          	  	qup1_se6            	            	         g   t      qup-spi15-cs-state          	gpio53        	  	qup1_se7            	            	         g         qup-spi15-data-clk-state            	gpio54 gpio55 gpio52          	  	qup1_se7            	            	         g         qup-spi16-cs-state          	gpio67        	  	qup2_se0            	            	         g   E      qup-spi16-data-clk-state            	gpio64 gpio65 gpio66          	  	qup2_se0            	            	         g   D      qup-spi17-cs-state          	gpio71        	  	qup2_se1            	            	         g   H      qup-spi17-data-clk-state            	gpio68 gpio69 gpio70          	  	qup2_se1            	            	         g   G      qup-spi18-cs-state          	gpio75        	  	qup2_se2            	            	         g   L      qup-spi18-data-clk-state            	gpio72 gpio73 gpio74          	  	qup2_se2            	            	         g   K      qup-spi19-cs-state          	gpio79        	  	qup2_se3            	            	         g   O      qup-spi19-data-clk-state            	gpio76 gpio77 gpio78          	  	qup2_se3            	            	         g   N      qup-spi20-cs-state          	gpio83        	  	qup2_se4            	            	         g   R      qup-spi20-data-clk-state            	gpio80 gpio81 gpio82          	  	qup2_se4            	            	         g   Q      qup-spi21-cs-state          	gpio87        	  	qup2_se5            	            	         g   U      qup-spi21-data-clk-state            	gpio84 gpio85 gpio86          	  	qup2_se5            	            	         g   T      qup-spi22-cs-state          	gpio91        	  	qup2_se6            	            	         g   Y      qup-spi22-data-clk-state            	gpio88 gpio89 gpio90          	  	qup2_se6            	            	         g   X      qup-spi23-cs-state          	gpio85        	  	qup2_se7            	            	         g   \      qup-spi23-data-clk-state            	gpio86 gpio87 gpio84          	  	qup2_se7            	            	         g   [      qup-uart2-default-state          g      cts-pins            	gpio8         	  	qup0_se2            	            	      rts-pins            	gpio9         	  	qup0_se2            	            	      tx-pins         	gpio10        	  	qup0_se2            	            	      rx-pins         	gpio11        	  	qup0_se2            	            	         qup-uart14-default-state             g   v   cts-pins            	gpio56        	  	qup1_se6             	      rts-pins            	gpio57        	  	qup1_se6            	            	      tx-pins         	gpio58        	  	qup1_se6            	            	      rx-pins         	gpio59        	  	qup1_se6             
         qup-uart21-default-state             g   V   tx-pins         	gpio86        	  	qup2_se5            	            	      rx-pins         	gpio87        	  	qup2_se5            	            	         sdc2-default-state           g      clk-pins          	  	sdc2_clk            	            	      cmd-pins          	  	sdc2_cmd            	   
         
      data-pins         
  	sdc2_data           	   
         
         sdc2-sleep-state             g      clk-pins          	  	sdc2_clk            	            	      cmd-pins          	  	sdc2_cmd            	            
      data-pins         
  	sdc2_data           	            
         cam-rgb-default-state            g     mclk-pins           	gpio100         	cam_aon         	            	      reset-n-pins            	gpio237         	gpio            	            	         cam-indicator-en-state          	gpio110         	gpio            	            	         g        cam-ldo-en-state            	gpio91          	gpio            	            	         g        edp-bl-en-state         	gpio74          	gpio            	            	         g  &      edp-reg-en-state            	gpio70          	gpio            	            	         g        eusb3-reset-n-state         	gpio6           	gpio            	            	         	         g         eusb5-reset-n-state         	gpio184         	gpio            	            	         	         g         hall-int-n-state            	gpio92          	gpio             	         g        kybd-default-state          	gpio67          	gpio             
         g         nvme-reg-en-state           	gpio18          	gpio            	            	         g        pcie4-default-state          g      clkreq-n-pins           	gpio147       
  	pcie4_clk           	            
      perst-n-pins            	gpio146         	gpio            	            	      wake-n-pins         	gpio148         	gpio            	            
         pcie6a-default-state             g      clkreq-n-pins           	gpio153         	pcie6a_clk          	            
      perst-n-pins            	gpio152         	gpio            	            	      wake-n-pins         	gpio154         	gpio            	            
         rtmr1-reset-n-active-state          	gpio176         	gpio            	            	         g         sdc2-card-det-state         	gpio71          	gpio            	            
         g         tpad-default-state           g      disable-pins            	gpio38          	gpio             	      int-n-pins          	gpio3           	gpio             
      reset-n-pins            	gpio52          	gpio             	         ts0-default-state            g   a   disable-pins            	gpio75          	gpio             	      int-n-pins          	gpio51          	gpio             
      reset-n-pins            	gpio48          	gpio             	        	            usb1-pwr-1p15-reg-en-state          	gpio188         	gpio            	            	         g        usb1-pwr-1p8-reg-en-state           	gpio175         	gpio            	            	         g        usb1-pwr-3p3-reg-en-state           	gpio186         	gpio            	            	         g        wcd-reset-n-active-state            	gpio191         	gpio            	            	         	         g        wcn-sw-en-state         	gpio214         	gpio            	            	         g        wcn-wlan-bt-en-state            	gpio116 gpio117         	gpio            	            	         g           stm@10002000              ?arm,coresight-stm arm,primecell                             (                 Gstm-base stm-stimulus-base           o         	  +apb_pclk       out-ports      port       endpoint            _  4         g  ;               tpdm@10003000         "   ?qcom,coresight-tpdm arm,primecell                 0                 o         	  +apb_pclk                        -          	  $disabled       out-ports      port       endpoint            _  5         g  6               tpda@10004000         "   ?qcom,coresight-tpda arm,primecell                 @                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  6         g  5         port@1                 endpoint            _  7         g  9            out-ports      port       endpoint            _  8         g  :               tpdm@1000f000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk                        -       out-ports      port       endpoint            _  9         g  7               funnel@10041000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@6                 endpoint            _  :         g  8         port@7                 endpoint            _  ;         g  4            out-ports      port       endpoint            _  <         g  A               funnel@10042000       +   ?arm,coresight-dynamic-funnel arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@2                 endpoint            _  =         g           port@5                 endpoint            _  >         g  Q         port@6                 endpoint            _  ?         g  y            out-ports      port       endpoint            _  @         g  B               funnel@10045000       +   ?arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  A         g  <         port@1                 endpoint            _  B         g  @            out-ports      port       endpoint            _  C         g  T               tpdm@10800000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  D         g  }               tpdm@1082c000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            ?            U       out-ports      port       endpoint            _  E         g  r               tpdm@10841000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _  F         g  p               tpdm@10844000         "   ?qcom,coresight-tpdm arm,primecell                @                 o         	  +apb_pclk            ?            U       out-ports      port       endpoint            _  G         g  H               funnel@10846000       +   ?arm,coresight-dynamic-funnel arm,primecell               `                 o         	  +apb_pclk       in-ports       port       endpoint            _  H         g  G            out-ports      port       endpoint            _  I         g  o               cti@1098b000              ?arm,coresight-cti arm,primecell                               o         	  +apb_pclk          tpdm@109d0000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            ?            U          	  $disabled       out-ports      port       endpoint            _  J         g  q               tpdm@10ac0000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            ?            U          	  $disabled       out-ports      port       endpoint            _  K         g  M               tpdm@10ac1000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  L         g  N               tpda@10ac4000         "   ?qcom,coresight-tpda arm,primecell                @                 o         	  +apb_pclk       in-ports                                 port@8                 endpoint            _  M         g  K         port@9              	   endpoint            _  N         g  L            out-ports      port       endpoint            _  O         g  P               funnel@10ac5000       +   ?arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports       port       endpoint            _  P         g  O            out-ports      port       endpoint            _  Q         g  >               funnel@10b04000       +   ?arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk       in-ports                                 port@3                 endpoint            _  R         g  i         port@6                 endpoint            _  S         g  _         port@7                 endpoint            _  T         g  C            out-ports      port       endpoint            _  U         g  V               tmc@10b05000              ?arm,coresight-tmc arm,primecell              P                 o         	  +apb_pclk             g     in-ports       port       endpoint            _  V         g  U            out-ports      port       endpoint            _  W         g  X               replicator@10b06000       /   ?arm,coresight-dynamic-replicator arm,primecell               `                 o         	  +apb_pclk       in-ports       port       endpoint            _  X         g  W            out-ports      port       endpoint            _  Y         g                  tpda@10b08000         "   ?qcom,coresight-tpda arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  Z         g  `         port@1                 endpoint            _  [         g  a         port@2                 endpoint            _  \         g  b         port@3                 endpoint            _  ]         g  c         port@4                 endpoint            _  ^         g  d            out-ports      port       endpoint            _  _         g  S               tpdm@10b09000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  `         g  Z               tpdm@10b0a000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  a         g  [               tpdm@10b0b000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  b         g  \               tpdm@10b0c000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  c         g  ]               tpdm@10b0d000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            ?            U       out-ports      port       endpoint            _  d         g  ^               tpdm@10b20000         "   ?qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            ?            U          	  $disabled       out-ports      port       endpoint            _  e         g  f               tpda@10b23000         "   ?qcom,coresight-tpda arm,primecell                0                 o         	  +apb_pclk          	  $disabled       in-ports       port       endpoint            _  f         g  e            out-ports      port       endpoint            _  g         g  h               funnel@10b24000       +   ?arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk          	  $disabled       in-ports       port       endpoint            _  h         g  g            out-ports      port       endpoint            _  i         g  R               tpdm@10c08000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            ?            U       out-ports      port       endpoint            _  j         g  k               funnel@10c0b000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  k         g  j            out-ports      port       endpoint            _  l         g  |               tpdm@10c28000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            ?            U       out-ports      port       endpoint            _  m         g  s               tpdm@10c29000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  n         g  t               tpda@10c2b000         "   ?qcom,coresight-tpda arm,primecell                °                 o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  o         g  I         port@13                endpoint            _  p         g  F         port@14                endpoint            _  q         g  J         port@15                endpoint            _  r         g  E         port@1a                endpoint            _  s         g  m         port@1b                endpoint            _  t         g  n            out-ports      port       endpoint            _  u         g  v               funnel@10c2c000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  v         g  u         port@4                 endpoint            _  w         g           port@5                 endpoint            _  x         g              out-ports      port       endpoint            _  y         g  ?               tpdm@10c38000         "   ?qcom,coresight-tpdm arm,primecell                À                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  z         g  ~               tpdm@10c39000         "   ?qcom,coresight-tpdm arm,primecell                Ð                 o         	  +apb_pclk               @        -       out-ports      port       endpoint            _  {         g                 tpda@10c3c000         "   ?qcom,coresight-tpda arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  |         g  l         port@f                 endpoint            _  }         g  D         port@10                endpoint            _  ~         g  z         port@11                endpoint            _           g  {            out-ports      port       endpoint            _           g                 funnel@10c3d000       +   ?arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports       port       endpoint            _           g              out-ports      port       endpoint            _           g  w               tpdm@10cc1000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        -            ?            U          	  $disabled       out-ports      port       endpoint            _           g                 tpda@10cc4000         "   ?qcom,coresight-tpda arm,primecell                @                 o         	  +apb_pclk       in-ports                                 port@2                 endpoint            _           g              out-ports      port       endpoint            _           g                 funnel@10cc5000       +   ?arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports       port       endpoint            _           g              out-ports      port       endpoint            _           g  =               funnel@10d04000       +   ?arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk       in-ports                                 port@6                 endpoint            _           g              out-ports      port       endpoint            _           g  x               tpdm@10d08000         "   ?qcom,coresight-tpdm arm,primecell                Ѐ                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpdm@10d09000         "   ?qcom,coresight-tpdm arm,primecell                А                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpdm@10d0a000         "   ?qcom,coresight-tpdm arm,primecell                Р                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpdm@10d0b000         "   ?qcom,coresight-tpdm arm,primecell                а                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpdm@10d0c000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpdm@10d0d000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpdm@10d0e000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpdm@10d0f000         "   ?qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        -       out-ports      port       endpoint            _           g                 tpda@10d12000         "   ?qcom,coresight-tpda arm,primecell                                  o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _           g           port@1                 endpoint            _           g           port@2                 endpoint            _           g           port@3                 endpoint            _           g           port@4                 endpoint            _           g           port@5                 endpoint            _           g           port@6                 endpoint            _           g           port@7                 endpoint            _           g              out-ports      port       endpoint            _           g                 funnel@10d13000       +   ?arm,coresight-dynamic-funnel arm,primecell               0                 o         	  +apb_pclk       in-ports       port       endpoint            _           g              out-ports      port       endpoint            _           g                 iommu@15000000        1   ?qcom,x1e80100-smmu-500 qcom,smmu-500 arm,mmu-500                                         A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                                          [         g   <      iommu@15400000           ?arm,smmu-v3              @                          $                                        eventq gerror cmdq-sync          [        $okay ved         g        interrupt-controller@17000000            ?arm,gic-v3                                     0                	                               g           ~                                                  g      msi-controller@17040000          ?arm,gic-v3-its                                                     g            mailbox@17430000             ?qcom,x1e80100-cpucp-mbox                  C                                                            g   #      rsc@17500000             ?qcom,rpmh-rsc         0       P             Q             R                 Gdrv-0 drv-1 drv-2         $                                                                                               	  Zapps_rsc                -         g     bcm-voter            ?qcom,bcm-voter           g   &      clock-controller             ?qcom,x1e80100-rpmh-clk           o          +xo           Z            g         power-controller             ?qcom,x1e80100-rpmhpd            q                      g   ;   opp-table            ?operating-points-v2          g     opp-16                      g        opp-48             0         g         opp-52             4         g        opp-56             8         g        opp-60             <         g        opp-64             @         g   /      opp-80             P         g        opp-128                     g   0      opp-144                     g        opp-192                     g         opp-256                     g         opp-320           @         g        opp-336           P         g        opp-384                    g        opp-416                    g              regulators-0             ?qcom,pm8550-rpmh-regulators         b                                                   1          C          T          e          t               bob1          
  vreg_bob1            -          <l                    g        bob2          
  vreg_bob2            &5@         -                     g        ldo1            vreg_l1b_1p8             w@         w@                    g         ldo2            vreg_l2b_3p0             .          /M`                    g  2      ldo4            vreg_l4b_1p8             w@         w@                    g         ldo6            vreg_l6b_1p8             w@         -*                    g         ldo7            vreg_l7b_2p8             *         *                    g        ldo8            vreg_l8b_3p0             .          .                     g        ldo9            vreg_l9b_2p9             -*         -*                    g         ldo12           vreg_l12b_1p2            O         O                    g         ldo13           vreg_l13b_3p0            .          /M`                    g         ldo14           vreg_l14b_3p0            .          .                     g  3      ldo15           vreg_l15b_1p8            w@         w@                    g            regulators-1             ?qcom,pm8550ve-rpmh-regulators           c                                              smps4           vreg_s4c_1p8             R                              g        ldo1            vreg_l1c_1p2             O         O                    g        ldo2            vreg_l2c_0p8             m         	                    g        ldo3            vreg_l3c_0p8             m         	                    g            regulators-2             ?qcom,pmc8380-rpmh-regulators            d                                               ldo1            vreg_l1d_0p8             m         	                    g         ldo2            vreg_l2d_0p9                                          g         ldo3            vreg_l3d_1p8             w@         w@                    g  1         regulators-3             ?qcom,pmc8380-rpmh-regulators            e                          ldo2            vreg_l2e_0p8             m         	                    g         ldo3            vreg_l3e_1p2             O         O                    g            regulators-4             ?qcom,pmc8380-rpmh-regulators            f                                               smps1           vreg_s1f_0p7             
`                             g           regulators-6             ?qcom,pm8550ve-rpmh-regulators           i                                                    .     ldo1            vreg_l1i_1p8             w@         w@                    g        ldo2            vreg_l2i_1p2             O         O                    g        ldo3            vreg_l3i_0p8             m         	                    g            regulators-7             ?qcom,pm8550ve-rpmh-regulators           j                                         <     smps5           vreg_s5j_1p2             *@                             g        ldo1            vreg_l1j_0p8                                          g         ldo2            vreg_l2j_1p2             *@         *@                    g         ldo3            vreg_l3j_0p8             m         	                    g               timer@17800000           ?arm,armv7-timer-mem                                                                               frame@17801000                                                                J          frame@17803000               0                   	           J         	  $disabled          frame@17805000               P                   
           J         	  $disabled          frame@17807000               p                              J         	  $disabled          frame@17809000                                             J         	  $disabled          frame@1780b000                                             J         	  $disabled          frame@1780d000                                             J         	  $disabled             sram@18b4e000         
   ?mmio-sram                                                                              g     scp-sram-section@0           ?arm,scmi-shmem                           g   $      scp-sram-section@200             ?arm,scmi-shmem                          g   %         watchdog@1c840000         	  $disabled gwd         ?arm,sbsa-gwdt                                                                   g        efuse@221c8000        !   ?qcom,x1e80100-qfprom qcom,qfprom                 "                                          g     gpu-speed-bin@119                                        g            pmu@24091000          0   ?qcom,x1e80100-llcc-bwmon qcom,sc7280-llcc-bwmon              $	                       Q           o   !          !              q     opp-table            ?operating-points-v2          g     opp-0            5       opp-1            !b      opp-2            .       opp-3            ^       opp-4            hL       opp-5                   opp-6                   opp-7                   opp-8                    opp-9                        pmu@240b3400          *   ?qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $4                      E           o   ?         ?              q           g        pmu@240b5400          *   ?qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $T                      E           o   ?         ?              q           g     opp-table            ?operating-points-v2          g     opp-0            I>       opp-1            q@      opp-2            |       opp-3                   opp-4            Ȁ      opp-5           `@            pmu@240b6400          *   ?qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $d                      E           o   ?         ?              q        system-cache-controller@25000000             ?qcom,x1e80100-llcc               %               %               %@              %`              %              %              %              %              &               &                   Gllcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base llcc_broadcast_and_base               
         remoteproc@32300000          ?qcom,x1e80100-cdsp-pas               20               @  F         B                                          #  wdog fatal ready handover stop-ack           o               +xo              ;       ;   
   ;            cx mxc nsp          o            !                          
           3              Dstop            $okay          _  qcom/x1e80100/dell/latitude-7455/qccdsp8380.mbn qcom/x1e80100/dell/latitude-7455/cdsp_dtbs.elf           g     glink-edge          F   1                     1               Zcdsp            s      fastrpc          ?qcom,fastrpc            `fastrpcglink-apps-dsp           Zcdsp             t                             compute-cb@1             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@2             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@3             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@4             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@5             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@6             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@7             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@8             ?qcom,fastrpc-compute-cb                        <               [      compute-cb@10            ?qcom,fastrpc-compute-cb             
           <               [      compute-cb@11            ?qcom,fastrpc-compute-cb                        <               [      compute-cb@12            ?qcom,fastrpc-compute-cb                        <               [      compute-cb@13            ?qcom,fastrpc-compute-cb                        <               [                  timer            ?arm,armv8-timer       0                                   
         thermal-zones            g     aoss0-thermal           W         trips      trip-point0         g _        s           4hot       aoss0-critical          g 8        s        	   4critical                cpu0-0-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu0-0-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu0-1-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu0-1-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu0-2-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu0-2-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu0-3-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu0-3-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpuss0-top-thermal          W     	   trips      cpuss2-critical         g 8        s        	   4critical                cpuss0-btm-thermal          W     
   trips      cpuss2-critical         g 8        s        	   4critical                mem-thermal         W        trips      trip-point0         g _        s           4hot       mem-critical            g 8        s          	   4critical                video-thermal           W        trips      trip-point0         g _        s           4hot       video-critical          g 8        s        	   4critical                aoss1-thermal           W         trips      trip-point0         g _        s           4hot       aoss0-critical          g 8        s        	   4critical                cpu1-0-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu1-0-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu1-1-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu1-1-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu1-2-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu1-2-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu1-3-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu1-3-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpuss1-top-thermal          W     	   trips      cpuss2-critical         g 8        s        	   4critical                cpuss1-btm-thermal          W     
   trips      cpuss2-critical         g 8        s        	   4critical                aoss2-thermal           W         trips      trip-point0         g _        s           4hot       aoss0-critical          g 8        s        	   4critical                cpu2-0-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu2-0-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu2-1-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu2-1-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu2-2-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu2-2-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu2-3-top-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpu2-3-btm-thermal          W        trips      cpu-critical            g 8        s        	   4critical                cpuss2-top-thermal          W     	   trips      cpuss2-critical         g 8        s        	   4critical                cpuss2-btm-thermal          W     
   trips      cpuss2-critical         g 8        s        	   4critical                aoss3-thermal           W         trips      trip-point0         g _        s           4hot       aoss0-critical          g 8        s        	   4critical                nsp0-thermal            W        trips      trip-point0         g _        s           4hot       nsp0-critical           g 8        s        	   4critical                nsp1-thermal            W        trips      trip-point0         g _        s           4hot       nsp1-critical           g 8        s        	   4critical                nsp2-thermal            W        trips      trip-point0         g _        s           4hot       nsp2-critical           g 8        s        	   4critical                nsp3-thermal            W        trips      trip-point0         g _        s           4hot       nsp3-critical           g 8        s        	   4critical                gpuss-0-thermal         ~           W        cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                gpuss-1-thermal         ~           W        cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                gpuss-2-thermal         ~           W        cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                gpuss-3-thermal         ~           W        cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                gpuss-4-thermal         ~           W     	   cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                gpuss-5-thermal         ~           W     
   cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                gpuss-6-thermal         ~           W        cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                gpuss-7-thermal         ~           W        cooling-maps       map0                                 trips      trip-point0         g s        s           4passive          g        gpu-critical            g 8        s        	   4critical                camera0-thermal         W        trips      trip-point0         g _        s           4hot       camera0-critical            g 8        s        	   4critical                camera1-thermal         W        trips      trip-point0         g _        s           4hot       camera0-critical            g 8        s        	   4critical                pm8550-thermal          ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pm8550ve-2-thermal          ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pmc8380-3-thermal           ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pmc8380-4-thermal           ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pmc8380-5-thermal           ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pmc8380-6-thermal           ~   d        W           g     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pm8550ve-8-thermal          ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pm8550ve-9-thermal          ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot             pm8010-thermal          ~   d        W     trips      trip0           g s        s             4passive       trip1           g 8        s             4hot                aliases       $  /soc@0/geniqup@ac0000/serial@a98000       audio-codec          ?qcom,wcd9385-codec          Y          cdefault          w@         w@         w@         w@          $ I                   7         ^  @                            l   `                                                                     g        gpio-keys         
   ?gpio-keys           Y          cdefault    switch-lid          r   `   \                      i                                 pmic-glink        @   ?qcom,x1e80100-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink            `   y       `   {                                 connector@0          ?usb-c-connector                      dual            dual       ports                                port@0                  endpoint            _           g           port@1                 endpoint            _           g            port@2                 endpoint            _           g                  connector@1          ?usb-c-connector                     dual            dual       ports                                port@0                  endpoint            _           g           port@1                 endpoint            _           g            port@2                 endpoint            _           g                     leds          
   ?gpio-leds           Y          cdefault    led-camera-indicator            Zwhite:camera-indicator        
  	indicator           %            r   `   n            +none            Aoff          O         sound            ?qcom,x1e80100-sndcard        "  _WooferLeft IN WSA WSA_SPK1 OUT TweeterLeft IN WSA WSA_SPK2 OUT WooferRight IN WSA2 WSA_SPK1 OUT TweeterRight IN WSA2 WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC2 MIC BIAS2 VA DMIC0 MIC BIAS1 VA DMIC1 MIC BIAS1 VA DMIC0 VA MIC BIAS1 VA DMIC1 VA MIC BIAS1 TX SWR_INPUT1 ADC2_OUTPUT            9X1E80100-Dell-Latitude-7455          g     wcd-playback-dai-link           mWCD Playback       codec           w                         cpu         w     q      platform            w           wcd-capture-dai-link            mWCD Capture    codec           w                       cpu         w     x      platform            w           wsa-dai-link            mWSA Playback       codec         0  w                                        cpu         w     i      platform            w           va-dai-link         mVA Capture     codec           w             cpu         w     n      platform            w              regulator-cam-1p8            ?regulator-fixed         VREG_CAM_1P8             w@         w@           `   [                     Y          cdefault          g        regulator-edp-3p3            ?regulator-fixed         VREG_EDP_3P3             2Z         2Z           `   F                     Y          cdefault                   g  %      regulator-nvme           ?regulator-fixed         VREG_NVME_3P3            2Z         2Z           `                        Y          cdefault                   g         regulator-rtmr0-1p15             ?regulator-fixed         VREG_RTMR0_1P15          0         0          -                        Y          cdefault                   g         regulator-rtmr0-1p8          ?regulator-fixed         VREG_RTMR0_1P8           w@         w@          0                        Y          cdefault                   g         regulator-rtmr0-3p3          ?regulator-fixed         VREG_RTMR0_3P3           2Z         2Z                                   Y          cdefault                   g         regulator-rtmr1-1p15             ?regulator-fixed         VREG_RTMR1_1P15          0         0           `                        Y          cdefault                   g         regulator-rtmr1-1p8          ?regulator-fixed         VREG_RTMR1_1P8           w@         w@           `                        Y          cdefault                   g         regulator-rtmr1-3p3          ?regulator-fixed         VREG_RTMR1_3P3           2Z         2Z           `                        Y          cdefault                   g         regulator-vph-pwr            ?regulator-fixed         vph_pwr          8u          8u                            g        regulator-wcn-3p3            ?regulator-fixed         VREG_WCN_3P3             2Z         2Z           `                        Y          cdefault                   g        regulator-wcn-0p95           ?regulator-fixed         VREG_WCN_0P95            ~         ~                   g        regulator-wcn-1p9            ?regulator-fixed         VREG_WCN_1P9                                         g        wcn7850-pmu          ?qcom,wcn7850-pmu                      _                                                      `   u               `   t            Y          cdefault    regulators     ldo0            vreg_pmu_rfa_cmn             g   z      ldo1            vreg_pmu_aon_0p59            g   w      ldo2            vreg_pmu_wlcx_0p8            g   x      ldo3            vreg_pmu_wlmx_0p85           g   y      ldo4            vreg_pmu_btcmx_0p85          g        ldo5            vreg_pmu_rfa_0p8             g   {      ldo6            vreg_pmu_rfa_1p2             g   |      ldo7            vreg_pmu_rfa_1p8             g   }      ldo8            vreg_pmu_pcie_0p9            g         ldo9            vreg_pmu_pcie_1p8            g               __symbols__         /clocks/xo-board            /clocks/sleep-clk           /clocks/bi-tcxo-div2-clk            /clocks/bi-tcxo-ao-div2-clk         */cpus/cpu@0         //cpus/cpu@0/l2-cache            4/cpus/cpu@100           9/cpus/cpu@200           >/cpus/cpu@300           C/cpus/cpu@10000         H/cpus/cpu@10000/l2-cache            M/cpus/cpu@10100         R/cpus/cpu@10200         W/cpus/cpu@10300         \/cpus/cpu@20000         a/cpus/cpu@20000/l2-cache            f/cpus/cpu@20100         k/cpus/cpu@20200         q/cpus/cpu@20300         w/cpus/cpu-map/cluster2          /cpus/idle-states/cpu-sleep-0         )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1          #  /dummy-sink/in-ports/port/endpoint          /firmware/scm           /firmware/scmi/protocol@13          /interconnect-0         /interconnect-1         /psci/power-domain-cpu0         /psci/power-domain-cpu1         /psci/power-domain-cpu2         /psci/power-domain-cpu3         /psci/power-domain-cpu4         /psci/power-domain-cpu5         /psci/power-domain-cpu6         	/psci/power-domain-cpu7         /psci/power-domain-cpu8         /psci/power-domain-cpu9         !/psci/power-domain-cpu10            */psci/power-domain-cpu11             3/psci/power-domain-cpu-cluster0          ?/psci/power-domain-cpu-cluster1          K/psci/power-domain-cpu-cluster2         W/psci/power-domain-system         %  a/reserved-memory/gunyah-hyp@80000000          *  p/reserved-memory/hyp-elf-package@80800000           /reserved-memory/ncc@80a00000         $  /reserved-memory/cpucp-log@80e00000          /reserved-memory/cpucp@80e40000       &  /reserved-memory/tags-region@81400000         $  /reserved-memory/xbl-dtlog@81a00000       &  /reserved-memory/xbl-ramdump@81a40000         $  /reserved-memory/aop-image@81c00000       %  /reserved-memory/aop-cmd-db@81c60000          %  /reserved-memory/aop-config@81c80000          )  /reserved-memory/tme-crash-dump@81ca0000          "  
/reserved-memory/tme-log@81ce0000         #  /reserved-memory/uefi-log@81ce4000        '  #/reserved-memory/secdata-apss@81cff000        (  4/reserved-memory/pdp-ns-shared@81e00000       "  F/reserved-memory/gpu-prr@81f00000         &  R/reserved-memory/tpm-control@81f10000         *  b/reserved-memory/usb-ucsi-shared@81f20000         "  v/reserved-memory/pld-pep@81f30000         "  /reserved-memory/pld-gmu@81f36000         "  /reserved-memory/pld-pdp@81f37000         "  /reserved-memory/tz-stat@82700000         )  /reserved-memory/xbl-tmp-buffer@82800000          /  /reserved-memory/adsp-rpc-remote-heap@84b00000        3  /reserved-memory/spu-secure-shared-memory@85300000        (  /reserved-memory/adsp-boot-dtb@866c0000       &  /reserved-memory/spss-region@86700000         $  /reserved-memory/adsp-boot@86b00000          /reserved-memory/video@87700000       #  )/reserved-memory/adspslpi@87e00000        &  6/reserved-memory/q6-adsp-dtb@8b800000           F/reserved-memory/cdsp@8b900000        &  O/reserved-memory/q6-cdsp-dtb@8d900000         (  _/reserved-memory/gpu-microcode@8d9fe000         q/reserved-memory/cvp@8da00000         !  y/reserved-memory/camera@8e100000          &  /reserved-memory/av1-encoder@8e900000           /reserved-memory/wpss@8fa00000        &  /reserved-memory/q6-wpss-dtb@91300000         !  /reserved-memory/xbl-sc@d8000000            /reserved-memory/qtee@d80e0000          /reserved-memory/ta@d8600000            /reserved-memory/tags@e1000000        #  /reserved-memory/llcc-lpi@ff800000          /reserved-memory/smem@ffe00000          /opp-table-qup100mhz            /opp-table-qup120mhz            /smp2p-adsp/master-kernel           !/smp2p-adsp/slave-kernel            //smp2p-cdsp/master-kernel           >/smp2p-cdsp/slave-kernel            L/soc@0          P/soc@0/clock-controller@100000          T/soc@0/mailbox@408000           Y/soc@0/dma-controller@800000            b/soc@0/geniqup@8c0000         !  j/soc@0/geniqup@8c0000/i2c@880000          !  p/soc@0/geniqup@8c0000/spi@880000          !  v/soc@0/geniqup@8c0000/i2c@884000          !  |/soc@0/geniqup@8c0000/spi@884000          !  /soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  /soc@0/geniqup@8c0000/i2c@890000          !  /soc@0/geniqup@8c0000/spi@890000          !  /soc@0/geniqup@8c0000/i2c@894000          !  /soc@0/geniqup@8c0000/spi@894000          $  /soc@0/geniqup@8c0000/serial@894000       !  /soc@0/geniqup@8c0000/i2c@898000          !  /soc@0/geniqup@8c0000/spi@898000          !  /soc@0/geniqup@8c0000/i2c@89c000          !  /soc@0/geniqup@8c0000/spi@89c000            /soc@0/dma-controller@a00000            /soc@0/geniqup@ac0000         !  /soc@0/geniqup@ac0000/i2c@a80000          !  /soc@0/geniqup@ac0000/spi@a80000          !  /soc@0/geniqup@ac0000/i2c@a84000          !  /soc@0/geniqup@ac0000/spi@a84000          !  /soc@0/geniqup@ac0000/i2c@a88000          !  /soc@0/geniqup@ac0000/spi@a88000          !  /soc@0/geniqup@ac0000/i2c@a8c000          !  /soc@0/geniqup@ac0000/spi@a8c000          !  /soc@0/geniqup@ac0000/i2c@a90000          !  /soc@0/geniqup@ac0000/spi@a90000          !  /soc@0/geniqup@ac0000/i2c@a94000          !   /soc@0/geniqup@ac0000/spi@a94000          !  &/soc@0/geniqup@ac0000/i2c@a98000          !  ,/soc@0/geniqup@ac0000/spi@a98000          $  2/soc@0/geniqup@ac0000/serial@a98000       !  9/soc@0/geniqup@ac0000/i2c@a9c000          !  ?/soc@0/geniqup@ac0000/spi@a9c000            E/soc@0/dma-controller@b00000            N/soc@0/geniqup@bc0000         !  V/soc@0/geniqup@bc0000/i2c@b80000          !  [/soc@0/geniqup@bc0000/spi@b80000          !  `/soc@0/geniqup@bc0000/i2c@b84000          !  e/soc@0/geniqup@bc0000/spi@b84000          !  j/soc@0/geniqup@bc0000/i2c@b88000          $  o/soc@0/geniqup@bc0000/serial@b88000       !  u/soc@0/geniqup@bc0000/spi@b88000          !  z/soc@0/geniqup@bc0000/i2c@b8c000          C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b8c000          !  /soc@0/geniqup@bc0000/i2c@b90000          !  /soc@0/geniqup@bc0000/spi@b90000          !  /soc@0/geniqup@bc0000/i2c@b94000          -  /soc@0/geniqup@bc0000/i2c@b94000/redriver@43          -  /soc@0/geniqup@bc0000/i2c@b94000/redriver@4f          !  /soc@0/geniqup@bc0000/spi@b94000          !  /soc@0/geniqup@bc0000/i2c@b98000          !  /soc@0/geniqup@bc0000/spi@b98000          !  /soc@0/geniqup@bc0000/i2c@b9c000          C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@1/endpoint        C  1/soc@0/geniqup@bc0000/i2c@b9c000/typec-mux@8/ports/port@2/endpoint        !  I/soc@0/geniqup@bc0000/spi@b9c000            N/soc@0/thermal-sensor@c271000           U/soc@0/thermal-sensor@c272000           \/soc@0/thermal-sensor@c273000           c/soc@0/thermal-sensor@c274000           j/soc@0/phy@fd3000           z/soc@0/phy@fd5000         (  /soc@0/phy@fd5000/ports/port@0/endpoint       (  /soc@0/phy@fd5000/ports/port@1/endpoint       (  /soc@0/phy@fd5000/ports/port@2/endpoint         /soc@0/phy@fd9000           /soc@0/phy@fda000         (  /soc@0/phy@fda000/ports/port@0/endpoint       (  /soc@0/phy@fda000/ports/port@1/endpoint       (  #/soc@0/phy@fda000/ports/port@2/endpoint         :/soc@0/phy@fde000           J/soc@0/phy@fdf000         (  [/soc@0/phy@fdf000/ports/port@0/endpoint       (  p/soc@0/phy@fdf000/ports/port@1/endpoint       (  /soc@0/phy@fdf000/ports/port@2/endpoint         /soc@0/interconnect@1500000         /soc@0/interconnect@1600000         /soc@0/interconnect@1680000         /soc@0/interconnect@16c0000         /soc@0/interconnect@16d0000         /soc@0/interconnect@16e0000         /soc@0/interconnect@1700000         /soc@0/interconnect@1740000         	/soc@0/interconnect@1750000         /soc@0/interconnect@1760000         (/soc@0/interconnect@1770000         7/soc@0/interconnect@1780000         @/soc@0/pcie@1bd0000         F/soc@0/pcie@1bd0000/opp-table           V/soc@0/pcie@1bd0000/pcie@0          a/soc@0/phy@1be0000          k/soc@0/pci@1bf8000          r/soc@0/phy@1bfc000          }/soc@0/pci@1c00000          /soc@0/phy@1c06000          /soc@0/pci@1c08000          /soc@0/pci@1c08000/pcie@0           /soc@0/phy@1c0e000          /soc@0/hwlock@1f40000            /soc@0/clock-controller@1fc0000         /soc@0/gpu@3d00000          /soc@0/gpu@3d00000/zap-shader           /soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          /soc@0/gmu@3d6a000/opp-table             /soc@0/clock-controller@3d90000         /soc@0/iommu@3da0000            /soc@0/interconnect@26400000            /soc@0/interconnect@320c0000            
/soc@0/remoteproc@6800000         3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :   /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  +/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  4/soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  :/soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         B/soc@0/codec@6aa0000            R/soc@0/soundwire@6ab0000          %  W/soc@0/soundwire@6ab0000/speaker@0,0          %  d/soc@0/soundwire@6ab0000/speaker@0,1            r/soc@0/codec@6ac0000            /soc@0/soundwire@6ad0000          #  /soc@0/soundwire@6ad0000/codec@0,4          /soc@0/codec@6ae0000            /soc@0/codec@6b00000            /soc@0/soundwire@6b10000          %  /soc@0/soundwire@6b10000/speaker@0,0          %  /soc@0/soundwire@6b10000/speaker@0,1             /soc@0/clock-controller@6b6c000         /soc@0/soundwire@6d30000          #  /soc@0/soundwire@6d30000/codec@0,3          /soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  /soc@0/pinctrl@6e80000/tx-swr-active-state        +  /soc@0/pinctrl@6e80000/rx-swr-active-state        ,  /soc@0/pinctrl@6e80000/dmic01-default-state       ,  %/soc@0/pinctrl@6e80000/dmic23-default-state       ,  4/soc@0/pinctrl@6e80000/wsa-swr-active-state       -  C/soc@0/pinctrl@6e80000/wsa2-swr-active-state          1  S/soc@0/pinctrl@6e80000/spkr-01-sd-n-active-state          1  g/soc@0/pinctrl@6e80000/spkr-23-sd-n-active-state             {/soc@0/clock-controller@6ea0000         /soc@0/interconnect@7e40000         /soc@0/interconnect@7400000         /soc@0/interconnect@7430000         /soc@0/mmc@8804000          /soc@0/mmc@8804000/opp-table            /soc@0/mmc@8844000          /soc@0/mmc@8844000/opp-table            /soc@0/phy@88e0000          /soc@0/phy@88e1000          /soc@0/phy@88e2000          /soc@0/phy@88e3000          /soc@0/phy@88e5000          %/soc@0/usb@a0f8800          //soc@0/usb@a0f8800/usb@a000000        5  >/soc@0/usb@a0f8800/usb@a000000/ports/port@0/endpoint          5  P/soc@0/usb@a0f8800/usb@a000000/ports/port@1/endpoint            b/soc@0/usb@a2f8800          h/soc@0/usb@a2f8800/usb@a200000        -  s/soc@0/usb@a2f8800/usb@a200000/port/endpoint            /soc@0/usb@a4f8800          /soc@0/usb@a4f8800/usb@a400000          /soc@0/usb@a6f8800          /soc@0/usb@a6f8800/usb@a600000        5  /soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  /soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint            /soc@0/usb@a8f8800          /soc@0/usb@a8f8800/usb@a800000        5  /soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint          5  /soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint            /soc@0/video-codec@aa00000        %  /soc@0/video-codec@aa00000/opp-table             "/soc@0/clock-controller@aaf0000       !  */soc@0/display-subsystem@ae00000          <  //soc@0/display-subsystem@ae00000/display-controller@ae01000       R  8/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  G/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpoint         R  V/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpoint         R  e/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpoint         F  t/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table         @  !/soc@0/display-subsystem@ae00000/displayport-controller@aea0000       V  */soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpoint         V  6/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@1/endpoint         J  C/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table         \  V/soc@0/display-subsystem@ae00000/displayport-controller@aea0000/aux-bus/panel/port/endpoint         c/soc@0/phy@aec2a00          p/soc@0/phy@aec5a00           }/soc@0/clock-controller@af00000       $  /soc@0/interrupt-controller@b220000          /soc@0/power-management@c300000         /soc@0/arbiter@c400000        $  /soc@0/arbiter@c400000/spmi@c42d000       +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0        4  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300       ;  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin         4  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@6100       6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100         G  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@48        6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00         I  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-en@73          J  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-end@75         L  #/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-delta@76       5  6/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800          /  D/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm        +  P/soc@0/arbiter@c400000/spmi@c42d000/pmic@1        :  W/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a00         5  i/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800          P  v/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-state       K  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/usb0-3p3-reg-en-state        ?  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00        /  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800          +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@4        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a00         5   ,/soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800          +   </soc@0/arbiter@c400000/spmi@c42d000/pmic@5        :   F/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a00         5   [/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800          P   k/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/usb0-pwr-1p15-reg-en-state       +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@6        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@6/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@6/gpio@8800          +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800          +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a00         5  !/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800          K  !/soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/usb0-1p8-reg-en-state        +  !#/soc@0/arbiter@c400000/spmi@c42d000/pmic@c        ;  !*/soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400        $  !</soc@0/arbiter@c400000/spmi@c432000       +  !F/soc@0/arbiter@c400000/spmi@c432000/pmic@7        4  !P/soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00       +  !i/soc@0/arbiter@c400000/spmi@c432000/pmic@a        4  !s/soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00       +  !/soc@0/arbiter@c400000/spmi@c432000/pmic@b        4  !/soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00       +  !/soc@0/arbiter@c400000/spmi@c432000/pmic@c        4  !/soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00         /soc@0/pinctrl@f100000        .  !/soc@0/pinctrl@f100000/edp0-hpd-default-state         /  !/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  "+/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  "=/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  "O/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  "a/soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  "s/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  "/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       0  #	/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state       0  #/soc@0/pinctrl@f100000/qup-i2c17-data-clk-state       0  #//soc@0/pinctrl@f100000/qup-i2c18-data-clk-state       0  #B/soc@0/pinctrl@f100000/qup-i2c19-data-clk-state       0  #U/soc@0/pinctrl@f100000/qup-i2c20-data-clk-state       0  #h/soc@0/pinctrl@f100000/qup-i2c21-data-clk-state       0  #{/soc@0/pinctrl@f100000/qup-i2c22-data-clk-state       0  #/soc@0/pinctrl@f100000/qup-i2c23-data-clk-state       )  #/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  $/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  $%/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  $7/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  $C/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  $U/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  $a/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  $s/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  $/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  $/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  $/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  %-/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  %:/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  %M/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  %Z/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       *  %m/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  %z/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi16-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi16-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi17-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi17-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi18-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi18-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi19-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi19-data-clk-state       *  &/soc@0/pinctrl@f100000/qup-spi20-cs-state         0  &/soc@0/pinctrl@f100000/qup-spi20-data-clk-state       *  &-/soc@0/pinctrl@f100000/qup-spi21-cs-state         0  &:/soc@0/pinctrl@f100000/qup-spi21-data-clk-state       *  &M/soc@0/pinctrl@f100000/qup-spi22-cs-state         0  &Z/soc@0/pinctrl@f100000/qup-spi22-data-clk-state       *  &m/soc@0/pinctrl@f100000/qup-spi23-cs-state         0  &z/soc@0/pinctrl@f100000/qup-spi23-data-clk-state       /  &/soc@0/pinctrl@f100000/qup-uart2-default-state        0  &/soc@0/pinctrl@f100000/qup-uart14-default-state       0  &/soc@0/pinctrl@f100000/qup-uart21-default-state       *  &/soc@0/pinctrl@f100000/sdc2-default-state         (  &/soc@0/pinctrl@f100000/sdc2-sleep-state       -  &/soc@0/pinctrl@f100000/cam-rgb-default-state          .  &/soc@0/pinctrl@f100000/cam-indicator-en-state         (  &/soc@0/pinctrl@f100000/cam-ldo-en-state       '  '	/soc@0/pinctrl@f100000/edp-bl-en-state        (  '/soc@0/pinctrl@f100000/edp-reg-en-state       +  '/soc@0/pinctrl@f100000/eusb3-reset-n-state        +  ',/soc@0/pinctrl@f100000/eusb5-reset-n-state        (  ':/soc@0/pinctrl@f100000/hall-int-n-state       *  'M/soc@0/pinctrl@f100000/kybd-default-state         )  'Z/soc@0/pinctrl@f100000/nvme-reg-en-state          +  'f/soc@0/pinctrl@f100000/pcie4-default-state        ,  't/soc@0/pinctrl@f100000/pcie6a-default-state       2  '/soc@0/pinctrl@f100000/rtmr1-reset-n-active-state         +  '/soc@0/pinctrl@f100000/sdc2-card-det-state        *  '/soc@0/pinctrl@f100000/tpad-default-state         )  '/soc@0/pinctrl@f100000/ts0-default-state          2  '/soc@0/pinctrl@f100000/usb1-pwr-1p15-reg-en-state         1  '/soc@0/pinctrl@f100000/usb1-pwr-1p8-reg-en-state          1  '/soc@0/pinctrl@f100000/usb1-pwr-3p3-reg-en-state          0  '/soc@0/pinctrl@f100000/wcd-reset-n-active-state       '  (/soc@0/pinctrl@f100000/wcn-sw-en-state        ,  (/soc@0/pinctrl@f100000/wcn-wlan-bt-en-state       ,  (/soc@0/stm@10002000/out-ports/port/endpoint       -  ($/soc@0/tpdm@10003000/out-ports/port/endpoint          .  (1/soc@0/tpda@10004000/in-ports/port@0/endpoint         .  (?/soc@0/tpda@10004000/in-ports/port@1/endpoint         -  (M/soc@0/tpda@10004000/out-ports/port/endpoint          -  ([/soc@0/tpdm@1000f000/out-ports/port/endpoint          0  (i/soc@0/funnel@10041000/in-ports/port@6/endpoint       0  (u/soc@0/funnel@10041000/in-ports/port@7/endpoint       /  (/soc@0/funnel@10041000/out-ports/port/endpoint        0  (/soc@0/funnel@10042000/in-ports/port@2/endpoint       0  (/soc@0/funnel@10042000/in-ports/port@5/endpoint       0  (/soc@0/funnel@10042000/in-ports/port@6/endpoint       /  (/soc@0/funnel@10042000/out-ports/port/endpoint        0  (/soc@0/funnel@10045000/in-ports/port@0/endpoint       0  (/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  (/soc@0/funnel@10045000/out-ports/port/endpoint        -  (/soc@0/tpdm@10800000/out-ports/port/endpoint          -  (/soc@0/tpdm@1082c000/out-ports/port/endpoint          -  )/soc@0/tpdm@10841000/out-ports/port/endpoint          -  )/soc@0/tpdm@10844000/out-ports/port/endpoint          .  )'/soc@0/funnel@10846000/in-ports/port/endpoint         /  );/soc@0/funnel@10846000/out-ports/port/endpoint        -  )O/soc@0/tpdm@109d0000/out-ports/port/endpoint          -  )[/soc@0/tpdm@10ac0000/out-ports/port/endpoint          -  )j/soc@0/tpdm@10ac1000/out-ports/port/endpoint          .  )y/soc@0/tpda@10ac4000/in-ports/port@8/endpoint         .  )/soc@0/tpda@10ac4000/in-ports/port@9/endpoint         -  )/soc@0/tpda@10ac4000/out-ports/port/endpoint          .  )/soc@0/funnel@10ac5000/in-ports/port/endpoint         /  )/soc@0/funnel@10ac5000/out-ports/port/endpoint        0  )/soc@0/funnel@10b04000/in-ports/port@3/endpoint       0  )/soc@0/funnel@10b04000/in-ports/port@6/endpoint       0  )/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  )/soc@0/funnel@10b04000/out-ports/port/endpoint          */soc@0/tmc@10b05000       +  */soc@0/tmc@10b05000/in-ports/port/endpoint        ,  */soc@0/tmc@10b05000/out-ports/port/endpoint       2  */soc@0/replicator@10b06000/in-ports/port/endpoint         3  *%/soc@0/replicator@10b06000/out-ports/port/endpoint        .  *3/soc@0/tpda@10b08000/in-ports/port@0/endpoint         .  *A/soc@0/tpda@10b08000/in-ports/port@1/endpoint         .  *O/soc@0/tpda@10b08000/in-ports/port@2/endpoint         .  *]/soc@0/tpda@10b08000/in-ports/port@3/endpoint         .  *k/soc@0/tpda@10b08000/in-ports/port@4/endpoint         -  *y/soc@0/tpda@10b08000/out-ports/port/endpoint          -  */soc@0/tpdm@10b09000/out-ports/port/endpoint          -  */soc@0/tpdm@10b0a000/out-ports/port/endpoint          -  */soc@0/tpdm@10b0b000/out-ports/port/endpoint          -  */soc@0/tpdm@10b0c000/out-ports/port/endpoint          -  */soc@0/tpdm@10b0d000/out-ports/port/endpoint          -  */soc@0/tpdm@10b20000/out-ports/port/endpoint          ,  */soc@0/tpda@10b23000/in-ports/port/endpoint       -  */soc@0/tpda@10b23000/out-ports/port/endpoint          .  +/soc@0/funnel@10b24000/in-ports/port/endpoint         /  +/soc@0/funnel@10b24000/out-ports/port/endpoint        -  +(/soc@0/tpdm@10c08000/out-ports/port/endpoint          0  +4/soc@0/funnel@10c0b000/in-ports/port@4/endpoint       /  +B/soc@0/funnel@10c0b000/out-ports/port/endpoint        -  +P/soc@0/tpdm@10c28000/out-ports/port/endpoint          -  +_/soc@0/tpdm@10c29000/out-ports/port/endpoint          .  +m/soc@0/tpda@10c2b000/in-ports/port@4/endpoint         /  +|/soc@0/tpda@10c2b000/in-ports/port@13/endpoint        /  +/soc@0/tpda@10c2b000/in-ports/port@14/endpoint        /  +/soc@0/tpda@10c2b000/in-ports/port@15/endpoint        /  +/soc@0/tpda@10c2b000/in-ports/port@1a/endpoint        /  +/soc@0/tpda@10c2b000/in-ports/port@1b/endpoint        -  +/soc@0/tpda@10c2b000/out-ports/port/endpoint          0  +/soc@0/funnel@10c2c000/in-ports/port@0/endpoint       0  +/soc@0/funnel@10c2c000/in-ports/port@4/endpoint       0  +/soc@0/funnel@10c2c000/in-ports/port@5/endpoint       /  ,/soc@0/funnel@10c2c000/out-ports/port/endpoint        -  ,/soc@0/tpdm@10c38000/out-ports/port/endpoint          -  ,//soc@0/tpdm@10c39000/out-ports/port/endpoint          .  ,?/soc@0/tpda@10c3c000/in-ports/port@4/endpoint         .  ,N/soc@0/tpda@10c3c000/in-ports/port@f/endpoint         /  ,^/soc@0/tpda@10c3c000/in-ports/port@10/endpoint        /  ,n/soc@0/tpda@10c3c000/in-ports/port@11/endpoint        -  ,~/soc@0/tpda@10c3c000/out-ports/port/endpoint          .  ,/soc@0/funnel@10c3d000/in-ports/port/endpoint         /  ,/soc@0/funnel@10c3d000/out-ports/port/endpoint        -  ,/soc@0/tpdm@10cc1000/out-ports/port/endpoint          .  ,/soc@0/tpda@10cc4000/in-ports/port@2/endpoint         -  ,/soc@0/tpda@10cc4000/out-ports/port/endpoint          .  ,/soc@0/funnel@10cc5000/in-ports/port/endpoint         /  ,/soc@0/funnel@10cc5000/out-ports/port/endpoint        0  ,/soc@0/funnel@10d04000/in-ports/port@6/endpoint       /  -/soc@0/funnel@10d04000/out-ports/port/endpoint        -  -/soc@0/tpdm@10d08000/out-ports/port/endpoint          -  -./soc@0/tpdm@10d09000/out-ports/port/endpoint          -  -=/soc@0/tpdm@10d0a000/out-ports/port/endpoint          -  -L/soc@0/tpdm@10d0b000/out-ports/port/endpoint          -  -[/soc@0/tpdm@10d0c000/out-ports/port/endpoint          -  -j/soc@0/tpdm@10d0d000/out-ports/port/endpoint          -  -y/soc@0/tpdm@10d0e000/out-ports/port/endpoint          -  -/soc@0/tpdm@10d0f000/out-ports/port/endpoint          .  -/soc@0/tpda@10d12000/in-ports/port@0/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@1/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@2/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@3/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@4/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@5/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@6/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@7/endpoint         -  ./soc@0/tpda@10d12000/out-ports/port/endpoint          .  ./soc@0/funnel@10d13000/in-ports/port/endpoint         /  .%/soc@0/funnel@10d13000/out-ports/port/endpoint          .5/soc@0/iommu@15000000           .?/soc@0/iommu@15400000         %  .I/soc@0/interrupt-controller@17000000          =  .N/soc@0/interrupt-controller@17000000/msi-controller@17040000            .V/soc@0/mailbox@17430000         .a/soc@0/rsc@17500000         .j/soc@0/rsc@17500000/bcm-voter         %  .y/soc@0/rsc@17500000/clock-controller          %  ./soc@0/rsc@17500000/power-controller          /  ./soc@0/rsc@17500000/power-controller/opp-table        6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-16         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-48         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-52         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-56         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-60         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-64         6  //soc@0/rsc@17500000/power-controller/opp-table/opp-80         7  /%/soc@0/rsc@17500000/power-controller/opp-table/opp-128        7  /4/soc@0/rsc@17500000/power-controller/opp-table/opp-144        7  /F/soc@0/rsc@17500000/power-controller/opp-table/opp-192        7  /X/soc@0/rsc@17500000/power-controller/opp-table/opp-256        7  /g/soc@0/rsc@17500000/power-controller/opp-table/opp-320        7  /y/soc@0/rsc@17500000/power-controller/opp-table/opp-336        7  //soc@0/rsc@17500000/power-controller/opp-table/opp-384        7  //soc@0/rsc@17500000/power-controller/opp-table/opp-416        &  //soc@0/rsc@17500000/regulators-0/bob1         &  //soc@0/rsc@17500000/regulators-0/bob2         &  //soc@0/rsc@17500000/regulators-0/ldo1         &  //soc@0/rsc@17500000/regulators-0/ldo2         &  //soc@0/rsc@17500000/regulators-0/ldo4         &  //soc@0/rsc@17500000/regulators-0/ldo6         &  //soc@0/rsc@17500000/regulators-0/ldo7         &  0/soc@0/rsc@17500000/regulators-0/ldo8         &  0/soc@0/rsc@17500000/regulators-0/ldo9         '  0/soc@0/rsc@17500000/regulators-0/ldo12        '  0-/soc@0/rsc@17500000/regulators-0/ldo13        '  0;/soc@0/rsc@17500000/regulators-0/ldo14        '  0I/soc@0/rsc@17500000/regulators-0/ldo15        '  0W/soc@0/rsc@17500000/regulators-1/smps4        &  0d/soc@0/rsc@17500000/regulators-1/ldo1         &  0q/soc@0/rsc@17500000/regulators-1/ldo2         &  0~/soc@0/rsc@17500000/regulators-1/ldo3         &  0/soc@0/rsc@17500000/regulators-2/ldo1         &  0/soc@0/rsc@17500000/regulators-2/ldo2         &  0/soc@0/rsc@17500000/regulators-2/ldo3         &  0/soc@0/rsc@17500000/regulators-3/ldo2         &  0/soc@0/rsc@17500000/regulators-3/ldo3         '  0/soc@0/rsc@17500000/regulators-4/smps1        &  0/soc@0/rsc@17500000/regulators-6/ldo1         &  0/soc@0/rsc@17500000/regulators-6/ldo2         &  0/soc@0/rsc@17500000/regulators-6/ldo3         '  1 /soc@0/rsc@17500000/regulators-7/smps5        &  1/soc@0/rsc@17500000/regulators-7/ldo1         &  1/soc@0/rsc@17500000/regulators-7/ldo2         &  1'/soc@0/rsc@17500000/regulators-7/ldo3           14/soc@0/sram@18b4e000          (  19/soc@0/sram@18b4e000/scp-sram-section@0       *  1G/soc@0/sram@18b4e000/scp-sram-section@200           1U/soc@0/watchdog@1c840000            1c/soc@0/efuse@221c8000         (  1j/soc@0/efuse@221c8000/gpu-speed-bin@119         1x/soc@0/pmu@24091000/opp-table           1/soc@0/pmu@240b3400         1/soc@0/pmu@240b5400         1/soc@0/pmu@240b5400/opp-table           1/soc@0/remoteproc@32300000          1/thermal-zones        1  1/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  2/thermal-zones/gpuss-3-thermal/trips/trip-point0          1  2/thermal-zones/gpuss-4-thermal/trips/trip-point0          1  2#/thermal-zones/gpuss-5-thermal/trips/trip-point0          1  21/thermal-zones/gpuss-6-thermal/trips/trip-point0          1  2?/thermal-zones/gpuss-7-thermal/trips/trip-point0          !  2M/thermal-zones/pmc8380-6-thermal            2_/audio-codec          .  2g/pmic-glink/connector@0/ports/port@0/endpoint         .  2|/pmic-glink/connector@0/ports/port@1/endpoint         .  2/pmic-glink/connector@0/ports/port@2/endpoint         .  2/pmic-glink/connector@1/ports/port@0/endpoint         .  2/pmic-glink/connector@1/ports/port@1/endpoint         .  2/pmic-glink/connector@1/ports/port@2/endpoint           2/sound          2/regulator-cam-1p8          3/regulator-edp-3p3          3/regulator-nvme         3/regulator-rtmr0-1p15           3)/regulator-rtmr0-1p8            38/regulator-rtmr0-3p3            3G/regulator-rtmr1-1p15           3W/regulator-rtmr1-1p8            3f/regulator-rtmr1-3p3            3u/regulator-vph-pwr          3}/regulator-wcn-3p3          3/regulator-wcn-0p95         3/regulator-wcn-1p9          3/wcn7850-pmu/regulators/ldo0            3/wcn7850-pmu/regulators/ldo1            3/wcn7850-pmu/regulators/ldo2            3/wcn7850-pmu/regulators/ldo3            3/wcn7850-pmu/regulators/ldo4            4/wcn7850-pmu/regulators/ldo5            4/wcn7850-pmu/regulators/ldo6            4#/wcn7850-pmu/regulators/ldo7            44/wcn7850-pmu/regulators/ldo8            4F/wcn7850-pmu/regulators/ldo9             	interrupt-parent #address-cells #size-cells chassis-type model compatible clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us remote-endpoint interconnects qcom,dload-mode mboxes mbox-names shmem #power-domain-cells #interconnect-cells qcom,bcm-voters interrupts domain-idle-states ranges no-map hwlocks size reusable linux,cma-default opp-hz required-opps interrupts-extended qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names operating-points-v2 hid-descr-addr max-speed vddaon-supply vddwlcx-supply vddwlmx-supply vddrfacmn-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply wakeup-source vdd-supply vdd33-supply vdd33-cap-supply vddar-supply vddat-supply vddio-supply reset-gpios retimer-switch orientation-switch #phy-cells vdd3v3-supply vdd1v8-supply interrupt-names #qcom,sensors #thermal-sensor-cells resets vdda12-supply phys reset-names mode-switch vdda-phy-supply vdda-pll-supply reg-names bus-range dma-coherent linux,pci-domain num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates phy-names eq-presets-8gts eq-presets-16gts opp-peak-kBps opp-level clock-output-names msi-map perst-gpios wake-gpios vddpe-3v3-supply qcom,4ln-config-sel vddpcie0p9-supply vddpcie1p8-supply #hwlock-cells qcom,gmu #cooling-cells nvmem-cells nvmem-cell-names memory-region firmware-name qcom,opp-acd-level opp-supported-hw qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain sound-name-prefix qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,rx-port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping vdd-micb-supply qcom,dmic-sample-rate gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,usb3_lpm_capable snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk qcom,select-utmi-as-pipe-clk maximum-speed dr_mode assigned-clock-parents data-lanes link-frequencies enable-gpios power-supply qcom,pdc-ranges qcom,ee qcom,channel linux,code qcom,no-alarm qcom,uefi-rtc-info bits #pwm-cells power-source input-disable output-enable vdd18-supply vdd3-supply wakeup-parent gpio-reserved-ranges bias-pull-up qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num #redistributor-regions redistributor-stride msi-controller #msi-cells qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode vdd-l1-supply vdd-l2-supply vdd-l3-supply vdd-s4-supply vdd-s1-supply vdd-s2-supply vdd-s5-supply frame-number thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device serial0 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply linux,input-type wakeup-event-action orientation-gpios power-role data-role color linux,default-trigger default-state panic-indicator audio-routing link-name sound-dai gpio enable-active-high regulator-boot-on regulator-always-on vin-supply vdddig-supply wlan-enable-gpios bt-enable-gpios xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 cpu1 cpu2 cpu3 cpu4 l2_1 cpu5 cpu6 cpu7 cpu8 l2_2 cpu9 cpu10 cpu11 cpu_map_cluster2 cluster_c4 cluster_cl4 cluster_cl5 eud_in scm scmi_dvfs clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cpu_pd8 cpu_pd9 cpu_pd10 cpu_pd11 cluster_pd0 cluster_pd1 cluster_pd2 system_pd gunyah_hyp_mem hyp_elf_package_mem ncc_mem cpucp_log_mem cpucp_mem tags_mem xbl_dtlog_mem xbl_ramdump_mem aop_image_mem aop_cmd_db_mem aop_config_mem tme_crash_dump_mem tme_log_mem uefi_log_mem secdata_apss_mem pdp_ns_shared_mem gpu_prr_mem tpm_control_mem usb_ucsi_shared_mem pld_pep_mem pld_gmu_mem pld_pdp_mem tz_stat_mem xbl_tmp_buffer_mem adsp_rpc_remote_heap_mem spu_secure_shared_memory_mem adsp_boot_dtb_mem spss_region_mem adsp_boot_mem video_mem adspslpi_mem q6_adsp_dtb_mem cdsp_mem q6_cdsp_dtb_mem gpu_microcode_mem cvp_mem camera_mem av1_encoder_mem wpss_mem q6_wpss_dtb_mem xbl_sc_mem qtee_mem ta_mem tags_mem1 llcc_lpi_mem smem_mem qup_opp_table_100mhz qup_opp_table_120mhz smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in soc gcc ipcc gpi_dma2 qupv3_2 i2c16 spi16 i2c17 spi17 i2c18 spi18 i2c19 spi19 i2c20 spi20 i2c21 spi21 uart21 i2c22 spi22 i2c23 spi23 gpi_dma1 qupv3_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 i2c14 spi14 uart14 i2c15 spi15 gpi_dma0 qupv3_0 i2c0 spi0 i2c1 spi1 i2c2 uart2 spi2 i2c3 retimer_ss0_ss_out retimer_ss0_ss_in retimer_ss0_con_sbu_out spi3 i2c4 spi4 i2c5 eusb3_typea_repeater eusb5_frp_repeater spi5 i2c6 spi6 i2c7 retimer_ss1_ss_out retimer_ss1_ss_in retimer_ss1_con_sbu_out spi7 tsens0 tsens1 tsens2 tsens3 usb_1_ss0_hsphy usb_1_ss0_qmpphy usb_1_ss0_qmpphy_out usb_1_ss0_qmpphy_usb_ss_in usb_1_ss0_qmpphy_dp_in usb_1_ss1_hsphy usb_1_ss1_qmpphy usb_1_ss1_qmpphy_out usb_1_ss1_qmpphy_usb_ss_in usb_1_ss1_qmpphy_dp_in usb_1_ss2_hsphy usb_1_ss2_qmpphy usb_1_ss2_qmpphy_out usb_1_ss2_qmpphy_usb_ss_in usb_1_ss2_qmpphy_dp_in cnoc_main config_noc system_noc pcie_south_anoc pcie_center_anoc aggre1_noc aggre2_noc pcie_north_anoc usb_center_anoc usb_north_anoc usb_south_anoc mmss_noc pcie3 pcie3_opp_table pcie3_port pcie3_phy pcie6a pcie6a_phy pcie5 pcie5_phy pcie4 pcie4_port0 pcie4_phy tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu gem_noc nsp_noc remoteproc_adsp q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 right_woofer right_tweeter lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 left_woofer left_tweeter lpass_audiocc swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_01_sd_n_active spkr_23_sd_n_active lpasscc lpass_ag_noc lpass_lpiaon_noc lpass_lpicx_noc sdhc_2 sdhc2_opp_table sdhc_4 sdhc4_opp_table usb_2_hsphy usb_mp_hsphy0 usb_mp_hsphy1 usb_mp_qmpphy0 usb_mp_qmpphy1 usb_1_ss2 usb_1_ss2_dwc3 usb_1_ss2_dwc3_hs usb_1_ss2_dwc3_ss usb_2 usb_2_dwc3 usb_2_dwc3_hs usb_mp usb_mp_dwc3 usb_1_ss0 usb_1_ss0_dwc3 usb_1_ss0_dwc3_hs usb_1_ss0_dwc3_ss usb_1_ss1 usb_1_ss1_dwc3 usb_1_ss1_dwc3_hs usb_1_ss1_dwc3_ss iris iris_opp_table videocc mdss mdss_mdp mdss_intf0_out mdss_intf4_out mdss_intf5_out mdss_intf6_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dp0_opp_table mdss_dp1 mdss_dp1_in mdss_dp1_out mdss_dp1_opp_table mdss_dp2 mdss_dp2_in mdss_dp2_out mdss_dp2_opp_table mdss_dp3 mdss_dp3_in mdss_dp3_out mdss_dp3_opp_table edp_panel_in mdss_dp2_phy mdss_dp3_phy dispcc pdc aoss_qmp spmi spmi_bus0 pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_sdam_15 charge_limit_en charge_limit_end charge_limit_delta pmk8550_gpios pmk8550_pwm pm8550 pm8550_temp_alarm pm8550_gpios rtmr0_default usb0_3p3_reg_en pm8550_flash pm8550_pwm pm8550ve_2 pm8550ve_2_temp_alarm pm8550ve_2_gpios pmc8380_3 pmc8380_3_temp_alarm pmc8380_3_gpios pmc8380_4 pmc8380_4_temp_alarm pmc8380_4_gpios pmc8380_5 pmc8380_5_temp_alarm pmc8380_5_gpios usb0_pwr_1p15_reg_en pmc8380_6 pmc8380_6_temp_alarm pmc8380_6_gpios pm8550ve_8 pm8550ve_8_temp_alarm pm8550ve_8_gpios pm8550ve_9 pm8550ve_9_temp_alarm pm8550ve_9_gpios usb0_1p8_reg_en pm8010 pm8010_temp_alarm spmi_bus1 smb2360_0 smb2360_0_eusb2_repeater smb2360_1 smb2360_1_eusb2_repeater smb2360_2 smb2360_2_eusb2_repeater smb2360_3 smb2360_3_eusb2_repeater edp0_hpd_default qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_i2c15_data_clk qup_i2c16_data_clk qup_i2c17_data_clk qup_i2c18_data_clk qup_i2c19_data_clk qup_i2c20_data_clk qup_i2c21_data_clk qup_i2c22_data_clk qup_i2c23_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_spi15_cs qup_spi15_data_clk qup_spi16_cs qup_spi16_data_clk qup_spi17_cs qup_spi17_data_clk qup_spi18_cs qup_spi18_data_clk qup_spi19_cs qup_spi19_data_clk qup_spi20_cs qup_spi20_data_clk qup_spi21_cs qup_spi21_data_clk qup_spi22_cs qup_spi22_data_clk qup_spi23_cs qup_spi23_data_clk qup_uart2_default qup_uart14_default qup_uart21_default sdc2_default sdc2_sleep cam_rgb_default cam_indicator_en cam_ldo_en edp_bl_en edp_reg_en eusb3_reset_n eusb5_reset_n hall_int_n_default kybd_default nvme_reg_en pcie4_default pcie6a_default rtmr1_default sdc2_card_det_n tpad_default ts0_default usb1_pwr_1p15_reg_en usb1_pwr_1p8_reg_en usb1_pwr_3p3_reg_en wcd_default wcn_sw_en wcn_wlan_bt_en stm_out dcc_tpdm_out qdss_tpda_in0 qdss_tpda_in1 qdss_tpda_out qdss_tpdm_out funnel0_in6 funnel0_in7 funnel0_out funnel1_in2 funnel1_in5 funnel1_in6 funnel1_out qdss_funnel_in0 qdss_funnel_in1 qdss_funnel_out mxa_tpdm_out gcc_tpdm_out prng_tpdm_out lpass_cx_tpdm_out lpass_cx_funnel_in0 lpass_cx_funnel_out qm_tpdm_out dlst_tpdm0_out dlst_tpdm1_out dlst_tpda_in8 dlst_tpda_in9 dlst_tpda_out dlst_funnel_in0 dlst_funnel_out aoss_funnel_in3 aoss_funnel_in6 aoss_funnel_in7 aoss_funnel_out etf0 etf0_in etf0_out swao_rep_in swao_rep_out1 aoss_tpda_in0 aoss_tpda_in1 aoss_tpda_in2 aoss_tpda_in3 aoss_tpda_in4 aoss_tpda_out aoss_tpdm0_out aoss_tpdm1_out aoss_tpdm2_out aoss_tpdm3_out aoss_tpdm4_out lpicc_tpdm_out ddr_lpi_tpda_in ddr_lpi_tpda_out ddr_lpi_funnel_in0 ddr_lpi_funnel_out mm_tpdm_out mm_funnel_in4 mm_funnel_out dlct1_tpdm_out ipcc_tpdm_out dlct1_tpda_in4 dlct1_tpda_in19 dlct1_tpda_in20 dlct1_tpda_in21 dlct1_tpda_in26 dlct1_tpda_in27 dlct1_tpda_out dlct1_funnel_in0 dlct1_funnel_in4 dlct1_funnel_in5 dlct1_funnel_out dlct2_tpdm0_out dlct2_tpdm1_out dlct2_tpda_in4 dlct2_tpda_in15 dlct2_tpda_in16 dlct2_tpda_in17 dlct2_tpda_out dlct2_funnel_in0 dlct2_funnel_out tmess_tpdm1_out tmess_tpda_in2 tmess_tpda_out tmess_funnel_in0 tmess_funnel_out ddr_funnel0_in6 ddr_funnel0_out llcc0_tpdm_out llcc1_tpdm_out llcc2_tpdm_out llcc3_tpdm_out llcc4_tpdm_out llcc5_tpdm_out llcc6_tpdm_out llcc7_tpdm_out llcc_tpda_in0 llcc_tpda_in1 llcc_tpda_in2 llcc_tpda_in3 llcc_tpda_in4 llcc_tpda_in5 llcc_tpda_in6 llcc_tpda_in7 llcc_tpda_out ddr_funnel1_in0 ddr_funnel1_out apps_smmu pcie_smmu intc gic_its cpucp_mbox apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b_1p8 vreg_l2b_3p0 vreg_l4b_1p8 vreg_l6b_1p8 vreg_l7b_2p8 vreg_l8b_3p0 vreg_l9b_2p9 vreg_l12b_1p2 vreg_l13b_3p0 vreg_l14b_3p0 vreg_l15b_1p8 vreg_s4c_1p8 vreg_l1c_1p2 vreg_l2c_0p8 vreg_l3c_0p8 vreg_l1d_0p8 vreg_l2d_0p9 vreg_l3d_1p8 vreg_l2e_0p8 vreg_l3e_1p2 vreg_s1f_0p7 vreg_l1i_1p8 vreg_l2i_1p2 vreg_l3i_0p8 vreg_s5j_1p2 vreg_l1j_0p8 vreg_l2j_1p2 vreg_l3j_0p8 sram cpu_scp_lpri0 cpu_scp_lpri1 sbsa_watchdog qfprom gpu_speed_bin llcc_bwmon_opp_table bwmon_cluster0 bwmon_cluster2 cpu_bwmon_opp_table remoteproc_cdsp thermal_zones gpuss0_alert0 gpuss1_alert0 gpuss2_alert0 gpuss3_alert0 gpuss4_alert0 gpuss5_alert0 gpuss6_alert0 gpuss7_alert0 pmc8380_6_thermal wcd938x pmic_glink_ss0_hs_in pmic_glink_ss0_ss_in pmic_glink_ss0_con_sbu_in pmic_glink_ss1_hs_in pmic_glink_ss1_ss_in pmic_glink_ss1_con_sbu_in sound vreg_cam_1p8 vreg_edp_3p3 vreg_nvme vreg_rtmr0_1p15 vreg_rtmr0_1p8 vreg_rtmr0_3p3 vreg_rtmr1_1p15 vreg_rtmr1_1p8 vreg_rtmr1_3p3 vph_pwr vreg_wcn_3p3 vreg_wcn_0p95 vreg_wcn_1p9 vreg_pmu_rfa_cmn vreg_pmu_aon_0p59 vreg_pmu_wlcx_0p8 vreg_pmu_wlmx_0p85 vreg_pmu_btcmx_0p85 vreg_pmu_rfa_0p8 vreg_pmu_rfa_1p2 vreg_pmu_rfa_1p8 vreg_pmu_pcie_0p9 vreg_pmu_pcie_1p8 iommu-map 