    8 p4   (            + o                                                                   '   ,Qualcomm Technologies, Inc. SM8650 HDK           2qcom,sm8650-hdk qcom,sm8650       	   =embedded       chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s        sleep-clk            2fixed-clock          V             c           s   F      bi-tcxo-div2-clk             2fixed-factor-clock           V             {                                        s   D      bi-tcxo-ao-div2-clk          2fixed-factor-clock           V             {                                       s   E         cpus                                 cpu@0            cpu          2arm,cortex-a520                           {                            psci             psci                                        d                       %         @  9                                        	       	           G            s      l2-cache             2cache           V            b            
         s      l3-cache             2cache           V            b         s   
            cpu@100          cpu          2arm,cortex-a520                          {                            psci             psci                                        d                       %         @  9                                        	       	           G            s         cpu@200          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %         @  9                                        	       	           G            s      l2-cache             2cache           V            b            
         s            cpu@300          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %         @  9                                        	       	           G            s      l2-cache             2cache           V            b            
         s            cpu@400          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %         @  9                                        	       	           G            s      l2-cache             2cache           V            b            
         s            cpu@500          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %         @  9                                        	       	           G            s       l2-cache             2cache           V            b            
         s            cpu@600          cpu          2arm,cortex-a720                          {                           psci             psci                                                              %         @  9                                        	       	           G            s   !   l2-cache             2cache           V            b            
         s            cpu@700          cpu          2arm,cortex-x4                            {                           psci             psci                           f           L                      %         @  9                                        	       	           G            s   "   l2-cache             2cache           V            b            
         s            cpu-map    cluster0       core0           p         core1           p         core2           p         core3           p         core4           p         core5           p          core6           p   !      core7           p   "            idle-states         tpsci       cpu-sleep-0-0            2arm,idle-state          silver-rail-power-collapse          @            &                    ,                  s   =      cpu-sleep-1-0            2arm,idle-state          gold-rail-power-collapse            @            X                                      s   >      cpu-sleep-2-0            2arm,idle-state          gold-plus-rail-power-collapse           @                      F          8                  s   ?         domain-idle-states     cluster-sleep-0          2domain-idle-state           A  D                    	.          #         s   @      cluster-sleep-1          2domain-idle-state           A D          
          0          '         s   A            ete-0            2arm,embedded-trace-extension            p      out-ports      port       endpoint               #         s   +               ete-1            2arm,embedded-trace-extension            p      out-ports      port       endpoint               $         s   ,               ete-2            2arm,embedded-trace-extension            p      out-ports      port       endpoint               %         s   -               ete-3            2arm,embedded-trace-extension            p      out-ports      port       endpoint               &         s   .               ete-4            2arm,embedded-trace-extension            p      out-ports      port       endpoint               '         s   /               ete-5            2arm,embedded-trace-extension            p       out-ports      port       endpoint               (         s   0               ete-6            2arm,embedded-trace-extension            p   !   out-ports      port       endpoint               )         s   1               ete-7            2arm,embedded-trace-extension            p   "   out-ports      port       endpoint               *         s   2               funnel-ete           2arm,coresight-static-funnel    in-ports                                 port@0                  endpoint               +         s   #         port@1                 endpoint               ,         s   $         port@2                 endpoint               -         s   %         port@3                 endpoint               .         s   &         port@4                 endpoint               /         s   '         port@5                 endpoint               0         s   (         port@6                 endpoint               1         s   )         port@7                 endpoint               2         s   *            out-ports      port       endpoint               3         s                 firmware       scm          2qcom,scm-sm8650 qcom,scm               4          9   5                        s  V         interconnect-0           2qcom,sm8650-clk-virt                          6         s   M      interconnect-1           2qcom,sm8650-mc-virt                       6         s         opp-table-qup100mhz          2operating-points-v2          s   S   opp-75000000            /    xh        6   7      opp-100000000           /             6   8         opp-table-qup120mhz          2operating-points-v2          s   P   opp-75000000            /    xh        6   7      opp-120000000           /    '         6   8         opp-table-qup128mhz          2operating-points-v2          s   e   opp-75000000            /    xh        6   7      opp-128000000           /              6   8         opp-table-qup240mhz          2operating-points-v2          s      opp-150000000           /    р        6   7      opp-240000000           /    N         6   8         memory@a0000000          memory                                opp-table-cpu0           2operating-points-v2          D         s      opp-307200000           /    O         O I>  !b         opp-364800000           /    h         O I>  !b         opp-460800000           /    w@         O I>  !b        opp-556800000           /    !0         O I>  !b        opp-672000000           /    (         O I>  !b        opp-787200000           /    .         O I>  !bd@       opp-902400000           /    5Ɉ         O I>  !b       opp-1017600000          /    <X         O q  !b`       opp-1132800000          /    C(         O q  !b@       opp-1248000000          /    Jb         O q  . )        opp-1344000000          /    P         O q  . a`       opp-1440000000          /    UԨ         O q  . a`       opp-1459200000          /    V         O q  . a`       opp-1536000000          /    [         O q  .         opp-1574400000          /    ]p         O q  .         opp-1651200000          /    bkP         O |  ^        opp-1689600000          /    d@         O |  ^        opp-1747200000          /    h$(         O |  ^        opp-1804800000          /    k         O |  ^`       opp-1843200000          /    m          O |  ^`       opp-1920000000          /    rp         O |  ^&@       opp-1939200000          /    s         O |  ^&@       opp-2035200000          /    yN         O |  ^        opp-2150400000          /    ,         O |  ^        opp-2265600000          /    
P         O |  ^          opp-table-cpu2           2operating-points-v2          D         s      opp-460800000           /    w@         O I>  !b         opp-499200000           /    0         O I>  !b         opp-576000000           /    "U         O I>  !b         opp-614400000           /    $          O I>  !b        opp-691200000           /    )2         O q  .         opp-729600000           /    +|         O q  .         opp-806400000           /    0         O q  .         opp-844800000           /    2Z         O q  .         opp-902400000           /    5Ɉ         O q  .         opp-960000000           /    98p         O q  .        opp-1036800000          /    =P         O q  ^       opp-1075200000          /    @@         O q  ^       opp-1152000000          /    D          O q  ^       opp-1190400000          /    F         O q  ^@       opp-1267200000          /    K         O |  @       opp-1286400000          /    L         O |  @       opp-1382400000          /    Re         O |  @       opp-1401600000          /    S         O |  a`       opp-1497600000          /    YC         O    a`       opp-1612800000          /    `!`         O    a`       opp-1708800000          /    e8         O    a`       opp-1728000000          /    f0         O    a`       opp-1824000000          /    l         O    a`       opp-1843200000          /    m          O    a`       opp-1920000000          /    rp         O            opp-1958400000          /    t         O Ȁ         opp-2035200000          /    yN         O Ȁ         opp-2073600000          /    {         O Ȁ         opp-2131200000          /             O Ȁ         opp-2188800000          /    vp         O Ȁ         opp-2246400000          /    X         O Ȁ         opp-2304000000          /    T@         O Ȁ         opp-2323200000          /    y8         O Ȁ         opp-2380800000          /              O Ȁ         opp-2400000000          /             O Ȁ         opp-2438400000          /    W         O Ȁ         opp-2515200000          /             O Ȁ         opp-2572800000          /    Y         O Ȁ &@       opp-2630400000          /    ȸ         O Ȁ &@       opp-2707200000          /    \         O Ȁ &@       opp-2764800000          /    ˀ         O Ȁ         opp-2841600000          /    _`         OA          opp-2899200000          /    H         OA          opp-2956800000          /    =0         OA          opp-3014400000          /             OA          opp-3072000000          /              OA          opp-3148800000          /             OA            opp-table-cpu5           2operating-points-v2          D         s      opp-460800000           /    w@         O I>  !b         opp-499200000           /    0         O I>  !b         opp-576000000           /    "U         O I>  !b         opp-614400000           /    $          O I>  !b        opp-691200000           /    )2         O q  .         opp-729600000           /    +|         O q  .         opp-806400000           /    0         O q  .         opp-844800000           /    2Z         O q  .         opp-902400000           /    5Ɉ         O q  .         opp-960000000           /    98p         O q  .        opp-1036800000          /    =P         O q  ^       opp-1075200000          /    @@         O q  ^       opp-1152000000          /    D          O q  ^       opp-1190400000          /    F         O q  ^@       opp-1267200000          /    K         O |  @       opp-1286400000          /    L         O |  @       opp-1382400000          /    Re         O |  @       opp-1401600000          /    S         O |  a`       opp-1497600000          /    YC         O    a`       opp-1612800000          /    `!`         O    a`       opp-1708800000          /    e8         O    a`       opp-1728000000          /    f0         O    a`       opp-1824000000          /    l         O    a`       opp-1843200000          /    m          O    a`       opp-1920000000          /    rp         O            opp-1958400000          /    t         O Ȁ         opp-2035200000          /    yN         O Ȁ         opp-2073600000          /    {         O Ȁ         opp-2131200000          /             O Ȁ         opp-2188800000          /    vp         O Ȁ         opp-2246400000          /    X         O Ȁ         opp-2304000000          /    T@         O Ȁ         opp-2323200000          /    y8         O Ȁ         opp-2380800000          /              O Ȁ         opp-2400000000          /             O Ȁ         opp-2438400000          /    W         O Ȁ         opp-2515200000          /             O Ȁ         opp-2572800000          /    Y         O Ȁ &@       opp-2630400000          /    ȸ         O Ȁ &@       opp-2707200000          /    \         O Ȁ &@       opp-2764800000          /    ˀ         O Ȁ         opp-2841600000          /    _`         OA          opp-2899200000          /    H         OA          opp-2956800000          /    =0         OA          opp-3014400000          /             OA          opp-3072000000          /              OA          opp-3148800000          /             OA            opp-table-cpu7           2operating-points-v2          D         s      opp-480000000           /    8         O I>  !b         opp-499200000           /    0         O I>  !b         opp-576000000           /    "U         O I>  !b         opp-614400000           /    $          O I>  !b        opp-672000000           /    (         O q  .         opp-729600000           /    +|         O q  .         opp-787200000           /    .         O q  .         opp-844800000           /    2Z         O q  .         opp-902400000           /    5Ɉ         O q  .         opp-940800000           /    8x         O q  .         opp-1017600000          /    <X         O q  ^       opp-1075200000          /    @@         O q  ^       opp-1132800000          /    C(         O q  ^       opp-1190400000          /    F         O q  ^@       opp-1248000000          /    Jb         O |  @       opp-1305600000          /    M         O |  @       opp-1363200000          /    Q@         O |  @       opp-1420800000          /    T         O |  a`       opp-1478400000          /    X         O    a`       opp-1555200000          /    \x         O    a`       opp-1593600000          /    ^h         O    a`       opp-1670400000          /    cH         O    a`       opp-1708800000          /    e8         O    a`       opp-1804800000          /    k         O    a`       opp-1824000000          /    l         O    a`       opp-1939200000          /    s         O           opp-2035200000          /    yN         O Ȁ         opp-2073600000          /    {         O Ȁ         opp-2112000000          /    }         O Ȁ         opp-2169600000          /    Qx         O Ȁ         opp-2208000000          /    h         O Ȁ         opp-2246400000          /    X         O Ȁ         opp-2304000000          /    T@         O Ȁ         opp-2342400000          /    0         O Ȁ         opp-2380800000          /              O Ȁ         opp-2438400000          /    W         O Ȁ         opp-2457600000          /    |          O Ȁ         opp-2496000000          /             O Ȁ         opp-2553600000          /    4         O Ȁ         opp-2630400000          /    ȸ         O Ȁ &@       opp-2688000000          /    7         O Ȁ &@       opp-2745600000          /             O Ȁ         opp-2803200000          /    p         OA          opp-2880000000          /    P         OA          opp-2937600000          /    8         OA          opp-2995200000          /              OA          opp-3052800000          /             OA          opp-3187200000          /             OA         opp-3302400000          /    ֠         OA            pmu-a520             2arm,cortex-a520-pmu         ]            9      pmu-a720             2arm,cortex-a720-pmu         ]            :      pmu-x4           2arm,cortex-x4-pmu           ]            ;      psci             2arm,psci-1.0             smc    power-domain-cpu0           h                <        |   =         s         power-domain-cpu1           h                <        |   =         s         power-domain-cpu2           h                <        |   >         s         power-domain-cpu3           h                <        |   >         s         power-domain-cpu4           h                <        |   >         s         power-domain-cpu5           h                <        |   >         s         power-domain-cpu6           h                <        |   >         s         power-domain-cpu7           h                <        |   ?         s         power-domain-cluster            h            |   @   A         s   <         reserved-memory                                            s  W   hyp@80000000                                             s  X      cpusys-vm@80e00000                      @                    s  Y      xbl-dt-log-merged@81a00000                      &                    s  Z      aop-cmd-db@81c60000          2qcom,cmd-db                                         s  [      aop-tme-uefi-merged@81c80000                        P                   s  \      smem@81d00000         
   2qcom,smem                                     B                     s  ]      adsp-mhi@81f00000                                           s  ^      pvmfw@824a0000               J                           s  _      global-sync@82600000                 `                           s  )      tz-stat@82700000                 p                           s  `      qdss@82800000                                           s  a      qlink-logging@84800000                                           s         mpss-dsm@86b00000                                          s         mpss-dsm-2@8b400000              @                           s         mpss@8bc00000                      @                    s         q6-mpss-dtb@9b000000                                             s         ipa-fw@9b080000                                         s         ipa-gsi@9b090000                 	                           s  b      gpu-micro-code@9b09a000              	                           s         spss@9b0a0000                
                           s  c      spu-tz-shared@9b280000               (                           s  d      spu-modem-shared@9b2e0000                .                           s  e      camera@9b300000              0                           s  f      video@9bb00000                                          s         cvp@9c300000                 0       p                    s  g      cdsp@9ca00000                      @                    s  '      q6-cdsp-dtb@9de00000                                            s  (      q6-adsp-dtb@9de80000                                            s         adspslpi@9df00000                                          s         rmtfs@d7c00000           2qcom,rmtfs-mem                      @                                          s  h      tz-merged@d8000000                                           s  i      hwfence-shbuf@e6440000               D       -                   s  j      trust-ui-vm@f3800000                       @                    s  k      oem-vm@f7c00000                                        s  l      llcc-lpi@ff800000                       `                    s  m         smp2p-adsp           2qcom,smp2p             C                    C                                            master-kernel           master-kernel                       s         slave-kernel            slave-kernel             )        >            s            smp2p-cdsp           2qcom,smp2p             C                    C                 ^                            master-kernel           master-kernel                       s  *      slave-kernel            slave-kernel             )        >            s  %         smp2p-modem          2qcom,smp2p             C                    C                                            master-kernel           master-kernel                       s         slave-kernel            slave-kernel             )        >            s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa          )        >            s            soc@0            2simple-bus                                   O                                                               s  n   clock-controller@100000          2qcom,sm8650-gcc                      B       @   {   D   E   F   G   H       H      I       I      I      J             V           Z           h            s   L      mailbox@406000           2qcom,sm8650-ipcc qcom,ipcc                @`                ]                       )        >           g            s   C      dma-controller@800000         (   2qcom,sm8650-gpi-dma qcom,sm6350-gpi-dma                                ]      L             M             N             O             P             Q             R             S             T             U             V             W               s              ?                      K  6                   	  disabled             s   Q      geniqup@8c0000           2qcom,geni-se-qup                                     {   L      L           m-ahb s-ahb            K  #                                                       okay             s  o   i2c@880000           2qcom,geni-i2c                         @         ]      u                {   L   v        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   P            Q              Q                  tx rx              R        default                                 	  disabled             s  p      spi@880000           2qcom,geni-spi                         @         ]      u                {   L   v        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   S            Q              Q                  tx rx              T   U        default                                 	  disabled             s  q      i2c@884000           2qcom,geni-i2c                 @       @         ]      G                {   L   x        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   P            Q             Q                 tx rx              V        default                                 	  disabled             s  r      spi@884000           2qcom,geni-spi                 @       @         ]      G                {   L   x        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   P            Q             Q                 tx rx              W   X        default                                 	  disabled             s  s      i2c@888000           2qcom,geni-i2c                        @         ]      H                {   L   z        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   P            Q             Q                 tx rx              Y        default                                 	  disabled             s  t      spi@888000           2qcom,geni-spi                        @         ]      H                {   L   z        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   P            Q             Q                 tx rx              Z   [        default                                 	  disabled             s  u      i2c@88c000           2qcom,geni-i2c                        @         ]      I                {   L   |        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   P            Q             Q                 tx rx              \        default                                 	  disabled             s  v      spi@88c000           2qcom,geni-spi                        @         ]      I                {   L   |        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   P            Q             Q                 tx rx              ]   ^        default                                 	  disabled             s  w      i2c@890000           2qcom,geni-i2c                         @         ]      J                {   L   ~        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   S            Q             Q                 tx rx              _        default                                 	  disabled             s  x      spi@890000           2qcom,geni-spi                         @         ]      J                {   L   ~        se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   S            Q             Q                 tx rx              `   a        default                                 	  disabled             s  y      i2c@894000           2qcom,geni-i2c                 @       @         ]      K                {   L           se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   S            Q             Q                 tx rx              b        default                                 	  disabled             s  z      spi@894000           2qcom,geni-spi                 @       @         ]      K                {   L           se        H  9   M         M                  N         5                       qup-core qup-config qup-memory              O            %   S            Q             Q                 tx rx              c   d        default                                 	  disabled             s  {      serial@898000            2qcom,geni-uart                       @         ]                      {   L           se        0  9   M         M                  N              qup-core qup-config             O            %   e           f   g        default         okay             s  |   bluetooth            2qcom,wcn7850-bt            h           i           j        +   k        :   l        K   m        \   n        m 0          serial@89c000            2qcom,geni-debug-uart                         @         ]                      {   L           se        0  9   M         M                  N              qup-core qup-config             O            %   S           o        default         okay             s  }         geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                  {   L   \        s-ahb                                           	  disabled             s  ~   i2c@980000           2qcom,geni-i2c-master-hub                          @         ]                      {   L   H   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           p        default                                 	  disabled             s        i2c@984000           2qcom,geni-i2c-master-hub                  @       @         ]                      {   L   J   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           q        default                                 	  disabled             s        i2c@988000           2qcom,geni-i2c-master-hub                         @         ]                      {   L   L   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           r        default                                 	  disabled             s        i2c@98c000           2qcom,geni-i2c-master-hub                         @         ]                      {   L   N   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           s        default                                 	  disabled             s        i2c@990000           2qcom,geni-i2c-master-hub                          @         ]                      {   L   P   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           t        default                                 	  disabled             s        i2c@994000           2qcom,geni-i2c-master-hub                  @       @         ]                      {   L   R   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           u        default                                 	  disabled             s        i2c@998000           2qcom,geni-i2c-master-hub                         @         ]                      {   L   T   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           v        default                                 	  disabled             s        i2c@99c000           2qcom,geni-i2c-master-hub                         @         ]                      {   L   V   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           w        default                                 	  disabled             s        i2c@9a0000           2qcom,geni-i2c-master-hub                          @         ]                      {   L   X   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           x        default                                 	  disabled             s        i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         ]                      {   L   Z   L   G        se core       0  9   M          M                  N              qup-core qup-config             O            6   7           y        default                                 	  disabled             s           dma-controller@a00000         (   2qcom,sm8650-gpi-dma qcom,sm6350-gpi-dma                                ]                                                                                    %             &             '             (             )             *               s                                    K                        okay             s   {      geniqup@ac0000           2qcom,geni-se-qup                                     {   L      L           m-ahb s-ahb         9   M         M            	  qup-core               K                                                         okay             s     i2c@a80000           2qcom,geni-i2c                         @         ]      a                {   L   a        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {              {                  tx rx              |        default                                 	  disabled             s        spi@a80000           2qcom,geni-spi                         @         ]      a                {   L   a        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {              {                  tx rx              }   ~        default                                 	  disabled             s        i2c@a84000           2qcom,geni-i2c                 @       @         ]      b                {   L   c        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {             {                 tx rx                      default                                 	  disabled             s        spi@a84000           2qcom,geni-spi                 @       @         ]      b                {   L   c        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {             {                 tx rx                         default                                 	  disabled             s        i2c@a88000           2qcom,geni-i2c                        @         ]      c                {   L   e        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %               {             {                 tx rx                      default                                 	  disabled             s        spi@a88000           2qcom,geni-spi                        @         ]      c                {   L   e        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %               {             {                 tx rx                         default                                 	  disabled             s        i2c@a8c000           2qcom,geni-i2c                        @         ]      d                {   L   g        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   S            {             {                 tx rx                      default                                   okay             s     typec-mux@e       &   2qcom,wcd9395-usbss qcom,wcd9390-usbss                       w                                                s     ports                                port@0                  endpoint                        s  E                  spi@a8c000           2qcom,geni-spi                        @         ]      d                {   L   g        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   S            {             {                 tx rx                         default                                 	  disabled             s        i2c@a90000           2qcom,geni-i2c                         @         ]      e                {   L   i        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {             {                 tx rx                      default                                 	  disabled             s        spi@a90000           2qcom,geni-spi                         @         ]      e                {   L   i        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {             {                 tx rx                         default                                 	  disabled             s        i2c@a94000           2qcom,geni-i2c                 @       @         ]      f                {   L   k        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   S            {             {                 tx rx                      default                                 	  disabled             s        spi@a94000           2qcom,geni-spi                 @       @         ]      f                {   L   k        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   S            {             {                 tx rx                         default                                 	  disabled             s        i2c@a98000           2qcom,geni-i2c                        @         ]      k                {   L   m        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {             {                 tx rx                      default                                   okay             c          s     hdmi-bridge@2b           2lontium,lt9611uxc               +              U                             w                                    default          s     ports                                port@0                  endpoint                        s           port@2                 endpoint                        s  A                  spi@a98000           2qcom,geni-spi                        @         ]      k                {   L   m        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   P            {             {                 tx rx                         default                                 	  disabled             s        i2c@a9c000           2qcom,geni-i2c                        @         ]      C                {   L   o        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   S            {             {                 tx rx                      default                                 	  disabled             s        spi@a9c000           2qcom,geni-spi                        @         ]      C                {   L   o        se        H  9   M         M                  N         z                       qup-core qup-config qup-memory              O            %   S            {             {                 tx rx                         default                                 	  disabled             s           rng@10c3000          2qcom,sm8650-trng qcom,trng               0                 s        interconnect@1500000             2qcom,sm8650-cnoc-main                P       @           6                    s         interconnect@1600000             2qcom,sm8650-config-noc               `        b            6                    s   N      interconnect@1680000             2qcom,sm8650-system-noc               h       Ѐ           6                    s        interconnect@16c0000             2qcom,sm8650-pcie-anoc                l       "          {   L       L   	           6                    s         interconnect@16e0000             2qcom,sm8650-aggre1-noc               n       d          {   L      L              6                    s   z      interconnect@1700000             2qcom,sm8650-aggre2-noc               p                 {                 6                    s   5      interconnect@1780000             2qcom,sm8650-mmss-noc                 x                   6                    s         pcie@1c00000             pci       "   2qcom,pcie-sm8650 qcom,pcie-sm8550         P               0     `             `             `             `                 parf dbi elbi atu config            ]                                                                                                                                    /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global        @   {   L   $   L   &   L   '   L   ,   L   -   L      L       L         I  aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               L           pci       0  9                                            pcie-mem cpu-pcie               L            %                   K            K                                                                                                                                                                                                            >                                                       %            6           @               J   G        Opciephy                                8                 `                 `0      `0                         okay            Y      `            d      ^                      default          s     opp-table            2operating-points-v2          s      opp-2500000-1           /     &%        6   7        O А           p         opp-5000000-1           /     LK@        6   7        O             p         opp-5000000-2           /     LK@        6   7        O             p         opp-10000000-2          /             6   7        O B@           p         opp-8000000-3           /     z         6           O            p         opp-16000000-3          /     $         6           O h           p            pcie@0           pci                                      @                                                 s     wifi@0           2pci17cb,1107                                           h           i           j        +   k        :   l        K   m        \   n        z                          phy@1c06000           2qcom,sm8650-qmp-gen3x2-pcie-phy              `               (   {   L   $   L   &   4       L   (   L   *        aux cfg_ahb ref rchng pipe             L   (                    L           phy             L            V            pcie0_pipe_clk                      okay                                   s   G      pcie@1c08000             pci       "   2qcom,pcie-sm8650 qcom,pcie-sm8550         P              0     @             @             @             @                 parf dbi elbi atu config            ]      3             4             5             8             9             :             v             w             2             /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global        @   {   L   .   L   0   L   1   L   8   L   9   L      L       L         I  aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               L   .        $            L      L   	        pci link_down         0  9                                            pcie-mem cpu-pcie               L           %                   K           K                                                                                                                                                                                                        >                                                      %           6           @               J   H        Opciephy                                         8                 @                 @0      @0                okay            Y      c            d      a                      default          s     opp-table            2operating-points-v2          s      opp-2500000-1           /     &%        6   7        O А           p         opp-5000000-1           /     LK@        6   7        O             p         opp-5000000-2           /     LK@        6   7        O             p         opp-10000000-2          /             6   7        O B@           p         opp-8000000-3           /     z         6           O            p         opp-16000000-3          /     $         6           O h           p         opp-16000000-4          /     $         6           O h           p         opp-32000000-4          /    H         6           O <           p            pcie@0           pci                                      @                                                 phy@1c0e000           2qcom,sm8650-qmp-gen4x2-pcie-phy                             (   {   L   2   L   0   4      L   4   L   6        aux cfg_ahb ref rchng pipe             L   4                    L      L   
        phy phy_nocsr               L            V           pcie1_pipe_clk                      okay                                              s   H      phy@1d80000          2qcom,sm8650-qmp-ufs-phy                                 {          L      4           ref ref_aux qref                           ufsphy              L            V                       okay                                   s   I      ufshc@1d84000         +   2qcom,sm8650-ufshc qcom,ufshc jedec,ufs-2.0               @       0         ]      	             @   {   L      L      L      L      4      L      L      L         n  core_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk              L           rst       0  9   z                           N   %           ufs-ddr cpu-ufs             L           6           %              K   `                                &           J   I        Oufsphy          Z           okay                                        /          @           L O         s      opp-table            2operating-points-v2          s      opp-100000000         @  /                                                                  6   7      opp-201500000         @  /    `                    `                                        6   8      opp-403000000         @  /    J                    J                                        6               crypto@1d88000        ;   2qcom,sm8650-inline-crypto-engine qcom,inline-crypto-engine               ؀                {   L            s         dma-controller@1dc4000           2qcom,bam-v1.7.0              @               ]                                   K         K              ^            f           s                     s         crypto@1dfa000        )   2qcom,sm8650-qce qcom,sm8150-qce qcom,qce                 ߠ       `         9   5                       memory                              rx tx              K         K               s        hwlock@1f40000           2qcom,tcsr-mutex                                           s   B      clock-controller@1fc0000             2qcom,sm8650-tcsr syscon                     
           {                V           Z            s   4      gpu@3d00000       !   2qcom,adreno-43051401 qcom,adreno          0                                               #  kgsl_3d0_reg_memory cx_mem cx_dbgc          ]      ,                                            %                      G           9                          gfx-mem         okay             s  /   zap-shader                     qcom/sm8650/gen70900_zap.mbn             s        opp-table         /   2operating-points-v2-adreno operating-points-v2           s      opp-231000000           /            p   4        O          /_      opp-310000000           /    z9        p   8        O          ,_      opp-366000000           /    з        p   <        O \j        ._      opp-422000000           /    '5        p   @        O |c        -_      opp-500000000           /    e         p   P        O |c        *_      opp-578000000           /    "s        p           O |c        ̈,_      opp-629000000           /    %}@        p           O         ̈*_      opp-680000000           /    (         p           O         ̈*_      opp-720000000           /    *T         p           O         ̈*_      opp-770000000           /    -D        p           O         ̈*_      opp-834000000           /    1Ԁ        p  @        O ۳        ̈*_            gmu@3d6a000       &   2qcom,adreno-gmu-750.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc             ]      0             1               hfi gmu       8   {                      L      L   "                  !  ahb gmu cxo axi memnoc hub demet                                   cx gx                                        %            s      opp-table            2operating-points-v2          s      opp-260000000           /    I         p   @      opp-625000000           /    %@@        p               clock-controller@3d90000             2qcom,sm8650-gpucc                                  {   D   L       L   !         V           Z           h            s         iommu@3da0000         @   2qcom,sm8650-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                    ]                                                                                                                                                                                            >             ?             @             A                                                                                                                         {         L   "   L   #               hlos bus iface ahb                                   s         ipa@3f40000           2qcom,sm8650-ipa qcom,sm8550-ipa            K         K            0                            P     @               ipa-reg ipa-shared gsi        @                                                           (  ipa gsi ipa-clock-query ipa-setup-ready          {              core          0  9   5                           N              memory config                                         *  ipa-clock-enabled-valid ipa-clock-enabled           okay            /self                       qcom/sm8650/ipa_fws.mbn          s        remoteproc@4080000           2qcom,sm8650-mpss-pas                                P                                                                      0  wdog fatal ready handover stop-ack shutdown-ack          {               xo          9                               O       O            cx mss                                                           stop            okay          0  qcom/sm8650/modem.mbn qcom/sm8650/modem_dtb.mbn          s     glink-edge             C                     C                          ?mpss             remoteproc@6800000           2qcom,sm8650-adsp-pas                                <                                                      #  wdog fatal ready handover stop-ack           {               xo          9                               O      O            lcx lmx                                                 stop            okay          .  qcom/sm8650/adsp.mbn qcom/sm8650/adsp_dtb.mbn            s     glink-edge             C                     C                          ?lpass            s     fastrpc          2qcom,fastrpc            Efastrpcglink-apps-dsp           ?adsp             Y                             compute-cb@3             2qcom,fastrpc-compute-cb                        K        K  C                   compute-cb@4             2qcom,fastrpc-compute-cb                        K        K  D                   compute-cb@5             2qcom,fastrpc-compute-cb                        K        K  E                   compute-cb@6             2qcom,fastrpc-compute-cb                        K        K  F                   compute-cb@7             2qcom,fastrpc-compute-cb                   $     K     @   K  g       K                        gpr       	   2qcom,gpr          
  Eadsp_apps           p           |                                   service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd          s  J   bedais           2qcom,q6apm-lpass-dais                       s  G      dais             2qcom,q6apm-dais            K        K  a             s           service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd          s     clock-controller             2qcom,q6prm-lpass-clocks          V            s                     codec@6aa0000         8   2qcom,sm8650-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              mclk macro dcodec fsgen          V          
  wsa2-mclk                       s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                 ]                       {           iface           ?WSA2                       default                       	           ?   ?                                                             .           E                  `           }                                              	  disabled             s        codec@6ac0000         6   2qcom,sm8650-lpass-rx-macro qcom,sm8550-lpass-rx-macro                               (   {      @         f         g              mclk macro dcodec fsgen          V            mclk                        s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                 ]                       {           iface           ?RX                     default                                        1               	                                           .         E          `          }                                                  okay             s  I   codec@0,4            2sdw20217010e00                                            	         s  P         codec@6ae0000         6   2qcom,sm8650-lpass-tx-macro qcom,sm8550-lpass-tx-macro                               (   {      9         f         g              mclk macro dcodec fsgen          V            mclk                        s         codec@6b00000         8   2qcom,sm8650-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              mclk macro dcodec fsgen          V            mclk                        s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                 ]                       {           iface           ?WSA                    default                       	           ?   ?                                                             .           E                  `           }                                                okay             s  N   speaker@0,0          2sdw20217020400                                      default                                    	  SpkrLeft                                                 
            s  L      speaker@0,1          2sdw20217020400                                     default               M                     
  SpkrRight                                                            s  M         soundwire@6d30000            2qcom,soundwire-v2.0.0                                  ]                                  core wakeup          {           iface           ?TX                     default                                                                              .        E        `        }                                               okay             s  K   codec@0,3            2sdw20217010e00                          	                     s  Q         codec@6d44000         6   2qcom,sm8650-lpass-va-macro qcom,sm8550-lpass-va-macro                @              $   {      9         f         g           mclk macro dcodec            V            fsgen                       s         pinctrl@6e80000          2qcom,sm8650-lpass-lpi-pinctrl                                  {      f         g           core audio           	)        	9           	E                       s      tx-swr-active-state          s      clk-pins            	Qgpio0           	Vswr_tx_clk          	_           	n            	x      data-pins           	Qgpio1 gpio2 gpio14          	Vswr_tx_data         	_           	n            	         rx-swr-active-state          s      clk-pins            	Qgpio3           	Vswr_rx_clk          	_           	n            	x      data-pins           	Qgpio4 gpio5         	Vswr_rx_data         	_           	n            	         dmic01-default-state             s     clk-pins            	Qgpio6         
  	Vdmic1_clk           	_            	      data-pins           	Qgpio7           	Vdmic1_data          	_            	         dmic23-default-state             s     clk-pins            	Qgpio8         
  	Vdmic2_clk           	_            	      data-pins           	Qgpio9           	Vdmic2_data          	_            	         wsa-swr-active-state             s      clk-pins            	Qgpio10          	Vwsa_swr_clk         	_           	n            	x      data-pins           	Qgpio11          	Vwsa_swr_data            	_           	n            	         wsa2-swr-active-state            s      clk-pins            	Qgpio15          	Vwsa2_swr_clk            	_           	n            	x      data-pins           	Qgpio16          	Vwsa2_swr_data           	_           	n            	         spkr-1-sd-n-active-state            	Qgpio21          	Vgpio            	_            	x         	         s            interconnect@7400000             2qcom,sm8650-lpass-lpiaon-noc                 @                             6         s        interconnect@7430000             2qcom,sm8650-lpass-lpicx-noc              C                              6         s         interconnect@7e40000             2qcom,sm8650-lpass-ag-noc                                               6         s        mmc@8804000       $   2qcom,sm8650-sdhci qcom,sdhci-msm-v5              @                 ]                                    hc_irq pwr_irq           {   L      L                  iface core xo         0  9   5                           N               sdhc-ddr cpu-sdhc               O            %              K  @            	           	               	 d,        	h                 okay            	                  	           
            
         
                      
"              default sleep            s     opp-table            2operating-points-v2          s      opp-19200000            /    $         6         opp-50000000            /            6   7      opp-100000000           /             6   8      opp-202000000           /    
F        6               phy@88e3000       6   2qcom,sm8650-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                0       T         {   4           ref            L                       okay            w           
,           J            s         phy@88e8000          2qcom,sm8650-qmp-usb3-dp-phy                     0           {   L             L      L           aux ref com_aux usb3_pipe              L      L           phy common              L            V                                        okay                                   s   J   ports                                port@0                  endpoint                        s  D         port@1                 endpoint                        s            port@2                 endpoint                        s  	               usb@a600000           2qcom,sm8650-dwc3 qcom,snps-dwc3              
`              `                                                                                      E  dwc_usb3 pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq          0   {   L   
   L      L      L      L      4         &  cfg_noc core iface sleep mock_utmi xo              L      L           $             L           J      J            Ousb2-phy usb3-phy         0  9   z                           N   &           usb-ddr apps-usb               K   @                L           6           
:             
N         
k         
         
         
         
         
         
                  %                 okay            4otg          <         s     ports                                port@0                  endpoint                        s  C         port@1                 endpoint                        s                  video-codec@aa00000          2qcom,sm8650-iris                 
                 ]                                        O   
   O            venus vcodec0 mxc mmcx          %            {   L                        iface core vcodec0_core       0  9            N   '                             cpu-cfg video-mem                         L   !                    bus xo core            K  @       K  G                     okay             s     opp-table            2operating-points-v2          s      opp-196000000           /             6            opp-300000000           /             6   7   7      opp-380000000           /    W         6   8   8      opp-435000000           /            6            opp-480000000           /    8         6            opp-533333334           /    V        6                  clock-controller@aaf0000             2qcom,sm8650-videocc              
                  {   D   L               O      O   
         V           Z           h            s         cci@ac15000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
P                ]                                      {                  
        camnoc_axi cpas_ahb cci                       
"              default sleep         	  disabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           cci@ac16000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
`                ]                                      {                          camnoc_axi cpas_ahb cci                       
"              default sleep         	  disabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           cci@ac17000       !   2qcom,sm8650-cci qcom,msm8996-cci                 
p                ]                                      {                          camnoc_axi cpas_ahb cci                       
"              default sleep         	  disabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           clock-controller@ade0000             2qcom,sm8650-camcc                
                  {   L      D   E   F            O      O   
         V           Z           h            s         display-subsystem@ae00000            2qcom,sm8650-mdss                 
                 mdss            ]       S                {         L         =                     0  9                              N              mdp0-mem cpu-cfg                               K               )        >                                             okay             s      display-controller@ae01000           2qcom,sm8650-dpu               
           
        0       	  mdp vbif                         (   {   L               @      =      I        nrt_bus iface lut core vsync                  I        $         %               O            s     ports                                port@0                  endpoint                        s           port@1                 endpoint                        s           port@2                 endpoint                        s              opp-table            2operating-points-v2          s      opp-200000000           /             6   7      opp-325000000           /    _@        6   8      opp-375000000           /    Z        6         opp-514000000           /            6               dsi@ae94000       (   2qcom,sm8650-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl                        0   {                  B      8         L         $  byte byte_intf pixel core iface bus                     C        L                   %              O           J          Odsi                                   okay            c            s     ports                                port@0                  endpoint                       s            port@1                 endpoint                      o                      s               opp-table            2operating-points-v2          s     opp-187500000           /    -        6   7      opp-300000000           /             6   8      opp-358000000           /    V        6               phy@ae95000          2qcom,sm8650-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             {                   
  iface ref            V                       okay            z            s        dsi@ae96000       (   2qcom,sm8650-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl                        0   {                  D      :         L         $  byte byte_intf pixel core iface bus               	      E        L                   %              O           J          Odsi                                 	  disabled             s     ports                                port@0                  endpoint                       s            port@1                 endpoint             s                 phy@ae97000          2qcom,sm8650-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             {                   
  iface ref            V                     	  disabled             s        displayport-controller@af54000           2qcom,sm8650-dp        P       
@           
B            
P       p    
`            
p                            0   {                                          J  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                     L   J      J      J           %              O           J   J           Odp                      okay             s     opp-table            2operating-points-v2          s     opp-162000000           /    	        6         opp-270000000           /    ߀        6   7      opp-540000000           /     /         6         opp-810000000           /    0G        6            ports                                port@0                  endpoint                       s            port@1                 endpoint            o                       	         s                     clock-controller@af00000             2qcom,sm8650-dispcc               
               \   {   D   E   L      F                         J      J                                       O           6   7         V           Z           h            s         interrupt-controller@b220000             2qcom,sm8650-pdc qcom,pdc                  "             @        d                   H           ^   ^  a      }   ?      ~                               >            )         s         thermal-sensor@c228000            2qcom,sm8650-tsens qcom,tsens-v2               "            "                  ]                                  uplow critical                                 s  +      thermal-sensor@c229000            2qcom,sm8650-tsens qcom,tsens-v2               "            "0                 ]                                  uplow critical                                 s  ,      thermal-sensor@c22a000            2qcom,sm8650-tsens qcom,tsens-v2               "            "@                 ]                                  uplow critical                                 s  -      power-management@c300000          #   2qcom,sm8650-aoss-qmp qcom,aoss-qmp               0                      C           C                      C                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?                          spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg                          periph_irq          ^                                     )        >                                      s     pmic@c           2qcom,pm8010 qcom,spmi-pmic                                                     s     temp-alarm@2400          2qcom,spmi-temp-alarm               $         ]      $                            s  7         pmic@d           2qcom,pm8010 qcom,spmi-pmic                                                     s     temp-alarm@2400          2qcom,spmi-temp-alarm               $         ]      $                            s  8         pmic@1           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
         ]      
                            s  9      gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                      	)        	E                      	9            )        >            s      sdc2-card-det-state         	Qgpio12          	Vnormal                    	                             s         volume-up-n-state           	Qgpio6           	Vnormal                    	                    s  B         led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  disabled             s        pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm                       okay                                       s     led@1                       	Vstatus                     off       led@2                       	Vstatus                     off       led@3                       	Vstatus                     off             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
         ]      
                            s  :      gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                         	)        	E  
                   	9            )        >            s  
      phy@fd00             2qcom,pm8550b-eusb2-repeater                                            (           s            pmic@8           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
         ]      
                            s  ;      gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	)        	E                     	9            )        >            s           pmic@2           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
         ]      
                            s  <      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	)        	E                     	9            )        >            s           pmic@3           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
         ]      
                            s  =      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	)        	E                     	9            )        >            s           pmic@4           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
         ]      
                            s  >      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	)        	E                     	9            )        >            s           pmic@6           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
         ]      
                            s  ?      gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	)        	E                     	9            )        >            s           pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                      s     pon@1300             2qcom,pmk8350-pon                         	  hlos pbs             s     pwrkey           2qcom,pmk8350-pwrkey         ]                     4   t        okay             s        resin            2qcom,pmk8350-resin          ]                     okay            4   r         s           rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm           ]       b               s        nvram@7100           2qcom,spmi-sdam             q                                        q             s     reboot-reason@48                H           ?               s  @         gpio@b800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                         	)        	E                     	9            )        >            s              pinctrl@f100000          2qcom,sm8650-tlmm                        0          ]                       	)        	9            )        >           	E                      D           R          J            s      cci0-0-default-state             s      sda-pins            	Qgpio113         	Vcci_i2c_sda         	_                   scl-pins            	Qgpio114         	Vcci_i2c_scl         	_                      cci0-0-sleep-state           s      sda-pins            	Qgpio113         	Vcci_i2c_sda         	_            g      scl-pins            	Qgpio114         	Vcci_i2c_scl         	_            g         cci0-1-default-state             s      sda-pins            	Qgpio115         	Vcci_i2c_sda         	_                   scl-pins            	Qgpio116         	Vcci_i2c_scl         	_                      cci0-1-sleep-state           s      sda-pins            	Qgpio115         	Vcci_i2c_sda         	_            g      scl-pins            	Qgpio116         	Vcci_i2c_scl         	_            g         cci1-0-default-state             s      sda-pins            	Qgpio117         	Vcci_i2c_sda         	_                   scl-pins            	Qgpio118         	Vcci_i2c_scl         	_                      cci1-0-sleep-state           s      sda-pins            	Qgpio117         	Vcci_i2c_sda         	_            g      scl-pins            	Qgpio118         	Vcci_i2c_scl         	_            g         cci1-1-default-state             s      sda-pins            	Qgpio12          	Vcci_i2c_sda         	_                   scl-pins            	Qgpio13          	Vcci_i2c_scl         	_                      cci1-1-sleep-state           s      sda-pins            	Qgpio12          	Vcci_i2c_sda         	_            g      scl-pins            	Qgpio13          	Vcci_i2c_scl         	_            g         cci2-0-default-state             s      sda-pins            	Qgpio112         	Vcci_i2c_sda         	_                   scl-pins            	Qgpio153         	Vcci_i2c_scl         	_                      cci2-0-sleep-state           s      sda-pins            	Qgpio112         	Vcci_i2c_sda         	_            g      scl-pins            	Qgpio153         	Vcci_i2c_scl         	_            g         cci2-1-default-state             s      sda-pins            	Qgpio119         	Vcci_i2c_sda         	_                   scl-pins            	Qgpio120         	Vcci_i2c_scl         	_                      cci2-1-sleep-state           s      sda-pins            	Qgpio119         	Vcci_i2c_sda         	_            g      scl-pins            	Qgpio120         	Vcci_i2c_scl         	_            g         hub-i2c0-data-clk-state         	Qgpio64 gpio65           	Vi2chub0_se0         	_                     s   p      hub-i2c1-data-clk-state         	Qgpio66 gpio67           	Vi2chub0_se1         	_                     s   q      hub-i2c2-data-clk-state         	Qgpio68 gpio69           	Vi2chub0_se2         	_                     s   r      hub-i2c3-data-clk-state         	Qgpio70 gpio71           	Vi2chub0_se3         	_                     s   s      hub-i2c4-data-clk-state         	Qgpio72 gpio73           	Vi2chub0_se4         	_                     s   t      hub-i2c5-data-clk-state         	Qgpio74 gpio75           	Vi2chub0_se5         	_                     s   u      hub-i2c6-data-clk-state         	Qgpio76 gpio77           	Vi2chub0_se6         	_                     s   v      hub-i2c7-data-clk-state         	Qgpio78 gpio79           	Vi2chub0_se7         	_                     s   w      hub-i2c8-data-clk-state         	Qgpio206 gpio207         	Vi2chub0_se8         	_                     s   x      hub-i2c9-data-clk-state         	Qgpio80 gpio81           	Vi2chub0_se9         	_                     s   y      pcie0-default-state          s      perst-pins          	Qgpio94          	Vgpio            	_            g      clkreq-pins         	Qgpio95          	Vpcie0_clk_req_n         	_                  wake-pins           	Qgpio96          	Vgpio            	_                     pcie1-default-state          s      perst-pins          	Qgpio97          	Vgpio            	_            g      clkreq-pins         	Qgpio98          	Vpcie1_clk_req_n         	_                  wake-pins           	Qgpio99          	Vgpio            	_                     qup-i2c0-data-clk-state         	Qgpio32 gpio33         	  	Vqup1_se0            	_                     s   |      qup-i2c1-data-clk-state         	Qgpio36 gpio37         	  	Vqup1_se1            	_                     s         qup-i2c2-data-clk-state         	Qgpio40 gpio41         	  	Vqup1_se2            	_                     s         qup-i2c3-data-clk-state         	Qgpio44 gpio45         	  	Vqup1_se3            	_                      s         qup-i2c4-data-clk-state         	Qgpio48 gpio49         	  	Vqup1_se4            	_                     s         qup-i2c5-data-clk-state         	Qgpio52 gpio53         	  	Vqup1_se5            	_                     s         qup-i2c6-data-clk-state         	Qgpio56 gpio57         	  	Vqup1_se6            	_                     s         qup-i2c7-data-clk-state         	Qgpio60 gpio61         	  	Vqup1_se7            	_                     s         qup-i2c8-data-clk-state         	Qgpio0 gpio1       	  	Vqup2_se0            	_                     s   R      qup-i2c9-data-clk-state         	Qgpio4 gpio5       	  	Vqup2_se1            	_                     s   V      qup-i2c10-data-clk-state            	Qgpio8 gpio9       	  	Vqup2_se2            	_                     s   Y      qup-i2c11-data-clk-state            	Qgpio12 gpio13         	  	Vqup2_se3            	_                     s   \      qup-i2c12-data-clk-state            	Qgpio16 gpio17         	  	Vqup2_se4            	_                     s   _      qup-i2c13-data-clk-state            	Qgpio20 gpio21         	  	Vqup2_se5            	_                     s   b      qup-i2c14-data-clk-state            	Qgpio24 gpio25         	  	Vqup2_se6            	_                     s        qup-spi0-cs-state           	Qgpio35        	  	Vqup1_se0            	_            	x         s   ~      qup-spi0-data-clk-state         	Qgpio32 gpio33 gpio34          	  	Vqup1_se0            	_            	x         s   }      qup-spi1-cs-state           	Qgpio39        	  	Vqup1_se1            	_            	x         s         qup-spi1-data-clk-state         	Qgpio36 gpio37 gpio38          	  	Vqup1_se1            	_            	x         s         qup-spi2-cs-state           	Qgpio43        	  	Vqup1_se2            	_            	x         s         qup-spi2-data-clk-state         	Qgpio40 gpio41 gpio42          	  	Vqup1_se2            	_            	x         s         qup-spi3-cs-state           	Qgpio47        	  	Vqup1_se3            	_            	x         s         qup-spi3-data-clk-state         	Qgpio44 gpio45 gpio46          	  	Vqup1_se3            	_            	x         s         qup-spi4-cs-state           	Qgpio51        	  	Vqup1_se4            	_            	x         s         qup-spi4-data-clk-state         	Qgpio48 gpio49 gpio50          	  	Vqup1_se4            	_            	x         s         qup-spi5-cs-state           	Qgpio55        	  	Vqup1_se5            	_            	x         s         qup-spi5-data-clk-state         	Qgpio52 gpio53 gpio54          	  	Vqup1_se5            	_            	x         s         qup-spi6-cs-state           	Qgpio59        	  	Vqup1_se6            	_            	x         s         qup-spi6-data-clk-state         	Qgpio56 gpio57 gpio58          	  	Vqup1_se6            	_            	x         s         qup-spi7-cs-state           	Qgpio63        	  	Vqup1_se7            	_            	x         s         qup-spi7-data-clk-state         	Qgpio60 gpio61 gpio62          	  	Vqup1_se7            	_            	x         s         qup-spi8-cs-state           	Qgpio3         	  	Vqup2_se0            	_            	x         s   U      qup-spi8-data-clk-state         	Qgpio0 gpio1 gpio2         	  	Vqup2_se0            	_            	x         s   T      qup-spi9-cs-state           	Qgpio7         	  	Vqup2_se1            	_            	x         s   X      qup-spi9-data-clk-state         	Qgpio4 gpio5 gpio6         	  	Vqup2_se1            	_            	x         s   W      qup-spi10-cs-state          	Qgpio11        	  	Vqup2_se2            	_            	x         s   [      qup-spi10-data-clk-state            	Qgpio8 gpio9 gpio10        	  	Vqup2_se2            	_            	x         s   Z      qup-spi11-cs-state          	Qgpio15        	  	Vqup2_se3            	_            	x         s   ^      qup-spi11-data-clk-state            	Qgpio12 gpio13 gpio14          	  	Vqup2_se3            	_            	x         s   ]      qup-spi12-cs-state          	Qgpio19        	  	Vqup2_se4            	_            	x         s   a      qup-spi12-data-clk-state            	Qgpio16 gpio17 gpio18          	  	Vqup2_se4            	_            	x         s   `      qup-spi13-cs-state          	Qgpio23        	  	Vqup2_se5            	_            	x         s   d      qup-spi13-data-clk-state            	Qgpio20 gpio21 gpio22          	  	Vqup2_se5            	_            	x         s   c      qup-spi14-cs-state          	Qgpio27        	  	Vqup2_se6            	_            	x         s        qup-spi14-data-clk-state            	Qgpio24 gpio25 gpio26          	  	Vqup2_se6            	_            	x         s        qup-uart14-default-state            	Qgpio26 gpio27         	  	Vqup2_se6            	_                     s   f      qup-uart14-cts-rts-state            	Qgpio24 gpio25         	  	Vqup2_se6            	_            g         s   g      qup-uart15-default-state            	Qgpio30 gpio31         	  	Vqup2_se7            	_            	x         s   o      sdc2-sleep-state             s      clk-pins          	  	Qsdc2_clk            	_            	x      cmd-pins          	  	Qsdc2_cmd            	_                  data-pins         
  	Qsdc2_data           	_                     sdc2-default-state           s      clk-pins          	  	Qsdc2_clk            	_            	x      cmd-pins          	  	Qsdc2_cmd            	_   
               data-pins         
  	Qsdc2_data           	_   
                  bt-default-state             s  S   bt-en-pins          	Qgpio17          	Vgpio            	_            	x      sw-ctrl-pins            	Qgpio18          	Vgpio             g         lt9611-irq-state            	Qgpio85          	Vgpio             	x         s         lt9611-rst-state            	Qgpio28          	Vgpio             	         s         spkr-2-sd-n-active-state            	Qgpio77          	Vgpio            	_            	x         	         s         wcd-reset-n-active-state            	Qgpio107         	Vgpio            	_            	x         	         s  O      wlan-en-state           	Qgpio16          	Vgpio            	_            g         s  R         funnel@10042000       +   2arm,coresight-dynamic-funnel arm,primecell                                 {         	  apb_pclk       in-ports                                 port@4                 endpoint                       s              out-ports      port       endpoint                       s                 funnel@10045000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 {         	  apb_pclk       in-ports                                 port@1                 endpoint                       s              out-ports      port       endpoint                       s                 funnel@10b04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 {         	  apb_pclk       in-ports                                 port@7                 endpoint                       s              out-ports      port       endpoint                       s                 tmc@10b05000              2arm,coresight-tmc arm,primecell              P                 {         	  apb_pclk       in-ports       port       endpoint                       s                 funnel@13810000       +   2arm,coresight-dynamic-funnel arm,primecell                                 {         	  apb_pclk       in-ports       port       endpoint                       s   3            out-ports      port       endpoint                       s                 iommu@15000000        /   2qcom,sm8650-smmu-500 qcom,smmu-500 arm,mmu-500                                ]       A              a              b              c              d              e              f              g              h              i              j              k              l              m              n              o              p              q              r              s              t              u              v                                                                                                                                                                                     ;             <             =             >             ?             @             A             B             C             D             E             F             G             H             I             J             K             L             M             N             O             P             Q             R             S             T             U             V             W             X             Y                                                                                                                                                                                                                                                                                                                                                                                                                                                                  s   K      interrupt-controller@17100000            2arm,gic-v3                                               ]      	               >            )        v                                                             s      ppi-partitions     interrupt-partition-0                          s   9      interrupt-partition-1                           !         s   :      interrupt-partition-2              "         s   ;         msi-controller@17140000          2arm,gic-v3-its                                                     s            timer@17420000           2arm,armv7-timer-mem              B                                                             frame@17421000           B    B              ]                                              frame@17423000           B0            ]       	                        	  disabled          frame@17425000           BP            ]       
                        	  disabled          frame@17427000           Bp            ]                               	  disabled          frame@17429000           B            ]                               	  disabled          frame@1742b000           B            ]                               	  disabled          frame@1742d000           B            ]                               	  disabled             rsc@17a00000             2qcom,rpmh-rsc         0                                                  drv-0 drv-1 drv-2         0  ]                                                      <                                                               	  ?apps_rsc             s     bcm-voter            2qcom,bcm-voter           s   6      clock-controller             2qcom,sm8650-rpmh-clk             {          xo           V            s         power-controller             2qcom,sm8650-rpmhpd          %          h            s   O   opp-table            2operating-points-v2          s     opp-16          p            s        opp-48          p   0         s         opp-52          p   4         s        opp-56          p   8         s         opp-60          p   <         s        opp-64          p   @         s   7      opp-80          p   P         s        opp-128         p            s   8      opp-144         p            s        opp-192         p            s         opp-256         p            s         opp-320         p  @         s        opp-336         p  P         s        opp-384         p           s         opp-416         p           s              regulators-0             2qcom,pm8550-rpmh-regulators                                       4          B          T          e          v                                  !        b      bob1          
  vreg_bob1            2K          <l                    s        bob2          
  vreg_bob2            )          -                     s  !      ldo2            vreg_l2b_3p0             -          -                             .               s        ldo5            vreg_l5b_3p1             /]          /]                             .               s        ldo6            vreg_l6b_1p8             w@         -                             .               s        ldo7            vreg_l7b_1p8             w@         -                     s        ldo8            vreg_l8b_1p8             w@         -                             .               s         ldo9            vreg_l9b_2p9             -*         -                             .               s         ldo11           vreg_l11b_1p2            O                                      .               s        ldo12           vreg_l12b_1p8            w@         w@                            .               s        ldo13           vreg_l13b_3p0            -         -                            .               s        ldo14           vreg_l14b_3p2            0          0                             .               s        ldo15           vreg_l15b_1p8            w@         w@                            .               s         ldo16           vreg_l16b_2p8            *         *                            .               s        ldo17           vreg_l17b_2p5            &5@         &5@                            .               s            regulators-1             2qcom,pm8550vs-rpmh-regulators           F          T          4          b          p          ~                                        c      smps1           vreg_s1c_1p2             *@                             s        smps2           vreg_s2c_0p8                                            s  U      smps3           vreg_s3c_0p9                      <@                    s  "      smps4           vreg_s4c_1p2             @                              s        smps5           vreg_s5c_0p7             y                             s        smps6           vreg_s6c_1p8             R                              s         ldo1            vreg_l1c_1p2             O         O                            .               s         ldo3            vreg_l3c_1p2             O         O                            .               s            regulators-2             2qcom,pm8550vs-rpmh-regulators           F  "        d      ldo1            vreg_l1d_0p88                     	                            .               s            regulators-3             2qcom,pm8550vs-rpmh-regulators           4  "        e      ldo3            vreg_l3e_0p9             m         	                            .               s            regulators-4             2qcom,pm8550vs-rpmh-regulators           F  "        4  "        g      ldo1            vreg_l1g_0p91                     	                            .               s        ldo3            vreg_l3g_0p91            m                                     .               s            regulators-5             2qcom,pm8550ve-rpmh-regulators           F  "        T  "        4                    i      smps4           vreg_s4i_0p85                       Q                    s  T      ldo1            vreg_l1i_0p88            m                                     .               s         ldo2            vreg_l2i_0p88            m                                     .               s        ldo3            vreg_l3i_0p91            O         O                            .               s            regulators-6             2qcom,pm8010-rpmh-regulators         m                       !                                  ldo1            vreg_l1m_1p1             ؀         ؀                            .               s        ldo2            vreg_l2m_1p056                                                  .               s        ldo3            vreg_l3m_2p8             *         *                    s        ldo4            vreg_l4m_2p8             *         *                    s        ldo5            vreg_l5m_1p8             w@         w@                    s        ldo6            vreg_l6m_2p8             *         *                    s        ldo7            vreg_l7m_2p96            -*         -*                    s           regulators-7             2qcom,pm8010-rpmh-regulators         n                                  !          !             ldo1            vreg_l1n_1p1             ؀         ؀                            .               s        ldo2            vreg_l2n_1p056                                                  .               s        ldo3            vreg_l3n_1p8             w@         w@                    s        ldo4            vreg_l4n_1p8             w@         w@                    s        ldo5            vreg_l5n_2p8             *         *                    s        ldo6            vreg_l6n_2p8             *         *                    s        ldo7            vreg_l7n_3p3             2j@         2j@                    s              interconnect@17d90000         !   2qcom,sm8650-epss-l3 qcom,epss-l3                                   {   D   L           xo alternate                        s   	      cpufreq@17d91000          +   2qcom,sm8650-cpufreq-epss qcom,cpufreq-epss        @                                0            @              4  freq-domain0 freq-domain1 freq-domain2 freq-domain3       @  ]                                                             0  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2 dcvsh-irq-3          {   D   L           xo alternate                        V            s         pmu@24091000          .   2qcom,sm8650-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                ]       Q               9                           %  #   opp-table            2operating-points-v2          s  #   opp-0           O p      opp-1           O ,h      opp-2           O Z      opp-3           O ci8      opp-4           O y      opp-5           O A      opp-6           O H      opp-7           O ։      opp-8           O h            pmu@240b7400          (   2qcom,sm8650-cpu-bwmon qcom,sdm845-bwmon              $t                ]      E               9                          %  $   opp-table            2operating-points-v2          s  $   opp-0           O E      opp-1           O l}p      opp-2           O       opp-3           O       opp-4           O 9`      opp-5           O /(            interconnect@24100000            2qcom,sm8650-gem-noc              $       P           6                    s         system-cache-controller@25000000             2qcom,sm8650-llcc          `       %               %@              %               %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base         ]      
             interconnect@320c0000            2qcom,sm8650-nsp-noc              2                   6                    s  &      remoteproc@32300000          2qcom,sm8650-cdsp-pas                 20               D           B         %         %        %        %            #  wdog fatal ready handover stop-ack           {               xo          9  &                            O       O   
   O            cx mxc nsp            '  (  )                     *            stop            okay          .  qcom/sm8650/cdsp.mbn qcom/sm8650/cdsp_dtb.mbn            s     glink-edge             C                     C                          ?cdsp       fastrpc          2qcom,fastrpc            Efastrpcglink-apps-dsp           ?cdsp             Y                             compute-cb@1             2qcom,fastrpc-compute-cb                   $     K  a       K         K                     compute-cb@2             2qcom,fastrpc-compute-cb                   $     K  b       K         K                     compute-cb@3             2qcom,fastrpc-compute-cb                   $     K  c       K         K                     compute-cb@4             2qcom,fastrpc-compute-cb                   $     K  d       K         K                     compute-cb@5             2qcom,fastrpc-compute-cb                   $     K  e       K         K                     compute-cb@6             2qcom,fastrpc-compute-cb                   $     K  f       K         K                     compute-cb@7             2qcom,fastrpc-compute-cb                   $     K  g       K         K                     compute-cb@8             2qcom,fastrpc-compute-cb                   $     K  h       K         K                     compute-cb@12            2qcom,fastrpc-compute-cb                   $     K  l       K         K                     compute-cb@13            2qcom,fastrpc-compute-cb                   $     K  m       K         K                     compute-cb@14            2qcom,fastrpc-compute-cb                   $     K  n       K         K                                 thermal-zones      aoss0-thermal             +       trips      aoss0-hot           %         1           Ehot       aoss0-critical          % 8        1          	   Ecritical                cpuss0-thermal            +      trips      cpuss0-hot          %         1           Ehot       cpuss0-critical         % 8        1          	   Ecritical                cpuss1-thermal            +      trips      cpuss1-hot          %         1           Ehot       cpuss1-critical         % 8        1          	   Ecritical                cpuss2-thermal            +      trips      cpuss2-hot          %         1           Ehot       cpuss2-critical         % 8        1          	   Ecritical                cpuss3-thermal            +      trips      cpuss3-hot          %         1           Ehot       cpuss3-critical         % 8        1          	   Ecritical                cpu2-top-thermal              +      trips      cpu2-critical           %         1        	   Ecritical                cpu2-bottom-thermal           +      trips      cpu2-critical           %         1        	   Ecritical                cpu3-top-thermal              +      trips      cpu3-critical           %         1        	   Ecritical                cpu3-bottom-thermal           +      trips      cpu3-critical           %         1        	   Ecritical                cpu4-top-thermal              +   	   trips      cpu4-critical           %         1        	   Ecritical                cpu4-bottom-thermal           +   
   trips      cpu4-critical           %         1        	   Ecritical                cpu5-top-thermal              +      trips      cpu5-critical           %         1        	   Ecritical                cpu5-bottom-thermal           +      trips      cpu5-critical           %         1        	   Ecritical                cpu6-top-thermal              +      trips      cpu6-critical           %         1        	   Ecritical                cpu6-bottom-thermal           +      trips      cpu6-critical           %         1        	   Ecritical                aoss1-thermal             ,       trips      aoss1-hot           %         1           Ehot       aoss1-critical          % 8        1          	   Ecritical                cpu7-top-thermal              ,      trips      cpu7-critical           %         1        	   Ecritical                cpu7-middle-thermal           ,      trips      cpu7-critical           %         1        	   Ecritical                cpu7-bottom-thermal           ,      trips      cpu7-critical           %         1        	   Ecritical                cpu0-thermal              ,      trips      cpu0-critical           %         1        	   Ecritical                cpu1-thermal              ,      trips      cpu1-critical           %         1        	   Ecritical                nsphvx0-thermal           -      trips      nsphvx0-hot         %         1           Ehot       nsphvx0-critical            % 8        1          	   Ecritical                nsphvx1-thermal           -      trips      nsphvx1-hot         %         1           Ehot       nsphvx1-critical            % 8        1          	   Ecritical                nsphmx0-thermal           -      trips      nsphmx0-hot         %         1           Ehot       nsphmx0-critical            % 8        1          	   Ecritical                nsphmx1-thermal           -   	   trips      nsphmx1-hot         %         1           Ehot       nsphmx1-critical            % 8        1          	   Ecritical                nsphmx2-thermal           -   
   trips      nsphmx2-hot         %         1           Ehot       nsphmx2-critical            % 8        1          	   Ecritical                nsphmx3-thermal           -      trips      nsphmx3-hot         %         1           Ehot       nsphmx3-critical            % 8        1          	   Ecritical                video-thermal             ,      trips      video-hot           %         1           Ehot       video-critical          % 8        1          	   Ecritical                ddr-thermal           ,      trips      ddr-hot         %         1           Ehot       ddr-critical            % 8        1          	   Ecritical                camera0-thermal           ,      trips      camera0-hot         %         1           Ehot       camera0-critical            % 8        1          	   Ecritical                camera1-thermal           ,      trips      camera1-hot         %         1           Ehot       camera1-critical            % 8        1          	   Ecritical                aoss2-thermal             -       trips      aoss2-hot           %         1           Ehot       aoss2-critical          % 8        1          	   Ecritical                gpuss0-thermal          <   
          -      cooling-maps       map0            R  .        W  /         trips      trip-point0         % s        1           Epassive          s  .      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                gpuss1-thermal          <   
          -      cooling-maps       map0            R  0        W  /         trips      trip-point0         % s        1           Epassive          s  0      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                gpuss2-thermal          <   
          -      cooling-maps       map0            R  1        W  /         trips      trip-point0         % s        1           Epassive          s  1      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                gpuss3-thermal          <   
          -      cooling-maps       map0            R  2        W  /         trips      trip-point0         % s        1           Epassive          s  2      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                gpuss4-thermal          <   
          -      cooling-maps       map0            R  3        W  /         trips      trip-point0         % s        1           Epassive          s  3      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                gpuss5-thermal          <   
          -      cooling-maps       map0            R  4        W  /         trips      trip-point0         % s        1           Epassive          s  4      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                gpuss6-thermal          <   
          -      cooling-maps       map0            R  5        W  /         trips      trip-point0         % s        1           Epassive          s  5      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                gpuss7-thermal          <   
          -      cooling-maps       map0            R  6        W  /         trips      trip-point0         % s        1           Epassive          s  6      trip-point1         %         1           Ehot       trip-point2         % 8        1          	   Ecritical                modem0-thermal            -   	   trips      modem0-hot          %         1           Ehot       modem0-critical         % 8        1          	   Ecritical                modem1-thermal            -   
   trips      modem1-hot          %         1           Ehot       modem1-critical         % 8        1          	   Ecritical                modem2-thermal            -      trips      modem2-hot          %         1           Ehot       modem2-critical         % 8        1          	   Ecritical                modem3-thermal            -      trips      modem3-hot          %         1           Ehot       modem3-critical         % 8        1          	   Ecritical                pm8010-m-thermal            <   d          7   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8010-n-thermal            <   d          8   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8550-thermal          <   d          9   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8550b-thermal         <   d          :   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8550ve-thermal            <   d          ;   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8550vs-c-thermal          <   d          <   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8550vs-d-thermal          <   d          =   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8550vs-e-thermal          <   d          >   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot             pm8550vs-g-thermal          <   d          ?   trips      trip0           % s        1             Epassive       trip1           % 8        1             Ehot                timer            2arm,armv8-timer       @  ]                                             
             reboot-mode          2nvmem-reboot-mode           f  @        rreboot-mode                             aliases       $  /soc@0/geniqup@8c0000/serial@89c000       $  /soc@0/geniqup@8c0000/serial@898000       hdmi-out             2hdmi-connector           Ea      port       endpoint              A         s               gpio-keys         
   2gpio-keys             B        default    key-volume-up         
  ?Volume Up           4   s                                                       leds          
   2gpio-leds      led-0         
  	Vbluetooth                                        bluetooth-power         off       led-1         
  	Vindicator                        
   	            off                led-2           	Vwlan                         
   
            phy0tx          off          pmic-glink        >   2qcom,sm8650-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink                                     	             connector@0          2usb-c-connector                      dual            &dual       ports                                port@0                  endpoint              C         s            port@1                 endpoint              D         s            port@2                 endpoint              E         s                     regulator-lt9611-1v2             2regulator-fixed         LT9611_1V2           O         O        0          ;      O             @         s         regulator-lt9611-3v3             2regulator-fixed         LT9611_3V3           2Z         2Z        0  F        ;      N             @         s         sound         (   2qcom,sm8650-sndcard qcom,sm8450-sndcard          ,SM8650-HDK          SSpkrLeft IN WSA_SPK1 OUT SpkrRight IN WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC1 MIC BIAS1 AMIC2 MIC BIAS2 AMIC5 MIC BIAS4 TX SWR_INPUT0 ADC1_OUTPUT TX SWR_INPUT1 ADC2_OUTPUT TX SWR_INPUT3 ADC4_OUTPUT       wcd-playback-dai-link           aWCD Playback       cpu         k  G   q      codec           k  H      I                 platform            k  J         wcd-capture-dai-link            aWCD Capture    cpu         k  G   x      codec           k  H     K                 platform            k  J         wsa-dai-link            aWSA Playback       cpu         k  G   i      codec           k  L  M  N                 platform            k  J            regulator-vph-pwr            2regulator-fixed         vph_pwr          8u          8u          u                  s        regulator-vreg-bob-3v3           2regulator-fixed         VREG_BOB_3P3             2Z         2Z        0           s  F      audio-codec       &   2qcom,wcd9395-codec qcom,wcd9390-codec             O        default          w@         w@         w@         w@          $ I                   "         I  P        r  P          Q              k                                                                  s  H      wcn7850-pmu          2qcom,wcn7850-pmu            default           R  S                                            w  T                                U          "        K          \            {         regulators     ldo0            vreg_pmu_rfa_cmn             s   h      ldo1            vreg_pmu_aon_0p59            s   i      ldo2            vreg_pmu_wlcx_0p8            s   j      ldo3            vreg_pmu_wlmx_0p85           s   k      ldo4            vreg_pmu_btcmx_0p85          s        ldo5            vreg_pmu_rfa_0p8             s   l      ldo6            vreg_pmu_rfa_1p2             s   m      ldo7            vreg_pmu_rfa_1p8             s   n      ldo8            vreg_pmu_pcie_0p9            s         ldo9            vreg_pmu_pcie_1p8            s               __symbols__         /clocks/xo-board            /clocks/sleep-clk           $/clocks/bi-tcxo-div2-clk            1/clocks/bi-tcxo-ao-div2-clk         A/cpus/cpu@0         F/cpus/cpu@0/l2-cache            K/cpus/cpu@0/l2-cache/l3-cache           P/cpus/cpu@100           U/cpus/cpu@200           Z/cpus/cpu@200/l2-cache          a/cpus/cpu@300           f/cpus/cpu@300/l2-cache          m/cpus/cpu@400           r/cpus/cpu@400/l2-cache          y/cpus/cpu@500           ~/cpus/cpu@500/l2-cache          /cpus/cpu@600           /cpus/cpu@600/l2-cache          /cpus/cpu@700           /cpus/cpu@700/l2-cache           /cpus/idle-states/cpu-sleep-0-0          /cpus/idle-states/cpu-sleep-1-0          /cpus/idle-states/cpu-sleep-2-0       )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1            /ete-0/out-ports/port/endpoint          /ete-1/out-ports/port/endpoint          /ete-2/out-ports/port/endpoint          3/ete-3/out-ports/port/endpoint          G/ete-4/out-ports/port/endpoint          [/ete-5/out-ports/port/endpoint          o/ete-6/out-ports/port/endpoint          /ete-7/out-ports/port/endpoint        %  /funnel-ete/in-ports/port@0/endpoint          %  /funnel-ete/in-ports/port@1/endpoint          %  /funnel-ete/in-ports/port@2/endpoint          %  /funnel-ete/in-ports/port@3/endpoint          %  /funnel-ete/in-ports/port@4/endpoint          %  /funnel-ete/in-ports/port@5/endpoint          %  	/funnel-ete/in-ports/port@6/endpoint          %  /funnel-ete/in-ports/port@7/endpoint          $  //funnel-ete/out-ports/port/endpoint         J/firmware/scm           N/interconnect-0         W/interconnect-1         _/opp-table-qup100mhz            t/opp-table-qup120mhz            /opp-table-qup128mhz            /opp-table-qup240mhz            /opp-table-cpu0         /opp-table-cpu2         /opp-table-cpu5         /opp-table-cpu7         /psci/power-domain-cpu0         /psci/power-domain-cpu1         /psci/power-domain-cpu2         /psci/power-domain-cpu3         /psci/power-domain-cpu4         /psci/power-domain-cpu5         /psci/power-domain-cpu6         '/psci/power-domain-cpu7         //psci/power-domain-cluster          :/reserved-memory            J/reserved-memory/hyp@80000000         $  R/reserved-memory/cpusys-vm@80e00000       ,  `/reserved-memory/xbl-dt-log-merged@81a00000       %  v/reserved-memory/aop-cmd-db@81c60000          .  /reserved-memory/aop-tme-uefi-merged@81c80000           /reserved-memory/smem@81d00000        #  /reserved-memory/adsp-mhi@81f00000           /reserved-memory/pvmfw@824a0000       &  /reserved-memory/global-sync@82600000         "  /reserved-memory/tz-stat@82700000           /reserved-memory/qdss@82800000        (  /reserved-memory/qlink-logging@84800000       #  /reserved-memory/mpss-dsm@86b00000        %  /reserved-memory/mpss-dsm-2@8b400000            /reserved-memory/mpss@8bc00000        &  /reserved-memory/q6-mpss-dtb@9b000000         !   /reserved-memory/ipa-fw@9b080000          "  +/reserved-memory/ipa-gsi@9b090000         )  7/reserved-memory/gpu-micro-code@9b09a000            J/reserved-memory/spss@9b0a0000        (  Z/reserved-memory/spu-tz-shared@9b280000       +  l/reserved-memory/spu-modem-shared@9b2e0000        !  /reserved-memory/camera@9b300000             /reserved-memory/video@9bb00000         /reserved-memory/cvp@9c300000           /reserved-memory/cdsp@9ca00000        &  /reserved-memory/q6-cdsp-dtb@9de00000         &  /reserved-memory/q6-adsp-dtb@9de80000         #  /reserved-memory/adspslpi@9df00000           /reserved-memory/rmtfs@d7c00000       $  /reserved-memory/tz-merged@d8000000       (  /reserved-memory/hwfence-shbuf@e6440000       &  /reserved-memory/trust-ui-vm@f3800000         !  
/reserved-memory/oem-vm@f7c00000          #  /reserved-memory/llcc-lpi@ff800000          "/smp2p-adsp/master-kernel           1/smp2p-adsp/slave-kernel            ?/smp2p-cdsp/master-kernel           N/smp2p-cdsp/slave-kernel            \/smp2p-modem/master-kernel          l/smp2p-modem/slave-kernel           {/smp2p-modem/ipa-ap-to-modem            /smp2p-modem/ipa-modem-to-ap            /soc@0          /soc@0/clock-controller@100000          /soc@0/mailbox@406000           /soc@0/dma-controller@800000            /soc@0/geniqup@8c0000         !  /soc@0/geniqup@8c0000/i2c@880000          !  /soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  /soc@0/geniqup@8c0000/spi@884000          !  /soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  /soc@0/geniqup@8c0000/i2c@890000          !  /soc@0/geniqup@8c0000/spi@890000          !  /soc@0/geniqup@8c0000/i2c@894000          !  /soc@0/geniqup@8c0000/spi@894000          $  /soc@0/geniqup@8c0000/serial@898000       $  /soc@0/geniqup@8c0000/serial@89c000         	/soc@0/geniqup@9c0000         !  /soc@0/geniqup@9c0000/i2c@980000          !  $/soc@0/geniqup@9c0000/i2c@984000          !  ./soc@0/geniqup@9c0000/i2c@988000          !  8/soc@0/geniqup@9c0000/i2c@98c000          !  B/soc@0/geniqup@9c0000/i2c@990000          !  L/soc@0/geniqup@9c0000/i2c@994000          !  V/soc@0/geniqup@9c0000/i2c@998000          !  `/soc@0/geniqup@9c0000/i2c@99c000          !  j/soc@0/geniqup@9c0000/i2c@9a0000          !  t/soc@0/geniqup@9c0000/i2c@9a4000            ~/soc@0/dma-controller@a00000            /soc@0/geniqup@ac0000         !  /soc@0/geniqup@ac0000/i2c@a80000          !  /soc@0/geniqup@ac0000/spi@a80000          !  /soc@0/geniqup@ac0000/i2c@a84000          !  /soc@0/geniqup@ac0000/spi@a84000          !  /soc@0/geniqup@ac0000/i2c@a88000          !  /soc@0/geniqup@ac0000/spi@a88000          !  /soc@0/geniqup@ac0000/i2c@a8c000          -  /soc@0/geniqup@ac0000/i2c@a8c000/typec-mux@e          C  /soc@0/geniqup@ac0000/i2c@a8c000/typec-mux@e/ports/port@0/endpoint        !  /soc@0/geniqup@ac0000/spi@a8c000          !  /soc@0/geniqup@ac0000/i2c@a90000          !  /soc@0/geniqup@ac0000/spi@a90000          !  /soc@0/geniqup@ac0000/i2c@a94000          !  /soc@0/geniqup@ac0000/spi@a94000          !  /soc@0/geniqup@ac0000/i2c@a98000          0  /soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b       F  /soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b/ports/port@0/endpoint         F  /soc@0/geniqup@ac0000/i2c@a98000/hdmi-bridge@2b/ports/port@2/endpoint         !  /soc@0/geniqup@ac0000/spi@a98000          !  /soc@0/geniqup@ac0000/i2c@a9c000          !  /soc@0/geniqup@ac0000/spi@a9c000            /soc@0/rng@10c3000          #/soc@0/interconnect@1500000         -/soc@0/interconnect@1600000         8/soc@0/interconnect@1680000         C/soc@0/interconnect@16c0000         L/soc@0/interconnect@16e0000         W/soc@0/interconnect@1700000         b/soc@0/interconnect@1780000         k/soc@0/pcie@1c00000         q/soc@0/pcie@1c00000/opp-table           /soc@0/pcie@1c00000/pcie@0          /soc@0/phy@1c06000          /soc@0/pcie@1c08000         /soc@0/pcie@1c08000/opp-table           /soc@0/phy@1c0e000          /soc@0/phy@1d80000          /soc@0/ufshc@1d84000            /soc@0/ufshc@1d84000/opp-table          +/soc@0/crypto@1d88000           /soc@0/dma-controller@1dc4000           /soc@0/crypto@1dfa000           /soc@0/hwlock@1f40000            /soc@0/clock-controller@1fc0000         /soc@0/gpu@3d00000          /soc@0/gpu@3d00000/zap-shader           /soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          /soc@0/gmu@3d6a000/opp-table             */soc@0/clock-controller@3d90000         0/soc@0/iommu@3da0000            </soc@0/ipa@3f40000          @/soc@0/remoteproc@4080000           P/soc@0/remoteproc@6800000         %  `/soc@0/remoteproc@6800000/glink-edge          3  v/soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  |/soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         /soc@0/codec@6aa0000            /soc@0/soundwire@6ab0000            /soc@0/codec@6ac0000            /soc@0/soundwire@6ad0000          #  /soc@0/soundwire@6ad0000/codec@0,4          /soc@0/codec@6ae0000            /soc@0/codec@6b00000            /soc@0/soundwire@6b10000          %  /soc@0/soundwire@6b10000/speaker@0,0          %  /soc@0/soundwire@6b10000/speaker@0,1            /soc@0/soundwire@6d30000          #  
/soc@0/soundwire@6d30000/codec@0,3          /soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  */soc@0/pinctrl@6e80000/tx-swr-active-state        +  8/soc@0/pinctrl@6e80000/rx-swr-active-state        ,  F/soc@0/pinctrl@6e80000/dmic01-default-state       ,  U/soc@0/pinctrl@6e80000/dmic23-default-state       ,  d/soc@0/pinctrl@6e80000/wsa-swr-active-state       -  s/soc@0/pinctrl@6e80000/wsa2-swr-active-state          0  /soc@0/pinctrl@6e80000/spkr-1-sd-n-active-state         /soc@0/interconnect@7400000         /soc@0/interconnect@7430000         /soc@0/interconnect@7e40000         /soc@0/mmc@8804000          /soc@0/mmc@8804000/opp-table            /soc@0/phy@88e3000          /soc@0/phy@88e8000        )  /soc@0/phy@88e8000/ports/port@0/endpoint          )  /soc@0/phy@88e8000/ports/port@1/endpoint          )  /soc@0/phy@88e8000/ports/port@2/endpoint            3/soc@0/usb@a600000        )  9/soc@0/usb@a600000/ports/port@0/endpoint          )  G/soc@0/usb@a600000/ports/port@1/endpoint            U/soc@0/video-codec@aa00000        %  Z/soc@0/video-codec@aa00000/opp-table             i/soc@0/clock-controller@aaf0000         q/soc@0/cci@ac15000          v/soc@0/cci@ac15000/i2c-bus@0            /soc@0/cci@ac15000/i2c-bus@1            /soc@0/cci@ac16000          /soc@0/cci@ac16000/i2c-bus@0            /soc@0/cci@ac16000/i2c-bus@1            /soc@0/cci@ac17000          /soc@0/cci@ac17000/i2c-bus@0            /soc@0/cci@ac17000/i2c-bus@1             /soc@0/clock-controller@ade0000       !  /soc@0/display-subsystem@ae00000          <  /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@1/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@2/endpoint         F  /soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         -  /soc@0/display-subsystem@ae00000/dsi@ae94000          C  /soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@0/endpoint        C  /soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@1/endpoint        7  -/soc@0/display-subsystem@ae00000/dsi@ae94000/opp-table        -  @/soc@0/display-subsystem@ae00000/phy@ae95000          -  N/soc@0/display-subsystem@ae00000/dsi@ae96000          C  X/soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@0/endpoint        C  e/soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@1/endpoint        -  s/soc@0/display-subsystem@ae00000/phy@ae97000          @  /soc@0/display-subsystem@ae00000/displayport-controller@af54000       J  /soc@0/display-subsystem@ae00000/displayport-controller@af54000/opp-table         V  /soc@0/display-subsystem@ae00000/displayport-controller@af54000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@af54000/ports/port@1/endpoint            /soc@0/clock-controller@af00000       $  /soc@0/interrupt-controller@b220000         /soc@0/thermal-sensor@c228000           /soc@0/thermal-sensor@c229000           /soc@0/thermal-sensor@c22a000            /soc@0/power-management@c300000         /soc@0/spmi@c400000         /soc@0/spmi@c400000/pmic@c        +  /soc@0/spmi@c400000/pmic@c/temp-alarm@2400          /soc@0/spmi@c400000/pmic@d        +  /soc@0/spmi@c400000/pmic@d/temp-alarm@2400          /soc@0/spmi@c400000/pmic@1        *  /soc@0/spmi@c400000/pmic@1/temp-alarm@a00         %  (/soc@0/spmi@c400000/pmic@1/gpio@8800          9  5/soc@0/spmi@c400000/pmic@1/gpio@8800/sdc2-card-det-state          7  E/soc@0/spmi@c400000/pmic@1/gpio@8800/volume-up-n-state        /  Q/soc@0/spmi@c400000/pmic@1/led-controller@ee00          ^/soc@0/spmi@c400000/pmic@1/pwm          i/soc@0/spmi@c400000/pmic@7        *  q/soc@0/spmi@c400000/pmic@7/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@7/gpio@8800          $  /soc@0/spmi@c400000/pmic@7/phy@fd00         /soc@0/spmi@c400000/pmic@8        *  /soc@0/spmi@c400000/pmic@8/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@8/gpio@8800            /soc@0/spmi@c400000/pmic@2        *  /soc@0/spmi@c400000/pmic@2/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@2/gpio@8800            /soc@0/spmi@c400000/pmic@3        *  /soc@0/spmi@c400000/pmic@3/temp-alarm@a00         %  (/soc@0/spmi@c400000/pmic@3/gpio@8800            9/soc@0/spmi@c400000/pmic@4        *  D/soc@0/spmi@c400000/pmic@4/temp-alarm@a00         %  Z/soc@0/spmi@c400000/pmic@4/gpio@8800            k/soc@0/spmi@c400000/pmic@6        *  v/soc@0/spmi@c400000/pmic@6/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@6/gpio@8800            /soc@0/spmi@c400000/pmic@0        $  /soc@0/spmi@c400000/pmic@0/pon@1300       +  /soc@0/spmi@c400000/pmic@0/pon@1300/pwrkey        *  /soc@0/spmi@c400000/pmic@0/pon@1300/resin         $  /soc@0/spmi@c400000/pmic@0/rtc@6100       &  /soc@0/spmi@c400000/pmic@0/nvram@7100         7  /soc@0/spmi@c400000/pmic@0/nvram@7100/reboot-reason@48        %  /soc@0/spmi@c400000/pmic@0/gpio@b800            %/soc@0/pinctrl@f100000        ,  /soc@0/pinctrl@f100000/cci0-0-default-state       *   /soc@0/pinctrl@f100000/cci0-0-sleep-state         ,   /soc@0/pinctrl@f100000/cci0-1-default-state       *   (/soc@0/pinctrl@f100000/cci0-1-sleep-state         ,   5/soc@0/pinctrl@f100000/cci1-0-default-state       *   D/soc@0/pinctrl@f100000/cci1-0-sleep-state         ,   Q/soc@0/pinctrl@f100000/cci1-1-default-state       *   `/soc@0/pinctrl@f100000/cci1-1-sleep-state         ,   m/soc@0/pinctrl@f100000/cci2-0-default-state       *   |/soc@0/pinctrl@f100000/cci2-0-sleep-state         ,   /soc@0/pinctrl@f100000/cci2-1-default-state       *   /soc@0/pinctrl@f100000/cci2-1-sleep-state         /   /soc@0/pinctrl@f100000/hub-i2c0-data-clk-state        /   /soc@0/pinctrl@f100000/hub-i2c1-data-clk-state        /   /soc@0/pinctrl@f100000/hub-i2c2-data-clk-state        /   /soc@0/pinctrl@f100000/hub-i2c3-data-clk-state        /   /soc@0/pinctrl@f100000/hub-i2c4-data-clk-state        /   /soc@0/pinctrl@f100000/hub-i2c5-data-clk-state        /  !/soc@0/pinctrl@f100000/hub-i2c6-data-clk-state        /  !#/soc@0/pinctrl@f100000/hub-i2c7-data-clk-state        /  !5/soc@0/pinctrl@f100000/hub-i2c8-data-clk-state        /  !G/soc@0/pinctrl@f100000/hub-i2c9-data-clk-state        +  !Y/soc@0/pinctrl@f100000/pcie0-default-state        +  !m/soc@0/pinctrl@f100000/pcie1-default-state        /  !/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  "#/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  "5/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  "H/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  "[/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  "n/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       )  "/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  #*/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  #6/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  #H/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  #T/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  #f/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  #r/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  #/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  $ /soc@0/pinctrl@f100000/qup-spi12-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  $ /soc@0/pinctrl@f100000/qup-spi13-cs-state         0  $-/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  $@/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  $M/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       0  $`/soc@0/pinctrl@f100000/qup-uart14-default-state       0  $s/soc@0/pinctrl@f100000/qup-uart14-cts-rts-state       0  $/soc@0/pinctrl@f100000/qup-uart15-default-state       (  $/soc@0/pinctrl@f100000/sdc2-sleep-state       *  $/soc@0/pinctrl@f100000/sdc2-default-state         (  $/soc@0/pinctrl@f100000/bt-default-state       (  $/soc@0/pinctrl@f100000/lt9611-irq-state       (  $/soc@0/pinctrl@f100000/lt9611-rst-state       0  $/soc@0/pinctrl@f100000/spkr-2-sd-n-active-state       0  $/soc@0/pinctrl@f100000/wcd-reset-n-active-state       %  $/soc@0/pinctrl@f100000/wlan-en-state          0  %/soc@0/funnel@10042000/in-ports/port@4/endpoint       /  %/soc@0/funnel@10042000/out-ports/port/endpoint        0  %6/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  %P/soc@0/funnel@10045000/out-ports/port/endpoint        0  %l/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  %/soc@0/funnel@10b04000/out-ports/port/endpoint        +  %/soc@0/tmc@10b05000/in-ports/port/endpoint        .  %/soc@0/funnel@13810000/in-ports/port/endpoint         /  %/soc@0/funnel@13810000/out-ports/port/endpoint          %/soc@0/iommu@15000000         %  %/soc@0/interrupt-controller@17100000          J  %/soc@0/interrupt-controller@17100000/ppi-partitions/interrupt-partition-0         J  &/soc@0/interrupt-controller@17100000/ppi-partitions/interrupt-partition-1         J  &/soc@0/interrupt-controller@17100000/ppi-partitions/interrupt-partition-2         =  &!/soc@0/interrupt-controller@17100000/msi-controller@17140000            &)/soc@0/rsc@17a00000         &2/soc@0/rsc@17a00000/bcm-voter         %  &A/soc@0/rsc@17a00000/clock-controller          %  &H/soc@0/rsc@17a00000/power-controller          /  &O/soc@0/rsc@17a00000/power-controller/opp-table        6  &`/soc@0/rsc@17a00000/power-controller/opp-table/opp-16         6  &o/soc@0/rsc@17a00000/power-controller/opp-table/opp-48         6  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-52         6  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-56         6  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-60         6  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-64         6  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-80         7  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-128        7  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-144        7  '/soc@0/rsc@17a00000/power-controller/opp-table/opp-192        7  ' /soc@0/rsc@17a00000/power-controller/opp-table/opp-256        7  '//soc@0/rsc@17a00000/power-controller/opp-table/opp-320        7  'A/soc@0/rsc@17a00000/power-controller/opp-table/opp-336        7  'S/soc@0/rsc@17a00000/power-controller/opp-table/opp-384        7  'd/soc@0/rsc@17a00000/power-controller/opp-table/opp-416        &  'x/soc@0/rsc@17a00000/regulators-0/bob1         &  '/soc@0/rsc@17a00000/regulators-0/bob2         &  '/soc@0/rsc@17a00000/regulators-0/ldo2         &  '/soc@0/rsc@17a00000/regulators-0/ldo5         &  '/soc@0/rsc@17a00000/regulators-0/ldo6         &  '/soc@0/rsc@17a00000/regulators-0/ldo7         &  '/soc@0/rsc@17a00000/regulators-0/ldo8         &  '/soc@0/rsc@17a00000/regulators-0/ldo9         '  '/soc@0/rsc@17a00000/regulators-0/ldo11        '  '/soc@0/rsc@17a00000/regulators-0/ldo12        '  '/soc@0/rsc@17a00000/regulators-0/ldo13        '  (/soc@0/rsc@17a00000/regulators-0/ldo14        '  (/soc@0/rsc@17a00000/regulators-0/ldo15        '  ( /soc@0/rsc@17a00000/regulators-0/ldo16        '  (./soc@0/rsc@17a00000/regulators-0/ldo17        '  (</soc@0/rsc@17a00000/regulators-1/smps1        '  (I/soc@0/rsc@17a00000/regulators-1/smps2        '  (V/soc@0/rsc@17a00000/regulators-1/smps3        '  (c/soc@0/rsc@17a00000/regulators-1/smps4        '  (p/soc@0/rsc@17a00000/regulators-1/smps5        '  (}/soc@0/rsc@17a00000/regulators-1/smps6        &  (/soc@0/rsc@17a00000/regulators-1/ldo1         &  (/soc@0/rsc@17a00000/regulators-1/ldo3         &  (/soc@0/rsc@17a00000/regulators-2/ldo1         &  (/soc@0/rsc@17a00000/regulators-3/ldo3         &  (/soc@0/rsc@17a00000/regulators-4/ldo1         &  (/soc@0/rsc@17a00000/regulators-4/ldo3         '  (/soc@0/rsc@17a00000/regulators-5/smps4        &  (/soc@0/rsc@17a00000/regulators-5/ldo1         &  (/soc@0/rsc@17a00000/regulators-5/ldo2         &  )/soc@0/rsc@17a00000/regulators-5/ldo3         &  )/soc@0/rsc@17a00000/regulators-6/ldo1         &  )/soc@0/rsc@17a00000/regulators-6/ldo2         &  )./soc@0/rsc@17a00000/regulators-6/ldo3         &  );/soc@0/rsc@17a00000/regulators-6/ldo4         &  )H/soc@0/rsc@17a00000/regulators-6/ldo5         &  )U/soc@0/rsc@17a00000/regulators-6/ldo6         &  )b/soc@0/rsc@17a00000/regulators-6/ldo7         &  )p/soc@0/rsc@17a00000/regulators-7/ldo1         &  )}/soc@0/rsc@17a00000/regulators-7/ldo2         &  )/soc@0/rsc@17a00000/regulators-7/ldo3         &  )/soc@0/rsc@17a00000/regulators-7/ldo4         &  )/soc@0/rsc@17a00000/regulators-7/ldo5         &  )/soc@0/rsc@17a00000/regulators-7/ldo6         &  )/soc@0/rsc@17a00000/regulators-7/ldo7           )/soc@0/interconnect@17d90000            )/soc@0/cpufreq@17d91000         )/soc@0/pmu@24091000/opp-table           )/soc@0/pmu@240b7400/opp-table           *	/soc@0/interconnect@24100000            */soc@0/interconnect@320c0000            */soc@0/remoteproc@32300000        0  *)/thermal-zones/gpuss0-thermal/trips/trip-point0       0  *5/thermal-zones/gpuss1-thermal/trips/trip-point0       0  *A/thermal-zones/gpuss2-thermal/trips/trip-point0       0  *M/thermal-zones/gpuss3-thermal/trips/trip-point0       0  *Y/thermal-zones/gpuss4-thermal/trips/trip-point0       0  *e/thermal-zones/gpuss5-thermal/trips/trip-point0       0  *q/thermal-zones/gpuss6-thermal/trips/trip-point0       0  *}/thermal-zones/gpuss7-thermal/trips/trip-point0         */hdmi-out/port/endpoint       .  */pmic-glink/connector@0/ports/port@0/endpoint         .  */pmic-glink/connector@0/ports/port@1/endpoint         .  */pmic-glink/connector@0/ports/port@2/endpoint           */regulator-lt9611-1v2           */regulator-lt9611-3v3           */regulator-vph-pwr          */regulator-vreg-bob-3v3         */audio-codec            + /wcn7850-pmu/regulators/ldo0            +/wcn7850-pmu/regulators/ldo1            +#/wcn7850-pmu/regulators/ldo2            +5/wcn7850-pmu/regulators/ldo3            +H/wcn7850-pmu/regulators/ldo4            +\/wcn7850-pmu/regulators/ldo5            +m/wcn7850-pmu/regulators/ldo6            +~/wcn7850-pmu/regulators/ldo7            +/wcn7850-pmu/regulators/ldo8            +/wcn7850-pmu/regulators/ldo9             	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg power-domains power-domain-names enable-method next-level-cache capacity-dmips-mhz dynamic-power-coefficient qcom,freq-domain operating-points-v2 interconnects #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop remote-endpoint qcom,dload-mode #interconnect-cells qcom,bcm-voters opp-hz required-opps opp-shared opp-peak-kBps interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid interrupts-extended mboxes qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus dma-coherent status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names vddrfacmn-supply vddaon-supply vddwlcx-supply vddwlmx-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply max-speed vdd-supply reset-gpios mode-switch orientation-switch vcc-supply reg-names interrupt-names resets reset-names iommu-map interrupt-map interrupt-map-mask msi-map msi-map-mask linux,pci-domain num-lanes bus-range phys phy-names wake-gpios perst-gpios opp-level vddpcie0p9-supply vddpcie1p8-supply assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply vdda-qref-supply lanes-per-direction qcom,ice vcc-max-microamp vccq-supply vccq-max-microamp qcom,ee qcom,num-ees num-channels qcom,controlled-remotely #hwlock-cells qcom,gmu memory-region firmware-name qcom,opp-acd-level qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names qcom,gsi-loader label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping powerdown-gpios sound-name-prefix vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low bus-width sdhci-caps-mask qcom,dll-config qcom,ddr-config cd-gpios vmmc-supply vqmmc-supply no-sdio no-mmc pinctrl-1 vdda12-supply snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize dr_mode usb-role-switch assigned-clock-parents vdda-supply data-lanes vdds-supply qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id bias-pull-up output-disable power-source #pwm-cells color default-state vdd18-supply vdd3-supply linux,code bits wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride affinity msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config vdd-bob1-supply vdd-bob2-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply qcom,pmic-id regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes vdd-l1-supply vdd-l2-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s4-supply vdd-s5-supply vdd-s6-supply vdd-l1-l2-supply vdd-l3-l4-supply vdd-l5-supply vdd-l6-supply vdd-l7-supply #freq-domain-cells thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 serial1 debounce-interval linux,can-disable wakeup-source linux,default-trigger panic-indicator orientation-gpios power-role data-role vin-supply gpio enable-active-high audio-routing link-name sound-dai regulator-always-on regulator-boot-on qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply wlan-enable-gpios bt-enable-gpios vddio-supply vddio1p2-supply vdddig-supply xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 l3_0 cpu1 cpu2 l2_200 cpu3 l2_300 cpu4 l2_400 cpu5 l2_500 cpu6 l2_600 cpu7 l2_700 silver_cpu_sleep_0 gold_cpu_sleep_0 gold_plus_cpu_sleep_0 cluster_sleep_0 cluster_sleep_1 ete0_out_funnel_ete ete1_out_funnel_ete ete2_out_funnel_ete ete3_out_funnel_ete ete4_out_funnel_ete ete5_out_funnel_ete ete6_out_funnel_ete ete7_out_funnel_ete funnel_ete_in_ete0 funnel_ete_in_ete1 funnel_ete_in_ete2 funnel_ete_in_ete3 funnel_ete_in_ete4 funnel_ete_in_ete5 funnel_ete_in_ete6 funnel_ete_in_ete7 funnel_ete_out_funnel_apss scm clk_virt mc_virt qup_opp_table_100mhz qup_opp_table_120mhz qup_opp_table_128mhz qup_opp_table_240mhz cpu0_opp_table cpu2_opp_table cpu5_opp_table cpu7_opp_table cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cluster_pd reserved_memory hyp_mem cpusys_vm_mem xbl_dt_log_merged_mem aop_cmd_db_mem aop_tme_uefi_merged_mem adsp_mhi_mem pvmfw_mem global_sync_mem tz_stat_mem qdss_mem qlink_logging_mem mpss_dsm_mem mpss_dsm_mem_2 mpss_mem q6_mpss_dtb_mem ipa_fw_mem ipa_gsi_mem gpu_micro_code_mem spss_region_mem spu_tz_shared_mem spu_modem_shared_mem camera_mem video_mem cvp_mem cdsp_mem q6_cdsp_dtb_mem q6_adsp_dtb_mem adspslpi_mem rmtfs_mem tz_merged_mem hwfence_shbuf trust_ui_vm_mem oem_vm_mem llcc_lpi_mem smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in smp2p_modem_out smp2p_modem_in ipa_smp2p_out ipa_smp2p_in soc gcc ipcc gpi_dma2 qupv3_id_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 uart14 uart15 i2c_master_hub_0 i2c_hub_0 i2c_hub_1 i2c_hub_2 i2c_hub_3 i2c_hub_4 i2c_hub_5 i2c_hub_6 i2c_hub_7 i2c_hub_8 i2c_hub_9 gpi_dma1 qupv3_id_0 i2c0 spi0 i2c1 spi1 i2c2 spi2 i2c3 wcd_usbss wcd_usbss_sbu_mux spi3 i2c4 spi4 i2c5 spi5 i2c6 lt9611_codec lt9611_a lt9611_out spi6 i2c7 spi7 rng cnoc_main config_noc system_noc pcie_noc aggre1_noc aggre2_noc mmss_noc pcie0 pcie0_opp_table pcieport0 pcie0_phy pcie1 pcie1_opp_table pcie1_phy ufs_mem_phy ufs_mem_hc ufs_opp_table cryptobam crypto tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu ipa remoteproc_mpss remoteproc_adsp remoteproc_adsp_glink q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 north_spkr south_spkr swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_1_sd_n_active lpass_lpiaon_noc lpass_lpicx_noc lpass_ag_noc sdhc_2 sdhc2_opp_table usb_1_hsphy usb_dp_qmpphy usb_dp_qmpphy_out usb_dp_qmpphy_usb_ss_in usb_dp_qmpphy_dp_in usb_1 usb_1_dwc3_hs usb_1_dwc3_ss iris iris_opp_table videocc cci0 cci0_i2c0 cci0_i2c1 cci1 cci1_i2c0 cci1_i2c1 cci2 cci2_i2c0 cci2_i2c1 camcc mdss mdss_mdp dpu_intf1_out dpu_intf2_out dpu_intf0_out mdp_opp_table mdss_dsi0 mdss_dsi0_in mdss_dsi0_out mdss_dsi_opp_table mdss_dsi0_phy mdss_dsi1 mdss_dsi1_in mdss_dsi1_out mdss_dsi1_phy mdss_dp0 mdss_dp0_in mdss_dp0_out dispcc pdc tsens0 tsens1 tsens2 aoss_qmp spmi_bus pm8010_m pm8010_m_temp_alarm pm8010_n pm8010_n_temp_alarm pm8550 pm8550_temp_alarm pm8550_gpios sdc2_card_det_n volume_up_n pm8550_flash pm8550_pwm pm8550b pm8550b_temp_alarm pm8550b_gpios pm8550b_eusb2_repeater pm8550ve pm8550ve_temp_alarm pm8550ve_gpios pm8550vs_c pm8550vs_c_temp_alarm pm8550vs_c_gpios pm8550vs_d pm8550vs_d_temp_alarm pm8550vs_d_gpios pm8550vs_e pm8550vs_e_temp_alarm pm8550vs_e_gpios pm8550vs_g pm8550vs_g_temp_alarm pm8550vs_g_gpios pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_gpios cci0_0_default cci0_0_sleep cci0_1_default cci0_1_sleep cci1_0_default cci1_0_sleep cci1_1_default cci1_1_sleep cci2_0_default cci2_0_sleep cci2_1_default cci2_1_sleep hub_i2c0_data_clk hub_i2c1_data_clk hub_i2c2_data_clk hub_i2c3_data_clk hub_i2c4_data_clk hub_i2c5_data_clk hub_i2c6_data_clk hub_i2c7_data_clk hub_i2c8_data_clk hub_i2c9_data_clk pcie0_default_state pcie1_default_state qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_uart14_default qup_uart14_cts_rts qup_uart15_default sdc2_sleep sdc2_default bt_default lt9611_irq_pin lt9611_rst_pin spkr_2_sd_n_active wcd_default wlan_en funnel_in1_in_funnel_apss funnel_in1_out_funnel_qdss funnel_qdss_in_funnel_in1 funnel_qdss_out_funnel_aoss funnel_aoss_in_funnel_qdss funnel_aoss_out_tmc_etf tmc_etf_in_funnel_aoss funnel_apss_in_funnel_ete funnel_apss_out_funnel_in1 apps_smmu intc ppi_cluster0 ppi_cluster1 ppi_cluster2 gic_its apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l2b_3p0 vreg_l5b_3p1 vreg_l6b_1p8 vreg_l7b_1p8 vreg_l8b_1p8 vreg_l9b_2p9 vreg_l11b_1p2 vreg_l12b_1p8 vreg_l13b_3p0 vreg_l14b_3p2 vreg_l15b_1p8 vreg_l16b_2p8 vreg_l17b_2p5 vreg_s1c_1p2 vreg_s2c_0p8 vreg_s3c_0p9 vreg_s4c_1p2 vreg_s5c_0p7 vreg_s6c_1p8 vreg_l1c_1p2 vreg_l3c_1p2 vreg_l1d_0p88 vreg_l3e_0p9 vreg_l1g_0p91 vreg_l3g_0p91 vreg_s4i_0p85 vreg_l1i_0p88 vreg_l2i_0p88 vreg_l3i_1p2 vreg_l1m_1p1 vreg_l2m_1p056 vreg_l3m_2p8 vreg_l4m_2p8 vreg_l5m_1p8 vreg_l6m_2p8 vreg_l7m_2p96 vreg_l1n_1p1 vreg_l2n_1p056 vreg_l3n_1p8 vreg_l4n_1p8 vreg_l5n_2p8 vreg_l6n_2p8 vreg_l7n_3p3 epss_l3 cpufreq_hw llcc_bwmon_opp_table cpu_bwmon_opp_table gem_noc nsp_noc remoteproc_cdsp gpu0_alert0 gpu1_alert0 gpu2_alert0 gpu3_alert0 gpu4_alert0 gpu5_alert0 gpu6_alert0 gpu7_alert0 hdmi_connector_out pmic_glink_hs_in pmic_glink_ss_in pmic_glink_sbu lt9611_1v2 lt9611_3v3 vph_pwr vreg_bob_3v3 wcd939x vreg_pmu_rfa_cmn vreg_pmu_aon_0p59 vreg_pmu_wlcx_0p8 vreg_pmu_wlmx_0p85 vreg_pmu_btcmx_0p85 vreg_pmu_rfa_0p8 vreg_pmu_rfa_1p2 vreg_pmu_rfa_1p8 vreg_pmu_pcie_0p9 vreg_pmu_pcie_1p8 