 E   8 @   (                                                                                   ,Sony Xperia 1 V          2sony,pdx234 qcom,sm8550          =handset    chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c           s   0      bi-tcxo-div2-clk             V             2fixed-factor-clock           {                                        s   /      bi-tcxo-ao-div2-clk          V             2fixed-factor-clock           {                                       s            cpus                                 cpu@0            cpu          2arm,cortex-a510                           {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s      l3-cache             2cache           4            @         s               cpu@100          cpu          2arm,cortex-a510                          {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s            cpu@200          cpu          2arm,cortex-a510                          {                psci                	            
         psci                                           d        %            s      l2-cache             2cache           4            @                     s   	         cpu@300          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@400          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@500          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@600          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@700          cpu          2arm,cortex-x3                            {               psci                                     psci                              f          L        %            s      l2-cache             2cache           4            @                     s            cpu-map    cluster0       core0           N         core1           N         core2           N         core3           N         core4           N         core5           N         core6           N         core7           N               idle-states         Rpsci       cpu-sleep-0-0            2arm,idle-state          _silver-rail-power-collapse          o@            &                    ,                  s   (      cpu-sleep-1-0            2arm,idle-state          _gold-rail-power-collapse            o@            X                                      s   )      cpu-sleep-2-0            2arm,idle-state          _goldplus-rail-power-collapse            o@                      F          8                  s   *         domain-idle-states     cluster-sleep-0          2domain-idle-state           oA  D                    	.          #         s   +      cluster-sleep-1          2domain-idle-state           oA D          
          0          '         s   ,            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                    interconnect-0           2qcom,sm8550-clk-virt                                    s   8      interconnect-1           2qcom,sm8550-mc-virt                                 s         opp-table-qup100mhz          2operating-points-v2          s   T   opp-75000000                xh           !      opp-100000000                           "         opp-table-qup120mhz          2operating-points-v2          s   =   opp-75000000                xh           !      opp-120000000               '            "         opp-table-qup125mhz          2operating-points-v2          s   R   opp-75000000                xh           !      opp-125000000               sY@           "         memory@a0000000          memory                                pmu-a510             2arm,cortex-a510-pmu                      #      pmu-a710             2arm,cortex-a710-pmu                      $      pmu-a715             2arm,cortex-a715-pmu                      %      pmu-x3           2arm,cortex-x3-pmu                        &      psci             2arm,psci-1.0             smc    power-domain-cpu0           +                '        ?   (         s         power-domain-cpu1           +                '        ?   (         s         power-domain-cpu2           +                '        ?   (         s   
      power-domain-cpu3           +                '        ?   )         s         power-domain-cpu4           +                '        ?   )         s         power-domain-cpu5           +                '        ?   )         s         power-domain-cpu6           +                '        ?   )         s         power-domain-cpu7           +                '        ?   *         s         power-domain-cluster            +            ?   +   ,         s   '         reserved-memory                                   R   hyp-region@80000000                                 Y      cpusys-vm-region@80a00000                       @           Y      hyp-tags-region@80e00000                        =           Y      xbl-sc-region@d8100000                                 Y      hyp-tags-reserved-region@811d0000                                  Y      xbl-dt-log-merged-region@81a00000                       &           Y      aop-cmd-db-region@81c60000           2qcom,cmd-db                                Y      aop-config-merged-region@81c80000                       @          Y      smem@81d00000         
   2qcom,smem                                  `   -            Y      adsp-mhi-region@81f00000                                   Y      global-sync-region@82600000              `                  Y      tz-stat-region@82700000              p                  Y      cdsp-secure-heap-region@82800000                       `           Y      q6-mpss-dtb-region@9b000000                                 Y         s         ipa-fw-region@9b080000                                 Y      ipa-gsi-region@9b090000              	                  Y      gpu-micro-code-region@9b09a000               	                  Y         s         spss-region@9b100000                                   Y      spu-tz-shared-region@9b280000                (                  Y      spu-modem-shared-region@9b2e0000                 .                  Y      camera-region@9b300000               0                  Y      video-region@9bb00000                       p           Y         s         cvp-region@9c200000                      p           Y      cdsp-region@9c900000                                   Y         s         q6-cdsp-dtb-region@9e900000                                Y         s         q6-adsp-dtb-region@9e980000                                Y         s         adspslpi-region@9ea00000                                  Y         s         mpss-dsm-region@d4d00000                       0           Y         s         tz-reserved-region@d8000000                                 Y      cpucp-fw-region@d8140000                                   Y      qtee-region@d8300000                 0       P           Y      ta-region@d8800000               ؀                 Y      tz-tags-region@e1200000                     t           Y      hwfence-shbuf-region@e6440000                D       -          Y      trust-ui-vm-region@f3600000              `                Y      trust-ui-vm-dump-region@f80ee000                                  Y      trust-ui-vm-qrt-region@f80ef000                               Y      trust-ui-vm-vblk0-ring-region@f80f8000                      @          Y      trust-ui-vm-vblk1-ring-region@f80fc000                      @          Y      trust-ui-vm-swiotlb-region@f8100000                                Y      oem-vm-region@f8400000               @                 Y      oem-vm-vblk0-ring-region@fcc00000                        @          Y      oem-vm-swiotlb-region@fcc04000               @                 Y      hyp-ext-tags-region@fce00000                                  Y      hyp-ext-reserved-region@ff700000                 p                  Y      mpss-region@89800000                                  Y         s         splash@b8000000                                Y      memory@f8b00000          2qcom,rmtfs-mem                      (           Y        h           w         ramoops@ffd00000             2ramoops                                                                         rdtag-store-region@ffdc0000                                Y         smp2p-adsp           2qcom,smp2p                         .                    .                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                     -            s            smp2p-cdsp           2qcom,smp2p             ^             .                    .                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                     -            s            smp2p-modem          2qcom,smp2p                         .                    .                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                     -            s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa                  -            s            soc@0            2simple-bus          R                               >                                                   clock-controller@100000          2qcom,sm8550-gcc                      B          V           I           +         <   {   /   0   1   2       2      3       3      3      4             s   6      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc                @                                                -           V            s   .      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         b                                         L             M             N             O             P             Q             R             S             T             U             V             W               m           z   >           5  6                     okay             s   ;      geniqup@8c0000           2qcom,geni-se-qup                                     R        m-ahb s-ahb          {   6      6              5  #                                              okay       i2c@880000           2qcom,geni-i2c                         @         se           {   6   o        default            7               u                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;              ;                  tx rx               <               =      	  disabled          spi@880000           2qcom,geni-spi                         @         se           {   6   o               u               default            >   ?      H     8         8         9         :                                qup-core qup-config qup-memory              ;              ;                  tx rx               <               =                                	  disabled          i2c@884000           2qcom,geni-i2c                 @       @         se           {   6   q        default            @               G                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  disabled          spi@884000           2qcom,geni-spi                 @       @         se           {   6   q               G               default            A   B      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  disabled          i2c@888000           2qcom,geni-i2c                        @         se           {   6   s        default            C               H                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =        okay             c B@      spi@888000           2qcom,geni-spi                        @         se           {   6   s               H               default            D   E      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  disabled          i2c@88c000           2qcom,geni-i2c                        @         se           {   6   u        default            F               I                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =        okay             c B@   speaker-amp@30           2cirrus,cs35l45              0           G                  G                          &      cirrus,gpio-ctrl2           7            speaker-amp@31           2cirrus,cs35l45              1           G                  G                          &      cirrus,gpio-ctrl2           7               spi@88c000           2qcom,geni-spi                        @         se           {   6   u               I               default            H   I      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  disabled          i2c@890000           2qcom,geni-i2c                         @         se           {   6   w        default            J               J                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  disabled          spi@890000           2qcom,geni-spi                         @         se           {   6   w               J               default            K   L      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  disabled          i2c@894000           2qcom,geni-i2c                 @       @         se           {   6   y        default            M               K                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  disabled          spi@894000           2qcom,geni-spi                 @       @         se           {   6   y               K               default            N   O      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  disabled          serial@898000            2qcom,geni-uart                       @         se           {   6   {        default            P   Q                            0     8         8         9         :              qup-core qup-config             <               R      	  disabled          i2c@89c000           2qcom,geni-i2c                        @         se           {   6   }        default            S                                                      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               T      	  disabled          spi@89c000           2qcom,geni-spi                        @         se           {   6   }                              default            U   V      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               T                                	  disabled             geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                 s-ahb            {   6   Z                                  R        okay       i2c@980000           2qcom,geni-i2c-master-hub                          @         se core          {   6   F   6   E        default            W                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@984000           2qcom,geni-i2c-master-hub                  @       @         se core          {   6   H   6   E        default            X                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@988000           2qcom,geni-i2c-master-hub                         @         se core          {   6   J   6   E        default            Y                                                      0     8          8         9         :              qup-core qup-config             <               !        okay             c    pmic@75          2dlg,slg51000                u        A   Z                  [        default    regulators     ldo1            Nslg51000_a_ldo1         ] $         u 2Z      ldo2            Nslg51000_a_ldo2         ] $         u 2Z      ldo3            Nslg51000_a_ldo3         ] O        u 98p      ldo4            Nslg51000_a_ldo4         ] O        u 98p      ldo5            Nslg51000_a_ldo5         ]          u O      ldo6            Nslg51000_a_ldo6         ]          u O      ldo7            Nslg51000_a_ldo7         ] O        u 98p               i2c@98c000           2qcom,geni-i2c-master-hub                         @         se core          {   6   L   6   E        default            \                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@990000           2qcom,geni-i2c-master-hub                          @         se core          {   6   N   6   E        default            ]                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@994000           2qcom,geni-i2c-master-hub                  @       @         se core          {   6   P   6   E        default            ^                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@998000           2qcom,geni-i2c-master-hub                         @         se core          {   6   R   6   E        default            _                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@99c000           2qcom,geni-i2c-master-hub                         @         se core          {   6   T   6   E        default            `                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@9a0000           2qcom,geni-i2c-master-hub                          @         se core          {   6   V   6   E        default            a                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled          i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         se core          {   6   X   6   E        default            b                                                      0     8          8         9         :              qup-core qup-config             <               !      	  disabled             dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         b                                                                                                                       %             &             '             (             )             *               m           z              5                        okay             s   e      geniqup@ac0000           2qcom,geni-se-qup                                     R        m-ahb s-ahb          {   6      6              5                  8         8            	  qup-core                                              okay       i2c@a80000           2qcom,geni-i2c                         @         se           {   6   ]        default            c               a                                       H     8         8         9         :         d                       qup-core qup-config qup-memory              e              e                  tx rx               <               =        okay             c B@      spi@a80000           2qcom,geni-spi                         @         se           {   6   ]               a               default            f   g      H     8         8         9         :         d                       qup-core qup-config qup-memory              e              e                  tx rx               <               =                                	  disabled          i2c@a84000           2qcom,geni-i2c                 @       @         se           {   6   _        default            h               b                                       H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               =      	  disabled          spi@a84000           2qcom,geni-spi                 @       @         se           {   6   _               b               default            i   j      H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               =                                	  disabled          i2c@a88000           2qcom,geni-i2c                        @         se           {   6   a        default            k               c                                       H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T      	  disabled          spi@a88000           2qcom,geni-spi                        @         se           {   6   a               c               default            l   m      H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T                                	  disabled          i2c@a8c000           2qcom,geni-i2c                        @         se           {   6   c        default            n               d                                       H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T      	  disabled          spi@a8c000           2qcom,geni-spi                        @         se           {   6   c               d               default            o   p      H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T                                	  disabled          i2c@a90000           2qcom,geni-i2c                         @         se           {   6   e        default            q               e                                       H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T        okay             c       spi@a90000           2qcom,geni-spi                         @         se           {   6   e               e               default            r   s      H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T                                	  disabled          i2c@a94000           2qcom,geni-i2c                 @       @         se           {   6   g        default            t               f             H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T                                	  disabled          spi@a94000           2qcom,geni-spi                 @       @         se           {   6   g               f               default            u   v      H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T                                	  disabled          i2c@a98000           2qcom,geni-i2c                        @         se           {   6   i        default            w               k             H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T                                	  disabled          spi@a98000           2qcom,geni-spi                        @         se           {   6   i               k               default            x   y      H     8         8         9         :         d                       qup-core qup-config qup-memory              e             e                 tx rx               <               T                                	  disabled          serial@a9c000            2qcom,geni-debug-uart                         @         se           {   6   k        default            z               C               qup-core qup-config       0     8         8         9         :                  <               T        okay             interconnect@1500000             2qcom,sm8550-cnoc-main                P       0                                s   |      interconnect@1600000             2qcom,sm8550-config-noc               `        b                                 s   :      interconnect@1680000             2qcom,sm8550-system-noc               h       Ѐ                             interconnect@16c0000             2qcom,sm8550-pcie-anoc                l       "                     {   6       6   
                     s   {      interconnect@16e0000             2qcom,sm8550-aggre1-noc               n       D                     {   6      6                        s   d      interconnect@1700000             2qcom,sm8550-aggre2-noc               p                            {                           s         interconnect@1780000             2qcom,sm8550-mmss-noc                 x                                        s         rng@10c3000          2qcom,sm8550-trng qcom,trng               0              pcie@1c00000             pci          2qcom,pcie-sm8550          P               0     `             `             `             `                 parf dbi elbi atu config                                   8  R               `                 `0      `0                                                                                                                                                                                                    /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global          -                                                                                                                                                                                                        8   {   6   "   6   $   6   %   6   *   6   +   6      6          =  aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0     {                  9         |              pcie-mem cpu-pcie                   }            }                     5            5                6           pci             6               1        pciephy            ~        okay            !   G   `            ,   G   ^                      default    opp-table            2operating-points-v2          s   ~   opp-2500000-1                &%           !        8 А           F         opp-5000000-1                LK@           !        8             F         opp-5000000-2                LK@           !        8             F         opp-10000000-2                          !        8 B@           F         opp-8000000-3                z                    8            F         opp-16000000-3               $                    8 h           F            pcie@0           pci                                                                              R         phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy              `               (   {   6   "   6   $          6   &   6   (        aux cfg_ahb ref rchng pipe             6           phy         P   6   &        `             6            V            upcie0_pipe_clk                      okay                                   s   1      pcie@1c08000             pci          2qcom,pcie-sm8550          P              0     @             @             @             @                 parf dbi elbi atu config                                   8  R               @                 @0      @0                                                                     3             4             5             8             9             :             v             w             2             /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global          -                                                                                                                                                                                                    @   {   6   ,   6   .   6   /   6   6   6   7   6      6       6         I  aux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi            P   6   ,        `$       0     {                  9         |   	           pcie-mem cpu-pcie                   }           }                     5           5                6      6   	        pci link_down               6              2        pciephy                  	  disabled       opp-table            2operating-points-v2          s      opp-2500000-1                &%           !        8 А           F         opp-5000000-1                LK@           !        8             F         opp-5000000-2                LK@           !        8             F         opp-10000000-2                          !        8 B@           F         opp-8000000-3                z                    8            F         opp-16000000-3               $                    8 h           F         opp-16000000-4               $                    8 h           F         opp-32000000-4              H                    8 <           F            pcie@0           pci                                                                              R         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy                             (   {   6   0   6   .         6   2   6   4        aux cfg_ahb ref rchng pipe             6      6   
        phy phy_nocsr           P   6   2        `             6            V           upcie1_pipe_clk                    	  disabled             s   2      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                     b                                                         5         5               s         crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce                 ߠ       `                             rx tx              5         5                                        memory        phy@1d80000          2qcom,sm8550-qmp-ufs-phy                                 {          6                 ref ref_aux qref                6                          ufsphy           V                     	  disabled             s   3      ufshc@1d84000         +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0               @       0                	                  3        ufsphy                     I              6           rst             6                         5   `                              0     d                  9         :   #           ufs-ddr cpu-ufs       n  core_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   {   6      6      6      6            6      6      6                    	  disabled             s      opp-table            2operating-points-v2          s      opp-75000000          @      xh                    xh                                           !      opp-150000000         @      р                    р                                           "      opp-300000000         @                                                                                   crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine               ؀                {   6            s         hwlock@1f40000           2qcom,tcsr-mutex                                           s   -      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon                                {                V           I            s         gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                 ,                                                                  %              9                       gfx-mem       	  disabled             s      zap-shader          "         opp-table            2operating-points-v2          s      opp-680000000               (         F           8        opp-615000000               $'        F           8       opp-550000000                U        F           8       opp-475000000               O        F   P        8 \j      opp-401000000               @        F   @        8 \j      opp-348000000                        F   <        8 \j      opp-295000000               W        F   8        8 \j      opp-220000000                        F   4        8              gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc                    0             1               hfi gmu       8   {                      6      6                      !  ahb gmu cxo axi memnoc hub demet                                   cx gx                             0                       s      opp-table            2operating-points-v2          s      opp-500000000               e         F         opp-200000000                        F   @            clock-controller@3d90000             2qcom,sm8550-gpucc                                  {   /   6      6            V           I           +            s         iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                               9           F                                                                                                                                                                                                       >             ?             @             A                                                                                                                         {         6       6   !               hlos bus iface ahb                                    s         ipa@3f40000          2qcom,sm8550-ipa            5         5            0                            P     @               ipa-reg ipa-shared gsi        @                                                           (  ipa gsi ipa-clock-query ipa-setup-ready          {              core          0                       9         :              memory config           0           Y                   *  jipa-clock-enabled-valid ipa-clock-enabled         	  disabled          remoteproc@4080000           2qcom,sm8550-mpss-pas                                P                                                                      0  wdog fatal ready handover stop-ack shutdown-ack          {               xo              <       <            cx mss                                     "                 0           Y               jstop          	  disabled       glink-edge             .                     .               mpss                        remoteproc@6800000           2qcom,sm8550-adsp-pas                                <                                                      #  wdog fatal ready handover stop-ack           {               xo              <      <            lcx lmx                                    "              0           Y               jstop            okay          B  qcom/sm8550/Sony/yodo/adsp.mbn qcom/sm8550/Sony/yodo/adsp_dtb.mbn      glink-edge             .                     .               lpass                 fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           adsp                                          compute-cb@3             2qcom,fastrpc-compute-cb                        5        5  c                   compute-cb@4             2qcom,fastrpc-compute-cb                        5        5  d                   compute-cb@5             2qcom,fastrpc-compute-cb                        5        5  e                   compute-cb@6             2qcom,fastrpc-compute-cb                        5        5  f                   compute-cb@7             2qcom,fastrpc-compute-cb                        5        5  g                      gpr       	   2qcom,gpr          
  adsp_apps                                                         service@1            2qcom,q6apm                      &            avs/audio msm/adsp/audio_pd    dais             2qcom,q6apm-dais            5        5  a          bedais           2qcom,q6apm-lpass-dais           &            service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          V            s                     codec@6aa0000            2qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              mclk macro dcodec fsgen          V          
  uwsa2-mclk           &            s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                         {           iface           WSA2                       default                       	           ?   ?               #             6           I           [           l                                                                             &         	  disabled          codec@6ac0000            2qcom,sm8550-lpass-rx-macro                              (   {      @         f         g              mclk macro dcodec fsgen          V            umclk            &            s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                         {           iface           RX                     default                                 ?                  #            6             I        [        l                                                                   &         	  disabled          codec@6ae0000            2qcom,sm8550-lpass-tx-macro                              (   {      9         f         g              mclk macro dcodec fsgen          V            umclk            &            s         codec@6b00000            2qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              mclk macro dcodec fsgen          V            umclk            &            s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                         {           iface           WSA                    default                       	           ?   ?               #             6           I           [           l                                                                             &         	  disabled          soundwire@6d30000            2qcom,soundwire-v2.0.0                                                                     core wakeup          {           iface           TX                     default                                        #          6            I        [        l                                                            &         	  disabled          codec@6d44000            2qcom,sm8550-lpass-va-macro               @              $   {      9         f         g           mclk macro dcodec            V            ufsgen           &            s         pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl                              %                                                            {      f         g           core audio           s      tx-swr-active-state          s      clk-pins            gpio0           swr_tx_clk          "           1            ;      data-pins           gpio1 gpio2 gpio14          swr_tx_data         "           1            H         rx-swr-active-state          s      clk-pins            gpio3           swr_rx_clk          "           1            ;      data-pins           gpio4 gpio5         swr_rx_data         "           1            H         dmic01-default-state       clk-pins            gpio6         
  dmic1_clk           "            V      data-pins           gpio7           dmic1_data          "            b         dmic23-default-state       clk-pins            gpio8         
  dmic2_clk           "            V      data-pins           gpio9           dmic2_data          "            b         wsa-swr-active-state             s      clk-pins            gpio10          wsa_swr_clk         "           1            ;      data-pins           gpio11          wsa_swr_data            "           1            H         wsa2-swr-active-state            s      clk-pins            gpio15          wsa2_swr_clk            "           1            ;      data-pins           gpio16          wsa2_swr_data           "           1            H            interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc                 @                                    interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc              C                                        s         interconnect@7e40000             2qcom,sm8550-lpass-ag-noc                                                      mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5              @                                                      hc_irq pwr_irq           {   6      6                  iface core xo              5  @            o d,        h            <                     0                       9         :              sdhc-ddr cpu-sdhc                      <4`                                okay                                                          default sleep                                              opp-table            2operating-points-v2          s      opp-19200000                $                  opp-50000000                           !      opp-100000000                           "      opp-202000000               
F                       video-codec@aa00000          2qcom,sm8550-iris                 
                                                          <   
   <            venus vcodec0 mxc mmcx                      {   6                        iface core vcodec0_core       0     9         :   %                             cpu-cfg video-mem           "              6   !        bus            5  @       5  G                   	  disabled       opp-table            2operating-points-v2          s      opp-240000000               N            "   !      opp-338000000               %x           "   "      opp-366000000               з                    opp-444000000               v                     opp-533333334               V                          clock-controller@aaf0000             2qcom,sm8550-videocc              
                  {   /   6               <      <   
           !   !         V           I           +            s         cci@ac15000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
P                                                      {                          camnoc_axi cpas_ahb cci                                     default sleep         	  disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   cci@ac16000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
`                                                      {                  
        camnoc_axi cpas_ahb cci                               default sleep         	  disabled                                 i2c-bus@0                         c B@                                   cci@ac17000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
p                                                      {                          camnoc_axi cpas_ahb cci                                     default sleep         	  disabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   isp@acb7000          2qcom,sm8550-camss        0       
p            
ː            
˰            
̠       
     
       
     
`            
@             
`             
΀             
Π             
             
             
              
              
             
            
             
̰            
                csid0 csid1 csid2 csid_lite0 csid_lite1 csid_wrapper csiphy0 csiphy1 csiphy2 csiphy3 csiphy4 csiphy5 csiphy6 csiphy7 vfe0 vfe1 vfe2 vfe_lite0 vfe_lite1          {                                                /      2            3      !      4      #      5      %      6      '      7      )      8      +      9      -      1   6         A      E      F      J      K      O      Q      P      S      T       camnoc_axi cpas_ahb cpas_fast_ahb_clk cpas_ife_lite cpas_vfe0 cpas_vfe1 cpas_vfe2 csid csiphy0 csiphy0_timer csiphy1 csiphy1_timer csiphy2 csiphy2_timer csiphy3 csiphy3_timer csiphy4 csiphy4_timer csiphy5 csiphy5_timer csiphy6 csiphy6_timer csiphy7 csiphy7_timer csiphy_rx gcc_axi_hf vfe0 vfe0_fast_ahb vfe1 vfe1_fast_ahb vfe2 vfe2_fast_ahb vfe_lite vfe_lite_ahb vfe_lite_cphy_rx vfe_lite_csid                  Y             [                          ]             x                                                                  z              Y                                       Z             \                          ^             y               csid0 csid1 csid2 csid_lite0 csid_lite1 csiphy0 csiphy1 csiphy2 csiphy3 csiphy4 csiphy5 csiphy6 csiphy7 vfe0 vfe1 vfe2 vfe_lite0 vfe_lite1        0     9         :                                 ahb hf_0_mnoc              5                                                  ife0 ife1 ife2 top        	  disabled       ports                                port@0                     port@1                    port@2                    port@3                    port@4                    port@5                    port@6                    port@7                          clock-controller@ade0000             2qcom,sm8550-camcc                
                  {   6      /      0            <      <   
           !   !         V           I           +            s         display-subsystem@ae00000            2qcom,sm8550-mdss                 
                 mdss                    S                        -             {         6      6         =                                     0                       9         :              mdp0-mem cpu-cfg               5                                        R      	  disabled             s      display-controller@ae01000           2qcom,sm8550-dpu               
           
        0       	  mdp vbif                                    0   {   6      6               @      =      I      !  bus nrt_bus iface lut core vsync                <           P      I        `$               ports                                port@0                  endpoint                        s            port@1                 endpoint                        s            port@2                 endpoint                        s               opp-table            2operating-points-v2          s      opp-200000000                           !      opp-325000000               _@           "      opp-375000000               Z                 opp-514000000                                      displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P       
             
            
            
            
                                       0   {                                          J  core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel           P                          	   4      4      4              4           dp          &                           <         	  disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint            	                                 s               opp-table            2operating-points-v2          s      opp-162000000               	                 opp-270000000               ߀           !      opp-540000000                /                  opp-810000000               0G                       dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl                                   0   {                  B      8         6         $  byte byte_intf pixel core iface bus             <           P            C        	                                           dsi                                 	  disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                opp-table            2operating-points-v2          s      opp-187500000               -           !      opp-300000000                           "      opp-358000000               V                       phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             {                   
  iface ref            V                     	  disabled             s         dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl                                   0   {                  D      :         6         $  byte byte_intf pixel core iface bus             <           P      	      E        	                                           dsi                                 	  disabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                   phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             {                   
  iface ref            V                     	  disabled             s            clock-controller@af00000             2qcom,sm8550-dispcc               
               \   {   /      6      0                             4      4                                       <              !         V           I           +            s         phy@88e3000          2qcom,sm8550-snps-eusb2-phy               0       T                     {              ref            6           okay            	#           	.                       s         phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy                     0           {   6             6      6           aux ref com_aux usb3_pipe               6              6      6           phy common           V                       	<         	H        okay                                   s   4   ports                                port@0                  endpoint                        s           port@1                 endpoint                        s            port@2                 endpoint                        s                  usb@a600000           2qcom,sm8550-dwc3 qcom,snps-dwc3              
`              0   {   6      6      6      6      6               &  cfg_noc core iface sleep mock_utmi xo           P   6      6           `$        `                                                                                      E  dwc_usb3 pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                6                         6         0     d                  9         :   $           usb-ddr apps-usb               5   @                  4            usb2-phy usb3-phy           	[             	o         	         	         	         	         	         
         
         
1         
F                  
U        okay       ports                                port@0                  endpoint                        s           port@1                 endpoint                        s                  interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc                  "             @        d      <  
e         ^   ^  a      }   ?      ~                      -                                  s         thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2               '            "                 
u                                               uplow critical          
            s         thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2               '             "0                
u                                               uplow critical          
            s         thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2               '0            "@                
u                                               uplow critical          
            s         power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp               0                      .           .                      .                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?                 0         spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         periph_irq                                       
            
                                               -      pmic@c           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $                $               
             s            pmic@d           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $                $               
             s            pmic@1           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s         gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                                                                        -            s      volume-down-n-state         gpio6           normal          
            
         b         s        sd-card-det-n-state         gpio12          normal          
            
         
         b         s            led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                       okay       led-0           flash           
            
              
           B@                   5          led-1           flash           
           
              
           B@                   5            pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            I         	  disabled             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s         gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                                                                           -            s      snapshot-n-state            gpio7           normal          
            
         b         s         focus-n-state           gpio8           normal          
            
         b         s            phy@fd00             2qcom,pm8550b-eusb2-repeater                                 T           n                                             s            pmic@5           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s         gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                                                                          -            s            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                          -            s            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                          -            s            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                                                          -            s            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s         gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                                   Z                                       -            s   Z   cam-pwr-a-cs-state          gpio4           normal          
                                         s   [            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                pon@1300             2qcom,pmk8350-pon                         	  hlos pbs       pwrkey           2qcom,pmk8350-pwrkey                                  t        okay          resin            2qcom,pmk8350-resin                                okay               s         rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                   b            nvram@7100           2qcom,spmi-sdam             q                                  R      q       reboot-reason@48                H                          s            gpio@b800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                                                                           -            s               pinctrl@f100000          2qcom,sm8550-tlmm                        0                                                              -              G                                              s   G   cam0-default-state     mclk-pins           gpio100       	  cam_mclk            "            ;         cam0-sleep-state       mclk-pins           gpio100       	  cam_mclk            "            
         cam1-default-state     mclk-pins           gpio101       	  cam_mclk            "            ;         cam1-sleep-state       mclk-pins           gpio101       	  cam_mclk            "            
         cam2-default-state     mclk-pins           gpio102       	  cam_mclk            "            ;         cam2-sleep-state       mclk-pins           gpio102       	  cam_mclk            "            
         cam3-default-state     mclk-pins           gpio103       	  cam_mclk            "            ;         cam3-sleep-state       mclk-pins           gpio103       	  cam_mclk            "            
         cam4-default-state     mclk-pins           gpio104         cam_aon_mclk4           "            ;         cam4-sleep-state       mclk-pins           gpio104         cam_aon_mclk4           "            
         cam5-default-state     mclk-pins           gpio105       	  cam_mclk            "            ;         cam5-sleep-state       mclk-pins           gpio105       	  cam_mclk            "            
         cam6-default-state     mclk-pins           gpio106       	  cam_mclk            "            ;         cam6-sleep-state       mclk-pins           gpio106       	  cam_mclk            "            
         cam7-default-state     mclk-pins           gpio107       	  cam_mclk            "            ;         cam7-sleep-state       mclk-pins           gpio107       	  cam_mclk            "            
         cci0-0-default-state             s      sda-pins            gpio110         cci_i2c_sda         "           
        scl-pins            gpio111         cci_i2c_scl         "           
           cci0-0-sleep-state           s      sda-pins            gpio110         cci_i2c_sda         "            
      scl-pins            gpio111         cci_i2c_scl         "            
         cci0-1-default-state             s      sda-pins            gpio112         cci_i2c_sda         "           
        scl-pins            gpio113         cci_i2c_scl         "           
           cci0-1-sleep-state           s      sda-pins            gpio112         cci_i2c_sda         "            
      scl-pins            gpio113         cci_i2c_scl         "            
         cci1-0-default-state             s      sda-pins            gpio114         cci_i2c_sda         "           
        scl-pins            gpio115         cci_i2c_scl         "           
           cci1-0-sleep-state           s      sda-pins            gpio114         cci_i2c_sda         "            
      scl-pins            gpio115         cci_i2c_scl         "            
         cci2-0-default-state             s      sda-pins            gpio74          cci_i2c_sda         "           
        scl-pins            gpio75          cci_i2c_scl         "           
           cci2-0-sleep-state           s      sda-pins            gpio74          cci_i2c_sda         "            
      scl-pins            gpio75          cci_i2c_scl         "            
         cci2-1-default-state             s      sda-pins            gpio0           cci_i2c_sda         "           
        scl-pins            gpio1           cci_i2c_scl         "           
           cci2-1-sleep-state           s      sda-pins            gpio0           cci_i2c_sda         "            
      scl-pins            gpio1           cci_i2c_scl         "            
         hub-i2c0-data-clk-state         gpio16 gpio17           i2chub0_se0         "            
         s   W      hub-i2c1-data-clk-state         gpio18 gpio19           i2chub0_se1         "            
         s   X      hub-i2c2-data-clk-state         gpio20 gpio21           i2chub0_se2         "            
         s   Y      hub-i2c3-data-clk-state         gpio22 gpio23           i2chub0_se3         "            
         s   \      hub-i2c4-data-clk-state         gpio4 gpio5         i2chub0_se4         "            
         s   ]      hub-i2c5-data-clk-state         gpio6 gpio7         i2chub0_se5         "            
         s   ^      hub-i2c6-data-clk-state         gpio8 gpio9         i2chub0_se6         "            
         s   _      hub-i2c7-data-clk-state         gpio10 gpio11           i2chub0_se7         "            
         s   `      hub-i2c8-data-clk-state         gpio206 gpio207         i2chub0_se8         "            
         s   a      hub-i2c9-data-clk-state         gpio84 gpio85           i2chub0_se9         "            
         s   b      pcie0-default-state          s      perst-pins          gpio94          gpio            "            
      clkreq-pins         gpio95          pcie0_clk_req_n         "            
      wake-pins           gpio96          gpio            "            
         pcie1-default-state    perst-pins          gpio97          gpio            "            
      clkreq-pins         gpio98          pcie1_clk_req_n         "            
      wake-pins           gpio99          gpio            "            
         qup-i2c0-data-clk-state         gpio28 gpio29         	  qup1_se0            "           
           s   c      qup-i2c1-data-clk-state         gpio32 gpio33         	  qup1_se1            "           
           s   h      qup-i2c2-data-clk-state         gpio36 gpio37         	  qup1_se2            "           
           s   k      qup-i2c3-data-clk-state         gpio40 gpio41         	  qup1_se3            "           
           s   n      qup-i2c4-data-clk-state         gpio44 gpio45         	  qup1_se4            "           
           s   q      qup-i2c5-data-clk-state         gpio52 gpio53         	  qup1_se5            "           
           s   t      qup-i2c6-data-clk-state         gpio48 gpio49         	  qup1_se6            "           
           s   w      qup-i2c8-data-clk-state          s   7   scl-pins            gpio57          qup2_se0_l1_mira            "           
        sda-pins            gpio56          qup2_se0_l0_mira            "           
           qup-i2c9-data-clk-state         gpio60 gpio61         	  qup2_se1            "           
           s   @      qup-i2c10-data-clk-state            gpio64 gpio65         	  qup2_se2            "           
           s   C      qup-i2c11-data-clk-state            gpio68 gpio69         	  qup2_se3            "           
           s   F      qup-i2c12-data-clk-state            gpio2 gpio3       	  qup2_se4            "           
           s   J      qup-i2c13-data-clk-state            gpio80 gpio81         	  qup2_se5            "           
           s   M      qup-i2c15-data-clk-state            gpio72 gpio106        	  qup2_se7            "           
           s   S      qup-spi0-cs-state           gpio31        	  qup1_se0            "            ;         s   g      qup-spi0-data-clk-state         gpio28 gpio29 gpio30          	  qup1_se0            "            ;         s   f      qup-spi1-cs-state           gpio35        	  qup1_se1            "            ;         s   j      qup-spi1-data-clk-state         gpio32 gpio33 gpio34          	  qup1_se1            "            ;         s   i      qup-spi2-cs-state           gpio39        	  qup1_se2            "            ;         s   m      qup-spi2-data-clk-state         gpio36 gpio37 gpio38          	  qup1_se2            "            ;         s   l      qup-spi3-cs-state           gpio43        	  qup1_se3            "            ;         s   p      qup-spi3-data-clk-state         gpio40 gpio41 gpio42          	  qup1_se3            "            ;         s   o      qup-spi4-cs-state           gpio47        	  qup1_se4            "            ;         s   s      qup-spi4-data-clk-state         gpio44 gpio45 gpio46          	  qup1_se4            "            ;         s   r      qup-spi5-cs-state           gpio55        	  qup1_se5            "            ;         s   v      qup-spi5-data-clk-state         gpio52 gpio53 gpio54          	  qup1_se5            "            ;         s   u      qup-spi6-cs-state           gpio51        	  qup1_se6            "            ;         s   y      qup-spi6-data-clk-state         gpio48 gpio49 gpio50          	  qup1_se6            "            ;         s   x      qup-spi8-cs-state           gpio59          qup2_se0_l3_mira            "            ;         s   ?      qup-spi8-data-clk-state         gpio56 gpio57 gpio58            qup2_se0_l2_mira            "            ;         s   >      qup-spi9-cs-state           gpio63        	  qup2_se1            "            ;         s   B      qup-spi9-data-clk-state         gpio60 gpio61 gpio62          	  qup2_se1            "            ;         s   A      qup-spi10-cs-state          gpio67        	  qup2_se2            "            ;         s   E      qup-spi10-data-clk-state            gpio64 gpio65 gpio66          	  qup2_se2            "            ;         s   D      qup-spi11-cs-state          gpio71        	  qup2_se3            "            ;         s   I      qup-spi11-data-clk-state            gpio68 gpio69 gpio70          	  qup2_se3            "            ;         s   H      qup-spi12-cs-state          gpio119       	  qup2_se4            "            ;         s   L      qup-spi12-data-clk-state            gpio2 gpio3 gpio118       	  qup2_se4            "            ;         s   K      qup-spi13-cs-state          gpio83        	  qup2_se5            "            ;         s   O      qup-spi13-data-clk-state            gpio80 gpio81 gpio82          	  qup2_se5            "            ;         s   N      qup-spi15-cs-state          gpio75        	  qup2_se7            "            ;         s   V      qup-spi15-data-clk-state            gpio72 gpio106 gpio74         	  qup2_se7            "            ;         s   U      qup-uart7-default-state         gpio26 gpio27         	  qup1_se7            "            ;         s   z      qup-uart14-default-state            gpio78 gpio79         	  qup2_se6            "            
         s   P      qup-uart14-cts-rts-state            gpio76 gpio77         	  qup2_se6            "            
         s   Q      sdc2-sleep-state             s      clk-pins          	  sdc2_clk             ;        "         cmd-pins          	  sdc2_cmd             
        "         data-pins         
  sdc2_data            
        "            sdc2-default-state           s      clk-pins          	  sdc2_clk             ;        "         cmd-pins          	  sdc2_cmd             
        "   
      data-pins         
  sdc2_data            
        "   
            iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500                                 9           F                  A              a              b              c              d              e              f              g              h              i              j              k              l              m              n              o              p              q              r              s              t              u              v                                                                                                                                                                                     ;             <             =             >             ?             @             A             B             C             D             E             F             G             H             I             J             K             L             M             N             O             P             Q             R             S             T             U             V             W             X             Y                                                                                                                                                                                                                                                                                                                                                                                                                                            s   5      interrupt-controller@17100000            2arm,gic-v3                                                R        -                               .                      	                                         s      ppi-partitions     interrupt-partition-0           C                  s   #      interrupt-partition-1           C               s   $      interrupt-partition-2           C               s   %      interrupt-partition-3           C            s   &         msi-controller@17140000          2arm,gic-v3-its                                 L        [            s   }         timer@17420000           2arm,armv7-timer-mem              B                 R                                            frame@17421000           B    B             f                                                frame@17423000           B0            f                   	             	  disabled          frame@17425000           BP            f                   
             	  disabled          frame@17427000           Bp            f                                	  disabled          frame@17429000           B            f                                	  disabled          frame@1742b000           B            f                                	  disabled          frame@1742d000           B            f                                	  disabled             rsc@17a00000          	  apps_rsc             2qcom,rpmh-rsc         @                                                               drv-0 drv-1 drv-2 drv-3       0                                                     s                                                             '   bcm-voter            2qcom,bcm-voter           s          clock-controller             2qcom,sm8550-rpmh-clk             V           xo           {            s         power-controller             2qcom,sm8550-rpmhpd          +                       s   <   opp-table            2operating-points-v2          s      opp-16          F         opp-48          F   0         s         opp-52          F   4      opp-56          F   8         s         opp-60          F   <      opp-64          F   @         s   !      opp-80          F   P      opp-128         F            s   "      opp-144         F         opp-192         F            s         opp-256         F            s         opp-320         F  @      opp-336         F  P      opp-384         F           s         opp-416         F              regulators-0             2qcom,pm8550-rpmh-regulators         b      bob1            Npm8550_bob1         ] 4        u <l                 ldo1          
  Npm8550_l1           ] w@        u w@                 ldo2          
  Npm8550_l2           ] -         u -                  ldo5          
  Npm8550_l5           ] /]         u /]                     s         ldo6          
  Npm8550_l6           ] w@        u -                  ldo7          
  Npm8550_l7           ] w@        u -                  ldo8          
  Npm8550_l8           ] w@        u -                     s         ldo9          
  Npm8550_l9           ] -*        u -                     s         ldo10           Npm8550_l10          ] w@        u w@                 ldo11           Npm8550_l11          ] O        u                   ldo12           Npm8550_l12          ] w@        u w@                 ldo13           Npm8550_l13          ] -        u -                 ldo14           Npm8550_l14          ] 2j@        u 2j@                 ldo15           Npm8550_l15          ] w@        u w@                    s         ldo16           Npm8550_l16          ] *        u *                 ldo17           Npm8550_l17          ] &5@        u &5@                    regulators-1             2qcom,pm8550vs-rpmh-regulators           c      ldo1            Npm8550vs_0_l1           ] O        u O                 ldo3            Npm8550vs_0_l3           ] m        u                     regulators-2             2qcom,pm8550vs-rpmh-regulators           d      ldo1            Npm8550vs_1_l1           ] m        u 	                    regulators-3             2qcom,pm8550vs-rpmh-regulators           e      smps4           Npm8550vs_2_s4           ] @        u                  smps5           Npm8550vs_2_s5           ] iP        u                   ldo1            Npm8550vs_2_l1           ] m        u                     s         ldo2            Npm8550vs_2_l2           ] m        u @                 ldo3            Npm8550vs_2_l3           ] O        u O                    s            regulators-4             2qcom,pm8550ve-rpmh-regulators           f      smps4           Npm8550ve_s4         ]          u 
`                 ldo1            Npm8550ve_l1         ]         u                  ldo2            Npm8550ve_l2         ] m        u                  ldo3            Npm8550ve_l3         ]         u                     s            regulators-5             2qcom,pm8550vs-rpmh-regulators           g      smps1           Npm8550vs_3_s1           ] O        u                   smps2           Npm8550vs_3_s2           ]          u                  smps3           Npm8550vs_3_s3           ]         u Q                 smps4           Npm8550vs_3_s4           ] O        u @                 smps5           Npm8550vs_3_s5           ]          u Q                 smps6           Npm8550vs_3_s6           ] w@        u                  ldo1            Npm8550vs_3_l1           ] t        u *@                 ldo2            Npm8550vs_3_l2           ] ؀        u O                 ldo3            Npm8550vs_3_l3           ] O        u O                       cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0                                0              '  freq-domain0 freq-domain1 freq-domain2           {   /   6           xo alternate          0                                                   $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2                     V            s         pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                        Q                                                opp-table            2operating-points-v2          s      opp-0           8 p      opp-1           8 ,h      opp-2           8 Z      opp-3           8 ci8      opp-4           8 y      opp-5           8 A      opp-6           8 H      opp-7           8 ։      opp-8           8 h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon              $d                       E                  9         9                    opp-table            2operating-points-v2          s      opp-0           8 E      opp-1           8 l}p      opp-2           8       opp-3           8       opp-4           8 9`      opp-5           8 /(            interconnect@24100000            2qcom,sm8550-gem-noc              $                                        s   9      system-cache-controller@25000000             2qcom,sm8550-llcc          `       %               %               %@              %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base                
             interconnect@320c0000            2qcom,sm8550-nsp-noc              2                                        s         remoteproc@32300000          2qcom,sm8550-cdsp-pas                 20               D           B                                                  #  wdog fatal ready handover stop-ack           {               xo              <       <   
   <            cx mxc nsp                                     "              0           Y               jstop            okay          B  qcom/sm8550/Sony/yodo/cdsp.mbn qcom/sm8550/Sony/yodo/cdsp_dtb.mbn      glink-edge             .                     .               cdsp                  fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           cdsp                                          compute-cb@1             2qcom,fastrpc-compute-cb                   $     5  a       5         5                    compute-cb@2             2qcom,fastrpc-compute-cb                   $     5  b       5         5                    compute-cb@3             2qcom,fastrpc-compute-cb                   $     5  c       5         5                    compute-cb@4             2qcom,fastrpc-compute-cb                   $     5  d       5         5                    compute-cb@5             2qcom,fastrpc-compute-cb                   $     5  e       5         5                    compute-cb@6             2qcom,fastrpc-compute-cb                   $     5  f       5         5                    compute-cb@7             2qcom,fastrpc-compute-cb                   $     5  g       5         5                    compute-cb@8             2qcom,fastrpc-compute-cb                   $     5  h       5         5                                thermal-zones      aoss0-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss0-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss1-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss2-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpuss3-thermal                   trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpu3-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu3-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu4-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu4-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu5-top-thermal                  	   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu5-bottom-thermal               
   trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu6-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu6-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-top-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-middle-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu7-bottom-thermal                  trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                aoss1-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             cpu0-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu1-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cpu2-thermal                     trips      trip-point0          _                   Epassive       trip-point1          s                   Epassive       cpu-critical                             	   Ecritical                cdsp0-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp1-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp2-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             cdsp3-thermal              
                 trips      thermal-engine-config            H                   Epassive       thermal-hal-config           H                   Epassive       reset-mon-config             8                   Epassive       junction-config          s                   Epassive             video-thermal                    trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             mem-thermal            
              	   trips      thermal-engine-config            H                   Epassive       ddr0-config          _                   Epassive       reset-mon-config             8                   Epassive             modem0-thermal                
   trips      thermal-engine-config            H                   Epassive       mdmss0-config0           p                   Epassive       mdmss0-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem1-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss1-config0           p                   Epassive       mdmss1-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem2-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss2-config0           p                   Epassive       mdmss2-config1           (                   Epassive       reset-mon-config             8                   Epassive             modem3-thermal                   trips      thermal-engine-config            H                   Epassive       mdmss3-config0           p                   Epassive       mdmss3-config1           (                   Epassive       reset-mon-config             8                   Epassive             camera0-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             camera1-thermal                  trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             aoss2-thermal                     trips      thermal-engine-config            H                   Epassive       reset-mon-config             8                   Epassive             gpuss-0-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-1-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-2-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-3-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-4-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-5-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-6-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                gpuss-7-thermal            
                 cooling-maps       map0                                   trips      trip-point0          L                   Epassive          s         trip-point1          _                   Ehot       trip-point2                          	   Ecritical                pm8010-m-thermal               d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8010-n-thermal               d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550b-thermal            d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550ve-thermal               d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-c-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-d-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-e-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot             pm8550vs-g-thermal             d              trips      trip0            s                     Epassive       trip1            8                     Ehot                timer            2arm,armv8-timer       @                                             
            reboot-mode          2nvmem-reboot-mode           '           3reboot-mode         D           R         aliases       !  b/soc@0/geniqup@ac0000/i2c@a80000          !  g/soc@0/geniqup@ac0000/i2c@a90000          !  l/soc@0/geniqup@8c0000/i2c@888000          !  r/soc@0/geniqup@8c0000/i2c@88c000          !  x/soc@0/geniqup@9c0000/i2c@988000          $  ~/soc@0/geniqup@ac0000/serial@a9c000       gpio-keys         
   2gpio-keys         
  gpio-keys                           default    key-camera-focus            Camera Focus                                                                  key-camera-snapshot         Camera Snapshot                                                                key-volume-down         Volume Down            r                                                       pmic-glink        '   2qcom,sm8550-pmic-glink qcom,pmic-glink             G                                    connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint                       s            port@1                 endpoint                       s                     vph-pwr-regulator            2regulator-fixed         Nvph_pwr         ] 8u         u 8u                            	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters opp-hz required-opps interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid console-size record-size pmsg-size ecc-size qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names operating-points-v2 reset-gpios cirrus,asp-sdout-hiz-ctrl #sound-dai-cells gpio-ctrl dlg,cs-gpios regulator-name regulator-min-microvolt regulator-max-microvolt reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names wake-gpios perst-gpios opp-peak-kBps opp-level assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely lanes-per-direction qcom,ice #hwlock-cells qcom,gmu memory-region qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label firmware-name qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,ports-sinterval-low gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable qcom,dll-config qcom,ddr-config bus-width max-sd-hs-hz sdhci-caps-mask cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc remote-endpoint assigned-clock-parents data-lanes vdd-supply vdda12-supply mode-switch orientation-switch snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id power-source bias-pull-up bias-pull-down output-disable color led-sources led-max-microamp flash-max-microamp flash-max-timeout-us function-enumerator #pwm-cells qcom,tune-usb2-disc-thres qcom,tune-usb2-amplitude qcom,tune-usb2-preem vdd18-supply vdd3-supply drive-push-pull output-low qcom,drive-strength linux,code bits wakeup-parent gpio-reserved-ranges #redistributor-regions redistributor-stride affinity msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id regulator-initial-mode #freq-domain-cells thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader i2c0 i2c4 i2c10 i2c11 i2c16 serial0 debounce-interval linux,can-disable wakeup-source orientation-gpios power-role data-role regulator-always-on regulator-boot-on 