 \   8    (            d                                                                    '   ,Qualcomm Technologies, Inc. SM8550 MTP           2qcom,sm8550-mtp qcom,sm8550          =handset    chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c           s   0      bi-tcxo-div2-clk             V             2fixed-factor-clock           {                                        s   /      bi-tcxo-ao-div2-clk          V             2fixed-factor-clock           {                                       s            cpus                                 cpu@0            cpu          2arm,cortex-a510                           {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s      l3-cache             2cache           4            @         s               cpu@100          cpu          2arm,cortex-a510                          {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s            cpu@200          cpu          2arm,cortex-a510                          {                psci                	            
         psci                                           d        %            s      l2-cache             2cache           4            @                     s   	         cpu@300          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@400          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@500          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@600          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@700          cpu          2arm,cortex-x3                            {               psci                                     psci                              f          L        %            s      l2-cache             2cache           4            @                     s            cpu-map    cluster0       core0           N         core1           N         core2           N         core3           N         core4           N         core5           N         core6           N         core7           N               idle-states         Rpsci       cpu-sleep-0-0            2arm,idle-state          _silver-rail-power-collapse          o@            &                    ,                  s   (      cpu-sleep-1-0            2arm,idle-state          _gold-rail-power-collapse            o@            X                                      s   )      cpu-sleep-2-0            2arm,idle-state          _goldplus-rail-power-collapse            o@                      F          8                  s   *         domain-idle-states     cluster-sleep-0          2domain-idle-state           oA  D                    	.          #         s   +      cluster-sleep-1          2domain-idle-state           oA D          
          0          '         s   ,            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                    interconnect-0           2qcom,sm8550-clk-virt                                    s   8      interconnect-1           2qcom,sm8550-mc-virt                                 s         opp-table-qup100mhz          2operating-points-v2          s   S   opp-75000000                xh           !      opp-100000000                           "         opp-table-qup120mhz          2operating-points-v2          s   =   opp-75000000                xh           !      opp-120000000               '            "         opp-table-qup125mhz          2operating-points-v2          s   Q   opp-75000000                xh           !      opp-125000000               sY@           "         memory@a0000000          memory                                pmu-a510             2arm,cortex-a510-pmu                      #      pmu-a710             2arm,cortex-a710-pmu                      $      pmu-a715             2arm,cortex-a715-pmu                      %      pmu-x3           2arm,cortex-x3-pmu                        &      psci             2arm,psci-1.0             smc    power-domain-cpu0           +                '        ?   (         s         power-domain-cpu1           +                '        ?   (         s         power-domain-cpu2           +                '        ?   (         s   
      power-domain-cpu3           +                '        ?   )         s         power-domain-cpu4           +                '        ?   )         s         power-domain-cpu5           +                '        ?   )         s         power-domain-cpu6           +                '        ?   )         s         power-domain-cpu7           +                '        ?   *         s         power-domain-cluster            +            ?   +   ,         s   '         reserved-memory                                   R   hyp-region@80000000                                 Y      cpusys-vm-region@80a00000                       @           Y      hyp-tags-region@80e00000                        =           Y      xbl-sc-region@d8100000                                 Y      hyp-tags-reserved-region@811d0000                                  Y      xbl-dt-log-merged-region@81a00000                       &           Y      aop-cmd-db-region@81c60000           2qcom,cmd-db                                Y      aop-config-merged-region@81c80000                       @          Y      smem@81d00000         
   2qcom,smem                                  `   -            Y      adsp-mhi-region@81f00000                                   Y      global-sync-region@82600000              `                  Y      tz-stat-region@82700000              p                  Y      cdsp-secure-heap-region@82800000                       `           Y      mpss-region@8a800000                                  Y         s         q6-mpss-dtb-region@9b000000                                 Y         s         ipa-fw-region@9b080000                                 Y      ipa-gsi-region@9b090000              	                  Y      gpu-micro-code-region@9b09a000               	                  Y         s         spss-region@9b100000                                   Y      spu-tz-shared-region@9b280000                (                  Y      spu-modem-shared-region@9b2e0000                 .                  Y      camera-region@9b300000               0                  Y      video-region@9bb00000                       p           Y         s         cvp-region@9c200000                      p           Y      cdsp-region@9c900000                                   Y         s         q6-cdsp-dtb-region@9e900000                                Y         s         q6-adsp-dtb-region@9e980000                                Y         s         adspslpi-region@9ea00000                                  Y         s         rmtfs-region@d4a80000            2qcom,rmtfs-mem               Ԩ       (           Y        h           w         mpss-dsm-region@d4d00000                       0           Y         s         tz-reserved-region@d8000000                                 Y      cpucp-fw-region@d8140000                                   Y      qtee-region@d8300000                 0       P           Y      ta-region@d8800000               ؀                 Y      tz-tags-region@e1200000                     t           Y      hwfence-shbuf-region@e6440000                D       '          Y      trust-ui-vm-region@f3600000              `                Y      trust-ui-vm-dump-region@f80ee000                                  Y      trust-ui-vm-qrt-region@f80ef000                               Y      trust-ui-vm-vblk0-ring-region@f80f8000                      @          Y      trust-ui-vm-vblk1-ring-region@f80fc000                      @          Y      trust-ui-vm-swiotlb-region@f8100000                                Y      oem-vm-region@f8400000               @                 Y      oem-vm-vblk0-ring-region@fcc00000                        @          Y      oem-vm-swiotlb-region@fcc04000               @                 Y      hyp-ext-tags-region@fce00000                                  Y      hyp-ext-reserved-region@ff700000                 p                  Y         smp2p-adsp           2qcom,smp2p                         .                    .                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-cdsp           2qcom,smp2p             ^             .                    .                                master-kernel           master-kernel                       s        slave-kernel            slave-kernel                                 s            smp2p-modem          2qcom,smp2p                         .                    .                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa                              s            soc@0            2simple-bus          R                                                                                  clock-controller@100000          2qcom,sm8550-gcc                      B          V                      +         <   {   /   0   1   2       2      3       3      3      4             s   6      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc                @                                                           *            s   .      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         6                                         L             M             N             O             P             Q             R             S             T             U             V             W               A           N   >        _   5  6             f      	  sdisabled             s   ;      geniqup@8c0000           2qcom,geni-se-qup                                     R        zm-ahb s-ahb          {   6      6           _   5  #             f                               	  sdisabled       i2c@880000           2qcom,geni-i2c                         @         zse           {   6   o        default            7               u                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;              ;                  tx rx               <               =      	  sdisabled          spi@880000           2qcom,geni-spi                         @         zse           {   6   o               u               default            >   ?      H     8         8         9         :                                qup-core qup-config qup-memory              ;              ;                  tx rx               <               =                                	  sdisabled          i2c@884000           2qcom,geni-i2c                 @       @         zse           {   6   q        default            @               G                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled          spi@884000           2qcom,geni-spi                 @       @         zse           {   6   q               G               default            A   B      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled          i2c@888000           2qcom,geni-i2c                        @         zse           {   6   s        default            C               H                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled          spi@888000           2qcom,geni-spi                        @         zse           {   6   s               H               default            D   E      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled          i2c@88c000           2qcom,geni-i2c                        @         zse           {   6   u        default            F               I                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled          spi@88c000           2qcom,geni-spi                        @         zse           {   6   u               I               default            G   H      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled          i2c@890000           2qcom,geni-i2c                         @         zse           {   6   w        default            I               J                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled          spi@890000           2qcom,geni-spi                         @         zse           {   6   w               J               default            J   K      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled          i2c@894000           2qcom,geni-i2c                 @       @         zse           {   6   y        default            L               K                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled          spi@894000           2qcom,geni-spi                 @       @         zse           {   6   y               K               default            M   N      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled          serial@898000            2qcom,geni-uart                       @         zse           {   6   {        default            O   P                            0     8         8         9         :              qup-core qup-config             <               Q      	  sdisabled          i2c@89c000           2qcom,geni-i2c                        @         zse           {   6   }        default            R                                                      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               S      	  sdisabled          spi@89c000           2qcom,geni-spi                        @         zse           {   6   }                              default            T   U      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               S                                	  sdisabled             geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                 zs-ahb            {   6   Z                                  R        sokay       i2c@980000           2qcom,geni-i2c-master-hub                          @         zse core          {   6   F   6   E        default            V                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@984000           2qcom,geni-i2c-master-hub                  @       @         zse core          {   6   H   6   E        default            W                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@988000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   J   6   E        default            X                                                      0     8          8         9         :              qup-core qup-config             <               !        sokay       typec-mux@42             2fcs,fsa4480             B           Y                     port       endpoint               Z         s                 i2c@98c000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   L   6   E        default            [                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@990000           2qcom,geni-i2c-master-hub                          @         zse core          {   6   N   6   E        default            \                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@994000           2qcom,geni-i2c-master-hub                  @       @         zse core          {   6   P   6   E        default            ]                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@998000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   R   6   E        default            ^                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@99c000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   T   6   E        default            _                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@9a0000           2qcom,geni-i2c-master-hub                          @         zse core          {   6   V   6   E        default            `                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled          i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         zse core          {   6   X   6   E        default            a                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         6                                                                                                                       %             &             '             (             )             *               A           N           _   5                f      	  sdisabled             s   d      geniqup@ac0000           2qcom,geni-se-qup                                     R        zm-ahb s-ahb          {   6      6           _   5                  8         8            	  qup-core             f                                 sokay       i2c@a80000           2qcom,geni-i2c                         @         zse           {   6   ]        default            b               a                                       H     8         8         9         :         c                       qup-core qup-config qup-memory              d              d                  tx rx               <               =      	  sdisabled          spi@a80000           2qcom,geni-spi                         @         zse           {   6   ]               a               default            e   f      H     8         8         9         :         c                       qup-core qup-config qup-memory              d              d                  tx rx               <               =                                	  sdisabled          i2c@a84000           2qcom,geni-i2c                 @       @         zse           {   6   _        default            g               b                                       H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               =      	  sdisabled          spi@a84000           2qcom,geni-spi                 @       @         zse           {   6   _               b               default            h   i      H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               =                                	  sdisabled          i2c@a88000           2qcom,geni-i2c                        @         zse           {   6   a        default            j               c                                       H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S      	  sdisabled          spi@a88000           2qcom,geni-spi                        @         zse           {   6   a               c               default            k   l      H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S                                	  sdisabled          i2c@a8c000           2qcom,geni-i2c                        @         zse           {   6   c        default            m               d                                       H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S      	  sdisabled          spi@a8c000           2qcom,geni-spi                        @         zse           {   6   c               d               default            n   o      H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S                                	  sdisabled          i2c@a90000           2qcom,geni-i2c                         @         zse           {   6   e        default            p               e                                       H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S      	  sdisabled          spi@a90000           2qcom,geni-spi                         @         zse           {   6   e               e               default            q   r      H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S                                	  sdisabled          i2c@a94000           2qcom,geni-i2c                 @       @         zse           {   6   g        default            s               f             H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S                                	  sdisabled          spi@a94000           2qcom,geni-spi                 @       @         zse           {   6   g               f               default            t   u      H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S                                	  sdisabled          i2c@a98000           2qcom,geni-i2c                        @         zse           {   6   i        default            v               k             H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S                                	  sdisabled          spi@a98000           2qcom,geni-spi                        @         zse           {   6   i               k               default            w   x      H     8         8         9         :         c                       qup-core qup-config qup-memory              d             d                 tx rx               <               S                                	  sdisabled          serial@a9c000            2qcom,geni-debug-uart                         @         zse           {   6   k        default            y               C               qup-core qup-config       0     8         8         9         :                  <               S        sokay             interconnect@1500000             2qcom,sm8550-cnoc-main                P       0                                s   {      interconnect@1600000             2qcom,sm8550-config-noc               `        b                                 s   :      interconnect@1680000             2qcom,sm8550-system-noc               h       Ѐ                             interconnect@16c0000             2qcom,sm8550-pcie-anoc                l       "                     {   6       6   
                     s   z      interconnect@16e0000             2qcom,sm8550-aggre1-noc               n       D                     {   6      6                        s   c      interconnect@1700000             2qcom,sm8550-aggre2-noc               p                            {                           s         interconnect@1780000             2qcom,sm8550-mmss-noc                 x                                        s         rng@10c3000          2qcom,sm8550-trng qcom,trng               0              pcie@1c00000             pci          2qcom,pcie-sm8550          P               0     `             `             `             `                 parf dbi elbi atu config                                   8  R               `                 `0      `0                                f        "            3                                                                                                                                                /  =msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     M                       `                                                                                                                                                                      8   {   6   "   6   $   6   %   6   *   6   +   6      6          =  zaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0     z                  9         {              pcie-mem cpu-pcie            n       |            |              v       5            5                6           pci             6               1        pciephy            }        sokay               ~   `               ~   ^           default               opp-table            2operating-points-v2          s   }   opp-2500000-1                &%           !         А                    opp-5000000-1                LK@           !                              opp-5000000-2                LK@           !                              opp-10000000-2                          !         B@                    opp-8000000-3                z                                         opp-16000000-3               $                     h                       pcie@0           pci                                                                              R         phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy              `               (   {   6   "   6   $          6   &   6   (        zaux cfg_ahb ref rchng pipe             6           phy            6   &                     6            V            pcie0_pipe_clk          	            sokay                       $            s   1      pcie@1c08000             pci          2qcom,pcie-sm8550          P              0     @             @             @             @                 parf dbi elbi atu config                                   8  R               @                 @0      @0                                f        "           3                  3             4             5             8             9             :             v             w             2             /  =msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                     M                       `                                                                                                                                                                  @   {   6   ,   6   .   6   /   6   6   6   7   6      6       6         I  zaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               6   ,        $       0     z                  9         {   	           pcie-mem cpu-pcie            n       |           |              v       5           5                6      6   	        pci link_down               6              2        pciephy                    sokay               ~   c               ~   a           default               opp-table            2operating-points-v2          s      opp-2500000-1                &%           !         А                    opp-5000000-1                LK@           !                              opp-5000000-2                LK@           !                              opp-10000000-2                          !         B@                    opp-8000000-3                z                                         opp-16000000-3               $                     h                    opp-16000000-4               $                     h                    opp-32000000-4              H                     <                       pcie@0           pci                                                                              R         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy                             (   {   6   0   6   .         6   2   6   4        zaux cfg_ahb ref rchng pipe             6      6   
        phy phy_nocsr              6   2                     6            V           pcie1_pipe_clk          	            sokay                       $           4            s   2      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                     6           E            M           Z            g        _   5         5               s         crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce                 ߠ       `                             rx tx           _   5         5                                        memory        phy@1d80000          2qcom,sm8550-qmp-ufs-phy                                 {          6                 zref ref_aux qref                6                          ufsphy           V           	            sokay                       $            s   3      ufshc@1d84000         +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0               @       0                	                  3        ufsphy                                   6           rst             6                      _   5   `             f                 0     c                  9         :   #           ufs-ddr cpu-ufs       n  zcore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   {   6      6      6      6            6      6      6                      sokay               ~                                               O                    s      opp-table            2operating-points-v2          s      opp-75000000          @      xh                    xh                                           !      opp-150000000         @      р                    р                                           "      opp-300000000         @                                                                                   crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine               ؀                {   6            s         hwlock@1f40000           2qcom,tcsr-mutex                                           s   -      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon                                {                V                       s         gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                 ,               _                                                   %              9                       gfx-mem         sokay             s     zap-shader                     qcom/sm8550/a740_zap.mbn          opp-table            2operating-points-v2          s      opp-680000000               (                            opp-615000000               $'                          opp-550000000                U                          opp-475000000               O           P         \j      opp-401000000               @           @         \j      opp-348000000                           <         \j      opp-295000000               W           8         \j      opp-220000000                           4                      gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc                    0             1               =hfi gmu       8   {                      6      6                      !  zahb gmu cxo axi memnoc hub demet                                   cx gx           _                                         s      opp-table            2operating-points-v2          s      opp-500000000               e                  opp-200000000                           @            clock-controller@3d90000             2qcom,sm8550-gpucc                                  {   /   6      6            V                      +            s         iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                               #           0                                                                                                                                                                                                       >             ?             @             A                                                                                                                         {         6       6   !               zhlos bus iface ahb                           f         s         ipa@3f40000          2qcom,sm8550-ipa         _   5         5            0                            P     @               ipa-reg ipa-shared gsi        @                                                           (  =ipa gsi ipa-clock-query ipa-setup-ready          {              zcore          0                       9         :              memory config                      C                   *  Tipa-clock-enabled-valid ipa-clock-enabled         	  sdisabled          remoteproc@4080000           2qcom,sm8550-mpss-pas                                P                                                                      0  =wdog fatal ready handover stop-ack shutdown-ack          {               zxo              <       <            cx mss                                                                 C               Tstop            sokay          0  qcom/sm8550/modem.mbn qcom/sm8550/modem_dtb.mbn    glink-edge             .                     .               jmpss                        remoteproc@6800000           2qcom,sm8550-adsp-pas                                <                                                      #  =wdog fatal ready handover stop-ack           {               zxo              <      <            lcx lmx                                                             C               Tstop            sokay          .  qcom/sm8550/adsp.mbn qcom/sm8550/adsp_dtb.mbn      glink-edge             .                     .               jlpass                 fastrpc          2qcom,fastrpc            pfastrpcglink-apps-dsp           jadsp                                          compute-cb@3             2qcom,fastrpc-compute-cb                     _   5        5  c             f      compute-cb@4             2qcom,fastrpc-compute-cb                     _   5        5  d             f      compute-cb@5             2qcom,fastrpc-compute-cb                     _   5        5  e             f      compute-cb@6             2qcom,fastrpc-compute-cb                     _   5        5  f             f      compute-cb@7             2qcom,fastrpc-compute-cb                     _   5        5  g             f         gpr       	   2qcom,gpr          
  padsp_apps                                                         service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd          s  #   dais             2qcom,q6apm-dais         _   5        5  a          bedais           2qcom,q6apm-lpass-dais                       s            service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          V            s                     codec@6aa0000            2qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              zmclk macro dcodec fsgen          V          
  wsa2-mclk                       s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                         {           ziface           jWSA2                       default                       	           ?   ?                            #           6           H           Y           p                                                                           	  sdisabled          codec@6ac0000            2qcom,sm8550-lpass-rx-macro                              (   {      @         f         g              zmclk macro dcodec fsgen          V            mclk                        s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                         {           ziface           jRX                     default                                 ?                              #             6        H        Y        p                                                                      sokay             s  "   codec@0,4            2sdw20217010d00                                                  s           codec@6ae0000            2qcom,sm8550-lpass-tx-macro                              (   {      9         f         g              zmclk macro dcodec fsgen          V            mclk                        s         codec@6b00000            2qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              zmclk macro dcodec fsgen          V            mclk                        s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                         {           ziface           jWSA                    default                       	           ?   ?                            #           6           H           Y           p                                                                             sokay             s  '   speaker@0,0          2sdw20217020400                           default                                               	  SpkrLeft                                                 
            s  %      speaker@0,1          2sdw20217020400                          default                                               
  SpkrRight                                                            s  &         soundwire@6d30000            2qcom,soundwire-v2.0.0                                                                     =core wakeup          {           ziface           jTX                     default                                &                  #            6        H        Y        p                                                               sokay             s  $   codec@0,3            2sdw20217010d00                          ?                     s           codec@6d44000            2qcom,sm8550-lpass-va-macro               @              $   {      9         f         g           zmclk macro dcodec            V            fsgen                       s         pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl                              %                  T        d           p                       {      f         g           zcore audio           s      tx-swr-active-state          s      clk-pins            |gpio0           swr_tx_clk                                       data-pins           |gpio1 gpio2 gpio14          swr_tx_data                                         rx-swr-active-state          s      clk-pins            |gpio3           swr_rx_clk                                       data-pins           |gpio4 gpio5         swr_rx_data                                         dmic01-default-state       clk-pins            |gpio6         
  dmic1_clk                             data-pins           |gpio7           dmic1_data                               dmic23-default-state       clk-pins            |gpio8         
  dmic2_clk                             data-pins           |gpio9           dmic2_data                               wsa-swr-active-state             s      clk-pins            |gpio10          wsa_swr_clk                                      data-pins           |gpio11          wsa_swr_data                                            wsa2-swr-active-state            s      clk-pins            |gpio15          wsa2_swr_clk                                         data-pins           |gpio16          wsa2_swr_data                                           spkr-1-sd-n-active-state            |gpio17          gpio                                          s         spkr-2-sd-n-active-state            |gpio18          gpio                                          s            interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc                 @                                    interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc              C                                        s         interconnect@7e40000             2qcom,sm8550-lpass-ag-noc                                                      mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5              @                                                      =hc_irq pwr_irq           {   6      6                  ziface core xo           _   5  @             d,        h            <                     0                       9         :              sdhc-ddr cpu-sdhc           	           	<4`         f        	               sokay            	)                 default sleep                         	2              	<           	H            	U         	]   opp-table            2operating-points-v2          s      opp-19200000                $                  opp-50000000                           !      opp-100000000                           "      opp-202000000               
F                       video-codec@aa00000          2qcom,sm8550-iris                 
                                                          <   
   <            venus vcodec0 mxc mmcx                      {   6                        ziface core vcodec0_core       0     9         :   %                             cpu-cfg video-mem                         6   !        bus         _   5  @       5  G             f        sokay       opp-table            2operating-points-v2          s      opp-240000000               N            "   !      opp-338000000               %x           "   "      opp-366000000               з                    opp-444000000               v                     opp-533333334               V                          clock-controller@aaf0000             2qcom,sm8550-videocc              
                  {   /   6               <      <   
           !   !         V                      +            s         cci@ac15000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
P                                                      {                          zcamnoc_axi cpas_ahb cci                       	2              default sleep         	  sdisabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   cci@ac16000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
`                                                      {                  
        zcamnoc_axi cpas_ahb cci                    	2           default sleep         	  sdisabled                                 i2c-bus@0                         c B@                                   cci@ac17000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
p                                                      {                          zcamnoc_axi cpas_ahb cci                       	2              default sleep         	  sdisabled                                 i2c-bus@0                         c B@                                i2c-bus@1                        c B@                                   isp@acb7000          2qcom,sm8550-camss        0       
p            
ː            
˰            
̠       
     
       
     
`            
@             
`             
΀             
Π             
             
             
              
              
             
            
             
̰            
                csid0 csid1 csid2 csid_lite0 csid_lite1 csid_wrapper csiphy0 csiphy1 csiphy2 csiphy3 csiphy4 csiphy5 csiphy6 csiphy7 vfe0 vfe1 vfe2 vfe_lite0 vfe_lite1          {                                                /      2            3      !      4      #      5      %      6      '      7      )      8      +      9      -      1   6         A      E      F      J      K      O      Q      P      S      T       zcamnoc_axi cpas_ahb cpas_fast_ahb_clk cpas_ife_lite cpas_vfe0 cpas_vfe1 cpas_vfe2 csid csiphy0 csiphy0_timer csiphy1 csiphy1_timer csiphy2 csiphy2_timer csiphy3 csiphy3_timer csiphy4 csiphy4_timer csiphy5 csiphy5_timer csiphy6 csiphy6_timer csiphy7 csiphy7_timer csiphy_rx gcc_axi_hf vfe0 vfe0_fast_ahb vfe1 vfe1_fast_ahb vfe2 vfe2_fast_ahb vfe_lite vfe_lite_ahb vfe_lite_cphy_rx vfe_lite_csid                  Y             [                          ]             x                                                                  z              Y                                       Z             \                          ^             y               =csid0 csid1 csid2 csid_lite0 csid_lite1 csiphy0 csiphy1 csiphy2 csiphy3 csiphy4 csiphy5 csiphy6 csiphy7 vfe0 vfe1 vfe2 vfe_lite0 vfe_lite1        0     9         :                                 ahb hf_0_mnoc           _   5                                                  ife0 ife1 ife2 top        	  sdisabled       ports                                port@0                     port@1                    port@2                    port@3                    port@4                    port@5                    port@6                    port@7                          clock-controller@ade0000             2qcom,sm8550-camcc                
                  {   6      /      0            <      <   
           !   !         V                      +            s         display-subsystem@ae00000            2qcom,sm8550-mdss                 
                 mdss                    S                                     {         6      6         =                                     0                       9         :              mdp0-mem cpu-cfg            _   5                                        R        sokay             s      display-controller@ae01000           2qcom,sm8550-dpu               
           
        0       	  mdp vbif                                    0   {   6      6               @      =      I      !  zbus nrt_bus iface lut core vsync                <                 I        $               ports                                port@0                  endpoint                        s            port@1                 endpoint                        s            port@2                 endpoint                        s               opp-table            2operating-points-v2          s      opp-200000000                           !      opp-325000000               _@           "      opp-375000000               Z                 opp-514000000                                      displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P       
             
            
            
            
                                       0   {                                          J  zcore_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                     	d   4      4      4              4           dp                                     <           sokay       ports                                port@0                  endpoint                        s            port@1                 endpoint            	{                                 s               opp-table            2operating-points-v2          s      opp-162000000               	                 opp-270000000               ߀           !      opp-540000000                /                  opp-810000000               0G                       dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl                                   0   {                  B      8         6         $  zbyte byte_intf pixel core iface bus             <                       C        	d                                           dsi                                   sokay            	      ports                                port@0                  endpoint                        s            port@1                 endpoint                       	{                      s               opp-table            2operating-points-v2          s      opp-187500000               -           !      opp-300000000                           "      opp-358000000               V                    panel@0          2visionox,vtdr6130                        default sleep                         	2              	           	           	              ~         port       endpoint                        s                  phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             {                   
  ziface ref            V           	            sokay            	            s         dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl                                   0   {                  D      :         6         $  zbyte byte_intf pixel core iface bus             <                 	      E        	d                                           dsi                                 	  sdisabled       ports                                port@0                  endpoint                        s            port@1                 endpoint                   phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             {                   
  ziface ref            V           	          	  sdisabled             s            clock-controller@af00000             2qcom,sm8550-dispcc               
               \   {   /      6      0                             4      4                                       <              !         V                      +            s         phy@88e3000          2qcom,sm8550-snps-eusb2-phy               0       T        	             {              zref            6           sokay            	           	                       s         phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy                     0           {   6             6      6           zaux ref com_aux usb3_pipe               6              6      6           phy common           V           	                             sokay                       $            s   4   ports                                port@0                  endpoint                        s           port@1                 endpoint                        s            port@2                 endpoint                        s                  usb@a600000           2qcom,sm8550-dwc3 qcom,snps-dwc3              
`              0   {   6      6      6      6      6               &  zcfg_noc core iface sleep mock_utmi xo              6      6           $        `                                                                                      E  =dwc_usb3 pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                6                         6         0     c                  9         :   $           usb-ddr apps-usb            _   5   @                  4            usb2-phy usb3-phy           	             	         
          
         
1         
I         
a         
y         
         
         
         f         
        sokay       ports                                port@0                  endpoint                        s           port@1                 endpoint                        s                  interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc                  "             @        d      <  
         ^   ^  a      }   ?      ~                                                        s         thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2               '            "                 
                                               =uplow critical          
            s        thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2               '             "0                
                                               =uplow critical          
            s        thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2               '0            "@                
                                               =uplow critical          
            s        power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp               0                      .           .                      .                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?                          spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         =periph_irq                           E                                                                             pmic@c           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $                $               
             s           pmic@d           2qcom,pm8010 qcom,spmi-pmic                                               temp-alarm@2400          2qcom,spmi-temp-alarm               $                $               
             s           pmic@1           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                      T        p                      d                                s      sdc2-card-det-state         |gpio12          normal                    &         5        B            s            led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  sdisabled          pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            O         	  sdisabled             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                         T        p                      d                                s         phy@fd00             2qcom,pm8550b-eusb2-repeater                     	            Z           g            s            pmic@5           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        T        p                      d                                s            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        T        p                      d                                s            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        T        p                      d                                s            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        T        p                      d                                s            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                               temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        T        p                      d                                s            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                pon@1300             2qcom,pmk8350-pon                         	  hlos pbs       pwrkey           2qcom,pmk8350-pwrkey                               s   t      	  sdisabled          resin            2qcom,pmk8350-resin                              	  sdisabled             rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                   b            nvram@7100           2qcom,spmi-sdam             q                                  R      q       reboot-reason@48                H           ~               s           gpio@b800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                         T        p                      d                                s            pmic@a           2qcom,pmr735d qcom,spmi-pmic             
                                 temp-alarm@a00           2qcom,spmi-temp-alarm               
             
   
               
             s        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                         T        p                      d                                s            pmic@b           2qcom,pmr735d qcom,spmi-pmic                                              temp-alarm@a00           2qcom,spmi-temp-alarm               
                
               
             s        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                         T        p                      d                                s               pinctrl@f100000          2qcom,sm8550-tlmm                        0                                  T        d                               p   ~                                              s   ~   cam0-default-state     mclk-pins           |gpio100       	  cam_mclk                                 cam0-sleep-state       mclk-pins           |gpio100       	  cam_mclk                                 cam1-default-state     mclk-pins           |gpio101       	  cam_mclk                                 cam1-sleep-state       mclk-pins           |gpio101       	  cam_mclk                                 cam2-default-state     mclk-pins           |gpio102       	  cam_mclk                                 cam2-sleep-state       mclk-pins           |gpio102       	  cam_mclk                                 cam3-default-state     mclk-pins           |gpio103       	  cam_mclk                                 cam3-sleep-state       mclk-pins           |gpio103       	  cam_mclk                                 cam4-default-state     mclk-pins           |gpio104         cam_aon_mclk4                                cam4-sleep-state       mclk-pins           |gpio104         cam_aon_mclk4                                cam5-default-state     mclk-pins           |gpio105       	  cam_mclk                                 cam5-sleep-state       mclk-pins           |gpio105       	  cam_mclk                                 cam6-default-state     mclk-pins           |gpio106       	  cam_mclk                                 cam6-sleep-state       mclk-pins           |gpio106       	  cam_mclk                                 cam7-default-state     mclk-pins           |gpio107       	  cam_mclk                                 cam7-sleep-state       mclk-pins           |gpio107       	  cam_mclk                                 cci0-0-default-state             s      sda-pins            |gpio110         cci_i2c_sda                    5        scl-pins            |gpio111         cci_i2c_scl                    5           cci0-0-sleep-state           s      sda-pins            |gpio110         cci_i2c_sda                           scl-pins            |gpio111         cci_i2c_scl                              cci0-1-default-state             s      sda-pins            |gpio112         cci_i2c_sda                    5        scl-pins            |gpio113         cci_i2c_scl                    5           cci0-1-sleep-state           s      sda-pins            |gpio112         cci_i2c_sda                           scl-pins            |gpio113         cci_i2c_scl                              cci1-0-default-state             s      sda-pins            |gpio114         cci_i2c_sda                    5        scl-pins            |gpio115         cci_i2c_scl                    5           cci1-0-sleep-state           s      sda-pins            |gpio114         cci_i2c_sda                           scl-pins            |gpio115         cci_i2c_scl                              cci2-0-default-state             s      sda-pins            |gpio74          cci_i2c_sda                    5        scl-pins            |gpio75          cci_i2c_scl                    5           cci2-0-sleep-state           s      sda-pins            |gpio74          cci_i2c_sda                           scl-pins            |gpio75          cci_i2c_scl                              cci2-1-default-state             s      sda-pins            |gpio0           cci_i2c_sda                    5        scl-pins            |gpio1           cci_i2c_scl                    5           cci2-1-sleep-state           s      sda-pins            |gpio0           cci_i2c_sda                           scl-pins            |gpio1           cci_i2c_scl                              hub-i2c0-data-clk-state         |gpio16 gpio17           i2chub0_se0                     5         s   V      hub-i2c1-data-clk-state         |gpio18 gpio19           i2chub0_se1                     5         s   W      hub-i2c2-data-clk-state         |gpio20 gpio21           i2chub0_se2                     5         s   X      hub-i2c3-data-clk-state         |gpio22 gpio23           i2chub0_se3                     5         s   [      hub-i2c4-data-clk-state         |gpio4 gpio5         i2chub0_se4                     5         s   \      hub-i2c5-data-clk-state         |gpio6 gpio7         i2chub0_se5                     5         s   ]      hub-i2c6-data-clk-state         |gpio8 gpio9         i2chub0_se6                     5         s   ^      hub-i2c7-data-clk-state         |gpio10 gpio11           i2chub0_se7                     5         s   _      hub-i2c8-data-clk-state         |gpio206 gpio207         i2chub0_se8                     5         s   `      hub-i2c9-data-clk-state         |gpio84 gpio85           i2chub0_se9                     5         s   a      pcie0-default-state          s      perst-pins          |gpio94          gpio                              clkreq-pins         |gpio95          pcie0_clk_req_n                     5      wake-pins           |gpio96          gpio                        5         pcie1-default-state          s      perst-pins          |gpio97          gpio                              clkreq-pins         |gpio98          pcie1_clk_req_n                     5      wake-pins           |gpio99          gpio                        5         qup-i2c0-data-clk-state         |gpio28 gpio29         	  qup1_se0                       5           s   b      qup-i2c1-data-clk-state         |gpio32 gpio33         	  qup1_se1                       5           s   g      qup-i2c2-data-clk-state         |gpio36 gpio37         	  qup1_se2                       5           s   j      qup-i2c3-data-clk-state         |gpio40 gpio41         	  qup1_se3                       5           s   m      qup-i2c4-data-clk-state         |gpio44 gpio45         	  qup1_se4                       5           s   p      qup-i2c5-data-clk-state         |gpio52 gpio53         	  qup1_se5                       5           s   s      qup-i2c6-data-clk-state         |gpio48 gpio49         	  qup1_se6                       5           s   v      qup-i2c8-data-clk-state          s   7   scl-pins            |gpio57          qup2_se0_l1_mira                       5        sda-pins            |gpio56          qup2_se0_l0_mira                       5           qup-i2c9-data-clk-state         |gpio60 gpio61         	  qup2_se1                       5           s   @      qup-i2c10-data-clk-state            |gpio64 gpio65         	  qup2_se2                       5           s   C      qup-i2c11-data-clk-state            |gpio68 gpio69         	  qup2_se3                       5           s   F      qup-i2c12-data-clk-state            |gpio2 gpio3       	  qup2_se4                       5           s   I      qup-i2c13-data-clk-state            |gpio80 gpio81         	  qup2_se5                       5           s   L      qup-i2c15-data-clk-state            |gpio72 gpio106        	  qup2_se7                       5           s   R      qup-spi0-cs-state           |gpio31        	  qup1_se0                                 s   f      qup-spi0-data-clk-state         |gpio28 gpio29 gpio30          	  qup1_se0                                 s   e      qup-spi1-cs-state           |gpio35        	  qup1_se1                                 s   i      qup-spi1-data-clk-state         |gpio32 gpio33 gpio34          	  qup1_se1                                 s   h      qup-spi2-cs-state           |gpio39        	  qup1_se2                                 s   l      qup-spi2-data-clk-state         |gpio36 gpio37 gpio38          	  qup1_se2                                 s   k      qup-spi3-cs-state           |gpio43        	  qup1_se3                                 s   o      qup-spi3-data-clk-state         |gpio40 gpio41 gpio42          	  qup1_se3                                 s   n      qup-spi4-cs-state           |gpio47        	  qup1_se4                                 s   r      qup-spi4-data-clk-state         |gpio44 gpio45 gpio46          	  qup1_se4                                 s   q      qup-spi5-cs-state           |gpio55        	  qup1_se5                                 s   u      qup-spi5-data-clk-state         |gpio52 gpio53 gpio54          	  qup1_se5                                 s   t      qup-spi6-cs-state           |gpio51        	  qup1_se6                                 s   x      qup-spi6-data-clk-state         |gpio48 gpio49 gpio50          	  qup1_se6                                 s   w      qup-spi8-cs-state           |gpio59          qup2_se0_l3_mira                                 s   ?      qup-spi8-data-clk-state         |gpio56 gpio57 gpio58            qup2_se0_l2_mira                                 s   >      qup-spi9-cs-state           |gpio63        	  qup2_se1                                 s   B      qup-spi9-data-clk-state         |gpio60 gpio61 gpio62          	  qup2_se1                                 s   A      qup-spi10-cs-state          |gpio67        	  qup2_se2                                 s   E      qup-spi10-data-clk-state            |gpio64 gpio65 gpio66          	  qup2_se2                                 s   D      qup-spi11-cs-state          |gpio71        	  qup2_se3                                 s   H      qup-spi11-data-clk-state            |gpio68 gpio69 gpio70          	  qup2_se3                                 s   G      qup-spi12-cs-state          |gpio119       	  qup2_se4                                 s   K      qup-spi12-data-clk-state            |gpio2 gpio3 gpio118       	  qup2_se4                                 s   J      qup-spi13-cs-state          |gpio83        	  qup2_se5                                 s   N      qup-spi13-data-clk-state            |gpio80 gpio81 gpio82          	  qup2_se5                                 s   M      qup-spi15-cs-state          |gpio75        	  qup2_se7                                 s   U      qup-spi15-data-clk-state            |gpio72 gpio106 gpio74         	  qup2_se7                                 s   T      qup-uart7-default-state         |gpio26 gpio27         	  qup1_se7                                 s   y      qup-uart14-default-state            |gpio78 gpio79         	  qup2_se6                        5         s   O      qup-uart14-cts-rts-state            |gpio76 gpio77         	  qup2_se6                                 s   P      sdc2-sleep-state             s      clk-pins          	  |sdc2_clk                              cmd-pins          	  |sdc2_cmd             5                 data-pins         
  |sdc2_data            5                    sdc2-default-state           s      clk-pins          	  |sdc2_clk                              cmd-pins          	  |sdc2_cmd             5           
      data-pins         
  |sdc2_data            5           
         sde-dsi-active-state            |gpio133         gpio                                 s         sde-dsi-suspend-state           |gpio133         gpio                                 s         sde-te-active-state         |gpio86        
  mdp_vsync                                s         sde-te-suspend-state            |gpio86        
  mdp_vsync                                s         wcd-reset-n-active-state            |gpio108         gpio                                          s           iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500                                 #           0                  A              a              b              c              d              e              f              g              h              i              j              k              l              m              n              o              p              q              r              s              t              u              v                                                                                                                                                                                     ;             <             =             >             ?             @             A             B             C             D             E             F             G             H             I             J             K             L             M             N             O             P             Q             R             S             T             U             V             W             X             Y                                                                                                                                                                                                                                                                                                                                                                                                                                   f         s   5      interrupt-controller@17100000            2arm,gic-v3                                                R                                                             	                                         s      ppi-partitions     interrupt-partition-0                             s   #      interrupt-partition-1                          s   $      interrupt-partition-2                          s   %      interrupt-partition-3                       s   &         msi-controller@17140000          2arm,gic-v3-its                                                     s   |         timer@17420000           2arm,armv7-timer-mem              B                 R                                            frame@17421000           B    B                                                             frame@17423000           B0                               	             	  sdisabled          frame@17425000           BP                               
             	  sdisabled          frame@17427000           Bp                                            	  sdisabled          frame@17429000           B                                            	  sdisabled          frame@1742b000           B                                            	  sdisabled          frame@1742d000           B                                            	  sdisabled             rsc@17a00000          	  japps_rsc             2qcom,rpmh-rsc         @                                                               drv-0 drv-1 drv-2 drv-3       0                                                                !            -                                      '   bcm-voter            2qcom,bcm-voter           s          clock-controller             2qcom,sm8550-rpmh-clk             V           zxo           {            s         power-controller             2qcom,sm8550-rpmhpd          +                       s   <   opp-table            2operating-points-v2          s      opp-16                   opp-48             0         s         opp-52             4      opp-56             8         s         opp-60             <      opp-64             @         s   !      opp-80             P      opp-128                     s   "      opp-144                  opp-192                     s         opp-256                     s         opp-320           @      opp-336           P      opp-384                    s         opp-416                       regulators-0             2qcom,pm8550-rpmh-regulators         =b           J           Z           j              Y                      Y           Y           Y                                               bob1          
  vreg_bob1           " 2K         : <l        R            s   Y      bob2          
  vreg_bob2           " )         : <l        R            s         ldo1            vreg_l1b_1p8            " w@        : w@        R         ldo2            vreg_l2b_3p0            " -         : -         R         ldo5            vreg_l5b_3p1            " /]         : /]         R            s         ldo6            vreg_l6b_1p8            " w@        : -         R         ldo7            vreg_l7b_1p8            " w@        : -         R         ldo8            vreg_l8b_1p8            " w@        : -         R            s         ldo9            vreg_l9b_2p9            " -*        : -         R            s         ldo11           vreg_l11b_1p2           " O        :          R            s         ldo12           vreg_l12b_1p8           " w@        : w@        R            s         ldo13           vreg_l13b_3p0           " -        : -        R            s         ldo14           vreg_l14b_3p2           " 0         : 0         R         ldo15           vreg_l15b_1p8           " w@        : w@        R            s         ldo16           vreg_l16b_2p8           " *        : *        R         ldo17           vreg_l17b_2p5           " &5@        : &5@        R            s            regulators-1             2qcom,pm8550vs-rpmh-regulators           =c                 ldo3            vreg_l3c_0p9            " m        :         R            s            regulators-2             2qcom,pm8550vs-rpmh-regulators           =d           i      ldo1            vreg_l1d_0p88           " m        : 	        R            s            regulators-3             2qcom,pm8550vs-rpmh-regulators           =e           i           w                                       smps4           vreg_s4e_0p9            " @        :         R            s         smps5           vreg_s5e_1p1            " z        :          R         ldo1            vreg_l1e_0p88           " m        : m        R            s         ldo2            vreg_l2e_0p9            " @        :         R         ldo3            vreg_l3e_1p2            " O        : O        R            s            regulators-4             2qcom,pm8550ve-rpmh-regulators           =f           i           w                            smps4           vreg_s4f_0p5            "          : 
`        R         ldo1            vreg_l1f_0p9            "         :         R         ldo2            vreg_l2f_0p88           " m        :         R         ldo3            vreg_l3f_0p91           " m        :         R            s            regulators-5             2qcom,pm8550vs-rpmh-regulators           =g           i           w                                                                                   smps1           vreg_s1g_1p2            " O        :          R         smps2           vreg_s2g_0p8            " 5         : B@        R         smps3           vreg_s3g_0p7            "         : Q        R         smps4           vreg_s4g_1p3            " O        : @        R            s         smps5           vreg_s5g_0p8            "          : Q        R         smps6           vreg_s6g_1p8            " w@        :         R            s         ldo1            vreg_l1g_1p2            " O        : O        R            s         ldo2            vreg_l2g_1p2            " O        : O        R         ldo3            vreg_l3g_1p2            " O        : O        R            s            regulators-6             2qcom,pm8010-rpmh-regulators         =m                                            	              Y   ldo1            vreg_l1m_1p056          "          :          R         ldo2            vreg_l2m_1p056          "          :          R         ldo3            vreg_l3m_2p8            " *        : *        R         ldo4            vreg_l4m_2p8            " *        : *        R         ldo5            vreg_l5m_1p8            " w@        : w@        R         ldo6            vreg_l6m_1p8            " w@        : w@        R         ldo7            vreg_l7m_2p9            " *        : ,O        R            regulators-7             2qcom,pm8010-rpmh-regulators         =n                                            	   Y           Y   ldo1            vreg_l1n_1p1            " ؀        : O        R         ldo2            vreg_l2n_1p1            " ؀        : O        R         ldo3            vreg_l3n_2p8            " *        : -        R         ldo4            vreg_l4n_2p8            " *        : 2Z        R         ldo5            vreg_l5n_1p8            " w@        : w@        R         ldo6            vreg_l6n_3p3            " 0         : 0         R         ldo7            vreg_l7n_2p96           " *        : -*        R               cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0                                0              '  freq-domain0 freq-domain1 freq-domain2           {   /   6           zxo alternate          0                                                   $  =dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2         %            V            s         pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                        Q                                                opp-table            2operating-points-v2          s      opp-0            p      opp-1            ,h      opp-2            Z      opp-3            ci8      opp-4            y      opp-5            A      opp-6            H      opp-7            ։      opp-8            h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon              $d                       E                  9         9                    opp-table            2operating-points-v2          s      opp-0            E      opp-1            l}p      opp-2                  opp-3                  opp-4            9`      opp-5            /(            interconnect@24100000            2qcom,sm8550-gem-noc              $                                        s   9      system-cache-controller@25000000             2qcom,sm8550-llcc          `       %               %               %@              %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base                
             interconnect@320c0000            2qcom,sm8550-nsp-noc              2                                        s         remoteproc@32300000          2qcom,sm8550-cdsp-pas                 20               D           B                                                  #  =wdog fatal ready handover stop-ack           {               zxo              <       <   
   <            cx mxc nsp                                                              C              Tstop            sokay          .  qcom/sm8550/cdsp.mbn qcom/sm8550/cdsp_dtb.mbn      glink-edge             .                     .               jcdsp                  fastrpc          2qcom,fastrpc            pfastrpcglink-apps-dsp           jcdsp                                          compute-cb@1             2qcom,fastrpc-compute-cb                   $  _   5  a       5         5              f      compute-cb@2             2qcom,fastrpc-compute-cb                   $  _   5  b       5         5              f      compute-cb@3             2qcom,fastrpc-compute-cb                   $  _   5  c       5         5              f      compute-cb@4             2qcom,fastrpc-compute-cb                   $  _   5  d       5         5              f      compute-cb@5             2qcom,fastrpc-compute-cb                   $  _   5  e       5         5              f      compute-cb@6             2qcom,fastrpc-compute-cb                   $  _   5  f       5         5              f      compute-cb@7             2qcom,fastrpc-compute-cb                   $  _   5  g       5         5              f      compute-cb@8             2qcom,fastrpc-compute-cb                   $  _   5  h       5         5              f                  thermal-zones      aoss0-thermal           8         trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             cpuss0-thermal          8        trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             cpuss1-thermal          8        trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             cpuss2-thermal          8        trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             cpuss3-thermal          8        trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             cpu3-top-thermal            8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu3-bottom-thermal         8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu4-top-thermal            8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu4-bottom-thermal         8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu5-top-thermal            8     	   trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu5-bottom-thermal         8     
   trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu6-top-thermal            8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu6-bottom-thermal         8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu7-top-thermal            8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu7-middle-thermal         8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu7-bottom-thermal         8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                aoss1-thermal           8         trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             cpu0-thermal            8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu1-thermal            8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cpu2-thermal            8        trips      trip-point0         H _        T           Epassive       trip-point1         H s        T           Epassive       cpu-critical            H         T        	   Ecritical                cdsp0-thermal           _   
        8        trips      thermal-engine-config           H H        T           Epassive       thermal-hal-config          H H        T           Epassive       reset-mon-config            H 8        T           Epassive       junction-config         H s        T           Epassive             cdsp1-thermal           _   
        8        trips      thermal-engine-config           H H        T           Epassive       thermal-hal-config          H H        T           Epassive       reset-mon-config            H 8        T           Epassive       junction-config         H s        T           Epassive             cdsp2-thermal           _   
        8        trips      thermal-engine-config           H H        T           Epassive       thermal-hal-config          H H        T           Epassive       reset-mon-config            H 8        T           Epassive       junction-config         H s        T           Epassive             cdsp3-thermal           _   
        8        trips      thermal-engine-config           H H        T           Epassive       thermal-hal-config          H H        T           Epassive       reset-mon-config            H 8        T           Epassive       junction-config         H s        T           Epassive             video-thermal           8        trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             mem-thermal         _   
        8     	   trips      thermal-engine-config           H H        T           Epassive       ddr0-config         H _        T           Epassive       reset-mon-config            H 8        T           Epassive             modem0-thermal          8     
   trips      thermal-engine-config           H H        T           Epassive       mdmss0-config0          H p        T           Epassive       mdmss0-config1          H (        T           Epassive       reset-mon-config            H 8        T           Epassive             modem1-thermal          8        trips      thermal-engine-config           H H        T           Epassive       mdmss1-config0          H p        T           Epassive       mdmss1-config1          H (        T           Epassive       reset-mon-config            H 8        T           Epassive             modem2-thermal          8        trips      thermal-engine-config           H H        T           Epassive       mdmss2-config0          H p        T           Epassive       mdmss2-config1          H (        T           Epassive       reset-mon-config            H 8        T           Epassive             modem3-thermal          8        trips      thermal-engine-config           H H        T           Epassive       mdmss3-config0          H p        T           Epassive       mdmss3-config1          H (        T           Epassive       reset-mon-config            H 8        T           Epassive             camera0-thermal         8        trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             camera1-thermal         8        trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             aoss2-thermal           8         trips      thermal-engine-config           H H        T           Epassive       reset-mon-config            H 8        T           Epassive             gpuss-0-thermal         _   
        8        cooling-maps       map0            u          z           trips      trip-point0         H L        T           Epassive          s        trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                gpuss-1-thermal         _   
        8        cooling-maps       map0            u          z           trips      trip-point0         H L        T           Epassive          s        trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                gpuss-2-thermal         _   
        8        cooling-maps       map0            u          z           trips      trip-point0         H L        T           Epassive          s        trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                gpuss-3-thermal         _   
        8        cooling-maps       map0            u  	        z           trips      trip-point0         H L        T           Epassive          s  	      trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                gpuss-4-thermal         _   
        8        cooling-maps       map0            u  
        z           trips      trip-point0         H L        T           Epassive          s  
      trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                gpuss-5-thermal         _   
        8        cooling-maps       map0            u          z           trips      trip-point0         H L        T           Epassive          s        trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                gpuss-6-thermal         _   
        8        cooling-maps       map0            u          z           trips      trip-point0         H L        T           Epassive          s        trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                gpuss-7-thermal         _   
        8        cooling-maps       map0            u          z           trips      trip-point0         H L        T           Epassive          s        trip-point1         H _        T           Ehot       trip-point2         H         T        	   Ecritical                pm8010-m-thermal            _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8010-n-thermal            _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8550-thermal          _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8550b-thermal         _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8550ve-thermal            _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8550vs-c-thermal          _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8550vs-d-thermal          _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8550vs-e-thermal          _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pm8550vs-g-thermal          _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pmr735d-k-thermal           _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot             pmr735d-l-thermal           _   d        8     trips      trip0           H s        T             Epassive       trip1           H 8        T             Ehot                timer            2arm,armv8-timer       @                                             
            reboot-mode          2nvmem-reboot-mode                     reboot-mode                             aliases       $  /soc@0/geniqup@ac0000/serial@a9c000       audio-codec          2qcom,wcd9385-codec          default                    w@         w@         w@         w@         , $ I                   S         z  P                               ~   l                                               Y                    s  !      pmic-glink        '   2qcom,sm8550-pmic-glink qcom,pmic-glink                                       ~          connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint                       s            port@1                 endpoint                       s            port@2                 endpoint                       s   Z                  sound         (   2qcom,sm8550-sndcard qcom,sm8450-sndcard          ,SM8550-MTP         SpkrLeft IN WSA_SPK1 OUT SpkrRight IN WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC1 MIC BIAS1 AMIC2 MIC BIAS2 AMIC3 MIC BIAS3 AMIC4 MIC BIAS3 AMIC5 MIC BIAS4 VA DMIC0 MIC BIAS1 VA DMIC1 MIC BIAS1 VA DMIC2 MIC BIAS3 TX DMIC0 MIC BIAS1 TX DMIC1 MIC BIAS2 TX DMIC2 MIC BIAS3 TX SWR_INPUT0 ADC1_OUTPUT TX SWR_INPUT1 ADC2_OUTPUT TX SWR_INPUT0 ADC3_OUTPUT TX SWR_INPUT1 ADC4_OUTPUT       wcd-playback-dai-link           *WCD Playback       cpu         4      q      codec           4  !      "                 platform            4  #         wcd-capture-dai-link            *WCD Capture    cpu         4      x      codec           4  !     $                 platform            4  #         wsa-dai-link            *WSA Playback       cpu         4      i      codec           4  %  &  '                 platform            4  #         va-dai-link         *VA Capture     cpu         4      x      codec           4             platform            4  #            vph-pwr-regulator            2regulator-fixed         vph_pwr         " 8u         : 8u          >         R         s            	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters opp-hz required-opps interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names operating-points-v2 vcc-supply mode-switch orientation-switch remote-endpoint reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names wake-gpios perst-gpios opp-peak-kBps opp-level assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply vdda-qref-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely lanes-per-direction qcom,ice reset-gpios vcc-max-microamp vccq-supply vccq-max-microamp vdd-hba-supply #hwlock-cells qcom,gmu memory-region firmware-name qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping powerdown-gpios sound-name-prefix vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width max-sd-hs-hz sdhci-caps-mask cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc assigned-clock-parents data-lanes vdda-supply vddio-supply vci-supply vdd-supply vdds-supply vdda12-supply snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id output-disable bias-pull-up power-source #pwm-cells vdd18-supply vdd3-supply linux,code bits wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride affinity msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode vdd-l1-supply vdd-l2-supply vdd-s4-supply vdd-s5-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s6-supply vdd-l1-l2-supply vdd-l3-l4-supply vdd-l5-supply vdd-l6-supply vdd-l7-supply #freq-domain-cells thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply orientation-gpios power-role data-role audio-routing link-name sound-dai regulator-always-on regulator-boot-on 