     8     (              |                                                                   (   ,Qualcomm Technologies, Inc. QDU1000 IDP          2qcom,qdu1000-idp qcom,qdu1000         	   =embedded       chosen           Jserial0:115200n8          clocks     xo-board-clk             2fixed-clock          V$          f             s   [      sleep-clk            2fixed-clock          V           f             s            cpus                                 cpu@0            {cpu          2arm,cortex-a55                                            psci                         psci                                         s      l2-cache             2cache                                              s      l3-cache             2cache                                  s               cpu@100          {cpu          2arm,cortex-a55                                           psci                         psci                                         s      l2-cache             2cache                                              s            cpu@200          {cpu          2arm,cortex-a55                                           psci                         psci                                	         s      l2-cache             2cache                                              s   	         cpu@300          {cpu          2arm,cortex-a55                                           psci                
         psci                                         s      l2-cache             2cache                                              s            cpu-map    cluster0       core0                     core1                     core2                     core3                              idle-states         psci       cpu-sleep-0          2arm,idle-state                              /  ^        @@           W         s            domain-idle-states     cluster-sleep-0          2domain-idle-state             H          	        /          @A  D         s         cluster-sleep-1          2domain-idle-state             M                  /  '        @A 3D         s            firmware       scm          2qcom,scm-qdu1000 qcom,scm            interconnect-0           2qcom,qdu1000-mc-virt            h           x            s   H      interconnect-1           2qcom,qdu1000-clk-virt           h           x            s         memory@80000000          {memory                                pmu          2arm,cortex-a55-pmu                         psci             2arm,psci-1.0             smc    power-domain-cpu0                                               s         power-domain-cpu1                                               s         power-domain-cpu2                                               s         power-domain-cpu3                                               s   
      power-domain-cluster                                       s            reserved-memory                                      hyp@80000000                         `                 xbl-dt-log@80600000              `                        xbl-ramdump@80640000                 d                        aop-image@80800000                                       aop-cmd-db@80860000          2qcom,cmd-db                                      aop-config@80880000                                      tme-crash-dump@808a0000                                      tme-log@808e0000                         @                uefi-log@808e4000                @                       smem@80900000         
   2qcom,smem                                                       cpucp-fw@80b00000                                        memory@80c00000                                      tz-stat@81d00000                                         tags@81e00000                       P                 qtee@82300000                0       P                 ta@82800000                                      fs1@83200000                         @                 fs2@83600000                 `       @                 fs3@83a00000                        @                 ipa-fw@8be00000                                      ipa-gsi@8be10000                        @                mpss@8c000000                                        q6-mpss-dtb@9ec00000                                         tenx@a0000000                       `                 oem-tenx@b9600000                `                       tenx-q6-buffer@c0000000                                       ipa-buffer@c3200000                                      ecc-meta-data@e0000000                                         harq-buffer@800000000                                         tenx-sp-buffer@880000000                       P                  fapi-buffer@8d0000000                                            soc@0            2simple-bus                                                                                            clock-controller@80000           2qcom,qdu1000-gcc                         B                                         f                                  s         clock-controller@280000          2qcom,qdu1000-ecpricc                  (              8                                                       f                    dma-controller@900000         )   2qcom,qdu1000-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                                 ?        
                           geniqup@9c0000           2qcom,geni-se-qup                                           Z      [        m-ahb s-ahb         
                  (                           	  6qup-core                                              Iokay       serial@980000            2qcom,geni-uart                        @                8        se          P           Zdefault               Y         	  Idisabled          i2c@984000           2qcom,geni-i2c                 @       @                :        se                Z           P           Zdefault                                 	  Idisabled          spi@984000           2qcom,geni-spi                 @       @                                         Z                  :        se          P              Zdefault       	  Idisabled          i2c@988000           2qcom,geni-i2c                        @                <        se                [           P           Zdefault                                 	  Idisabled          spi@988000           2qcom,geni-spi                        @                                         [                  <        se          P       !        Zdefault       	  Idisabled          i2c@98c000           2qcom,geni-i2c                        @                >        se                \           P   "        Zdefault                                 	  Idisabled          spi@98c000           2qcom,geni-spi                        @                                         \                  >        se          P   #   $        Zdefault       	  Idisabled          i2c@990000           2qcom,geni-i2c                         @                @        se                ]           P   %        Zdefault                                 	  Idisabled          spi@990000           2qcom,geni-spi                         @                                         ]                  @        se          P   &   '        Zdefault       	  Idisabled          i2c@994000           2qcom,geni-i2c                 @       @                B        se                ^           P   (        Zdefault                                 	  Idisabled          spi@994000           2qcom,geni-spi                 @       @                                         ^                  B        se          P   )   *        Zdefault       	  Idisabled          i2c@998000           2qcom,geni-i2c                        @                D        se                _           P   +        Zdefault                                 	  Idisabled          spi@998000           2qcom,geni-spi                        @                                         _                  D        se          P   ,   -        Zdefault       	  Idisabled          serial@99c000            2qcom,geni-debug-uart                         @                F        se          P   .   /        Zdefault               `           Iokay             dma-controller@a00000         )   2qcom,qdu1000-gpi-dma qcom,sm6350-gpi-dma                                                                                               %         &         '         (         )         *                         ?        
                          geniqup@ac0000           2qcom,geni-se-qup                                           \      ]        m-ahb s-ahb         
                                                 	  Idisabled       serial@a80000            2qcom,geni-uart                        @                J        se          P   0        Zdefault               a                                   	  Idisabled          i2c@a84000           2qcom,geni-i2c                 @       @                L        se                b           P   1        Zdefault                                 	  Idisabled          spi@a84000           2qcom,geni-spi                 @       @                                         b                  L        se          P   2   3        Zdefault       	  Idisabled          i2c@a88000           2qcom,geni-i2c                        @                N        se                c           P   4        Zdefault                                 	  Idisabled          spi@a88000           2qcom,geni-spi                        @                                         c                  N        se          P   5   6        Zdefault       	  Idisabled          i2c@a8c000           2qcom,geni-i2c                        @                P        se                d           P   7        Zdefault                                 	  Idisabled          spi@a8c000           2qcom,geni-spi                        @                                         d                  P        se          P   8   9        Zdefault       	  Idisabled          i2c@a90000           2qcom,geni-i2c                         @                R        se                e           P   :        Zdefault                                 	  Idisabled          spi@a90000           2qcom,geni-spi                         @                                         e                  R        se          P   ;   <        Zdefault       	  Idisabled          i2c@a94000           2qcom,geni-i2c                 @       @                T        se                f           P   =        Zdefault                                 	  Idisabled          serial@a94000            2qcom,geni-uart                @       @                T        se          P   >        Zdefault               f                                   	  Idisabled          spi@a94000           2qcom,geni-spi                 @       @                                         f                  T        se          P   ?   @        Zdefault       	  Idisabled          i2c@a98000           2qcom,geni-i2c                        @                V        se                k           P   A        Zdefault                                 	  Idisabled          spi@a98000           2qcom,geni-spi                        @                                         k                  V        se          P   B   C        Zdefault       	  Idisabled          i2c@a9c000           2qcom,geni-i2c                        @                X        se                m           P   D        Zdefault                                 	  Idisabled          spi@a9c000           2qcom,geni-spi                        @                                         m                  X        se          P   E   F        Zdefault       	  Idisabled             interconnect@1640000             2qcom,qdu1000-system-noc              d       P        h           x            s   G      hwlock@1f40000           2qcom,tcsr-mutex                               h            s         mmc@8804000       %   2qcom,qdu1000-sdhci qcom,sdhci-msm-v5                  @            P              	  vhc cqhci                                        hc_irq pwr_irq                 ^      _               iface core xo                       0  (   G          H          I          G   ,            6sdhc-ddr cpu-sdhc               J              K        
                                       d,        Ҁh        Iokay            P   L           M        Zdefault sleep                              
                  (         B         P         V         ^        k   N        w   O   opp-table            2operating-points-v2          s   K   opp-384000000               `            P         c  8@                         phy@88e3000       1   2qcom,qdu1000-usb-hs-phy qcom,usb-snps-hs-7nm-phy                 0                                   l        ref                       Iokay               Q           R           S         s   V      phy@88e5000          2qcom,qdu1000-qmp-usb3-uni-phy                P                         s      l      u      v        aux ref com_aux pipe                                phy phy_phy          f            usb3_uni_phy_pipe_clk_src                       Iokay            
   Q           T         s   W      usb@a6f8800          2qcom,qdu1000-dwc3 qcom,dwc3              
o                                                                m      r      o        cfg_noc core sleep mock_utmi                  o      m        *$        D  ?                             U         U   	      U            <  pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                           P                    0  (   G         H         I         G   3           6usb-ddr apps-usb            Iokay       usb@a600000       
   2snps,dwc3                
`                                   
                   S         l                                      V   W        usb2-phy usb3-phy           peripheral     ports                                port@0                  endpoint             port@1                 endpoint                      interrupt-controller@b220000             2qcom,qdu1000-pdc qcom,pdc                 "             @        d      <                      (     6   ^  a      }   ?                                             s   U      spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         vcore chnls obsrvr intr cnfg         ?   U              periph_irq                      "                                                     pmic@0           2qcom,pm8150 qcom,spmi-pmic                                                pon@800          2qcom,pm8998-pon                     /           ?      pwrkey           2qcom,pm8941-pwrkey                                M  =	         V        c   t      	  Idisabled          resin            2qcom,pm8941-resin                                M  =	         V      	  Idisabled             temp-alarm@2400          2qcom,spmi-temp-alarm               $                $               n   X           zthermal                      s   b      adc@3100             2qcom,spmi-adc5             1                                                     1                s   X   channel@0                                      ref_gnd       channel@1                                   
  vref_1p25         channel@6                                   	  die_temp             adc-tm@3500          2qcom,spmi-adc-tm5              5                5                                                  	  Idisabled          rtc@6000             2qcom,pm8941-rtc            `   a       
  vrtc alarm                  a             gpio@c000             2qcom,pm8150-gpio qcom,spmi-gpio                                 Y           
                                        s   Y         pmic@1           2qcom,pm8150 qcom,spmi-pmic                                                     pinctrl@f000000          2qcom,qdu1000-tlmm                                                                                               Z                      U                        s   Z   qup-uart0-default-state         gpio6 gpio7 gpio8 gpio9         qup00            s         qup-i2c1-data-clk-state         gpio10 gpio11           qup01           #            V         s         qup-spi1-data-clk-state         gpio10 gpio11 gpio12            qup01           #            2         s         qup-spi1-cs-state           gpio13          gpio            #            2         s         qup-i2c2-data-clk-state         gpio12 gpio13           qup02           #            V         s         qup-spi2-data-clk-state         gpio12 gpio13 gpio10            qup02           #            2         s          qup-spi2-cs-state           gpio11          gpio            #            2         s   !      qup-i2c3-data-clk-state         gpio14 gpio15           qup03           #            V         s   "      qup-spi3-data-clk-state         gpio14 gpio15 gpio16            qup03           #            2         s   #      qup-spi3-cs-state           gpio17          gpio            #            2         s   $      qup-i2c4-data-clk-state         gpio16 gpio17           qup04           #            V         s   %      qup-spi4-data-clk-state         gpio16 gpio17 gpio14            qup04           #            2         s   &      qup-spi4-cs-state           gpio15          gpio            #            2         s   '      qup-i2c5-data-clk-state         gpio130 gpio131         qup05           #            V         s   (      qup-spi5-data-clk-state         gpio130 gpio131 gpio132         qup05           #            2         s   )      qup-spi5-cs-state           gpio133         gpio            #            2         s   *      qup-i2c6-data-clk-state         gpio132 gpio133         qup06           #            V         s   +      qup-spi6-data-clk-state         gpio132 gpio133 gpio130         qup06           #            2         s   ,      qup-spi6-cs-state           gpio131         gpio            #            2         s   -      qup-uart7-rx-state          gpio135         qup07           #            2         s   /      qup-uart7-tx-state          gpio134         qup07           #            2         s   .      qup-uart8-default-state         gpio18 gpio19 gpio20 gpio21         qup10            s   0      qup-i2c9-data-clk-state         gpio22 gpio23           qup11           #            V         s   1      qup-spi9-data-clk-state         gpio22 gpio23 gpio24            qup11           #            2         s   2      qup-spi9-cs-state           gpio25          gpio            #            2         s   3      qup-i2c10-data-clk-state            gpio24 gpio25           qup12           #            V         s   4      qup-spi10-data-clk-state            gpio24 gpio25 gpio22            qup12           #            2         s   5      qup-spi10-cs-state          gpio23          gpio            #            2         s   6      qup-i2c11-data-clk-state            gpio26 gpio27           qup13           #            V         s   7      qup-spi11-data-clk-state            gpio26 gpio27 gpio28            qup13           #            2         s   8      qup-spi11-cs-state          gpio29          gpio            #            2         s   9      qup-i2c12-data-clk-state            gpio28 gpio29           qup14           #            V         s   :      qup-spi12-data-clk-state            gpio28 gpio29 gpio26            qup14           #            2         s   ;      qup-spi12-cs-state          gpio27          gpio            #            2         s   <      qup-i2c13-data-clk-state            gpio30 gpio31           qup15           #            V         s   =      qup-spi13-data-clk-state            gpio30 gpio31 gpio32            qup15           #            2         s   ?      qup-spi13-cs-state          gpio33          gpio            #            2         s   @      qup-uart13-default-state            gpio30 gpio31 gpio32 gpio33         qup15            s   >      qup-i2c14-data-clk-state            gpio34 gpio35           qup16           #            V         s   A      qup-spi14-data-clk-state            gpio34 gpio35 gpio36            qup16           #            2         s   B      qup-spi14-cs-state          gpio37 gpio38           gpio            #            2         s   C      qup-i2c15-data-clk-state            gpio40 gpio41           qup17           #            V         s   D      qup-spi15-data-clk-state            gpio40 gpio41 gpio30            qup17           #            2         s   E      qup-spi15-cs-state          gpio31          gpio            #            2         s   F      sdc-on-state             s   L   clk-pins          	  sdc1_clk            #            2      cmd-pins          	  sdc1_cmd            #   
         V      data-pins         
  sdc1_data           #   
         V      rclk-pins         
  sdc1_rclk            ?         sdc-off-state            s   M   clk-pins          	  sdc1_clk            #            2      cmd-pins          	  sdc1_cmd            #            V      data-pins         
  sdc1_data           #            V      rclk-pins         
  sdc1_rclk            ?            sram@14680000         $   2qcom,qdu1000-imem syscon simple-mfd              h                         h                                 pil-reloc@94c            2qcom,pil-reloc-info            	L            iommu@15000000        0   2qcom,qdu1000-smmu-500 qcom,smmu-500 arm,mmu-500                                N           [        L         A                   I          ^          _          `                            a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A                     s         interrupt-controller@17200000            2arm,gic-v3                              &                       	                               n                           s         timer@17420000           2arm,armv7-timer-mem              B                                                             frame@17421000           B    B                                                   frame@17423000           B0                   	                    	  Idisabled          frame@17425000           BP    B`                   
                    	  Idisabled          frame@17427000           Bp                                       	  Idisabled          frame@17429000           B                                       	  Idisabled          frame@1742b000           B                                       	  Idisabled          frame@1742d000           B                                       	  Idisabled             rsc@17a00000             2qcom,rpmh-rsc         0                                                  vdrv-0 drv-1 drv-2         $                                                                                               	  apps_rsc                   bcm-voter            2qcom,bcm-voter           s         clock-controller             2qcom,qdu1000-rpmh-clk               [        xo           f            s         power-controller             2qcom,qdu1000-rpmhpd                       \         s   J   opp-table            2operating-points-v2          s   \   opp1                     opp2               0      opp3               @      opp4                     opp5                     opp6                        s   P      opp7              @      opp8              P      opp9                    opp10                         regulators           2qcom,pm8150-rpmh-regulators         a              ]           ]           ]           ]        "   ]        0   ]        >   ]        L   ]        Z   ]        h   ]        w   ^           ]           _           ^           `           ]   smps2           vreg_s2a_0p5                             smps3           vreg_s3a_1p05            ~         P      smps4           vreg_s4a_1p8             w@         w@         s   `      smps5           vreg_s5a_2p0                               s   _      smps6           vreg_s6a_0p9             	         6@         s   ^      smps7           vreg_s7a_1p2             O         O      smps8           vreg_s8a_1p3             @         @      ldo1            vreg_l1a_0p91                             7         ldo2            vreg_l2a_2p3             -Q         2Z        7            s   S      ldo3            vreg_l3a_1p2             	         9        7            s   T      ldo5            vreg_l5a_0p8                              7         ldo6            vreg_l6a_0p91            m         ~        7         ldo7            vreg_l7a_1p8             -P                 7            s   O      ldo8            vreg_l8a_0p91                     H        7            s   Q      ldo9            vreg_l9a_0p91                             7         ldo10           vreg_l10a_2p95           )2         6        7            s   N      ldo11           vreg_l11a_0p91           5          B@        7         ldo12           vreg_l12a_1p8                               7         ldo14           vreg_l14a_1p8            -P         0        7            s   R      ldo15           vreg_l15a_1p8                              7         ldo16           vreg_l16a_1p8                             7         ldo17           vreg_l17a_3p3            -         6        7         ldo18           vreg_l18a_1p2                             7               cpufreq@17d90000          ,   2qcom,qdu1000-cpufreq-epss qcom,cpufreq-epss                                            vfreq-domain0 freq-domain1                                  xo alternate            N            f            s         interconnect@19100000            2qcom,qdu1000-gem-noc                                h           x            s   I      system-cache-controller@19200000             2qcom,qdu1000-llcc                              0             `             p                                                                                 l  vllcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base               
           a   a        mmulti-chan-ddr        efuse@221c8000        (   2qcom,qdu1000-sec-qfprom qcom,sec-qfprom              "                                    multi-chan-ddr@12b             +           ~                s   a            timer            2arm,armv8-timer       <                                
                thermal-zones      pm8150-thermal             d           b   trips      trip0            s                     Epassive       trip1            8                     Ehot       trip2            6h                  	   Ecritical                   aliases       $  /soc@0/geniqup@9c0000/serial@99c000       ppvar-sys-regulator          2regulator-fixed       
  ppvar_sys            @@         @@                           s   c      vph-pwr-regulator            2regulator-fixed         vph_pwr          8u          8u                              c         s   ]         	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path clock-frequency #clock-cells phandle device_type reg clocks enable-method power-domains power-domain-names qcom,freq-domain next-level-cache cache-level cache-unified cpu entry-method entry-latency-us exit-latency-us min-residency-us arm,psci-suspend-param local-timer-stop qcom,bcm-voters #interconnect-cells interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks dma-ranges #reset-cells dma-channels dma-channel-mask iommus #dma-cells clock-names interconnects interconnect-names status pinctrl-0 pinctrl-names #hwlock-cells reg-names interrupt-names resets operating-points-v2 dma-coherent bus-width qcom,dll-config qcom,ddr-config pinctrl-1 cap-mmc-hw-reset mmc-ddr-1_8v mmc-hs200-1_8v mmc-hs400-1_8v mmc-hs400-enhanced-strobe non-removable no-sd no-sdio supports-cqe vmmc-supply vqmmc-supply opp-hz required-opps opp-peak-kBps opp-avg-kBps #phy-cells vdda-pll-supply vdda18-supply vdda33-supply reset-names clock-output-names vdda-phy-supply assigned-clocks assigned-clock-rates interrupts-extended snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk phys phy-names dr_mode qcom,pdc-ranges #interrupt-cells interrupt-controller qcom,ee qcom,channel mode-bootloader mode-recovery debounce bias-pull-up linux,code io-channels io-channel-names #thermal-sensor-cells #io-channel-cells qcom,pre-scaling label gpio-controller gpio-ranges #gpio-cells wakeup-parent gpio-reserved-ranges pins function drive-strength bias-disable bias-pull-down #iommu-cells #global-interrupts #redistributor-regions redistributor-stride frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config opp-level qcom,pmic-id vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s4-supply vdd-s5-supply vdd-s6-supply vdd-s7-supply vdd-s8-supply vdd-s9-supply vdd-s10-supply vdd-l1-l8-l11-supply vdd-l2-l10-supply vdd-l3-l4-l5-l18-supply vdd-l6-l9-supply vdd-l7-l12-l14-l15-supply vdd-l13-l16-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode #freq-domain-cells nvmem-cells nvmem-cell-names bits polling-delay-passive thermal-sensors temperature hysteresis serial0 regulator-always-on regulator-boot-on vin-supply 