 k   8    (            ! `                             "    nvidia,p2371-2180 nvidia,tegra210                                    +             7NVIDIA Jetson TX1 Developer Kit    opp-table-dvfs0           operating-points-v2          =   3   opp-40800000-800             E 5  5  0         S    n          Z         opp-68000000-800             E 5  5  0         S              Z         opp-102000000-800            E 5  5  0         S    e         Z         opp-204000000-800            E 5  5  0         S    (          Z             k      opp-408000000-812            E c c 0         S    Q          Z         opp-665600000-825            E   0         S    '@          Z         opp-800000000-825            E   0         S    /          Z         opp-1065600000-837           E ň ň 0         S    ?          Z         opp-1331200000-850           E P P 0         S    OX          Z         opp-1600000000-887           E   0         S    _^          Z            opp-table-dvfs1           operating-points-v2          =   '   opp-40800000             S    n          Z            w 	       opp-68000000             S              Z            w        opp-102000000            S    e         Z            w        opp-204000000            S    (          Z            w 1           k      opp-408000000            S    Q          Z            w c       opp-665600000            S    '@          Z            w        opp-800000000            S    /          Z            w P       opp-1065600000           S    ?          Z            w(       opp-1331200000           S    OX          Z            wE        opp-1600000000           S    _^          Z            w          pcie@1003000              nvidia,tegra210-pcie             pci       0        0             8                               pads afi cs                 b          c         	   intr msi                                                                             b                                        +                                                                                                           B                                           F      H          ,        pex afi pll_e cml                 F      H      J        pex afi pcie_x          #default idle            1           ;           Eokay            L           ^           p      pci@1,0          pci                                                                             Eokay                         +                                      	   
           pcie-0 pcie-1 pcie-2 pcie-3       pci@2,0          pci                                                                            Eokay                         +                                           pcie-0           host1x@50000000           nvidia,tegra210-host1x               P        @                 A          C            syncpt host1x                          host1x                            
  host1x mc                        +                T       T                           dpaux@54040000            nvidia,tegra210-dpaux                T                                                /        dpaux parent                          dpaux                      Eokay             =  D   pinmux-aux        	  dpaux-io            aux          =          pinmux-i2c        	  dpaux-io            i2c          =   !      pinmux-off        	  dpaux-io            off          =   "      i2c-bus                      +             vi@54080000           nvidia,tegra210-vi               T                         E           Eokay                               4                                               +                    T         csi@838           nvidia,tegra210-csi            8           Eokay                                    G                                  eee9       (         4                       G        csi cilab cilcd cile csi_tpg                                   tsec@54100000             nvidia,tegra210-tsec                 T                         2                  S              S      	  Edisabled          dc@54200000           nvidia,tegra210-dc               T                          I                          dc                        dc                        -                    <          dc@54240000           nvidia,tegra210-dc               T$                         J                          dc                        dc                        -                    <         dsi@54300000              nvidia,tegra210-dsi              T0                        0                    dsi lp parent                 0        dsi                    H              Eokay                         +                        =      panel@0           auo,b080uan01                        ^                  k           x            vic@54340000              nvidia,tegra210-vic              T4                         H                          vic                       vic                                nvjpg@54380000            nvidia,tegra210-nvjpg                T8                                nvjpg                         nvjpg                                  dsi@54400000              nvidia,tegra210-dsi              T@                        R                    dsi lp parent                 R        dsi                    H            	  Edisabled                         +             =         nvdec@54480000            nvidia,tegra210-nvdec                TH                                nvdec                         nvdec                                  nvenc@544c0000            nvidia,tegra210-nvenc                TL                                nvenc                         nvenc                                  tsec@54500000             nvidia,tegra210-tsec                 TP                         P                          tsec                          tsec          	  Edisabled          sor@54540000              nvidia,tegra210-sor              TT                         L         (                         /              sor out parent dp safe                        sor         1           ;                      #aux i2c off                  	  Edisabled             =         sor@54580000              nvidia,tegra210-sor1                 TX                         K         (                         /              sor out parent dp safe                        sor         1            ;   !           "        #aux i2c off                    Eokay               #                      $           %                          =         dpaux@545c0000            nvidia,tegra210-dpaux                T\                                                /        dpaux parent                          dpaux                    	  Edisabled             =  E   pinmux-aux        	  dpaux-io            aux          =         pinmux-i2c        	  dpaux-io            i2c          =         pinmux-off        	  dpaux-io            off          =         i2c-bus                      +             isp@54600000              nvidia,tegra210-isp              T`                         G                                        isp       	  Edisabled          isp@54680000              nvidia,tegra210-isp              Th                         F                                        isp       	  Edisabled          i2c@546c0000              nvidia,tegra210-i2c-vi               Tl                                                 Q        div-clk slow                          i2c                  	  Edisabled                         +             interrupt-controller@50041000             arm,gic-400                                         @       P            P              P@             P`                        	                       =         gpu@57000000              nvidia,gm20b                  W              X                                                stall nonstall                      +              gpu pwr ref                       gpu                       Eokay               &      interrupt-controller@60004000             nvidia,tegra210-ictlr         `       ` @        @    ` A        @    ` B        @    ` C        @    ` D        @    ` E        @                                          =         timer@60005000            nvidia,tegra210-timer                ` P                                                       )          *          y                                                                                                          timer         clock@60006000            nvidia,tegra210-car              ` `                	                       =         flow-controller@60007000              nvidia,tegra210-flowctrl                 ` p              actmon@6000c800       .    nvidia,tegra210-actmon nvidia,tegra124-actmon                `                         -                  w      9        actmon emc                w        actmon          #   '        7      '   (      	  Ecpu-read            X         gpio@6000d000         )    nvidia,tegra210-gpio nvidia,tegra30-gpio                 `               `                     !          "          #          7          W          Y          }           g            s                              =         dma-controller@60020000       .    nvidia,tegra210-apbdma nvidia,tegra148-apbdma                `                        h          i          j          k          l          m          n          o          p          q          r          s          t          u          v          w                                                                                                                                                                                  "        dma               "        dma                     =   *      apbmisc@70000800          /    nvidia,tegra210-apbmisc nvidia,tegra20-apbmisc                p         d    p               pinmux@700008d4           nvidia,tegra210-pinmux                p           p 0               #boot            1   )         =  F   pinmux-sdmmc1-1v8-drv            =   F   sdmmc1          drive_sdmmc1                                   pinmux-sdmmc1-3v3-drv            =   E   sdmmc1          drive_sdmmc1                                   pinmux-sdmmc2-1v8-drv            =   I   sdmmc2          drive_sdmmc2                                   pinmux-sdmmc3-1v8-drv            =   M   sdmmc3          drive_sdmmc3                                   pinmux-sdmmc3-3v3-drv            =   L   sdmmc3          drive_sdmmc3                                   pinmux-sdmmc4-1v8-drv            =   N   sdmmc4          drive_sdmmc4                                   pinmux           =   )   pex_l0_rst_n_pa0            pex_l0_rst_n_pa0            pe0                                                                  pex_l0_clkreq_n_pa1         pex_l0_clkreq_n_pa1         pe0                                                                 pex_wake_n_pa2          pex_wake_n_pa2          pe                                                                  pex_l1_rst_n_pa3            pex_l1_rst_n_pa3            pe1                                                                  pex_l1_clkreq_n_pa4         pex_l1_clkreq_n_pa4         pe1                                                                 sata_led_active_pa5         sata_led_active_pa5                                                     pa6         pa6         sata                                                          dap1_fs_pb0         dap1_fs_pb0                                                     dap1_din_pb1            dap1_din_pb1                                                        dap1_dout_pb2           dap1_dout_pb2                                                       dap1_sclk_pb3           dap1_sclk_pb3                                                       spi2_mosi_pb4           spi2_mosi_pb4           spi2                                                         spi2_miso_pb5           spi2_miso_pb5           spi2                                                         spi2_sck_pb6            spi2_sck_pb6            spi2                                                         spi2_cs0_pb7            spi2_cs0_pb7            spi2                                                        spi1_mosi_pc0           spi1_mosi_pc0                                                       spi1_miso_pc1           spi1_miso_pc1                                                       spi1_sck_pc2            spi1_sck_pc2                                                        spi1_cs0_pc3            spi1_cs0_pc3                                                        spi1_cs1_pc4            spi1_cs1_pc4                                                        spi4_sck_pc5            spi4_sck_pc5            spi4                                                        spi4_cs0_pc6            spi4_cs0_pc6            spi4                                                        spi4_mosi_pc7           spi4_mosi_pc7           spi4                                                        spi4_miso_pd0           spi4_miso_pd0           spi4                                                        uart3_tx_pd1            uart3_tx_pd1            uartc                                                         uart3_rx_pd2            uart3_rx_pd2            uartc                                                       uart3_rts_pd3           uart3_rts_pd3           uartc                                                         uart3_cts_pd4           uart3_cts_pd4           uartc                                                       dmic1_clk_pe0           dmic1_clk_pe0           i2s3                                                         dmic1_dat_pe1           dmic1_dat_pe1           i2s3                                                         dmic2_clk_pe2           dmic2_clk_pe2           i2s3                                                         dmic2_dat_pe3           dmic2_dat_pe3           i2s3                                                         dmic3_clk_pe4           dmic3_clk_pe4                                                       dmic3_dat_pe5           dmic3_dat_pe5                                                       pe6         pe6                                                     pe7         pe7         pwm3                                                          gen3_i2c_scl_pf0            gen3_i2c_scl_pf0            i2c3                                                                     gen3_i2c_sda_pf1            gen3_i2c_sda_pf1            i2c3                                                                     uart2_tx_pg0            uart2_tx_pg0            uartb                                                         uart2_rx_pg1            uart2_rx_pg1            uartb                                                       uart2_rts_pg2           uart2_rts_pg2           uartb                                                         uart2_cts_pg3           uart2_cts_pg3           uartb                                                       wifi_en_ph0         wifi_en_ph0                                                       wifi_rst_ph1            wifi_rst_ph1                                                          wifi_wake_ap_ph2            wifi_wake_ap_ph2                                                        ap_wake_bt_ph3          ap_wake_bt_ph3                                                        bt_rst_ph4          bt_rst_ph4                                                        bt_wake_ap_ph5          bt_wake_ap_ph5                                                      ph6         ph6                                                     ap_wake_nfc_ph7         ap_wake_nfc_ph7                                                     nfc_en_pi0          nfc_en_pi0                                                        nfc_int_pi1         nfc_int_pi1                                                     gps_en_pi2          gps_en_pi2                                                        gps_rst_pi3         gps_rst_pi3         rsvd0                                                       uart4_tx_pi4            uart4_tx_pi4            uartd                                                         uart4_rx_pi5            uart4_rx_pi5            uartd                                                        uart4_rts_pi6           uart4_rts_pi6           uartd                                                         uart4_cts_pi7           uart4_cts_pi7           uartd                                                        gen1_i2c_sda_pj0            gen1_i2c_sda_pj0            i2c1                                                                     gen1_i2c_scl_pj1            gen1_i2c_scl_pj1            i2c1                                                                     gen2_i2c_scl_pj2            gen2_i2c_scl_pj2            i2c2                                                                    gen2_i2c_sda_pj3            gen2_i2c_sda_pj3            i2c2                                                                    dap4_fs_pj4         dap4_fs_pj4         i2s4b                                                        dap4_din_pj5            dap4_din_pj5            i2s4b                                                        dap4_dout_pj6           dap4_dout_pj6           i2s4b                                                        dap4_sclk_pj7           dap4_sclk_pj7           i2s4b                                                        pk0         pk0         i2s5b                                                        pk1         pk1         i2s5b                                                        pk2         pk2         i2s5b                                                        pk3         pk3         i2s5b                                                        pk4         pk4                                                     pk5         pk5                                                       pk6         pk6                                                     pk7         pk7                                                     pl0         pl0         rsvd0                                                       pl1         pl1                                                     sdmmc1_clk_pm0          sdmmc1_clk_pm0          sdmmc1                                                       sdmmc1_cmd_pm1          sdmmc1_cmd_pm1          sdmmc1                                                      sdmmc1_dat3_pm2         sdmmc1_dat3_pm2         sdmmc1                                                      sdmmc1_dat2_pm3         sdmmc1_dat2_pm3         sdmmc1                                                      sdmmc1_dat1_pm4         sdmmc1_dat1_pm4         sdmmc1                                                      sdmmc1_dat0_pm5         sdmmc1_dat0_pm5         sdmmc1                                                      sdmmc3_clk_pp0          sdmmc3_clk_pp0          sdmmc3                                                       sdmmc3_cmd_pp1          sdmmc3_cmd_pp1          sdmmc3                                                      sdmmc3_dat3_pp2         sdmmc3_dat3_pp2         sdmmc3                                                      sdmmc3_dat2_pp3         sdmmc3_dat2_pp3         sdmmc3                                                      sdmmc3_dat1_pp4         sdmmc3_dat1_pp4         sdmmc3                                                      sdmmc3_dat0_pp5         sdmmc3_dat0_pp5         sdmmc3                                                      cam1_mclk_ps0           cam1_mclk_ps0           extperiph3                                                        cam2_mclk_ps1           cam2_mclk_ps1           extperiph3                                                        cam_i2c_scl_ps2         cam_i2c_scl_ps2         i2cvi                                                                    cam_i2c_sda_ps3         cam_i2c_sda_ps3         i2cvi                                                                    cam_rst_ps4         cam_rst_ps4                                                       cam_af_en_ps5           cam_af_en_ps5                                                         cam_flash_en_ps6            cam_flash_en_ps6                                                          cam1_pwdn_ps7           cam1_pwdn_ps7                                                         cam2_pwdn_pt0           cam2_pwdn_pt0                                                         cam1_strobe_pt1         cam1_strobe_pt1                                                       uart1_tx_pu0            uart1_tx_pu0            uarta                                                         uart1_rx_pu1            uart1_rx_pu1            uarta                                                       uart1_rts_pu2           uart1_rts_pu2                                                       uart1_cts_pu3           uart1_cts_pu3                                                       lcd_bl_pwm_pv0          lcd_bl_pwm_pv0          pwm0                                                          lcd_bl_en_pv1           lcd_bl_en_pv1                                                         lcd_rst_pv2         lcd_rst_pv2                                                       lcd_gpio1_pv3           lcd_gpio1_pv3                                                        lcd_gpio2_pv4           lcd_gpio2_pv4           pwm1                                                          ap_ready_pv5            ap_ready_pv5                                                          touch_rst_pv6           touch_rst_pv6                                                         touch_clk_pv7           touch_clk_pv7           touch                                                         modem_wake_ap_px0           modem_wake_ap_px0                                                       touch_int_px1           touch_int_px1                                                       motion_int_px2          motion_int_px2                                                      als_prox_int_px3            als_prox_int_px3                                                        temp_alert_px4          temp_alert_px4                                                      button_power_on_px5         button_power_on_px5                                                     button_vol_up_px6           button_vol_up_px6                                                       button_vol_down_px7         button_vol_down_px7                                                     button_slide_sw_py0         button_slide_sw_py0                                                     button_home_py1         button_home_py1                                                     lcd_te_py2          lcd_te_py2        	  displaya                                                        pwr_i2c_scl_py3         pwr_i2c_scl_py3         i2cpmu                                                                   pwr_i2c_sda_py4         pwr_i2c_sda_py4         i2cpmu                                                                   clk_32k_out_py5         clk_32k_out_py5         soc                                                     pz0         pz0                                                     pz1         pz1         sdmmc1                                                      pz2         pz2                                                     pz3         pz3                                                       pz4         pz4         sdmmc1                                                      pz5         pz5         soc                                                     dap2_fs_paa0            dap2_fs_paa0            i2s2                                                         dap2_sclk_paa1          dap2_sclk_paa1          i2s2                                                         dap2_din_paa2           dap2_din_paa2           i2s2                                                         dap2_dout_paa3          dap2_dout_paa3          i2s2                                                         aud_mclk_pbb0           aud_mclk_pbb0                                                       dvfs_pwm_pbb1           dvfs_pwm_pbb1           cldvfs                                                       dvfs_clk_pbb2           dvfs_clk_pbb2                                                         gpio_x1_aud_pbb3            gpio_x1_aud_pbb3                                                        gpio_x3_aud_pbb4            gpio_x3_aud_pbb4            rsvd0                                                       hdmi_cec_pcc0           hdmi_cec_pcc0           cec                                                                 hdmi_int_dp_hpd_pcc1            hdmi_int_dp_hpd_pcc1                                                                    spdif_out_pcc2          spdif_out_pcc2          rsvd1                                                       spdif_in_pcc3           spdif_in_pcc3           rsvd1                                                       usb_vbus_en0_pcc4           usb_vbus_en0_pcc4           usb                                                                 usb_vbus_en1_pcc5           usb_vbus_en1_pcc5           usb                                                                 dp_hpd0_pcc6            dp_hpd0_pcc6            dp                                                      pcc7            pcc7            rsvd0                                                                   spi2_cs1_pdd0           spi2_cs1_pdd0           spi2                                                        qspi_sck_pee0           qspi_sck_pee0           rsvd1                                                       qspi_cs_n_pee1          qspi_cs_n_pee1          rsvd1                                                       qspi_io0_pee2           qspi_io0_pee2           rsvd1                                                       qspi_io1_pee3           qspi_io1_pee3           rsvd1                                                       qspi_io2_pee4           qspi_io2_pee4           rsvd1                                                       qspi_io3_pee5           qspi_io3_pee5           rsvd1                                                       core_pwr_req            core_pwr_req            core                                                          cpu_pwr_req         cpu_pwr_req         cpu                                                       pwr_int_n         
  pwr_int_n           pmi                                                     clk_32k_in          clk_32k_in          clk                                                      jtag_rtck         
  jtag_rtck           jtag                                                          clk_req         clk_req         rsvd1                                                       shutdown          	  shutdown          	  shutdown                                                             pinmux-dvfs-pwm-active           =   P   dvfs_pwm_pbb1           dvfs_pwm_pbb1                        pinmux-dvfs-pwm-inactive             =   Q   dvfs_pwm_pbb1           dvfs_pwm_pbb1                          serial@70006000       )    nvidia,tegra210-uart nvidia,tegra20-uart                 p `        @        +                   $                                        Eokay             =  G      serial@70006040       )    nvidia,tegra210-uart nvidia,tegra20-uart                 p `@       @        +                   %                                        5   *   	   *   	        :rx tx         	  Edisabled             =  H      serial@70006200       )    nvidia,tegra210-uart nvidia,tegra20-uart                 p b        @        +                   .                  7              7        5   *   
   *   
        :rx tx         	  Edisabled             =  I      serial@70006300           nvidia,tegra30-hsuart                p c        @                Z                  A              A        5   *      *           :rx tx           Eokay            serial           =  J   bluetooth             brcm,bcm43540-bt            D      ;            X      <                            =            host-wakeup          pwm@7000a000          '    nvidia,tegra210-pwm nvidia,tegra20-pwm               p                 g                                        pwm         Eokay             =   -      i2c@7000c000          (    nvidia,tegra210-i2c nvidia,tegra124-i2c              p                         &                        +                           div-clk                       i2c         5   *      *           :rx tx           Eokay       temperature-sensor@4c         
    ti,tmp451               L                                   r           }            =  K         i2c@7000c400          (    nvidia,tegra210-i2c nvidia,tegra124-i2c              p                         T                        +                   6        div-clk               6        i2c         5   *      *           :rx tx           Eokay                power-sensor@40           ti,ina3221              @                     +       input@0                      VDD_IN            N       input@1                     VDD_GPU           '      input@2                     VDD_CPU           '         power-sensor@42           ti,ina3221              B                     +       input@0                      VDD_MUX           N       input@1                     VDD_5V_IO_SYS                   input@2                     VDD_3V3_SYS           '         power-sensor@43           ti,ina3221              C                     +       input@0                      VDD_3V3_IO            '      input@1                     VDD_1V8_IO            '      input@2                   
  VDD_M2_IN             '         gpio@74           ti,tca9539              t        g            s                        Y                                #default         1   +         =  B      gpio@77           ti,tca9539              w        g            s                                                        #default         1   +         =  C      backlight@2c          
    ti,lp8557               ,        k   ,        À                         -      r        lp8557           =      rom-13h                             rom-14h                                   i2c@7000c500          (    nvidia,tegra210-i2c nvidia,tegra124-i2c              p                         \                        +                   C        div-clk               C        i2c         5   *      *           :rx tx           Eokay       eeprom@50             atmel,24c02             P        module          r                                                   eeprom@57             atmel,24c02             W        system          r                                                      i2c@7000c700          (    nvidia,tegra210-i2c nvidia,tegra124-i2c              p                         x                        +                   g        div-clk               g        i2c         5   *      *           :rx tx           1   !        ;   "        #default idle            Eokay                      =   %      i2c@7000d000          (    nvidia,tegra210-i2c nvidia,tegra124-i2c              p                         5                        +                   /        div-clk               /        i2c         5   *      *           :rx tx           Eokay                pmic@3c           maxim,max77620              <            .            3                                g            s        #default         1   /         =   @   fps    fps0                        -         fps1                       -         fps2                         pinmux           =   /   gpio0           gpio0           gpio          gpio1           gpio1           fps-out         N           ^            v                     gpio2_3         gpio2 gpio3         fps-out                    ^          gpio4           gpio4         	  32k-out1          gpio5_6_7           gpio5 gpio6 gpio7           gpio            N            regulators             0           0           1   sd0         VDD_SOC          	'         \         6         J        \           x  kl        ^            =  L      sd1         VDD_DDR_1V1_PMIC             6         J        \           x  kl        ^             =  M      sd2         VDD_PRE_REG_1V35             p         p        \           x  kl        ^            =   0      sd3         VDD_1V8          w@         w@         6         J        \           x  kl        ^             =         ldo0            AVDD_SYS_1V2             O         O         6         J        \           x         ^            =  A      ldo1            VDD_PEX_1V05                              \           x         ^            =         ldo2            VDDIO_SDMMC          w@         2Z         6         J        \   >        x         ^            =   G      ldo3            VDD_CAM_HV           *         *        \   2        x         ^            =  N      ldo4            VDD_RTC          P         P         6         J        \           x         ^             =  O      ldo5          
  VDD_TS_HV            2Z         2Z        \   >        x         ^            =  P      ldo6            VDD_TS_1V8           w@         w@        \   $        x         ^            v                        =  Q      ldo7            AVDD_1V05_PLL                              6         J        \           x         ^            =   >      ldo8            AVDD_SATA_HDMI_DP_1V05                            \           x         ^            =   #               i2c@7000d100          (    nvidia,tegra210-i2c nvidia,tegra124-i2c              p                         ?                        +                           div-clk                       i2c         5   *      *           :rx tx           1           ;           #default idle          	  Edisabled          spi@7000d400          (    nvidia,tegra210-spi nvidia,tegra114-spi              p                         ;                        +                   )        spi               )        spi         5   *      *           :rx tx         	  Edisabled          spi@7000d600          (    nvidia,tegra210-spi nvidia,tegra114-spi              p                         R                        +                   ,        spi               ,        spi         5   *      *           :rx tx         	  Edisabled          spi@7000d800          (    nvidia,tegra210-spi nvidia,tegra114-spi              p                         S                        +                   .        spi               .        spi         5   *      *           :rx tx         	  Edisabled          spi@7000da00          (    nvidia,tegra210-spi nvidia,tegra114-spi              p                         ]                        +                   D        spi               D        spi         5   *      *           :rx tx         	  Edisabled          rtc@7000e000          '    nvidia,tegra210-rtc nvidia,tegra20-rtc               p                                    .                       rtc       pmc@7000e400              nvidia,tegra210-pmc              p                       %   2        pclk clk32k_in          	                                                                                 $                            ?         =   .   pinmux     pex-dpd-disable         pex-bias pex-clk1 pex-clk2           `         =         pex-dpd-enable          pex-bias pex-clk1 pex-clk2           r         =         sdmmc1-1v8          sdmmc1                       =   D      sdmmc1-3v3          sdmmc1                      =   C      sdmmc3-1v8          sdmmc3                       =   K      sdmmc3-3v3          sdmmc3                      =   J      gpio-1v8            gpio                         =   +      gpio-3v3            gpio                        =  R         powergates     aud                      k                                   =   R      mpe                                                   =         nvdec                                                     =         sor       P                                       0      R                  8      8                    0      R                  8                     =         venc                         4                          4                     =         vic                                                   =         xusba                                                     =   6      xusbb                 !              _                     =   O      xusbc                  Y              Y                     =   5      nvjpg                                                     =               fuse@7000f800             nvidia,tegra210-efuse                p                                fuse                  '        fuse          cec@70015000              nvidia,tegra210-cec              pP                                                  cec         Eokay                     memory-controller@70019000            nvidia,tegra210-mc               p                                mc                  M                                  =         external-memory-controller@7001b000           nvidia,tegra210-emc       0       p            p            p                       9        emc                 N                      #   3        X            =   (      sata@70020000             nvidia,tegra210-ahci          0       pp             p        p     p                                           |      {        sata sata-oob                 |            {        sata sata-cold sata-oob         Eokay               4      hda@70030000          '    nvidia,tegra210-hda nvidia,tegra30-hda               p                         Q                  }            o        hda hda2hdmi hda2codec_2x                 }            o        hda hda2hdmi hda2codec_2x                      Eokay            NVIDIA Jetson TX1 HDA         usb@70090000              nvidia,tegra210-xusb          0       p	             p	            p	                 hcd fpci ipfs                   '          (         X         Y                     j          "                            x  xusb_host xusb_host_src xusb_falcon_src xusb_ss xusb_ss_div2 xusb_ss_src xusb_hs_src xusb_fs_src pll_u_480m clk_m pll_e               Y                    xusb_host xusb_ss xusb_src             5   6        xusb_host xusb_ss              7        Eokay               8   9   :   ;   <   =      *  usb2-0 usb2-1 usb2-2 usb2-3 usb3-0 usb3-1           ^           L           
   ,                     +       ethernet@1            usb955,9ff                       padctl@7009f000           nvidia,tegra210-xusb-padctl              p	                        1                         padctl             .        Eokay            %           ;   >        R           f            =   7   pads       usb2                           trk         Eokay       lanes      usb2-0          Eokay            |            xusb             =   8      usb2-1          Eokay            |            xusb             =   9      usb2-2          Eokay            |            xusb             =   :      usb2-3          Eokay            |            xusb             =   ;            hsic                           trk       	  Edisabled       lanes      hsic-0        	  Edisabled            |          hsic-1        	  Edisabled            |                pcie                          pll                       phy         Eokay       lanes      pcie-0          Eokay            |            pcie-x1          =         pcie-1          Eokay            |            pcie-x4          =   	      pcie-2          Eokay            |            pcie-x4          =   
      pcie-3          Eokay            |            pcie-x4          =         pcie-4          Eokay            |            pcie-x4          =         pcie-5          Eokay            |            usb3-ss          =   =      pcie-6          Eokay            |            usb3-ss          =   <            sata                          pll                       phy         Eokay       lanes      sata-0          Eokay            |            sata             =   4               ports      usb2-0          Eokay               ?                 otg    connector         %    gpio-usb-b-connector usb-b-connector          
  micro-USB            micro                               @                 usb2-1          Eokay               A        host          usb2-2          Eokay               B        host          usb2-3          Eokay            host          hsic-0        	  Edisabled          usb3-0          Eokay                     usb3-1          Eokay                     usb3-2        	  Edisabled          usb3-3        	  Edisabled                mmc@700b0000              nvidia,tegra210-sdhci                p                                                         sdhci tmclk                       sdhci         0  #sdmmc-3v3 sdmmc-1v8 sdmmc-3v3-drv sdmmc-1v8-drv         1   C        ;   D           E           F                       }        	%   {        	K   {        	s            	            	           	                      4     .             4         ; ;         Eokay            	           	                 
                  

   G        
   H      mmc@700b0200              nvidia,tegra210-sdhci                p                                          	              sdhci tmclk               	        sdhci           #sdmmc-1v8-drv           1   I        	%           	K           	           	            Eokay            	            
#        
1      8            

           
   ,                     +       wifi@1        $    brcm,bcm4354-fmac brcm,bcm4329-fmac                                     :         
   host-wake            mmc@700b0400              nvidia,tegra210-sdhci                p                                          E              sdhci tmclk               E        sdhci         0  #sdmmc-3v3 sdmmc-1v8 sdmmc-3v3-drv sdmmc-1v8-drv         1   J        ;   K           L           M                       }        	%   {        	K   {        	           	         	  Edisabled          mmc@700b0600              nvidia,tegra210-sdhci                p                                                        sdhci tmclk                       sdhci           #sdmmc-3v3-drv sdmmc-1v8-drv         1   N        ;   N        	%           	K           	           	                       4             4        
=   (         
M        Eokay            	            
#        

         usb@700d0000              nvidia,tegra210-xudc          0       p             p            p                 base fpci ipfs                  ,         (        !           >          "        dev ss ss_src fs_src hs_src            O   6        dev ss             7        Eokay               8        usb2-0          
\   ,        
n         thermal-sensor@700e2000           nvidia,tegra210-soctherm                  p             ` `                 soctherm-reg car-reg                    0          3            thermal edp                d      N        tsensor soctherm                  N      	  soctherm            }            =  5   throttle-cfgs      heavy           
~   d        
   U        
           X            =  >            mipi@700e3000             nvidia,tegra210-mipi                 p0                       8      	  mipi-cal                       
            =         clock@70110000            nvidia,tegra210-dfll          @       p             p             p            p                        >                 )     (      /        soc ref i2c                           
  dvco dfll           	            
dfllCPU_out         Eokay            
           
                                             0  a        C 
͠        ]  	         {         B@          K       !  #dvfs_pwm_enable dvfs_pwm_disable            1   P        ;   Q         =         aconnect@702c0000             nvidia,tegra210-aconnect                         k        ape apb2ape            R                     +            p,      p,             Eokay       ahub@702d0800             nvidia,tegra210-ahub             p-                   j        ahub                  j                                            +            p-  p-             Eokay             =  S   admaif@702d0000           nvidia,tegra210-admaif           p-             5   S      S      S      S      S      S      S      S      S      S      S      S      S      S      S      S      S   	   S   	   S   
   S   
      R  :rx1 tx1 rx2 tx2 rx3 tx3 rx4 tx4 rx5 tx5 rx6 tx6 rx7 tx7 rx8 tx8 rx9 tx9 rx10 tx10           Eokay             =  T   ports                        +       port@0                        =      endpoint               T         =            port@1                       =      endpoint               U         =            port@2                       =      endpoint               V         =            port@3                       =      endpoint               W         =            port@4                       =      endpoint               X         =            port@5                       =      endpoint               Y         =            port@6                       =      endpoint               Z         =            port@7                       =      endpoint               [         =            port@8                       =      endpoint               \         =            port@9              	         =      endpoint               ]         =                  i2s@702d1000              nvidia,tegra210-i2s          p-                        	        i2s sync_input                                       p         I2S1            Eokay             =  U   ports                        +       port@0                  endpoint               ^         =            port@1                       =  -   endpoint            i2s          =  V               i2s@702d1100              nvidia,tegra210-i2s          p-                        
        i2s sync_input                                       p         I2S2            Eokay             =  W   ports                        +       port@0                  endpoint               _         =            port@1                       =  .   endpoint            i2s          =  X               i2s@702d1200              nvidia,tegra210-i2s          p-                                i2s sync_input                                       p         I2S3            Eokay             =  Y   ports                        +       port@0                  endpoint               `         =            port@1                       =  /   endpoint            i2s          =  Z               i2s@702d1300              nvidia,tegra210-i2s          p-                   e             i2s sync_input                e                       p         I2S4            Eokay             =  [   ports                        +       port@0                  endpoint               a         =            port@1                       =  0   endpoint            i2s          =  \               i2s@702d1400              nvidia,tegra210-i2s          p-                   f             i2s sync_input                f                       p         I2S5            Eokay             =  ]   ports                        +       port@0                  endpoint               b         =            port@1                       =  1   endpoint            i2s          =  ^               sfc@702d2000              nvidia,tegra210-sfc          p-             SFC1            Eokay             =  _   ports                        +       port@0                  endpoint               c         =            port@1                       =     endpoint               d         =                  sfc@702d2200              nvidia,tegra210-sfc          p-"            SFC2            Eokay             =  `   ports                        +       port@0                  endpoint               e         =            port@1                       =     endpoint               f         =                  sfc@702d2400              nvidia,tegra210-sfc          p-$            SFC3            Eokay             =  a   ports                        +       port@0                  endpoint               g         =            port@1                       =     endpoint               h         =                  sfc@702d2600              nvidia,tegra210-sfc          p-&            SFC4            Eokay             =  b   ports                        +       port@0                  endpoint               i         =            port@1                       =     endpoint               j         =                  amx@702d3000              nvidia,tegra210-amx          p-0            AMX1            Eokay             =  c   ports                        +       port@0                  endpoint               k         =            port@1                 endpoint               l         =            port@2                 endpoint               m         =            port@3                 endpoint               n         =            port@4                       =     endpoint               o         =                  amx@702d3100              nvidia,tegra210-amx          p-1            AMX2            Eokay             =  d   ports                        +       port@0                  endpoint               p         =            port@1                 endpoint               q         =            port@2                       =  e   endpoint               r         =            port@3                       =  f   endpoint               s         =            port@4                       =     endpoint               t         =                  adx@702d3800              nvidia,tegra210-adx          p-8            ADX1            Eokay             =  g   ports                        +       port@0                  endpoint               u         =            port@1                       =     endpoint               v         =            port@2                       =     endpoint               w         =            port@3                       =      endpoint               x         =            port@4                       =  !   endpoint               y         =                  adx@702d3900              nvidia,tegra210-adx          p-9            ADX2            Eokay             =  h   ports                        +       port@0                  endpoint               z         =            port@1                       =  "   endpoint               {         =            port@2                       =  #   endpoint               |         =            port@3                       =  $   endpoint               }         =            port@4                       =  %   endpoint               ~         =                  dmic@702d4000             nvidia,tegra210-dmic             p-@                           dmic                                         .         DMIC1           Eokay             =  i   ports                        +       port@0                  endpoint                        =            port@1                       =  2   endpoint             =  j               dmic@702d4100             nvidia,tegra210-dmic             p-A                           dmic                                         .         DMIC2           Eokay             =  k   ports                        +       port@0                  endpoint                        =            port@1                       =  3   endpoint             =  l               dmic@702d4200             nvidia,tegra210-dmic             p-B                           dmic                                         .         DMIC3           Eokay             =  m   ports                        +       port@0                  endpoint                        =            port@1                       =  4   endpoint             =  n               processing-engine@702d8000            nvidia,tegra210-ope          p-                         +                     OPE1            Eokay             =  o   equalizer@702d8100            nvidia,tegra210-peq          p-          dynamic-range-compressor@702d8200             nvidia,tegra210-mbdrc            p-          ports                        +       port@0                  endpoint                        =            port@1                       =  +   endpoint                        =                  processing-engine@702d8400            nvidia,tegra210-ope          p-                         +                     OPE2            Eokay             =  p   equalizer@702d8500            nvidia,tegra210-peq          p-          dynamic-range-compressor@702d8600             nvidia,tegra210-mbdrc            p-          ports                        +       port@0                  endpoint                        =            port@1                       =  ,   endpoint                        =                  mvc@702da000              nvidia,tegra210-mvc          p-            MVC1            Eokay             =  q   ports                        +       port@0                  endpoint                        =            port@1                       =     endpoint                        =                  mvc@702da200              nvidia,tegra210-mvc          p-            MVC2            Eokay             =  r   ports                        +       port@0                  endpoint                        =            port@1                       =     endpoint                        =                  amixer@702dbb00           nvidia,tegra210-amixer           p-            MIXER1          Eokay             =  s   ports                        +       port@0                  endpoint                        =            port@1                 endpoint                        =            port@2                 endpoint                        =            port@3                 endpoint                        =            port@4                 endpoint                        =            port@5                 endpoint                        =            port@6                 endpoint                        =            port@7                 endpoint                        =            port@8                 endpoint                        =            port@9              	   endpoint                        =            port@a              
         =  &   endpoint                        =            port@b                       =  '   endpoint                        =            port@c                       =  (   endpoint                        =            port@d                       =  )   endpoint                        =            port@e                       =  *   endpoint                        =                  ports                        +       port@0                  endpoint                        =   T         port@1                 endpoint                        =   U         port@2                 endpoint                        =   V         port@3                 endpoint                        =   W         port@4                 endpoint                        =   X         port@5                 endpoint                        =   Y         port@6                 endpoint                        =   Z         port@7                 endpoint                        =   [         port@8                 endpoint                        =   \         port@9              	   endpoint                        =   ]         port@a              
         =      endpoint                        =   ^         port@b                       =      endpoint                        =   _         port@c                       =      endpoint                        =   `         port@d                       =      endpoint                        =   a         port@e                       =      endpoint                        =   b         port@f                       =      endpoint                        =            port@10                      =      endpoint                        =            port@11                      =      endpoint                        =            port@12                      =      endpoint                        =   c         port@13                endpoint                        =   d         port@14                      =      endpoint                        =   e         port@15                endpoint                        =   f         port@16                      =      endpoint                        =   g         port@17                endpoint                        =   h         port@18                      =      endpoint                        =   i         port@19                endpoint                        =   j         port@1a                      =      endpoint                        =            port@1b                endpoint                        =            port@1c                      =      endpoint                        =            port@1d                endpoint                        =            port@1e                      =      endpoint                        =   k         port@1f                      =     endpoint                        =   l         port@20                       =     endpoint                        =   m         port@21             !         =     endpoint                        =   n         port@22             "   endpoint                        =   o         port@23             #         =     endpoint                        =   p         port@24             $         =     endpoint                        =   q         port@25             %         =     endpoint                        =   r         port@26             &         =     endpoint                        =   s         port@27             '   endpoint                        =   t         port@28             (         =     endpoint                        =   u         port@29             )   endpoint                        =   v         port@2a             *   endpoint                        =   w         port@2b             +   endpoint                        =   x         port@2c             ,   endpoint                        =   y         port@2d             -         =  	   endpoint                        =   z         port@2e             .   endpoint                        =   {         port@2f             /   endpoint                        =   |         port@30             0   endpoint                        =   }         port@31             1   endpoint                        =   ~         port@32             2         =  
   endpoint                        =            port@33             3         =     endpoint                        =            port@34             4         =     endpoint                        =            port@35             5         =     endpoint                        =            port@36             6         =     endpoint                        =            port@37             7         =     endpoint                        =            port@38             8         =     endpoint                        =            port@39             9         =     endpoint                        =            port@3a             :         =     endpoint                        =            port@3b             ;         =     endpoint                        =            port@3c             <   endpoint                        =            port@3d             =   endpoint                        =            port@3e             >   endpoint                        =            port@3f             ?   endpoint                        =            port@40             @   endpoint                        =            port@41             A         =     endpoint                        =            port@42             B   endpoint                        =            port@43             C         =     endpoint                        =            port@44             D   endpoint                        =                  dma-controller@702e2000           nvidia,tegra210-adma             p.                                                                                                                            !          "          #          $          %          &          '          (          )          *          +          ,          -                             j        d_audio         Eokay             =   S      interrupt-controller@702f9000             nvidia,tegra210-agic                                  p/    p/                     f                         clk         Eokay             =            spi@70410000              nvidia,tegra210-qspi                 pA                         
                        +                                qspi qspi_out                         5   *      *           :rx tx         	  Edisabled          usb@7d000000          )    nvidia,tegra210-ehci nvidia,tegra30-ehci                 }         @                            utmi                           usb                       usb                  	  Edisabled          usb-phy@7d000000          /    nvidia,tegra210-usb-phy nvidia,tegra30-usb-phy                }         @     }         @         utmi                                       reg pll_u utmi-pads                             usb utmi-pads                       +           B           W           m   	                                                                       	  Edisabled             =         usb@7d004000          )    nvidia,tegra210-ehci nvidia,tegra30-ehci                 } @       @                            utmi                   :        usb               :        usb                  	  Edisabled          usb-phy@7d004000          /    nvidia,tegra210-usb-phy nvidia,tegra30-usb-phy                } @       @     }         @         utmi                   :                    reg pll_u utmi-pads               :              usb utmi-pads                       +           B           W           m   	                                                              	  Edisabled             =         cpus                         +       cpu@0            cpu           arm,cortex-a57                             &                      cpu_g pll_x pll_p dfll                              #           4psci             =         cpu@1            cpu           arm,cortex-a57                                 #           4psci             =         cpu@2            cpu           arm,cortex-a57                                 #           4psci             =         cpu@3            cpu           arm,cortex-a57                                 #           4psci             =         idle-states         Bpsci       cpu-sleep             arm,idle-state          O@          f   d        w                              
  cpu-sleep           Eokay             =            l2-cache              cache                                =            pmu           arm,cortex-a57-pmu        0                                                                     sound           Eokay                                 pll_a plla_out0                           x                                          !    nvidia,tegra210-audio-graph-card         4                                                                                               	  
                                               !  "  #  $  %  &  '  (  )  *  +  ,  -  .  /  0  1  2  3  4        NVIDIA Jetson TX1 APE         thermal-zones      cpu-thermal                                 5       trips      cpu-shutdown-trip             d        ,          	   critical          throttle-trip                     ,           hot          =  t      critical              x        ,          	   critical             =  6      hot           p        ,           hot          =  8      active             P        ,           active           =  9      passive            u0        ,           passive          =  :         cooling-maps       map0            7  6        <  7            map1            <  7              7  8      map2            <  7              7  9      map3            <  7                7  :            mem-thermal                                   5      trips      mem-nominal-trip               P        ,           passive          =  ;      mem-throttle-trip             p        ,           active           =  <      mem-hot-trip                      ,           hot       mem-shutdown-trip             X        ,          	   critical             cooling-maps       dram-passive            <   (                7  ;      dram-active         <   (              7  <            gpu-thermal                                 5      trips      gpu-shutdown-trip             X        ,          	   critical          throttle-trip                     ,           hot          =  =         cooling-maps       map0            7  =        <  >                  pllx-thermal                                      5      trips      pllx-shutdown-trip            X        ,          	   critical          pllx-throttle-trip                    ,           hot          cooling-maps                timer             arm,armv8-timer       0                                 
                       K      aliases         b/i2c@7000d000/pmic@3c           g/rtc@7000e000           l/serial@70006000            t/serial@70006300            |/usb@70090000/ethernet@1          chosen          serial0:115200n8          reserved-memory                      +                   memory@80000000          memory                               clock-32k             fixed-clock                    	             =   2      psci              arm,psci-0.2            ;smc       regulator-vdd-gpu             pwm-regulator              -     @        VDD_GPU          
p         $@        ^   @               x   P        \                      =   &      gpio-keys         
    gpio-keys         
  gpio-keys      key-power           Power           e                    t               key-volume-down         Volume Down         e                    r      key-volume-up         
  Volume Up           e                    s         pwm-fan           pwm-fan            -               ?                        W                    @            X            =  7      regulator-vdd-sys-mux             regulator-fixed         VDD_SYS_MUX          LK@         LK@         6         J         =  @      regulator-vdd-5v0-sys             regulator-fixed         VDD_5V0_SYS          LK@         LK@         6         J           @                          @         =   1      regulator-vdd-3v3-sys             regulator-fixed         VDD_3V3_SYS          2Z         2Z         6         J           @                          @        \            =   ,      regulator-vdd-5v0-io              regulator-fixed         VDD_5V0_IO_SYS           LK@         LK@         6         J         =         regulator-vdd-3v3-sd              regulator-fixed         VDD_3V3_SD           2Z         2Z                                      ,        \           =   H      regulator-vdd-dsi-csi             regulator-fixed         AVDD_DSI_CSI_1V2             O         O          A         =         regulator-vdd-3v3-dis             regulator-fixed         VDD_DIS_3V3_LCD          2Z         2Z         6          B                           ,         =  u      regulator-vdd-1v8-dis             regulator-fixed         VDD_LCD_1V8_DIS          w@         w@         6          B   	                                 =  v      regulator-vdd-5v0-rtl             regulator-fixed         RTL_5V           LK@         LK@              9                        1         =   A      regulator-vdd-usb-vbus            regulator-fixed         USB_VBUS_EN1             LK@         LK@                                      1         =   B      regulator-vdd-hdmi            regulator-fixed         VDD_HDMI_5V0             LK@         LK@          B                           1         =   $      regulator-vdd-cam-1v2             regulator-fixed         vdd-cam-1v2          O         O          C   
                        ,         =  w      regulator-vdd-cam-2v8             regulator-fixed         vdd-cam-2v8          *         *          B                           ,         =  x      regulator-vdd-cam-1v8             regulator-fixed         vdd-cam-1v8          w@         w@          C   	                        ,         =  y      regulator-vdd-usb-vbus-otg            regulator-fixed         USB_VBUS_EN0             LK@         LK@                                      1         =   ?      regulator-vdd-fan             regulator-fixed         VDD_FAN          LK@         LK@          B                 1        \           =  ?      __symbols__         /opp-table-dvfs0            /opp-table-dvfs1             )/host1x@50000000/dpaux@54040000       +  0/host1x@50000000/dpaux@54040000/pinmux-aux        +  A/host1x@50000000/dpaux@54040000/pinmux-i2c        +  R/host1x@50000000/dpaux@54040000/pinmux-off          c/host1x@50000000/dsi@54300000           h/host1x@50000000/dsi@54400000           m/host1x@50000000/sor@54540000           r/host1x@50000000/sor@54580000            w/host1x@50000000/dpaux@545c0000       +  }/host1x@50000000/dpaux@545c0000/pinmux-aux        +  /host1x@50000000/dpaux@545c0000/pinmux-i2c        +  /host1x@50000000/dpaux@545c0000/pinmux-off          /interrupt-controller@50041000          /interrupt-controller@60004000          /clock@60006000         /gpio@6000d000          /dma-controller@60020000            /pinmux@700008d4          '  /pinmux@700008d4/pinmux-sdmmc1-1v8-drv        '  /pinmux@700008d4/pinmux-sdmmc1-3v3-drv        '  /pinmux@700008d4/pinmux-sdmmc2-1v8-drv        '  /pinmux@700008d4/pinmux-sdmmc3-1v8-drv        '  	/pinmux@700008d4/pinmux-sdmmc3-3v3-drv        '  /pinmux@700008d4/pinmux-sdmmc4-1v8-drv          '/pinmux@700008d4/pinmux       (  2/pinmux@700008d4/pinmux-dvfs-pwm-active       *  H/pinmux@700008d4/pinmux-dvfs-pwm-inactive           `/serial@70006000            f/serial@70006040            l/serial@70006200            r/serial@70006300            x/pwm@7000a000         $  |/i2c@7000c000/temperature-sensor@4c         /i2c@7000c400/gpio@74           /i2c@7000c400/gpio@77           x/i2c@7000c400/backlight@2c          /i2c@7000c700           /i2c@7000d000/pmic@3c           /i2c@7000d000/pmic@3c/pinmux          %  /i2c@7000d000/pmic@3c/regulators/sd0          %  /i2c@7000d000/pmic@3c/regulators/sd1          %  /i2c@7000d000/pmic@3c/regulators/sd2          %  /i2c@7000d000/pmic@3c/regulators/sd3          &  /i2c@7000d000/pmic@3c/regulators/ldo0         &  /i2c@7000d000/pmic@3c/regulators/ldo1         &  /i2c@7000d000/pmic@3c/regulators/ldo2         &  /i2c@7000d000/pmic@3c/regulators/ldo3         &  /i2c@7000d000/pmic@3c/regulators/ldo4         &  /i2c@7000d000/pmic@3c/regulators/ldo5         &  	/i2c@7000d000/pmic@3c/regulators/ldo6         &  /i2c@7000d000/pmic@3c/regulators/ldo7         &  /i2c@7000d000/pmic@3c/regulators/ldo8           (/pmc@7000e400         %  2/pmc@7000e400/pinmux/pex-dpd-disable          $  B/pmc@7000e400/pinmux/pex-dpd-enable          Q/pmc@7000e400/pinmux/sdmmc1-1v8          \/pmc@7000e400/pinmux/sdmmc1-3v3          g/pmc@7000e400/pinmux/sdmmc3-1v8          r/pmc@7000e400/pinmux/sdmmc3-3v3         }/pmc@7000e400/pinmux/gpio-1v8           /pmc@7000e400/pinmux/gpio-3v3           /pmc@7000e400/powergates/aud            /pmc@7000e400/powergates/mpe            /pmc@7000e400/powergates/nvdec          /pmc@7000e400/powergates/sor            /pmc@7000e400/powergates/venc           /pmc@7000e400/powergates/vic            /pmc@7000e400/powergates/xusba          /pmc@7000e400/powergates/xusbb          /pmc@7000e400/powergates/xusbc          /pmc@7000e400/powergates/nvjpg          "/memory-controller@70019000       %  /external-memory-controller@7001b000            /padctl@7009f000          (  /padctl@7009f000/pads/usb2/lanes/usb2-0         /thermal-sensor@700e2000          -  /thermal-sensor@700e2000/throttle-cfgs/heavy            /mipi@700e3000          /clock@70110000       !  /aconnect@702c0000/ahub@702d0800          1  #/aconnect@702c0000/ahub@702d0800/admaif@702d0000          >  0/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@0         G  =/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@0/endpoint        >  H/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@1         G  U/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@1/endpoint        >  `/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@2         G  m/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@2/endpoint        >  x/aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@3         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@3/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@4         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@4/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@5         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@5/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@6         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@6/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@7         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@7/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@8         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@8/endpoint        >  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@9         G  /aconnect@702c0000/ahub@702d0800/admaif@702d0000/ports/port@9/endpoint        .  "/aconnect@702c0000/ahub@702d0800/i2s@702d1000         D  -/aconnect@702c0000/ahub@702d0800/i2s@702d1000/ports/port@0/endpoint       ;  9/aconnect@702c0000/ahub@702d0800/i2s@702d1000/ports/port@1        D  C/aconnect@702c0000/ahub@702d0800/i2s@702d1000/ports/port@1/endpoint       .  O/aconnect@702c0000/ahub@702d0800/i2s@702d1100         D  Z/aconnect@702c0000/ahub@702d0800/i2s@702d1100/ports/port@0/endpoint       ;  f/aconnect@702c0000/ahub@702d0800/i2s@702d1100/ports/port@1        D  p/aconnect@702c0000/ahub@702d0800/i2s@702d1100/ports/port@1/endpoint       .  |/aconnect@702c0000/ahub@702d0800/i2s@702d1200         D  /aconnect@702c0000/ahub@702d0800/i2s@702d1200/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/i2s@702d1200/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/i2s@702d1200/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/i2s@702d1300         D  /aconnect@702c0000/ahub@702d0800/i2s@702d1300/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/i2s@702d1300/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/i2s@702d1300/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/i2s@702d1400         D  /aconnect@702c0000/ahub@702d0800/i2s@702d1400/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/i2s@702d1400/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/i2s@702d1400/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/sfc@702d2000         D  /aconnect@702c0000/ahub@702d0800/sfc@702d2000/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/sfc@702d2000/ports/port@1        D  +/aconnect@702c0000/ahub@702d0800/sfc@702d2000/ports/port@1/endpoint       .  ;/aconnect@702c0000/ahub@702d0800/sfc@702d2200         D  F/aconnect@702c0000/ahub@702d0800/sfc@702d2200/ports/port@0/endpoint       ;  U/aconnect@702c0000/ahub@702d0800/sfc@702d2200/ports/port@1        D  c/aconnect@702c0000/ahub@702d0800/sfc@702d2200/ports/port@1/endpoint       .  s/aconnect@702c0000/ahub@702d0800/sfc@702d2400         D  ~/aconnect@702c0000/ahub@702d0800/sfc@702d2400/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/sfc@702d2400/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/sfc@702d2400/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/sfc@702d2600         D  /aconnect@702c0000/ahub@702d0800/sfc@702d2600/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/sfc@702d2600/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/sfc@702d2600/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/amx@702d3000         D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@0/endpoint       D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@1/endpoint       D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@2/endpoint       D  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@3/endpoint       ;  /aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@4        D  ,/aconnect@702c0000/ahub@702d0800/amx@702d3000/ports/port@4/endpoint       .  8/aconnect@702c0000/ahub@702d0800/amx@702d3100         D  C/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@0/endpoint       D  O/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@1/endpoint       ;  [/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@2        D  i/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@2/endpoint       ;  u/aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@3        D  /aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@3/endpoint       ;  /aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@4        D  /aconnect@702c0000/ahub@702d0800/amx@702d3100/ports/port@4/endpoint       .  /aconnect@702c0000/ahub@702d0800/adx@702d3800         D  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@1/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@2        D  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@2/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@3        D  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@3/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@4        D  "/aconnect@702c0000/ahub@702d0800/adx@702d3800/ports/port@4/endpoint       .  //aconnect@702c0000/ahub@702d0800/adx@702d3900         D  :/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@0/endpoint       ;  E/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@1        D  T/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@1/endpoint       ;  a/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@2        D  p/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@2/endpoint       ;  }/aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@3        D  /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@3/endpoint       ;  /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@4        D  /aconnect@702c0000/ahub@702d0800/adx@702d3900/ports/port@4/endpoint       /  /aconnect@702c0000/ahub@702d0800/dmic@702d4000        E  /aconnect@702c0000/ahub@702d0800/dmic@702d4000/ports/port@0/endpoint          <  /aconnect@702c0000/ahub@702d0800/dmic@702d4000/ports/port@1       E  /aconnect@702c0000/ahub@702d0800/dmic@702d4000/ports/port@1/endpoint          /  /aconnect@702c0000/ahub@702d0800/dmic@702d4100        E  /aconnect@702c0000/ahub@702d0800/dmic@702d4100/ports/port@0/endpoint          <  /aconnect@702c0000/ahub@702d0800/dmic@702d4100/ports/port@1       E  
/aconnect@702c0000/ahub@702d0800/dmic@702d4100/ports/port@1/endpoint          /  /aconnect@702c0000/ahub@702d0800/dmic@702d4200        E  #/aconnect@702c0000/ahub@702d0800/dmic@702d4200/ports/port@0/endpoint          <  0/aconnect@702c0000/ahub@702d0800/dmic@702d4200/ports/port@1       E  ;/aconnect@702c0000/ahub@702d0800/dmic@702d4200/ports/port@1/endpoint          <  H/aconnect@702c0000/ahub@702d0800/processing-engine@702d8000       R  S/aconnect@702c0000/ahub@702d0800/processing-engine@702d8000/ports/port@0/endpoint         I  b/aconnect@702c0000/ahub@702d0800/processing-engine@702d8000/ports/port@1          R  p/aconnect@702c0000/ahub@702d0800/processing-engine@702d8000/ports/port@1/endpoint         <  /aconnect@702c0000/ahub@702d0800/processing-engine@702d8400       R  /aconnect@702c0000/ahub@702d0800/processing-engine@702d8400/ports/port@0/endpoint         I  /aconnect@702c0000/ahub@702d0800/processing-engine@702d8400/ports/port@1          R  /aconnect@702c0000/ahub@702d0800/processing-engine@702d8400/ports/port@1/endpoint         .  /aconnect@702c0000/ahub@702d0800/mvc@702da000         D  /aconnect@702c0000/ahub@702d0800/mvc@702da000/ports/port@0/endpoint       ;  /aconnect@702c0000/ahub@702d0800/mvc@702da000/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/mvc@702da000/ports/port@1/endpoint       .  /aconnect@702c0000/ahub@702d0800/mvc@702da200         D  /aconnect@702c0000/ahub@702d0800/mvc@702da200/ports/port@0/endpoint       ;  
/aconnect@702c0000/ahub@702d0800/mvc@702da200/ports/port@1        D  /aconnect@702c0000/ahub@702d0800/mvc@702da200/ports/port@1/endpoint       1  (/aconnect@702c0000/ahub@702d0800/amixer@702dbb00          G  5/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@0/endpoint        G  B/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@1/endpoint        G  O/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@2/endpoint        G  \/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@3/endpoint        G  i/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@4/endpoint        G  v/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@5/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@6/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@7/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@8/endpoint        G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@9/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@a         G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@a/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@b         G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@b/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@c         G  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@c/endpoint        >  /aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@d         G  "/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@d/endpoint        >  0/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@e         G  @/aconnect@702c0000/ahub@702d0800/amixer@702dbb00/ports/port@e/endpoint        7  N/aconnect@702c0000/ahub@702d0800/ports/port@0/endpoint        7  ^/aconnect@702c0000/ahub@702d0800/ports/port@1/endpoint        7  n/aconnect@702c0000/ahub@702d0800/ports/port@2/endpoint        7  ~/aconnect@702c0000/ahub@702d0800/ports/port@3/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@4/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@5/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@6/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@7/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@8/endpoint        7  /aconnect@702c0000/ahub@702d0800/ports/port@9/endpoint        .  /aconnect@702c0000/ahub@702d0800/ports/port@a         7  /aconnect@702c0000/ahub@702d0800/ports/port@a/endpoint        .  /aconnect@702c0000/ahub@702d0800/ports/port@b         7  /aconnect@702c0000/ahub@702d0800/ports/port@b/endpoint        .  '/aconnect@702c0000/ahub@702d0800/ports/port@c         7  6/aconnect@702c0000/ahub@702d0800/ports/port@c/endpoint        .  C/aconnect@702c0000/ahub@702d0800/ports/port@d         7  R/aconnect@702c0000/ahub@702d0800/ports/port@d/endpoint        .  _/aconnect@702c0000/ahub@702d0800/ports/port@e         7  n/aconnect@702c0000/ahub@702d0800/ports/port@e/endpoint        .  {/aconnect@702c0000/ahub@702d0800/ports/port@f         7  /aconnect@702c0000/ahub@702d0800/ports/port@f/endpoint        /  /aconnect@702c0000/ahub@702d0800/ports/port@10        8  /aconnect@702c0000/ahub@702d0800/ports/port@10/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@11        8  /aconnect@702c0000/ahub@702d0800/ports/port@11/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@12        8  /aconnect@702c0000/ahub@702d0800/ports/port@12/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@13/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@14        8  /aconnect@702c0000/ahub@702d0800/ports/port@14/endpoint       8  */aconnect@702c0000/ahub@702d0800/ports/port@15/endpoint       /  ;/aconnect@702c0000/ahub@702d0800/ports/port@16        8  M/aconnect@702c0000/ahub@702d0800/ports/port@16/endpoint       8  ]/aconnect@702c0000/ahub@702d0800/ports/port@17/endpoint       /  n/aconnect@702c0000/ahub@702d0800/ports/port@18        8  /aconnect@702c0000/ahub@702d0800/ports/port@18/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@19/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@1a        8  /aconnect@702c0000/ahub@702d0800/ports/port@1a/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@1b/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@1c        8  /aconnect@702c0000/ahub@702d0800/ports/port@1c/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@1d/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@1e        8  /aconnect@702c0000/ahub@702d0800/ports/port@1e/endpoint       /  +/aconnect@702c0000/ahub@702d0800/ports/port@1f        8  >/aconnect@702c0000/ahub@702d0800/ports/port@1f/endpoint       /  O/aconnect@702c0000/ahub@702d0800/ports/port@20        8  b/aconnect@702c0000/ahub@702d0800/ports/port@20/endpoint       /  s/aconnect@702c0000/ahub@702d0800/ports/port@21        8  /aconnect@702c0000/ahub@702d0800/ports/port@21/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@22/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@23        8  /aconnect@702c0000/ahub@702d0800/ports/port@23/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@24        8  /aconnect@702c0000/ahub@702d0800/ports/port@24/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@25        8  /aconnect@702c0000/ahub@702d0800/ports/port@25/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@26        8  '/aconnect@702c0000/ahub@702d0800/ports/port@26/endpoint       8  8/aconnect@702c0000/ahub@702d0800/ports/port@27/endpoint       /  I/aconnect@702c0000/ahub@702d0800/ports/port@28        8  [/aconnect@702c0000/ahub@702d0800/ports/port@28/endpoint       8  k/aconnect@702c0000/ahub@702d0800/ports/port@29/endpoint       8  }/aconnect@702c0000/ahub@702d0800/ports/port@2a/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@2b/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@2c/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@2d        8  /aconnect@702c0000/ahub@702d0800/ports/port@2d/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@2e/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@2f/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@30/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@31/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@32        8  1/aconnect@702c0000/ahub@702d0800/ports/port@32/endpoint       /  C/aconnect@702c0000/ahub@702d0800/ports/port@33        8  W/aconnect@702c0000/ahub@702d0800/ports/port@33/endpoint       /  i/aconnect@702c0000/ahub@702d0800/ports/port@34        8  }/aconnect@702c0000/ahub@702d0800/ports/port@34/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@35        8  /aconnect@702c0000/ahub@702d0800/ports/port@35/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@36        8  /aconnect@702c0000/ahub@702d0800/ports/port@36/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@37        8  /aconnect@702c0000/ahub@702d0800/ports/port@37/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@38        8  /aconnect@702c0000/ahub@702d0800/ports/port@38/endpoint       /  '/aconnect@702c0000/ahub@702d0800/ports/port@39        8  ;/aconnect@702c0000/ahub@702d0800/ports/port@39/endpoint       /  M/aconnect@702c0000/ahub@702d0800/ports/port@3a        8  a/aconnect@702c0000/ahub@702d0800/ports/port@3a/endpoint       /  s/aconnect@702c0000/ahub@702d0800/ports/port@3b        8  /aconnect@702c0000/ahub@702d0800/ports/port@3b/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@3c/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@3d/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@3e/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@3f/endpoint       8  /aconnect@702c0000/ahub@702d0800/ports/port@40/endpoint       /  /aconnect@702c0000/ahub@702d0800/ports/port@41        8   /aconnect@702c0000/ahub@702d0800/ports/port@41/endpoint       8   /aconnect@702c0000/ahub@702d0800/ports/port@42/endpoint       /   -/aconnect@702c0000/ahub@702d0800/ports/port@43        8   ?/aconnect@702c0000/ahub@702d0800/ports/port@43/endpoint       8   O/aconnect@702c0000/ahub@702d0800/ports/port@44/endpoint       +   `/aconnect@702c0000/dma-controller@702e2000        1   e/aconnect@702c0000/interrupt-controller@702f9000             j/usb-phy@7d000000            o/usb-phy@7d004000            t/cpus/idle-states/cpu-sleep          ~/cpus/l2-cache        /   /thermal-zones/cpu-thermal/trips/throttle-trip        *   /thermal-zones/cpu-thermal/trips/critical         %   /thermal-zones/cpu-thermal/trips/hot          (   /thermal-zones/cpu-thermal/trips/active       )   /thermal-zones/cpu-thermal/trips/passive          2   /thermal-zones/mem-thermal/trips/mem-nominal-trip         3   /thermal-zones/mem-thermal/trips/mem-throttle-trip        /   /thermal-zones/gpu-thermal/trips/throttle-trip          ! /clock-32k          !
/regulator-vdd-gpu        	  !/pwm-fan            !/regulator-vdd-sys-mux          !"/regulator-vdd-5v0-sys          !./regulator-vdd-3v3-sys          !:/regulator-vdd-5v0-io           !E/regulator-vdd-3v3-sd           !P/regulator-vdd-dsi-csi          !\/regulator-vdd-3v3-dis          !h/regulator-vdd-1v8-dis          !t/regulator-vdd-5v0-rtl          !/regulator-vdd-usb-vbus         !/regulator-vdd-hdmi         !/regulator-vdd-cam-1v2          !/regulator-vdd-cam-2v8          !/regulator-vdd-cam-1v8          !/regulator-vdd-usb-vbus-otg         !/regulator-vdd-fan           	compatible interrupt-parent #address-cells #size-cells model phandle opp-microvolt opp-hz opp-supported-hw opp-suspend opp-peak-kBps device_type reg reg-names interrupts interrupt-names #interrupt-cells interrupt-map-mask interrupt-map bus-range ranges clocks clock-names resets reset-names pinctrl-names pinctrl-0 pinctrl-1 status hvddio-pex-supply dvddio-pex-supply vddio-pex-ctl-supply assigned-addresses nvidia,num-lanes phys phy-names iommus power-domains groups function assigned-clocks assigned-clock-parents assigned-clock-rates avdd-dsi-csi-supply nvidia,outputs nvidia,head nvidia,mipi-calibrate enable-gpios power-supply backlight pinctrl-2 avdd-io-hdmi-dp-supply vdd-hdmi-dp-pll-supply hdmi-supply nvidia,ddc-i2c-bus nvidia,hpd-gpio interrupt-controller vdd-supply #clock-cells #reset-cells operating-points-v2 interconnects interconnect-names #cooling-cells #gpio-cells gpio-controller #dma-cells nvidia,pins nvidia,pull-down-strength nvidia,pull-up-strength nvidia,function nvidia,pull nvidia,tristate nvidia,enable-input nvidia,open-drain nvidia,io-hv reg-shift dmas dma-names device-wakeup-gpios shutdown-gpios #pwm-cells vcc-supply #thermal-sensor-cells clock-frequency label shunt-resistor-micro-ohms dev-ctrl init-brt pwms pwm-names rom-addr rom-val address-width pagesize read-only maxim,fps-event-source maxim,suspend-fps-time-period-us drive-push-pull maxim,active-fps-source maxim,active-fps-power-up-slot maxim,active-fps-power-down-slot drive-open-drain in-ldo0-1-supply in-ldo7-8-supply in-sd3-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-enable-ramp-delay regulator-ramp-delay nvidia,invert-interrupt nvidia,suspend-mode nvidia,cpu-pwr-good-time nvidia,cpu-pwr-off-time nvidia,core-pwr-good-time nvidia,core-pwr-off-time nvidia,core-power-req-active-high nvidia,sys-clock-req-active-high low-power-disable low-power-enable power-source #power-domain-cells hdmi-phandle #iommu-cells nvidia,memory-controller nvidia,model power-domain-names nvidia,xusb-padctl avdd-usb-supply nvidia,pmc avdd-pll-utmip-supply avdd-pll-uerefe-supply dvdd-pex-pll-supply hvdd-pex-pll-e-supply #phy-cells vbus-supply usb-role-switch vbus-gpios id-gpios nvidia,usb2-companion pinctrl-3 nvidia,pad-autocal-pull-up-offset-3v3 nvidia,pad-autocal-pull-down-offset-3v3 nvidia,pad-autocal-pull-up-offset-1v8 nvidia,pad-autocal-pull-down-offset-1v8 nvidia,pad-autocal-pull-up-offset-sdr104 nvidia,pad-autocal-pull-down-offset-sdr104 nvidia,default-tap nvidia,default-trim bus-width cd-gpios wp-gpios vqmmc-supply vmmc-supply non-removable power-gpios nvidia,dqs-trim mmc-hs400-1_8v avddio-usb-supply hvdd-usb-supply nvidia,priority nvidia,cpu-throt-percent nvidia,gpu-throt-level #nvidia,mipi-calibrate-cells clock-output-names nvidia,cf nvidia,ci nvidia,cg nvidia,droop-ctrl nvidia,force-mode nvidia,sample-rate nvidia,pwm-min-microvolts nvidia,pwm-period-nanoseconds nvidia,pwm-to-pmic nvidia,pwm-tristate-microvolts nvidia,pwm-voltage-step-microvolts remote-endpoint sound-name-prefix dai-format phy_type nvidia,phy nvidia,hssync-start-delay nvidia,idle-wait-delay nvidia,elastic-limit nvidia,term-range-adj nvidia,xcvr-setup nvidia,xcvr-lsfslew nvidia,xcvr-lsrslew nvidia,hssquelch-level nvidia,hsdiscon-level nvidia,xcvr-hsslew nvidia,has-utmi-pad-registers clock-latency cpu-idle-states next-level-cache enable-method entry-method arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us wakeup-latency-us idle-state-name cache-level cache-unified interrupt-affinity dais polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend rtc0 rtc1 serial0 serial3 ethernet stdout-path regulator-settling-time-us linux,code wakeup-source fan-supply cooling-levels enable-active-high vin-supply emc_icc_dvfs_opp_table emc_bw_dfs_opp_table dpaux1 state_dpaux1_aux state_dpaux1_i2c state_dpaux1_off dsia dsib sor0 sor1 dpaux state_dpaux_aux state_dpaux_i2c state_dpaux_off gic lic tegra_car apbdma pinmux sdmmc1_1v8_drv sdmmc1_3v3_drv sdmmc2_1v8_drv sdmmc3_1v8_drv sdmmc3_3v3_drv sdmmc4_1v8_drv state_boot dvfs_pwm_active_state dvfs_pwm_inactive_state uarta uartb uartc uartd pwm tmp451 exp1 exp2 hdmi_ddc max77620_default vdd_soc vdd_ddr vdd_pre vdd_1v8 vdd_sys_1v2 vdd_pex_1v05 vddio_sdmmc vdd_cam_hv vdd_rtc vdd_ts_hv vdd_ts avdd_1v05_pll avdd_1v05 tegra_pmc pex_dpd_disable pex_dpd_enable sdmmc1_1v8 sdmmc1_3v3 sdmmc3_1v8 sdmmc3_3v3 gpio_1v8 gpio_3v3 pd_audio pd_nvenc pd_nvdec pd_sor pd_venc pd_vic pd_xusbss pd_xusbdev pd_xusbhost pd_nvjpg emc micro_b soctherm throttle_heavy mipi dfll tegra_ahub tegra_admaif admaif1_port admaif1_ep admaif2_port admaif2_ep admaif3_port admaif3_ep admaif4_port admaif4_ep admaif5_port admaif5_ep admaif6_port admaif6_ep admaif7_port admaif7_ep admaif8_port admaif8_ep admaif9_port admaif9_ep admaif10_port admaif10_ep tegra_i2s1 i2s1_cif_ep i2s1_port i2s1_dap_ep tegra_i2s2 i2s2_cif_ep i2s2_port i2s2_dap_ep tegra_i2s3 i2s3_cif_ep i2s3_port i2s3_dap_ep tegra_i2s4 i2s4_cif_ep i2s4_port i2s4_dap_ep tegra_i2s5 i2s5_cif_ep i2s5_port i2s5_dap_ep tegra_sfc1 sfc1_cif_in_ep sfc1_out_port sfc1_cif_out_ep tegra_sfc2 sfc2_cif_in_ep sfc2_out_port sfc2_cif_out_ep tegra_sfc3 sfc3_cif_in_ep sfc3_out_port sfc3_cif_out_ep tegra_sfc4 sfc4_cif_in_ep sfc4_out_port sfc4_cif_out_ep tegra_amx1 amx1_in1_ep amx1_in2_ep amx1_in3_ep amx1_in4_ep amx1_out_port amx1_out_ep tegra_amx2 amx2_in1_ep amx2_in2_ep amx2_in3_port amx2_in3_ep amx2_in4_port amx2_in4_ep amx2_out_port amx2_out_ep tegra_adx1 adx1_in_ep adx1_out1_port adx1_out1_ep adx1_out2_port adx1_out2_ep adx1_out3_port adx1_out3_ep adx1_out4_port adx1_out4_ep tegra_adx2 adx2_in_ep adx2_out1_port adx2_out1_ep adx2_out2_port adx2_out2_ep adx2_out3_port adx2_out3_ep adx2_out4_port adx2_out4_ep tegra_dmic1 dmic1_cif_ep dmic1_port dmic1_dap_ep tegra_dmic2 dmic2_cif_ep dmic2_port dmic2_dap_ep tegra_dmic3 dmic3_cif_ep dmic3_port dmic3_dap_ep tegra_ope1 ope1_cif_in_ep ope1_out_port ope1_cif_out_ep tegra_ope2 ope2_cif_in_ep ope2_out_port ope2_cif_out_ep tegra_mvc1 mvc1_cif_in_ep mvc1_out_port mvc1_cif_out_ep tegra_mvc2 mvc2_cif_in_ep mvc2_out_port mvc2_cif_out_ep tegra_amixer mixer_in1_ep mixer_in2_ep mixer_in3_ep mixer_in4_ep mixer_in5_ep mixer_in6_ep mixer_in7_ep mixer_in8_ep mixer_in9_ep mixer_in10_ep mixer_out1_port mixer_out1_ep mixer_out2_port mixer_out2_ep mixer_out3_port mixer_out3_ep mixer_out4_port mixer_out4_ep mixer_out5_port mixer_out5_ep xbar_admaif1_ep xbar_admaif2_ep xbar_admaif3_ep xbar_admaif4_ep xbar_admaif5_ep xbar_admaif6_ep xbar_admaif7_ep xbar_admaif8_ep xbar_admaif9_ep xbar_admaif10_ep xbar_i2s1_port xbar_i2s1_ep xbar_i2s2_port xbar_i2s2_ep xbar_i2s3_port xbar_i2s3_ep xbar_i2s4_port xbar_i2s4_ep xbar_i2s5_port xbar_i2s5_ep xbar_dmic1_port xbar_dmic1_ep xbar_dmic2_port xbar_dmic2_ep xbar_dmic3_port xbar_dmic3_ep xbar_sfc1_in_port xbar_sfc1_in_ep xbar_sfc1_out_ep xbar_sfc2_in_port xbar_sfc2_in_ep xbar_sfc2_out_ep xbar_sfc3_in_port xbar_sfc3_in_ep xbar_sfc3_out_ep xbar_sfc4_in_port xbar_sfc4_in_ep xbar_sfc4_out_ep xbar_mvc1_in_port xbar_mvc1_in_ep xbar_mvc1_out_ep xbar_mvc2_in_port xbar_mvc2_in_ep xbar_mvc2_out_ep xbar_amx1_in1_port xbar_amx1_in1_ep xbar_amx1_in2_port xbar_amx1_in2_ep xbar_amx1_in3_port xbar_amx1_in3_ep xbar_amx1_in4_port xbar_amx1_in4_ep xbar_amx1_out_ep xbar_amx2_in1_port xbar_amx2_in1_ep xbar_amx2_in2_port xbar_amx2_in2_ep xbar_amx2_in3_port xbar_amx2_in3_ep xbar_amx2_in4_port xbar_amx2_in4_ep xbar_amx2_out_ep xbar_adx1_in_port xbar_adx1_in_ep xbar_adx1_out1_ep xbar_adx1_out2_ep xbar_adx1_out3_ep xbar_adx1_out4_ep xbar_adx2_in_port xbar_adx2_in_ep xbar_adx2_out1_ep xbar_adx2_out2_ep xbar_adx2_out3_ep xbar_adx2_out4_ep xbar_mixer_in1_port xbar_mixer_in1_ep xbar_mixer_in2_port xbar_mixer_in2_ep xbar_mixer_in3_port xbar_mixer_in3_ep xbar_mixer_in4_port xbar_mixer_in4_ep xbar_mixer_in5_port xbar_mixer_in5_ep xbar_mixer_in6_port xbar_mixer_in6_ep xbar_mixer_in7_port xbar_mixer_in7_ep xbar_mixer_in8_port xbar_mixer_in8_ep xbar_mixer_in9_port xbar_mixer_in9_ep xbar_mixer_in10_port xbar_mixer_in10_ep xbar_mixer_out1_ep xbar_mixer_out2_ep xbar_mixer_out3_ep xbar_mixer_out4_ep xbar_mixer_out5_ep xbar_ope1_in_port xbar_ope1_in_ep xbar_ope1_out_ep xbar_ope2_in_port xbar_ope2_in_ep xbar_ope2_out_ep adma agic phy1 phy2 CPU_SLEEP L2 cpu_throttle_trip cpu_trip_critical cpu_trip_hot cpu_trip_active cpu_trip_passive dram_nominal dram_throttle gpu_throttle_trip clk32k_in vdd_gpu fan vdd_sys_mux vdd_5v0_sys vdd_3v3_sys vdd_5v0_io vdd_3v3_sd vdd_dsi_csi vdd_3v3_dis vdd_1v8_dis vdd_5v0_rtl vdd_usb_vbus vdd_hdmi vdd_cam_1v2 vdd_cam_2v8 vdd_cam_1v8 vdd_usb_vbus_otg vdd_fan 