     8     (            
  ݈                                                                   )   ,DH electronics i.MX8M Plus DHCOM PicoITX          7   2dh,imx8mp-dhcom-picoitx dh,imx8mp-dhcom-som fsl,imx8mp     aliases       &   =/soc@0/bus@30800000/ethernet@30bf0000         &   G/soc@0/bus@30800000/ethernet@30be0000         "   Q/soc@0/bus@30000000/gpio@30200000         "   W/soc@0/bus@30000000/gpio@30210000         "   ]/soc@0/bus@30000000/gpio@30220000         "   c/soc@0/bus@30000000/gpio@30230000         "   i/soc@0/bus@30000000/gpio@30240000         !   o/soc@0/bus@30800000/i2c@30a20000          !   t/soc@0/bus@30800000/i2c@30a30000          !   y/soc@0/bus@30800000/i2c@30a40000          !   ~/soc@0/bus@30800000/i2c@30a50000          !   /soc@0/bus@30800000/i2c@30ad0000          !   /soc@0/bus@30800000/i2c@30ae0000          !   /soc@0/bus@30800000/mmc@30b40000          !   /soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30bb0000          (   /soc@0/bus@30800000/i2c@30a40000/rtc@51       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                       !  
        2          D            cpu@0           Lcpu          2arm,cortex-a53          X            \             cpsci            q           ~   @                                 @                                         speed_grade                                          *           D      thermal-idle                       5  '                  D            cpu@1           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D      thermal-idle                       5  '                  D            cpu@2           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D      thermal-idle                       5  '                  D            cpu@3           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D      thermal-idle                       5  '                  D            l2-cache0            2cache            A        O           s              @                   D            opp-table            2operating-points-v2          [        D      opp-1200000000          f    G         m P        {              I               opp-1600000000          f    _^         m ~        {               I               opp-1800000000          f    kI         m B@        {                I                  clock-osc-32k            2fixed-clock                                osc_32k         D   <      clock-osc-24m            2fixed-clock                     n6         osc_24m         D   =      clock-ext1           2fixed-clock                     k@      	  clk_ext1            D   >      clock-ext2           2fixed-clock                     k@      	  clk_ext2            D   ?      clock-ext3           2fixed-clock                     k@      	  clk_ext3            D   @      clock-ext4           2fixed-clock                     k@      	  clk_ext4            D   A      funnel           2arm,coresight-static-funnel    in-ports                                 port@0          X       endpoint                       D            port@1          X      endpoint               	        D            port@2          X      endpoint               
        D            port@3          X      endpoint                       D               out-ports      port       endpoint                       D                   reserved-memory                                      dsp@92400000            X    @                        	  disabled             pmu          2arm,cortex-a53-pmu                        psci             2arm,psci-1.0             smc       thermal-zones      cpu-thermal         	                     -         trips      trip0           = L        I          Spassive         D         trip1           = s        I        	  Scritical             cooling-maps       map0            T           Y                               2          2          2          2            soc-thermal         	                     -          trips      trip0           = L        I          Spassive         D         trip1           = s        I        	  Scritical             cooling-maps       map0            T           Y                               2          2          2          2               timer            2arm,armv8-timer       0                                
           z          h      soc@0            2fsl,imx8mp-soc simple-bus                                                >                      soc_unique_id      etm@28440000          "   2arm,coresight-etm4x arm,primecell           X(D                        \      ]      	  apb_pclk       out-ports      port       endpoint                       D                  etm@28540000          "   2arm,coresight-etm4x arm,primecell           X(T                        \      ]      	  apb_pclk       out-ports      port       endpoint                       D   	               etm@28640000          "   2arm,coresight-etm4x arm,primecell           X(d                        \      ]      	  apb_pclk       out-ports      port       endpoint                       D   
               etm@28740000          "   2arm,coresight-etm4x arm,primecell           X(t                        \      ]      	  apb_pclk       out-ports      port       endpoint                       D                  funnel@28c03000       +   2arm,coresight-dynamic-funnel arm,primecell          X(0            \      ]      	  apb_pclk       in-ports                                 port@0          X       endpoint                        D            port@1          X      endpoint             port@2          X      endpoint                out-ports      port       endpoint               !        D   "               etf@28c04000              2arm,coresight-tmc arm,primecell         X(@            \      ]      	  apb_pclk       in-ports       port       endpoint               "        D   !            out-ports      port       endpoint               #        D   $               etr@28c06000              2arm,coresight-tmc arm,primecell         X(`            \      ]      	  apb_pclk       in-ports       port       endpoint               $        D   #               bus@30000000             2fsl,aips-bus simple-bus         X0    @                                       gpio@30200000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0                     @          A           \                                                         %                Y  DHCOM-G     DHCOM-I PicoITX-HW0 PicoITX-HW2 DHCOM-B DHCOM-A  DHCOM-H                                D   U      gpio@30210000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0!                    B          C           \                                                         %       #         4             PicoITX-HW1         DHCOM-INT                    D   h      gpio@30220000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0"                    D          E           \                                                          %       8      %               F                SOM-HW0        SOM-MEM0 SOM-MEM1 SOM-MEM2 SOM-HW2                 D   X      gpio@30230000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0#                    F          G           \                                                         %       R          3                     SOM-HW1        PicoITX-Out2              D   R      gpio@30240000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0$                    H          I           \                                                         %       r         B    PicoITX-In2                    PicoITX-In1 PicoITX-Out1                   D   F      tmu@30260000             2fsl,imx8mp-tmu          X0&             \                &        calib                      D         watchdog@30280000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0(                    N           \             okay            default            '               watchdog@30290000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0)                    O           \           	  disabled          watchdog@302a0000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0*                    
           \           	  disabled          timer@302d0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0-                    7           \                    ipg per       timer@302e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0.                    6           \                    ipg per       timer@302f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0/                    5           \                    ipg per       pinctrl@30330000             2fsl,imx8mp-iomuxc           X03           L     (   )   *   +   ,   -   .   /   0   1   2   3   4   5   6   7   8   9   :        default         D   %   dhcom-a-grp         0   8                         D   (      dhcom-b-grp         0   4                         D   )      dhcom-c-grp         0    0                      D   *      dhcom-d-grp         0                          D   +      dhcom-e-grp         0                           D   ,      dhcom-f-grp         0  $                        D   -      dhcom-g-grp         0     t                       D   .      dhcom-h-grp         0   @                         D   /      dhcom-i-grp         0   (                         D         dhcom-j-grp         0   ,                         D   0      dhcom-k-grp         0                           D   1      dhcom-l-grp         0   0                         D   2      dhcom-m-grp         0    <                      D   3      dhcom-n-grp         0                           D   4      dhcom-o-grp         0                           D   5      dhcom-p-grp         0                           D   6      dhcom-q-grp         0   H                         D   7      dhcom-r-grp         0   D                         D   8      dhcom-s-grp         0   <                         D   9      dhcom-int-grp           0     <                      D   :      dhcom-hog-base-grp          0  8             @    <             @    @             @      x           @                 @    D             @        dhcom-ecspi1-grp          `  0     `  X         D    d  `         D    h  \         D    l              @        D   E      dhcom-ecspi2-grp          `  0    P  h          D    T  p          D    X  l          D    \              @        D   G      dhcom-eqos-rgmii-grp         P  0   T                    X                 l                    p                    h                    d                    `                    \                    x                    t                    |                                                                                   dhcom-eqos-rmii-grp         0   T                    X                 l                    h                    d                    x                   t                    |                                        `             @          D   u      dhcom-ethphy0-grp           0  ,                "        D   w      dhcom-ethphy1-grp         0  0  P                  T                        D   s      dhcom-fec-rgmii-grp        0      x           X                  \    |           `               d               h                  l                  t                  p               x                  |                                                                                                             dhcom-fec-rmii-grp          0  X                  \    |           `               d               p                              x                  |                                        x      @          D   q      dhcom-flexcan1-grp        0  0    8  L        T    4             T        D   M      dhcom-flexcan2-grp        0  0  0               T  4    P        T        D   N      dhcom-flexspi-grp           0     @                  D                   X                   \                   `                  d                      D   o      dhcom-hdmi-grp        0  0  H                T  L                T      dhcom-i2c3-grp        0  0    p         @      t         @          D   O      dhcom-i2c3-gpio-grp       0  0    p                  t                      D   P      dhcom-i2c4-grp        0  0    x         @      |         @          D   Z      dhcom-i2c4-gpio-grp       0  0    x                  |                      D   [      dhcom-i2c5-grp        0  0  @          @    D          @          D   ^      dhcom-i2c5-gpio-grp       0  0  @                  D                        D   _      dhcom-ioexp-grp         0  0                "        D   Y      dhcom-pmic-grp          0                  @          D   T      dhcom-pwm1-grp          0     x                      D   C      dhcom-tc9595-grp          0  0  L             @ F  4               A        D   Q      dhcom-sai3-grp        `  0    $                (                                 ,                     dhcom-touch-grp         0  H             @          D   V      dhcom-uart1-grp       `  0                I                  I               I                  I        D   H      dhcom-uart2-grp       `  0  (              I  ,                 I                 I                   I        D   J      dhcom-uart3-grp       `  0    @           I    D              I    L           I    H              I        D   I      dhcom-uart4-grp       0  0  8               I  <                 I        D   \      dhcom-usb1-grp        0  0   L                   P                        D         dhcom-usdhc1-grp            0                                                                                                                           D   `      dhcom-usdhc1-100mhz-grp         0                                                                                                                           D   a      dhcom-usdhc1-200mhz-grp         0                                                                                                                           D   b      dhcom-usdhc2-grp            0                         $                   (                   ,                   0                   4                 $                        D   d      dhcom-usdhc2-100mhz-grp         0                         $                   (                   ,                   0                   4                 $                        D   f      dhcom-usdhc2-200mhz-grp         0                         $                   (                   ,                   0                   4                 $                        D   g      dhcom-usdhc2-vmmc-grp           0     8                       D         dhcom-usdhc2-gpio-grp           0                @          D   e      dhcom-usdhc3-grp            0  $              (                h              l              p              t              |                L  $             P  (             T  ,             H  0                          A        D   k      dhcom-usdhc3-100mhz-grp         0  $              (                h              l              p              t              |                L  $             P  (             T  ,             H  0                          A        D   l      dhcom-usdhc3-200mhz-grp         0  $              (                h              l              p              t              |                L  $             P  (             T  ,             H  0                          A        D   m      dhcom-wdog-grp          0     |                      D   '         syscon@30340000          2fsl,imx8mp-iomuxc-gpr syscon            X04             D   L      efuse@30350000        )   2fsl,imx8mp-ocotp fsl,imx8mm-ocotp syscon            X05             \                                  unique-id@8         X              D         speed-grade@10          X              D         mac-address@90          X              D   p      mac-address@96          X              D   t      calib@264           X  d           D   &         clock-controller@30360000         $   2fsl,imx8mp-anatop fsl,imx8mm-anatop         X06                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          X07             D   ;   snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         9   ;        @   4                                    \            	  snvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey         9   ;                          \              snvs-pwrkey         G   t         U      	  disabled          snvs-lpgpr        +   2fsl,imx8mp-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mp-ccm          X08                    U          V                      \   <   =   >   ?   @   A      4  osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       (  c      B            g      h            (  s      8      ,      A      8      @                ; / e         D         reset-controller@30390000            2fsl,imx8mp-src syscon           X09                    Y                      D         gpc@303a0000             2fsl,imx8mp-gpc          X0:                                 W                          pgc                              power-domain@0                      X            D         power-domain@1                      X           D         power-domain@2                      X           D         power-domain@3                      X           D         power-domain@4                      X           \      i      j             c     2      i      j        s      A      8      8        ; / ׄ         D         power-domain@5                      X           \          6        c      l      H        s      8      8        ׄ /         D   x      power-domain@6                      X           \                 B        D         power-domain@7                      X           \           f        c      e      f        s      8      8        / ׄ         D   B      power-domain@8                      X           \             D         power-domain@9                      X   	        \           4           B        D         power-domain@10                     X   
        \                  D         power-domain@11                     X           D         power-domain@12                     X           D         power-domain@13                     X           D         power-domain@14                     X           \           c        c      d      c        s      @      3        e k@        D         power-domain@15                     X           D         power-domain@16                     X           D         power-domain@17                     X           \     7             c     7        s      @        e         D         power-domain@18                     X           \             D                  bus@30400000             2fsl,aips-bus simple-bus         X0@   @                                       pwm@30660000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0f                    Q           \                    ipg per                  	  disabled               C        default       pwm@30670000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0g                    R           \                    ipg per                  	  disabled          pwm@30680000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0h                    S           \                    ipg per                  	  disabled          pwm@30690000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0i                    T           \                    ipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            X0j                    /           \   =        per       timer@306e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0n                    3           \                    ipg per       timer@306f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0o                    3           \                    ipg per       timer@30700000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0p                    4           \                    ipg per          bus@30800000             2fsl,aips-bus simple-bus         X0   @                                       spba-bus@30800000            2fsl,spba-bus simple-bus         X0                                          spi@30820000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                               \                    ipg per         Ĵ         c              s      8            D             D                 rx tx         	  disabled            default            E           F            spi@30830000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                                \                    ipg per         Ĵ         c              s      8            D            D                 rx tx         	  disabled            default            G           F            spi@30840000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                    !           \                    ipg per         Ĵ         c              s      8            D            D                 rx tx         	  disabled          serial@30860000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    ipg per             D             D                  rx tx           okay            default            H         U      serial@30880000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    ipg per             D             D                  rx tx           okay            default            I               serial@30890000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    ipg per             D             D                  rx tx           okay            default            J                 c              s      1        Ĵ    bluetooth            2cypress,cyw4373a0-bt               K                 =	       	  disabled             can@308c0000             2fsl,imx8mp-flexcan          X0                               \      n              ipg per         c      t        s      0        bZ                     )   L              okay            default            M      can@308d0000             2fsl,imx8mp-flexcan          X0                               \      n              ipg per         c      u        s      0        bZ                     )   L            	  disabled            default            N         crypto@30900000          2fsl,sec-v4.0                                     X0                 0                    [           \      k      n      	  aclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           X                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           X                      j         jr@3000          2fsl,sec-v4.0-job-ring           X  0                   r            i2c@30a20000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    #           \            	  disabled          i2c@30a30000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    $           \            	  disabled          i2c@30a40000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    %           \              okay                     default gpio               O        7   P        A   F              K   F         bridge@f              2toshiba,tc9595 toshiba,tc358767         default            Q        X           ref         \     ?        c     =     ?      '        s      '         ]@ ]@e         U   R             	  disabled       ports                                port@0          X       endpoint            a                       S        D                  pmic@25          2nxp,pca9450c            X   %        default            T             U                 regulators     BUCK1           l P         B@          5                        BUCK2            ~         P        l P         B@          5                          D         BUCK4           l 2Z         2Z                          D   W      BUCK5           l w@         w@                          D   n      BUCK6           l                                  LDO1            l w@         w@                        LDO3            l w@         w@                        LDO4            l 2Z         2Z      LDO5            l w@         2Z        D   j            adc@48           2ti,ads1015          X   H           K                                   channel@0           X          channel@1           X         channel@2           X         channel@3           X         channel@4           X         channel@5           X         channel@6           X         channel@7           X            touchscreen@49           2ti,tsc2004          X   I           R               default            V           W      eeprom@50            2atmel,24c32         "            X   P      rtc@51           2microcrystal,rv3032         X   Q           K               U      eeprom@53            2atmel,24c32         "            X   S      eeprom@58            2atmel,24c32d-wl         "            X   X      eeprom@5b            2atmel,24c32d-wl         "            X   [      gpio@74          2nxp,pca9539         X   t                               X                                  default            Y         U        BT_REG_EN WL_REG_EN VIO_SWITCHED_#EN RTC_#INT ENET_QOS_#RST RGB_OSZ_ENABLE USB1_ID ADC_ALTER_RDY DHCOM-W DHCOM-V DHCOM-U DHCOM-T BT_HOST_WAKE BT_DEV_WAKE           D   K         i2c@30a50000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    &           \              okay                     default gpio               Z        7   [        A   F              K   F            serial@30a60000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    ipg per             D             D                  rx tx           okay            default            \      mailbox@30aa0000             2fsl,imx8mp-mu fsl,imx6sx-mu         X0                    X           \              +         mailbox@30e60000             2fsl,imx8mp-mu fsl,imx6sx-mu         X0                               +           \   ]   $      	  disabled            D         i2c@30ad0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    L           \              okay                     default gpio               ^        7   _        A   X              K   X            i2c@30ae0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    M           \            	  disabled          mmc@30b40000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             ipg ahb per         7           L           \         	  disabled          "  default state_100mhz state_200mhz              `        7   a        f   b        p   c        {   W                                                        wifi@1          X         '   2cypress,cyw4373-fmac brcm,bcm4329-fmac           mmc@30b50000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             ipg ahb per         7           L           \           okay          "  default state_100mhz state_200mhz              d   e        7   f   e        f   g   e           h              {   i           j      mmc@30b60000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             ipg ahb per         7           L           \           okay          "  default state_100mhz state_200mhz              k        7   l        f   m        {   W           n               spi@30bb0000             2nxp,imx8mp-fspi         X0                   fspi_base fspi_mmap                k           \                    fspi_en fspi            Ĵ         c                                        okay            default            o   flash@0          2jedec,spi-nor           X            Ĵ                                dma-controller@30bd0000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                               \            k        ipg ahb                    imx/sdma/sdma-imx7d.bin         D   D      ethernet@30be0000         -   2fsl,imx8mp-fec fsl,imx8mq-fec fsl,imx6sx-fec            X0           0         v          w          x          y         (  \                                    "  ipg ahb ptp enet_clk_ref enet_out            c      ^                           s      6      :      ;      9             sY@            6           H              p        mac-address         )   L            	  disabled            default            q        Z   r        ermii             n   mdio                                 ethernet-phy@2        4   2ethernet-phy-id0007.c110 ethernet-phy-ieee802.3-c22              R                         s        default         X                               U   R            	  disabled            D   r            ethernet@30bf0000         '   2nxp,imx8mp-dwmac-eqos snps,dwmac-5.10a          X0                                         macirq eth_wake_irq          \                                stmmaceth pclk ptp_ref tx           c      ^                    s      6      :      9                        t        mac-address            L           okay            default            u        Z   v        ermii       mdio             2snps,dwmac-mdio                              ethernet-phy@1        4   2ethernet-phy-id0007.c110 ethernet-phy-ieee802.3-c22         \                   X                         w        default         X                               U   K              okay            D   v      ethernet-phy@5        4   2ethernet-phy-id0022.1642 ethernet-phy-ieee802.3-c22              X                                     w        default         X                               U   K            	  disabled                   bus@30df0000             2fsl,imx8mp-aipstz           X0                x                                            0  0   @          D      spba-bus@30c00000            2fsl,spba-bus simple-bus         X0                                          sai@30c10000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   ]              ]      ]      ]           bus mclk0 mclk1 mclk2 mclk3             y              y                  rx tx                  _         	  disabled          sai@30c20000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   ]             ]      ]      ]           bus mclk0 mclk1 mclk2 mclk3             y             y                  rx tx                  `         	  disabled          sai@30c30000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   ]             ]   	   ]   
   ]           bus mclk0 mclk1 mclk2 mclk3             y             y                  rx tx                  2         	  disabled          sai@30c50000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   ]             ]      ]      ]           bus mclk0 mclk1 mclk2 mclk3             y             y   	               rx tx                  Z         	  disabled          sai@30c60000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   ]             ]      ]      ]           bus mclk0 mclk1 mclk2 mclk3             y   
          y                  rx tx                  Z         	  disabled          sai@30c80000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   ]             ]      ]      ]           bus mclk0 mclk1 mclk2 mclk3             y             y                  rx tx                  o         	  disabled          easrc@30c90000        "   2fsl,imx8mp-easrc fsl,imx8mn-easrc           X0                    z           \   ]           mem            y             y             y             y             y             y             y             y                @  ctx0_rx ctx0_tx ctx1_rx ctx1_tx ctx2_rx ctx2_tx ctx3_rx ctx3_tx         imx/easrc/easrc-imx8mn.bin            @                 	  disabled          audio-controller@30ca0000            2fsl,imx8mp-micfil           X0                       0         m          n          ,          -         (  \   ]      ]   6      &      '            )  ipg_clk ipg_clk_app pll8k pll11k clkext3               y                 rx        	  disabled          aud2htx@30cb0000             2fsl,imx8mp-aud2htx          X0                               \   ]   !        bus            y                  tx        	  disabled          xcvr@30cc0000            2fsl,imx8mp-xcvr          X0     0    0    0            ram regs rxfifo txfifo        $                                         \   ]      ]   &   ]      ]   #        ipg phy spba pll_ipg                y             y                  rx tx           !   ]          	  disabled             dma-controller@30e00000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                        \   ]                ipg ahb                "           imx/sdma/sdma-imx7d.bin       dma-controller@30e10000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                        \   ]                ipg ahb                g           imx/sdma/sdma-imx7d.bin         D   y      clock-controller@30e20000            2fsl,imx8mp-audio-blk-ctrl           X0                                 @  \           {      |      }                       A      &  ahb sai1 sai2 sai3 sai5 sai6 sai7 axi              x        c              p          D   ]         interconnect@32700000            2fsl,imx8mp-noc fsl,imx8m-noc            X2p             \      g        (              z        D      opp-table            2operating-points-v2         D   z   opp-200000000           f           opp-800000000           f    /       opp-1000000000          f    ;             bus@32c00000             2fsl,aips-bus simple-bus         X2   @                                       isi@32e00000             2fsl,imx8mp-isi          X2    @                          *           \                  axi apb         <   {           {         	  disabled       ports                                port@0          X       endpoint               |        D   ~         port@1          X      endpoint               }        D                  isp@32e10000             2fsl,imx8mp-isp          X2                    J            \                            isp aclk hclk pclk             {      {         	  Iisp csi2            <   {          	  disabled       ports                                port@1          X               isp@32e20000             2fsl,imx8mp-isp          X2                    K            \                            isp aclk hclk pclk             {      {         	  Iisp csi2            <   {         	  disabled       ports                                port@1          X               dwe@32e30000             2nxp,imx8mp-dw100            X2                    d           \                  axi ahb            {         csi@32e40000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                               沀         \                            pclk wrap phy axi           c                    s      >                 {           \         	  disabled       ports                                port@0          X          port@1          X      endpoint               ~        D   |               csi@32e50000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                    P           沀         \                            pclk wrap phy axi           c                    s      >                 {           \         	  disabled       ports                                port@0          X          port@1          X      endpoint                       D   }               dsi@32e60000             2fsl,imx8mp-mipi-dsim            X2             \                   bus_clk sclk_mipi           c      b              s      8               n6         mn6                              {          	  disabled            	h             ports                                port@0          X       endpoint                       D            port@1          X      endpoint            a                               D   S               display-controller@32e80000          2fsl,imx8mp-lcdif            X2             \                       pix axi disp_axi                                 {         	  disabled       port       endpoint                       D               display-controller@32e90000          2fsl,imx8mp-lcdif            X2                               \                       pix axi disp_axi               {         	  disabled       port       endpoint                       D               blk-ctrl@32ec0000         !   2fsl,imx8mp-media-blk-ctrl syscon            X2                                    (                                      F  Ibus mipi-dsi1 mipi-csi1 lcdif1 isi mipi-csi2 lcdif2 isp dwe mipi-dsi2                                                                              !            "            #            /  lcdif-rd lcdif-wr isi0 isi1 isi2 isp0 isp1 dwe        @  \                                              &  apb axi cam1 cam2 disp1 disp2 isp phy         0  c      a      b           9     8            (  s      A      8      (      (      @        e          e =                   D   {   bridge@5c            2fsl,imx8mp-ldb          X   \     (         	  ldb lvds            \     I        ldb         c              s      (      	  disabled       ports                                port@0          X       endpoint                       D            port@1          X      endpoint             port@2          X      endpoint                      pcie-phy@32f00000            2fsl,imx8mp-pcie-phy         X2             !                    pciephy perst                                   	  disabled            D         blk-ctrl@32f10000             2fsl,imx8mp-hsio-blk-ctrl syscon         X2     $        \                  	  usb pcie                                    (  Ibus usb usb-phy1 usb-phy2 pcie pcie-phy       @                                                          noc-pcie usb1 usb2 pcie                                D         blk-ctrl@32fc0000             2fsl,imx8mp-hdmi-blk-ctrl syscon         X2           (  \      c                               apb axi ref_266m ref_24m fdcc         (                                      =  Ibus irqsteer lcdif pai pvi trng hdmi-tx hdmi-tx-phy hdcp hrv          0                                              hrv lcdif-hdmi hdcp                  	  disabled            D         interrupt-controller@32fc2000         %   2fsl,imx8mp-irqsteer fsl,imx-irqsteer            X2                    +                                          	   @        \      c        ipg                      	  disabled            D         display-bridge@32fc4000          2fsl,imx8mp-hdmi-pvi         X2@                                                	  disabled       ports                                port@0          X       endpoint                       D            port@1          X      endpoint                       D                  audio-bridge@32fc4800            2fsl,imx8mp-hdmi-pai         X2H                                    \      c        apb                     	  disabled       port       endpoint                       D               display-controller@32fc6000          2fsl,imx8mp-lcdif            X2`                                    \         c             pix axi disp_axi                        	  disabled       port       endpoint                       D               hdmi@32fd8000            2fsl,imx8mp-hdmi-tx          X2   ~                                 \      c                       iahb isfr cec pix           c              s      6                      	         	  disabled       ports                                port@0          X       endpoint                       D            port@1          X         port@2          X      endpoint                       D                  phy@32fdff00             2fsl,imx8mp-hdmi-phy         X2            \      c              apb ref         c              s                                                  	  disabled            D            pcie@33800000            2fsl,imx8mp-pcie         X3   @               dbi config          \          7              pcie pcie_bus pcie_aux          c      x                 s      9                                 Lpci         	!             0                                                 	+           	5                             msi                    	B                       	U                         ~                            }                            |                            {           	c           	v                          !                    apps turnoff            	         	  	pcie-phy          	  disabled          pcie-ep@33800000             2fsl,imx8mp-pcie-ep           X3           3     3             dbi addr_space dbi2 atu         \          7              pcie pcie_bus pcie_aux          c      x                 s      9        	+                             dma         	c                         !                    apps turnoff            	         	  	pcie-phy            	           	         	  disabled          gpu@38000000             2vivante,gc          X8                                 \           4           f        core shader bus reg                    c     3     4        s      A      A        ; ;                    D         gpu@38008000             2vivante,gc          X8                               \                 f        core bus reg                       c     5        s      A        ;                    D         video-codec@38300000             2nxp,imx8mm-vpu-g1           X80                               \             c      r        s      8        /                      video-codec@38310000             2nxp,imx8mq-vpu-g2           X81                               \     
        c      s      +        s      +        )' )'                     blk-ctrl@38330000            2fsl,imx8mp-vpu-blk-ctrl syscon          X83                                            Ibus g1 g2 vc8000e           \          
     	        g1 g2 vc8000e           c      `        s      8        /       0        %      $      &      $      '      $        g1 g2 vc8000e           D         npu@38500000             2vivante,gc          X8P                                 \                i      j        core shader bus reg                               D         interrupt-controller@38800000            2arm,gic-v3          X8     8                                                    	                        D         memory-controller@3d400000           2snps,ddrc-3.80a         X=@   @                          ddr-pmu@3d800000          %   2fsl,imx8mp-ddr-pmu fsl,imx8m-ddr-pmu            X=   @                 b         usb-phy@381f0040             2fsl,imx8mp-usb-phy          X8 @   @        \              phy         c              s                                        okay            D         usb@32f10100             2fsl,imx8mp-dwc3         X2    8              \          @        hsio suspend                                                                      	@   @                     	  disabled       usb@38100000          
   2snps,dwc3           X8             \                 @        bus_early ref suspend                  (           	              	usb2-phy usb3-phy            	         	        	otg       	  disabled             usb-phy@382f0040             2fsl,imx8mp-usb-phy          X8/ @   @        \              phy         c              s                                        okay            D         usb@32f10108             2fsl,imx8mp-dwc3         X2   8/              \          @        hsio suspend                                                                      	@   @                       okay             
   usb@38200000          
   2snps,dwc3           X8              \                 @        bus_early ref suspend                  )           	              	usb2-phy usb3-phy            	         	        default                    	host            okay            
#high-speed           dsp@3b6e8000             2fsl,imx8mp-hifi4            X;n            \   ]      ]       ]      ]           ipg ocram core debug               x        
1tx rx rxdb        $  
<                                       imx/dsp/hifi4.bin           !   ]         	  runstall            
C                   	  disabled             memory@40000000         Lmemory          X    @                regulator-eth-vio            2regulator-fixed         
V   K                                l 2Z         2Z        
[eth_vio         
j   W      regulator-usdhc2-vmmc            2regulator-fixed          
u        
V   h               
  .        default                     2Z        l 2Z        
[VDD_3V3_SD          
   d        
j   W        D   i      regulator-vdd-3p3v-awo           2regulator-fixed                  l 2Z         2Z        
[VDD_3P3V_AWO          wifi-pwrseq          2mmc-pwrseq-simple           U   K              D   c      chosen        6  
/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         led       
   2gpio-leds      led-0           
           
off       
  
indicator              U                          default             	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us wakeup-latency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache nvmem-cells nvmem-cell-names operating-points-v2 #cooling-cells cpu-idle-states cpu-supply duration-us cache-unified cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names remote-endpoint ranges no-map status interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend cpu clock-names gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output fsl,pins regmap offset linux,keycode wakeup-source assigned-clocks assigned-clock-parents assigned-clock-rates #reset-cells #power-domain-cells power-domains #pwm-cells dmas dma-names cs-gpios uart-has-rtscts shutdown-gpios max-speed fsl,clk-source fsl,stop-mode pinctrl-1 scl-gpios sda-gpios reset-gpios data-lanes regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-always-on regulator-boot-on nxp,dvs-run-voltage nxp,dvs-standby-voltage interrupts-extended vio-supply pagesize #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 mmc-pwrseq vmmc-supply non-removable cap-power-off-card keep-power-in-suspend cd-gpios vqmmc-supply reg-names spi-max-frequency spi-tx-bus-width spi-rx-bus-width #dma-cells fsl,sdma-ram-script-name fsl,num-tx-queues fsl,num-rx-queues phy-handle phy-mode fsl,magic-packet reset-assert-us reset-deassert-us interrupt-names intf_mode micrel,led-mode #access-controller-cells #sound-dai-cells firmware-name fsl,asrc-rate fsl,asrc-format resets #interconnect-cells fsl,blk-ctrl power-domain-names fsl,num-channels samsung,pll-clock-frequency samsung,burst-clock-frequency samsung,esc-clock-frequency interconnects interconnect-names reset-names #phy-cells fsl,channel fsl,num-irqs reg-io-width bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phys phy-names num-ib-windows num-ob-windows dma-ranges snps,gfladj-refclk-lpm-sel-quirk snps,parkmode-disable-ss-quirk dr_mode fsl,over-current-active-low maximum-speed mbox-names mboxes access-controllers gpio regulator-name vin-supply enable-active-high off-on-delay-us startup-delay-us stdout-path color default-state function 