  ԯ   8     (              ´                                                                   "   ,PHYTEC phyBOARD-Polis-i.MX8MM RDK         F   2phytec,imx8mm-phyboard-polis-rdk phytec,imx8mm-phycore-som fsl,imx8mm      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   /soc@0/bus@30800000/i2c@30a20000/rtc@52       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                         
        (            cpu@0           0cpu          2arm,cortex-a53          <            @              Gpsci            U           b   @        t                         @                                                    speed_grade                                          (   
      cpu@1           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                                          (         cpu@2           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                                          (         cpu@3           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                                          (         l2-cache0            2cache                       %        W           d   @        v           (            opp-table            2operating-points-v2          3        (      opp-1200000000          >    G         E P        S              d I         u      opp-1600000000          >    _^         E ~        S              d I         u      opp-1800000000          >    kI         E B@        S              d I         u         clock-osc-32k            2fixed-clock                                osc_32k         (         clock-osc-24m            2fixed-clock                     n6         osc_24m         (         clock-ext1           2fixed-clock                     k@      	  clk_ext1            (         clock-ext2           2fixed-clock                     k@      	  clk_ext2            (         clock-ext3           2fixed-clock                     k@      	  clk_ext3            (         clock-ext4           2fixed-clock                     k@      	  clk_ext4            (         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L                  7passive         (   	      trip1            s                	  7critical            (   h         cooling-maps       map0               	      0  #   
                        usbphynop1          2             2usb-nop-xceiv           @              =              M      2      	  dmain_clk            p           (   Q      usbphynop2          2             2usb-nop-xceiv           @              =              M      2      	  dmain_clk            p           (   U      soc@0            2fsl,imx8mm-soc simple-bus                                    ~            >           @       @                         soc_unique_id           (   i   bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   ~0   0    @          (   j   spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0               ~        (   k   sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    _            @                                  dbus mclk1 mclk2 mclk3                                               rx tx         	  disabled            (   l      sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    `            @                                  dbus mclk1 mclk2 mclk3                                              rx tx         	  disabled            (   m      sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    2            @                                  dbus mclk1 mclk2 mclk3                                              rx tx         	  disabled            (   n      sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            @                                  dbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled            (   o      sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            @                                  dbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled            (   p      audio-controller@30080000            2fsl,imx8mm-micfil           <0           0         m          n          ,          -         (  @                  &      '            )  dipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled            (   q      spdif@30090000           2fsl,imx35-spdif         <0	                             P  @      ^            r                           ^                           :  dcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled            (   r         gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0                     @          A           @                                                                
         r   LED_RED WDOG_INT X_RTC_INT    RESET_ETHPHY CAN_nINT CAN_EN nENABLE_FLATLINK  USB_OTG_VBUS_EN  LED_GREEN LED_BLUE           (   #      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!                    B          C           @                                                                (         R        BT_REG_ON WL_REG_ON BT_DEV_WAKE BT_HOST_WAKE   X_SD2_CD_B       SD2_RESET_B           (   '      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"                    D          E           @                                                                =           (   s      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#                    F          G           @                                                                W          *          FAN miniPCIe_nPERST   COEX1 COEX2           (   [      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$                    H          I           @                                                                w                    ECSPI1_SS0         (          tmu@30260000             2fsl,imx8mm-tmu          <0&             @                         calib                       (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(                    N           @              okay             +        @default         N           (   t      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)                    O           @            	  disabled            (   u      watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*                    
           @            	  disabled            (   v      dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,                    g           @                    dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+                    "           @                    dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (   w      pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             (      fec1grp      h  |   h                    l                                                                                                                                          |                    x                    t                    p                                                            D                         (   H      flexspi0grp         |     \                  `                  t                  x                  |                                        (   D      i2c1grp       0  |                @     |            @         (   /      i2c1gpiogrp       0  |                     |                     (   0      sn65dsi83grp            |   P                          (   1      usdhc3grp          |    p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   A      usdhc3-100mhzgrp           |    p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   B      usdhc3-200mhzgrp           |    p                  d                  h                 l                                                  $                 (                 0                 8                 <                       (   C      wdoggrp         |   0                &        (         btgrp         H  |                          (                    ,             @        (   -      can-engrp           |   L                          (   e      can-intgrp          |   H                          (   $      ecspi1grp         `  |    d                   `                   \                    h                       (   !      ecspi2grp         `  |    t                   p                   l                   x                       (   &      fan0grp         |  |                        (   c      i2c4grp       0  |  ,              @   0              @         (   6      i2c4gpiogrp       0  |  ,                 0                       (   7      leds1grp          H  |   ,                    `                    d                         (   d      pciegrp       H  |                                                               (   Z      regusdhc2vmmcgrp            |     T              @        (   g      rtcgrp          |   4                        (   5      tpmgrp          |     4             @        (   (      uart1grp          `  |                                                        $                       (   )      uart2btgrp        `  |    8                <                   D                @                       (   +      uart3grp          0  |  D             @  H                @        (   *      usbotg1pwrgrp           |   X                          (   f      usbotg1grp          |   \                         (   S      usdhc1grp           |                                                                                                                               (   9      usdhc2gpiogrp           |     8              @        (   <      usdhc2grp           |   8                    <                   @                   D                   H                   L                   P                      (   ;      usdhc2-100mhzgrp            |   8                    <                   @                   D                   H                   L                   P                      (   =      usdhc2-200mhzgrp            |   8                    <                   @                   D                   H                   L                   P                      (   >      wlangrp         |     $                       (   :         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            <04             (   F      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             @                                       (   x   unique-id@4         <              (         speed-grade@10          <              (         calib@3c            <   <           (         mac-address@90          <              (   E         clock-controller@30360000            2fsl,imx8mm-anatop           <06                        (   y      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    @            	  dsnvs-rtc            (   z      snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      @              dsnvs-pwrkey            t                 okay            (   {      snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr          (   |         clock-controller@30380000            2fsl,imx8mm-ccm          <08                    U          V                      @                        4  dosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  =      B            [      ^      `                     M      8      ,      /      8                    ׄ ׄ ,p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09                    Y                      (         gpc@303a0000             2fsl,imx8mm-gpc          <0:                    W                                            (   }   pgc                              power-domain@0                      <            @      X        =      X        M      @        (         power-domain@1                      <           p           @              (   X      power-domain@2                      <           (         power-domain@3                      <           (         power-domain@4                      <           @            Z        =      Y      Z        M      8      8        / ׄ         (         power-domain@5                      <            @      Z                                         p           (   \      power-domain@6                      <           @              =      T        M      8        (   ^      power-domain@7                      <           (   _      power-domain@8                      <           (   `      power-domain@9                      <   	        (   a      power-domain@10                     <   
        @                    =      U      V        M      A      8        e          (   N      power-domain@11                     <           (   O               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   ~0@  0@   @          (   ~   pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f                    Q           @                    dipg per                  	  disabled            (         pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g                    R           @                    dipg per                  	  disabled            (         pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h                    S           @                    dipg per                  	  disabled            (         pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i                    T           @                    dipg per                  	  disabled            (         timer@306a0000           2nxp,sysctr-timer            <0j                    /           @           dper         (            bus@30800000             2fsl,aips-bus simple-bus         <0   @                                   ~0  0   @                   (      spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0              ~        (      spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                               @                    dipg per                                           rx tx           okay                   	           @default         N   !        (      can@0            2microchip,mcp251xfd         @   "             #                      @default         N   $        <             1-            %        (            spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                                @                    dipg per                                          rx tx           okay                              @default         N   &        (      tpm@0         !   2infineon,slb9670 tcg,tpm_tis-spi                 '                      @default         N   (        <                      (            spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                    !           @                    dipg per                                          rx tx         	  disabled            (         serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                            rx tx           okay            =              M      1        @default         N   )         !        (         serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                            rx tx           okay            @default         N   *        (         serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                            rx tx           okay            =              M      1         1        @default         N   +         !        (      bluetooth            2brcm,bcm43438-bt            @   ,        dlpo         >   '               Rhost-wakeup              '           	           b         @default         N   -        l   '               {   .           .            crypto@30900000          2fsl,sec-v4.0                                     <0             ~    0                    [           @      ]      _      	  daclk ipg            (      jr@1000          2fsl,sec-v4.0-job-ring           <                     i         	  disabled            (         jr@2000          2fsl,sec-v4.0-job-ring           <                      j           (         jr@3000          2fsl,sec-v4.0-job-ring           <  0                   r           (            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    #           @              okay                     @default gpio            N   /           0                                            (      pmic@8           2nxp,pf8121a         <      regulators     ldo1                               2Z         2Z        NVCC_SD1 (LDO1)         (      regulator-state-mem                   ldo2                               2Z         w@        NVCC_SD2 (LDO2)         (   @   regulator-state-mem                   ldo3                               &%         &%        VCC_ENET_2V5 (LDO3)         (      regulator-state-mem          0        H &%        h &%         ldo4                               w@         `        VDDA_1V8 (LDO4)         (      regulator-state-mem          0        h `        H `         buck1                                               VDD_SOC_VDDA_PHY_0P8 (BUCK1)            (      regulator-state-mem          0        h         H          buck2                              B@         B@        VDD_GPU_DRAM (BUCK2)            (      regulator-state-mem          0        H B@        h B@         buck3                              B@                 VDD_VPU (BUCK3)         (      regulator-state-mem                   buck4                                               VDD_MIPI_0P9 (BUCK4)            (      regulator-state-mem                   buck5                                               VDD_ARM (BUCK5)         (      regulator-state-mem                   buck6                              w@         w@        VDD_1V8 (BUCK6)         (   2   regulator-state-mem          0        H w@        h w@         buck7                                               NVCC_DRAM_1P1V (BUCK7)          (         vsnvs                              w@         w@        NVCC_SNVS_1P8 (VSNVS)           (               bridge@2d            2ti,sn65dsi83               #   
           @default         N   1        <   -           2      	  disabled            (      ports                                port@0          <       endpoint               3                            (   L         port@2          <      endpoint            (                  eeprom@51            2atmel,24c32                     <   Q           4      rtc@52           2microcrystal,rv3028         <   R             #                      N   5        @default                                       (            i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    $           @            	  disabled            (         i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0                    %           @            	  disabled            (         i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    &           @            	  disabled                     @default gpio            N   6           7                                            (         serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                            rx tx         	  disabled            (         mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0                    X           @                         (         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per                               "           okay            =      y                 ,   8         7         E        @default         N   9   :                                  (      wifi@1           2brcm,bcm4329-fmac           <           (            mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per                               "           okay            =      z                 N   '               W      "  @default state_100mhz state_200mhz           N   ;   <           =   <        b   >   <        l   ?        x   @        (         mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per                               "           okay            =              ׄ                "  @default state_100mhz state_200mhz           N   A           B        b   C         7        (         spi@30bb0000                                       2nxp,imx8mm-fspi         <0                   fspi_base fspi_mmap                k           @                    dfspi_en fspi            okay            @default         N   D        (      flash@0                                   2jedec,spi-nor           <             Ĵ                               (            dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0                               @            ]        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0           0         v          w          x          y         (  @                  u      t      v      "  dipg ahb ptp enet_clk_ref enet_out            =      R      u      t      v         M      6      :      ;      9             sY@                                     E        mac-address            F              okay          	  rgmii-id               G        @default         N   H        (      mdio                                 ethernet-phy@0        	  disabled phy         2ethernet-phy-ieee802.3-c22                   #        5           C           X           <            m   #               y                    (   G               bus@32c00000             2fsl,aips-bus simple-bus         <2   @                                   ~2  2   @          (      lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           <2             @      k                    dpix axi disp_axi            =      k      U      V        M      (      A      8        n6 e                            p   I         	  disabled            (      port       endpoint               J        (   K            dsi@32e10000             2fsl,imx8mm-mipi-dsim            <2             @                    dbus_clk sclk_mipi           =              M      6                          p   I         	  disabled                     (      ports                                port@0          <       endpoint               K        (   J         port@1          <      endpoint               L        (   3               csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2                               @              dmclk            p   I          	  disabled            (      port       endpoint               M        (   P            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2            p   N   N   N   O   O      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  @                                                                  o  dcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     (   I      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2                               =              M      A        -@         @                                dpclk wrap phy axi           p   I         	  disabled            (      ports                                port@0          <          port@1          <      endpoint               P        (   M               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    (           @              =      X        M      @           Q           R            p           okay                     otg                  	           	,           N   S        @default          	P        	\   T        (         usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          	h           <2            (   R      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    )           @              =      X        M      @           U           V            p           okay             	u        host            	           	,           (         usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          	h           <2            (   V      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2             @      h        dref         =      h                 M      :                      	pciephy         2            okay             	        	           	   -        	           (   Y         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0                                                  X           	           @              (   W      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         gpmi-nand bch                             Rbch         @                    dgpmi_io gpmi_bch_apb               W            rx-tx         	  disabled            (         pcie@33800000            2fsl,imx8mm-pcie         <3   @               dbi config                                   0pci         	             0  ~                                               	           
                  z           Rmsi                    
                       
(                         }                            |                            {                            z           
6           
I            @            h      i        dpcie pcie_bus pcie_aux          p   X                            	apps turnoff               Y      	  
Zpcie-phy            okay            =      i      g        M      9      >         沀        @default         N   Z        
d   [   	           (         pcie-ep@33800000             2fsl,imx8mm-pcie-ep           <3           3     3             dbi addr_space dbi2 atu         	                             Rdma         
6           @            h      i        dpcie pcie_bus pcie_aux          p   X                            	apps turnoff               Y      	  
Zpcie-phy            
o           
~         	  disabled            (         gpu@38000000             2vivante,gc          <8                                 @      Z                          dreg bus core shader         =            *        M      *            /         p   \        (         gpu@38008000             2vivante,gc          <8                               @      Z                    dreg bus core            =            *        M      *            /         p   \        (         video-codec@38300000             2nxp,imx8mm-vpu-g1           <80                               @              p   ]            (         video-codec@38310000             2nxp,imx8mq-vpu-g2           <81                               @              p   ]           (         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             p   ^   _   `   a        bus g1 g2 h1            @                        	  dg1 g2 h1            =      c      d        M      +      +        #F #F                    (   ]      interrupt-controller@38800000            2arm,gic-v3          <8     8                                                    	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          dcore pll alt apb             @                  a      b           b        (      opp-table            2operating-points-v2         (   b   opp-25000000            >    }x@      opp-100000000           >           opp-750000000           >    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=   @                 b            memory@40000000         0memory          <    @                regulator-vdd-3v3-s          2regulator-fixed                            2Z         2Z      
  VDD_3V3_S           (   4      chosen        6  
/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         bt-lp-clock          2fixed-clock                    bt_osc_32k                      (   ,      can-clock            2fixed-clock         bZ         can_osc_40m                     (   "      fan       	   2gpio-fan               [               
          2           @default         N   c                 leds          
   2gpio-leds           @default         N   d   led-0           
           
disk               #               
mmc2          led-1           
           
disk               #               
mmc1          led-2           
           
cpu            #             
  
heartbeat            pwr-seq          2mmc-pwrseq-simple           
   d        
   <        m   '              (   8      regulator-can-en             2regulator-fixed         
j   #   	           @default         N   e         2Z         2Z        CAN_EN          
           (   %      regulator-usb-otg1           2regulator-fixed         
j   #                        @default         N   f        usb_otg1_vbus            LK@         LK@        (   T      regulator-usdhc2             2regulator-fixed         
j   '                          N         @default         N   g         2Z         2Z        VSD_3V3         (   ?      regulator-vcc-3v3            2regulator-fixed          2Z         2Z        VCC_3V3         (   .      __symbols__         //cpus/idle-states/cpu-pd-wait           ;/cpus/cpu@0         A/cpus/cpu@1         G/cpus/cpu@2         M/cpus/cpu@3         S/cpus/l2-cache0         Z/opp-table          h/clock-osc-32k          p/clock-osc-24m          x/clock-ext1         /clock-ext2         /clock-ext3         /clock-ext4       '  /thermal-zones/cpu-thermal/trips/trip0        '  /thermal-zones/cpu-thermal/trips/trip1          /usbphynop1         /usbphynop2         /soc@0          /soc@0/bus@30000000       &  /soc@0/bus@30000000/spba-bus@30000000         3  /soc@0/bus@30000000/spba-bus@30000000/sai@30010000        3  /soc@0/bus@30000000/spba-bus@30000000/sai@30020000        3  /soc@0/bus@30000000/spba-bus@30000000/sai@30030000        3  /soc@0/bus@30000000/spba-bus@30000000/sai@30050000        3  /soc@0/bus@30000000/spba-bus@30000000/sai@30060000        @  /soc@0/bus@30000000/spba-bus@30000000/audio-controller@30080000       5  /soc@0/bus@30000000/spba-bus@30000000/spdif@30090000          "   M/soc@0/bus@30000000/gpio@30200000         "   S/soc@0/bus@30000000/gpio@30210000         "   Y/soc@0/bus@30000000/gpio@30220000         "   _/soc@0/bus@30000000/gpio@30230000         "  /soc@0/bus@30000000/gpio@30240000         !  /soc@0/bus@30000000/tmu@30260000          &  /soc@0/bus@30000000/watchdog@30280000         &  /soc@0/bus@30000000/watchdog@30290000         &  /soc@0/bus@30000000/watchdog@302a0000         ,  /soc@0/bus@30000000/dma-controller@302c0000       ,   /soc@0/bus@30000000/dma-controller@302b0000       %  &/soc@0/bus@30000000/pinctrl@30330000          -  -/soc@0/bus@30000000/pinctrl@30330000/fec1grp          1  :/soc@0/bus@30000000/pinctrl@30330000/flexspi0grp          -  K/soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  X/soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          2  j/soc@0/bus@30000000/pinctrl@30330000/sn65dsi83grp         /  |/soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  /soc@0/bus@30000000/pinctrl@30330000/wdoggrp          +  /soc@0/bus@30000000/pinctrl@30330000/btgrp        /  /soc@0/bus@30000000/pinctrl@30330000/can-engrp        0  /soc@0/bus@30000000/pinctrl@30330000/can-intgrp       /  /soc@0/bus@30000000/pinctrl@30330000/ecspi1grp        /  /soc@0/bus@30000000/pinctrl@30330000/ecspi2grp        -  /soc@0/bus@30000000/pinctrl@30330000/fan0grp          -  /soc@0/bus@30000000/pinctrl@30330000/i2c4grp          1  %/soc@0/bus@30000000/pinctrl@30330000/i2c4gpiogrp          .  7/soc@0/bus@30000000/pinctrl@30330000/leds1grp         -  D/soc@0/bus@30000000/pinctrl@30330000/pciegrp          6  Q/soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp         ,  i/soc@0/bus@30000000/pinctrl@30330000/rtcgrp       ,  u/soc@0/bus@30000000/pinctrl@30330000/tpmgrp       .  /soc@0/bus@30000000/pinctrl@30330000/uart1grp         0  /soc@0/bus@30000000/pinctrl@30330000/uart2btgrp       .  /soc@0/bus@30000000/pinctrl@30330000/uart3grp         3  /soc@0/bus@30000000/pinctrl@30330000/usbotg1pwrgrp        0  /soc@0/bus@30000000/pinctrl@30330000/usbotg1grp       /  /soc@0/bus@30000000/pinctrl@30330000/usdhc1grp        3  /soc@0/bus@30000000/pinctrl@30330000/usdhc2gpiogrp        /  /soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp         -  2/soc@0/bus@30000000/pinctrl@30330000/wlangrp          $  ?/soc@0/bus@30000000/syscon@30340000       #  C/soc@0/bus@30000000/efuse@30350000        /  I/soc@0/bus@30000000/efuse@30350000/unique-id@4        2  T/soc@0/bus@30000000/efuse@30350000/speed-grade@10         ,  d/soc@0/bus@30000000/efuse@30350000/calib@3c       2  n/soc@0/bus@30000000/efuse@30350000/mac-address@90         .  ~/soc@0/bus@30000000/clock-controller@30360000         "  /soc@0/bus@30000000/snvs@30370000         .  /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  /soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  /soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  /soc@0/bus@30000000/clock-controller@30380000         .  /soc@0/bus@30000000/reset-controller@30390000         !  /soc@0/bus@30000000/gpc@303a0000          4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  (/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11            1/soc@0/bus@30400000       !  7/soc@0/bus@30400000/pwm@30660000          !  </soc@0/bus@30400000/pwm@30670000          !  A/soc@0/bus@30400000/pwm@30680000          !  F/soc@0/bus@30400000/pwm@30690000          #  K/soc@0/bus@30400000/timer@306a0000          Z/soc@0/bus@30800000       &  `/soc@0/bus@30800000/spba-bus@30800000         3  /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        9  f/soc@0/bus@30800000/spba-bus@30800000/spi@30820000/can@0          3  /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        9  }/soc@0/bus@30800000/spba-bus@30800000/spi@30830000/tpm@0          3  k/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  r/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         $  x/soc@0/bus@30800000/crypto@30900000       ,  /soc@0/bus@30800000/crypto@30900000/jr@1000       ,  /soc@0/bus@30800000/crypto@30900000/jr@2000       ,  /soc@0/bus@30800000/crypto@30900000/jr@3000       !   j/soc@0/bus@30800000/i2c@30a20000          8  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo1       8  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo2       8  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo3       8  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/ldo4       9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck1          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck2          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck3          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck4          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck5          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck6          9  /soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/buck7          9  ,/soc@0/bus@30800000/i2c@30a20000/pmic@8/regulators/vsnvs          +  r/soc@0/bus@30800000/i2c@30a20000/bridge@2d        A  6/soc@0/bus@30800000/i2c@30a20000/bridge@2d/ports/port@0/endpoint          A  @/soc@0/bus@30800000/i2c@30a20000/bridge@2d/ports/port@2/endpoint          (  K/soc@0/bus@30800000/i2c@30a20000/rtc@52       !   o/soc@0/bus@30800000/i2c@30a30000          !   t/soc@0/bus@30800000/i2c@30a40000          !   /soc@0/bus@30800000/i2c@30a50000          $  R/soc@0/bus@30800000/serial@30a60000       %  /soc@0/bus@30800000/mailbox@30aa0000          !  /soc@0/bus@30800000/mmc@30b40000          (  X/soc@0/bus@30800000/mmc@30b40000/wifi@1       !  /soc@0/bus@30800000/mmc@30b50000          !  /soc@0/bus@30800000/mmc@30b60000          !  ^/soc@0/bus@30800000/spi@30bb0000          )  f/soc@0/bus@30800000/spi@30bb0000/flash@0          ,  p/soc@0/bus@30800000/dma-controller@30bd0000       &  5/soc@0/bus@30800000/ethernet@30be0000         :  v/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0           ~/soc@0/bus@32c00000       #  /soc@0/bus@32c00000/lcdif@32e00000        1  /soc@0/bus@32c00000/lcdif@32e00000/port/endpoint          !  /soc@0/bus@32c00000/dsi@32e10000          7  /soc@0/bus@32c00000/dsi@32e10000/ports/port@0/endpoint        7  /soc@0/bus@32c00000/dsi@32e10000/ports/port@1/endpoint        !  /soc@0/bus@32c00000/csi@32e20000          /  /soc@0/bus@32c00000/csi@32e20000/port/endpoint        &  /soc@0/bus@32c00000/blk-ctrl@32e28000         &  /soc@0/bus@32c00000/mipi-csi@32e30000         <  /soc@0/bus@32c00000/mipi-csi@32e30000/ports/port@1/endpoint       !  /soc@0/bus@32c00000/usb@32e40000          %  /soc@0/bus@32c00000/usbmisc@32e40200          !  /soc@0/bus@32c00000/usb@32e50000          %  /soc@0/bus@32c00000/usbmisc@32e50200          &  /soc@0/bus@32c00000/pcie-phy@32f00000           /soc@0/dma-controller@33000000            /soc@0/nand-controller@33002000         %/soc@0/pcie@33800000            +/soc@0/pcie-ep@33800000         4/soc@0/gpu@38000000         ;/soc@0/gpu@38008000         /soc@0/video-codec@38300000         
/soc@0/video-codec@38310000         B/soc@0/blk-ctrl@38330000          %  O/soc@0/interrupt-controller@38800000          "  S/soc@0/memory-controller@3d400000         ,  X/soc@0/memory-controller@3d400000/opp-table         g/regulator-vdd-3v3-s            u/bt-lp-clock            /can-clock        	  /pwr-seq            /regulator-can-en           /regulator-usb-otg1         Y/regulator-usdhc2           /regulator-vcc-3v3           	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output pinctrl-names pinctrl-0 #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency xceiver-supply uart-has-rtscts fsl,dte-mode device-wakeup-gpios interrupt-names max-speed shutdown-gpios vbat-supply vddio-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-max-microvolt regulator-suspend-min-microvolt enable-gpios vcc-supply remote-endpoint data-lanes pagesize aux-voltage-chargeable trickle-resistor-ohms #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width mmc-pwrseq non-removable no-1-8-v cd-gpios disable-wp pinctrl-2 vmmc-supply vqmmc-supply keep-power-in-suspend reg-names spi-rx-bus-width spi-tx-bus-width fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,rx-internal-delay ti,tx-internal-delay reset-gpios reset-assert-us reset-deassert-us samsung,esc-clock-frequency power-domain-names phys fsl,usbmisc adp-disable dr_mode over-current-active-low samsung,picophy-pre-emp-curr-control samsung,picophy-dc-vol-level-adjust srp-disable vbus-supply #index-cells disable-over-current reset-names fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,tx-deemph-gen1 fsl,tx-deemph-gen2 dma-channels bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows stdout-path gpio-fan,speed-map color function linux,default-trigger post-power-on-delay-ms power-off-delay-us startup-delay-us enable-active-high off-on-delay-us cpu_pd_wait A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 cpu_alert0 cpu_crit0 usbphynop1 usbphynop2 soc aips1 spba2 sai1 sai2 sai3 sai5 sai6 micfil spdif1 gpio5 tmu wdog1 wdog2 wdog3 sdma2 sdma3 iomuxc pinctrl_fec1 pinctrl_flexspi0 pinctrl_i2c1 pinctrl_i2c1_gpio pinctrl_sn65dsi83 pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_bt pinctrl_can_en pinctrl_can_int pinctrl_ecspi1 pinctrl_ecspi2 pinctrl_fan pinctrl_i2c4 pinctrl_i2c4_gpio pinctrl_leds pinctrl_pcie pinctrl_reg_usdhc2_vmmc pinctrl_rtc pinctrl_tpm pinctrl_uart1 pinctrl_uart2_bt pinctrl_uart3 pinctrl_usbotg1pwrgrp pinctrl_usbotg1 pinctrl_usdhc1 pinctrl_usdhc2_gpio pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz pinctrl_wlan gpr ocotp imx8mm_uid cpu_speed_grade tmu_calib fec_mac_address anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_hsiomix pgc_pcie pgc_otg1 pgc_otg2 pgc_gpumix pgc_gpu pgc_vpumix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_h1 pgc_dispmix pgc_mipi aips2 pwm1 pwm2 pwm3 pwm4 system_counter aips3 spba1 can0 ecspi3 uart2 crypto sec_jr0 sec_jr1 sec_jr2 reg_nvcc_sd1 reg_nvcc_sd2 reg_vcc_enet reg_vdda_1v8 reg_soc_vdda_phy reg_vdd_gpu_dram reg_vdd_vpu reg_vdd_mipi reg_vdd_arm reg_vdd_1v8 reg_nvcc_dram reg_vsnvs bridge_in bridge_out rv3028 uart4 brcmf flexspi som_flash sdma1 ethphy0 aips4 lcdif lcdif_to_dsim mipi_dsi dsim_from_lcdif mipi_dsi_out csi csi_in disp_blk_ctrl mipi_csi imx8mm_mipi_csi_out usbmisc1 usbotg2 usbmisc2 pcie_phy dma_apbh gpmi pcie0 pcie0_ep gpu_3d gpu_2d vpu_blk_ctrl gic ddrc ddrc_opp_table reg_vdd_3v3_s bt_osc_32k can_osc_40m usdhc1_pwrseq reg_can_en reg_usb_otg1_vbus reg_vcc_3v3 