     8     (            	K                                                                        ,CompuLab i.MX8MM IoT Gateway          ?   2compulab,imx8mm-iot-gateway compulab,imx8mm-ucm-som fsl,imx8mm     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b60000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   /soc@0/bus@30800000/i2c@30a30000/rtc@69       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                         
        (            cpu@0           0cpu          2arm,cortex-a53          <            @              Gpsci            U           b   @        t                         @                                                    speed_grade                                          (   
      cpu@1           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                               (         cpu@2           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                               (         cpu@3           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                               (         l2-cache0            2cache                       %        W           d   @        v           (            opp-table            2operating-points-v2          3        (      opp-1200000000          >    G         E P        S              d I         u      opp-1600000000          >    _^         E ~        S              d I         u      opp-1800000000          >    kI         E B@        S              d I         u         clock-osc-32k            2fixed-clock                                osc_32k         (         clock-osc-24m            2fixed-clock                     n6         osc_24m         (         clock-ext1           2fixed-clock                     k@      	  clk_ext1            (         clock-ext2           2fixed-clock                     k@      	  clk_ext2            (         clock-ext3           2fixed-clock                     k@      	  clk_ext3            (         clock-ext4           2fixed-clock                     k@      	  clk_ext4            (         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            (                  7passive         (   	      trip1            8                	  7critical             cooling-maps       map0               	      0  #   
                        usbphynop1          2             2usb-nop-xceiv           @              =              M      2      	  dmain_clk            p           (   I      usbphynop2          2             2usb-nop-xceiv           @              =              M      2      	  dmain_clk            p           (   K      soc@0            2fsl,imx8mm-soc simple-bus                                    ~            >           @       @                         soc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   ~0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0               ~   sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    _            @                                  dbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    `         8  @                                       &      '      )  dbus mclk0 mclk1 mclk2 mclk3 pll8k pll11k                                               rx tx           okay            default                    =      m        M      &                         sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    2            @                                  dbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            @                                  dbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            @                                  dbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            2fsl,imx8mm-micfil           <0           0         m          n          ,          -         (  @                  &      '            )  dipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled          spdif@30090000           2fsl,imx35-spdif         <0	                             P  @      ^            r                           ^                           :  dcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0                     @          A           @                       	                    *           ;          
           (   -      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!                    B          C           @                       	                    *           ;          (           (   1      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"                    D          E           @                       	                    *           ;          =           (   S      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#                    F          G           @                       	                    *           ;          W            (   \      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$                    H          I           @                       	                    *           ;          w           (   %      tmu@30260000             2fsl,imx8mm-tmu          <0&             @                         calib           G            (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(                    N           @              okay            default                     ]      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)                    O           @            	  disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*                    
           @            	  disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,                    g           @                    dipg ahb         r           }imx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+                    "           @                    dipg ahb         r           }imx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             default                    (      hoggrp        0    H               @  L               @        (         bt0grp        H                           $                   (                      (   0      fec1grp      P     h                    l                 p                    t                    x                    |                                                                                                                                                                                          (   @      gpioledgrp             X                         (   [      i2c1grp       0      |            @                 @         (   )      i2c2grp       0                  @                  @         (   *      i2c3grp       0    $              @   (              @         (   .      i2c4grp       0    ,              @   0              @       pmicgrp            4                 A        (   +      pwmbacklightgrp            \                        (   !      sai2grp             0                   $                                      (                   ,                                           (         uart1grp          0    4              @  8                @        (   &      uart2grp          0    <              @  @                @        (   (      uart3grp          0    D              I  H                 I        (   '      uart4grp          `      t             @    p             @    x          @    l           @        (   /      usdhc1grpgpiogrp                 0              A        (   3      usdhc1grp                                                                                                                                4                       (   2      usdhc1grp100mhzgrp                                                                                                                               4                       (   4      usdhc1grp200mhzgrp                                                                                                                               4                       (   5      usdhc2grpgpiogrp          H       T              A     8              A     X                       (   8      usdhc2grp                <                   @                   D                   H                   L                   P                 8                       (   6      usdhc2grp100mhzgrp               <                   @                   D                   H                   L                   P                 8                       (   7      usdhc2grp200mhzgrp               <                   @                   D                   H                   L                   P                 8                       (   9      usdhc3grp            8             @   <                                                    $                 (                 0                    h                 l                 p                  d                     (   ;      usdhc3grp100mhzgrp           8             @   <                                                    $                 (                 0                    h                 l                 p                  d                     (   <      usdhc3grp200mhzgrp           8             @   <                                                    $                 (                 0                    h                 l                 p                  d                     (   =      wdoggrp            0                        (         ecspi1grp         H      \                   `                   d                       (   #      ecspi1csgrp              h                      (   $      pcie0grp              D               @        (   R      usb9514grp        0      4             @  T               @        (   M         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            <04             (   ?      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             @                                  unique-id@4         <              (         speed-grade@10          <              (         calib@3c            <   <           (         mac-address@90          <              (   >         clock-controller@30360000            2fsl,imx8mm-anatop           <06                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             okay            (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    @            	  dsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      @              dsnvs-pwrkey            t                 okay          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          <08                    U          V                      @                        4  dosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  =      B            [      ^      `                     M      8      ,      /      8                    ׄ ׄ ,p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09                    Y                      (         gpc@303a0000             2fsl,imx8mm-gpc          <0:                    W                                 *      pgc                              power-domain@0                      <            @      X        =      X        M      @        (         power-domain@1                      <           p           @              (   P      power-domain@2                      <           (         power-domain@3                      <           (         power-domain@4                      <           @            Z        =      Y      Z        M      8      8        / ׄ         (          power-domain@5                      <            @      Z                                         p            (   T      power-domain@6                      <           @              =      T        M      8        (   V      power-domain@7                      <           (   W      power-domain@8                      <           (   X      power-domain@9                      <   	        (   Y      power-domain@10                     <   
        @                    =      U      V        M      A      8        e          (   F      power-domain@11                     <           (   G               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   ~0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f                    Q           @                    dipg per                  	  disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g                    R           @                    dipg per                    okay            default            !        (   Z      pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h                    S           @                    dipg per                  	  disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i                    T           @                    dipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            <0j                    /           @           dper          bus@30800000             2fsl,aips-bus simple-bus         <0   @                                   ~0  0   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0              ~   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                               @                    dipg per             "             "                 rx tx           okay            default            #   $           %   	         spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                                @                    dipg per             "            "                 rx tx         	  disabled          spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                    !           @                    dipg per             "            "                 rx tx         	  disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per             "             "                  rx tx         	  disabled            default            &        =              M      1      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per             "             "                  rx tx           okay            default            '      serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per             "             "                  rx tx         	  disabled            default            (        =              M      1         crypto@30900000          2fsl,sec-v4.0                                     <0             ~    0                    [           @      ]      _      	  daclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           <                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           <                      j         jr@3000          2fsl,sec-v4.0-job-ring           <  0                   r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    #           @              okay                     default            )   eeprom@54            2atmel,24c08         <   T                    i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    $           @              okay                     default            *   pmic@4b         <   K         2rohm,bd71837            default            +                    @   ,        dosc       	  pmic_clk                 -                          regulators     BUCK1           &buck1           5 
`        M           e         w                BUCK2           &buck2           5 
`        M           e         w                   B@                 (         BUCK3           &buck3           5 
`        M           e         w      BUCK4           &buck4           5 
`        M           e         w      BUCK5           &buck5           5 
`        M p         e         w      BUCK6           &buck6           5 -        M 2Z         e         w      BUCK7           &buck7           5 }        M p         e         w      BUCK8           &buck8           5 5         M \         e         w      LDO1            &ldo1            5 j         M          e         w      LDO2            &ldo2            5 5         M          e         w      LDO3            &ldo3            5 w@        M 2Z         e         w      LDO4            &ldo4            5         M w@         e         w      LDO5            &ldo5            5 w@        M 2Z      LDO6            &ldo6            5         M w@         e         w      LDO7            &ldo7            5 w@        M 2Z            eeprom@50            2atmel,24c08         <   P                 rtc@69           2abracon,ab1805          <   i         i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0                    %           @            	  disabled                     default            .      i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    &           @            	  disabled          serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per             "             "                  rx tx         	  disabled            default            /        =              M      1            bluetooth            2brcm,bcm4330-bt         default            0         -           1                  1                  1                mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0                    X           @                       mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per         &           ;           K         	  disabled          "  default state_100mhz state_200mhz              2   3        U   4   3        _   5   3         i      mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per         &           ;           K           okay            default            6        U   7   8        _   9   8        w   1                 1                           :                  i      mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per         &           ;           K           okay          "  default state_100mhz state_200mhz              ;        U   <        _   =         i               spi@30bb0000                                       2nxp,imx8mm-fspi         <0                   fspi_base fspi_mmap                k           @                    dfspi_en fspi          	  disabled          dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0                               @            ]        dipg ahb         r           }imx/sdma/sdma-imx7d.bin         (   "      ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0           0         v          w          x          y         (  @                  u      t      v      "  dipg ahb ptp enet_clk_ref enet_out            =      R      u      t      v         M      6      :      ;      9             sY@                                     >        mac-address            ?              okay            default            @      	  rgmii-id               A            mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22          <            (   A               bus@32c00000             2fsl,aips-bus simple-bus         <2   @                                   ~2  2   @     lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           <2             @      k                    dpix axi disp_axi            =      k      U      V        M      (      A      8        n6 e                            p   B         	  disabled       port       endpoint               C        (   D            dsi@32e10000             2fsl,imx8mm-mipi-dsim            <2             @                    dbus_clk sclk_mipi           =              M      6                          p   B         	  disabled       ports                                port@0          <       endpoint               D        (   C         port@1          <      endpoint                   csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2                               @              dmclk            p   B          	  disabled       port       endpoint               E        (   H            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2            p   F   F   F   G   G      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  @                                                                  o  dcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     (   B      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2                               =              M      A        -@         @                                dpclk wrap phy axi           p   B         	  disabled       ports                                port@0          <          port@1          <      endpoint               H        (   E               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    (           @              =      X        M      @        /   I        4   J            p           okay            @host             H         T         `      usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          u           <2            (   J      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    )           @              =      X        M      @        /   K        4   L            p           okay            @host             H         T         `                                      usbhub@1             2usb424,9514         <           default            M                             ethernet@1           2usb424,ec00         <               usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          u           <2            (   L      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2             @   N        dref         =      h                 M      :                      pciephy         2            okay                          -                            (   Q         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0                                                  r                      @              (   O      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         gpmi-nand bch                             bch         @                    dgpmi_io gpmi_bch_apb               O            rx-tx         	  disabled          pcie@33800000            2fsl,imx8mm-pcie         <3   @               dbi config                                   0pci                      0  ~                                                                             z           msi         *           -                       @                         }                            |                            {                            z           N           a            @            h      i        dpcie pcie_bus pcie_aux          p   P                            apps turnoff            /   Q      	  rpcie-phy            okay            default            R        |   S            pcie-ep@33800000             2fsl,imx8mm-pcie-ep           <3           3     3             dbi addr_space dbi2 atu                                      dma         N           @            h      i        dpcie pcie_bus pcie_aux          p   P                            apps turnoff            /   Q      	  rpcie-phy                                	  disabled          gpu@38000000             2vivante,gc          <8                                 @      Z                          dreg bus core shader         =            *        M      *            /         p   T      gpu@38008000             2vivante,gc          <8                               @      Z                    dreg bus core            =            *        M      *            /         p   T      video-codec@38300000             2nxp,imx8mm-vpu-g1           <80                               @              p   U          video-codec@38310000             2nxp,imx8mq-vpu-g2           <81                               @              p   U         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             p   V   W   X   Y        bus g1 g2 h1            @                        	  dg1 g2 h1            =      c      d        M      +      +        #F #F                    (   U      interrupt-controller@38800000            2arm,gic-v3          <8     8                          *                          	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          dcore pll alt apb             @                  a      b      ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=   @                 b            chosen        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         backlight            2pwm-backlight              Z     -                                                 okay          leds          
   2gpio-leds           default            [   heartbeat-led           status             -            
  	heartbeat            clock-pmic           2fixed-clock                              	  pmic_osc            (   ,      regulator-wlreg-on           2regulator-fixed         5 2Z        M 2Z      	  &wlreg_on               1   
            	   d         	(         w        okay          regulator-usdhc2-vmmc            2regulator-fixed         &VSD_3V3         5 2Z        M 2Z           1                	(        	   d        	;  .        (   :      regulator-usdhc3rst          2regulator-fixed         &usdhc3_rst          5 2Z        M 2Z           S                w         	(      regulator-fec1rst            2regulator-fixed       	  &fec1_rst            5 2Z        M 2Z           -   
             w         	(        	           e      regulator-usbhub-ena             2regulator-fixed         &usbhub_ena          5 2Z        M 2Z           \                	(         w      regulator-usbhub-rst             2regulator-fixed         &usbhub_rst          5 2Z        M 2Z           S                	(         w      regulator-uart1-mode             2regulator-fixed         &uart1_mode          5 2Z        M 2Z           \                	(         w      regulator-uart1-duplex           2regulator-fixed         &uart1_duplex            5 2Z        M 2Z           \                	(         w      regulator-uart1-shdn             2regulator-fixed         &uart1_shdn          5 2Z        M 2Z           %                	(         w      regulator-uart1-trmen            2regulator-fixed         &uart1_trmen         5 2Z        M 2Z           \               w      regulator-usdhc2-v           2regulator-fixed       	  &usdhc2_v            5 2Z        M 2Z           -                	(         w      regulator-mpcie2-rst             2regulator-fixed         &mpcie2_rst          5 2Z        M 2Z           S                	(         w      regulator-mpcie2lora-dis             2regulator-fixed         &mpcie2lora_dis          5 2Z        M 2Z           S                	(         w      clock-pcie0-refclk           2fixed-clock                              (   N         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells arm-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status pinctrl-names pinctrl-0 assigned-clock-rates fsl,sai-asynchronous gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges #thermal-sensor-cells fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source #reset-cells #power-domain-cells resets #pwm-cells cs-gpios pagesize rohm,reset-snvs-powered regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on regulator-ramp-delay rohm,dvs-run-voltage rohm,dvs-idle-voltage uart-has-rtscts max-speed device-wakeup-gpios host-wakeup-gpios shutdown-gpios #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 non-removable cd-gpios wp-gpios no-1-8-v vmmc-supply mmc-ddr-1_8v reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle fsl,magic-packet remote-endpoint power-domain-names phys fsl,usbmisc dr_mode hnp-disable srp-disable disable-over-current #index-cells usb-role-switch reset-names fsl,refclk-pad-mode fsl,tx-deemph-gen1 fsl,tx-deemph-gen2 fsl,clkreq-unsupported dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows stdout-path pwms brightness-levels num-interpolated-steps default-brightness-level function linux,default-trigger startup-delay-us enable-active-high off-on-delay-us 