 .   8 @   (            U                              !    Toradex Verdin AM62 on Ivy Board          Y   toradex,verdin-am62-nonwifi-ivy toradex,verdin-am62-nonwifi toradex,verdin-am62 ti,am625                         "            1      chosen           =serial2:115200n8          firmware       optee            linaro,optee-tz          Ismc       psci             arm,psci-1.0             Ismc          P   ~         timer-cl0-cpu0           arm,armv8-timer       0   X                                 
            P         pmu          arm,cortex-a53-pmu           X                  P         system-idle-states     system-partial-io            system-idle-state         	   coff-wake             P         system-deep-sleep            system-idle-state            cmem          P         system-mcu-only          system-idle-state            cmem-mcu-active           P         system-standby           system-idle-state            cstandby          P            bus@f0000             s         simple-bus           "            1           ~                          B       B              `       `              p0      p0             p      p                                                                                                                                 
      0      0             0     0           0       0              1       1              1      1             ;       ;              @      @             C`      C`             D0     D0           D      D             H       H       @      P       P              `       `              p       p                             1                                                              $     +       +        0     C       C              x       x              x      x                  P      bus@4000000           s         simple-bus           "            1            ~                            P      pinctrl@4084000           s         pinctrl-single               @                                                   P      mcu-gpio0-0-default-pins                  @         P   
      mcu-gpio0-1-default-pins                 @         P   /      mcu-gpio0-2-default-pins                 @         P         mcu-gpio0-3-default-pins                 @         P   	      mcu-gpio0-4-default-pins                 @         P   0      mcu-i2c0-default-pins               D @    H @          P         mcu-mcan0-default-pins              8 @    4            P         mcu-uart0-default-pins               @                P         wkup-clkout0-default-pins                           P         wkup-uart0-default-pins              , @    0      $ @    (            P            esm@4100000                    ti,j721e-esm                                                U         P         timer@4800000            ti,am654-timer                                      #           	fck               #            #      	  0reserved             P         timer@4810000            ti,am654-timer                                      0           	fck               0            #      	  0reserved             P         timer@4820000            ti,am654-timer                                      1           	fck               1            #      	  0reserved             P         timer@4830000            ti,am654-timer                                      2           	fck               2            #      	  0reserved             P         serial@4a00000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk          	  0disabled            7default         E            P         i2c@4900000          ti,am64-i2c ti,omap4-i2c                                   X       k            "            1                  j                 j           	fck       	  0disabled            7default         E            P         spi@4b00000          ti,am654-mcspi ti,omap4-mcspi                                  X                   "            1                                             	  0disabled             P         spi@4b10000          ti,am654-mcspi ti,omap4-mcspi                                  X                   "            1                                             	  0disabled             P         interrupt-controller@4210000             ti,sci-intr              !                 O            d                    y                                        h            P         gpio@4201000             ti,am64-gpio ti,keystone-gpio                                                                  X               d        y                                        O                 O            	gpio          "    GPIO2 GPIO3                               7default         E      	   
         P   1   pcie-1-reset-hog                     
               PCIE_1_RESET#                    0okay             P            watchdog@4880000             ti,j7-rti-wdt                                                                    %                  5               	  0reserved             P         can@4e08000          bosch,m_can                                            Lm_can message_ram                                                    
  	hclk cclk            V          @   @   @   @                0okay            7default         E            P         can@4e18000          bosch,m_can                                            Lm_can message_ram                                                    
  	hclk cclk            V          @   @   @   @              	  0disabled             P         m4fss@5000000            ti,am64-m4fss                                              
  Liram dram           e      	           lam62-mcu-m4f0_0-fw                        	        z              0okay                                         P            bus@b00000            s         simple-bus           "            1         x   ~                    $     +       +        0     C       C              x       x              x      x                  P      bus@43000000              s         simple-bus               C                   "            1            ~        C               P      chipid@14             s         ti,am654-chipid                         P         syscon@18            ti,am62-opp-efuse-table syscon                          P   i      ethernet-mac-syscon@200          ti,am62p-cpsw-mac-efuse syscon                          P   I      syscon@4008          ti,am62-usb-phy-ctrl syscon            @            P   B      syscon@4018          ti,am62-usb-phy-ctrl syscon            @            P   D         target-module@2b300050           ti,sysc-omap2 ti,sysc         0       +0 P           +0 T           +0 X               Lrev sysc syss                                                                     r                 r            	fck          "            1            ~        +0        serial@0             ti,am64-uart ti,am654-uart                           X                  0okay            7default         E                                       P            i2c@2b200000             ti,am64-i2c ti,omap4-i2c                 +                   X                   "            1                  k                 k           	fck       	  0disabled             P         rtc@2b1f0000             ti,am62-rtc              +                  X       d                 u         u            	vbus osc32k               u            $         P         watchdog@2b000000            ti,j7-rti-wdt                +                                                     %                  5               	  0reserved             P         r5fss@78000000           ti,am62-r5fss            "            1             ~x       x      x      x                   w           0okay             P      r5f@78000000             ti,am62-r5f          x      x           
  Latcm btcm           e      y           lam62-wkup-r5f0_0-fw         2           A           P                         y        z              0okay                                         P            temperature-sensor@b00000            ti,j7200-vtm                                                       _           \            P   `         sram@70000000         
   mmio-sram                p                   "            1            ~        p               P         interrupt-controller@1800000             arm,gic-v3           "            1             ~        y            d      P                                                                                X      	            P      msi-controller@1820000           arm,gic-v3-its                                r    @                               P            bus@100000           simple-bus           "            1            ~                       P      phy@4044             ti,am654-phy-gmii-sel              @D                       P   H      clock-controller@4130            ti,am62-epwm-tbclk             A0                       P   V      clock-controller@82e0            ti,am62-audio-refclk                                            %                  5                              P         clock-controller@82e4            ti,am62-audio-refclk                                   
        %         
        5                             }x@         P         oldi-io-controller@8600       !   ti,am625-dss-oldi-io-ctrl syscon                            P   S         bus@48000000              s         simple-bus           "            1                     ~    H       H       @                      P      mailbox@4d000000              s         ti,am654-secure-proxy                      Ltarget_data rt scfg       0       M              J`             J@                 rx_012           X       "            P         interrupt-controller@48000000            ti,sci-inta              H                  y             d                                                         D   $                       P         dma-controller@485c0100          ti,am64-dmss-bcdma               H\            L              J             J             K             H`             HJ@             HL              HB                ;  Lgcfg bchanrt rchanrt tchanrt ringrt ring tchan rchan bchan                     !                                 ,            B   !        X   "         P         dma-controller@485c0000          ti,am64-dmss-pktdma              H\             J             J             K              H^             HJ              HL              HC               3  Lgcfg rchanrt tchanrt ringrt ring tchan rchan rflow                     !                                 X   #   $   %   &        n                    B   )   +   -   /   1   3           *   ,   .   2         P            system-controller@44043000            s         ti,k2g-sci                     rx tx                               Ldebug_messages               D0                P      power-controller              s         ti,sci-pm-domain                        P         clock-controller              s         ti,k2g-sci-clk                      P         reset-controller              s         ti,sci-reset                        P            crypto@40900000          ti,am62-sa3ul                @               $                u         u            tx rx1 rx2           "            1            ~    @      @                  P      rng@40910000             inside-secure,safexcel-eip76                 @         }         X                	  0reserved             P            mailbox@43600000                       ti,am654-secure-proxy                      Ltarget_data rt scfg       0       C`             D             D               	  0disabled             P         pinctrl@f4000             s         pinctrl-single                @                                                  P   2   main-epwm0a-default-pins                          P   W      main-epwm0b-default-pins                          P   X      main-epwm1a-default-pins                          P   Y      main-gpio0-0-default-pins                 @         P         main-gpio0-3-default-pins                @         P   6      main-gpio0-4-default-pins                @         P   7      main-gpio0-5-default-pins                @         P   8      main-gpio0-6-default-pins                @         P   9      main-gpio0-7-default-pins                @         P         main-gpio0-11-default-pins              , @         P         main-gpio0-12-default-pins              0 @         P   5      main-gpio0-15-default-pins              < @         P         main-gpio0-16-default-pins              @ @         P         main-gpio0-17-default-pins              D @         P   O      main-gpio0-20-default-pins              P @         P         main-gpio0-21-default-pins              T @         P   o      main-gpio0-22-default-pins              X @         P         main-gpio0-25-default-pins              d @         P   N      main-gpio0-26-default-pins              h @         P         main-gpio0-27-default-pins              l @         P         main-gpio0-29-default-pins              t @         P   n      main-gpio0-30-default-pins              x @         P         main-gpio0-31-default-pins              | @         P   4      main-gpio0-32-default-pins               @         P   m      main-gpio0-34-default-pins               @         P         main-gpio0-35-default-pins               @         P         main-gpio0-36-default-pins               @         P   x      main-gpio0-38-default-pins               @         P   P      main-gpio0-40-default-pins               @         P   s      main-gpio0-41-default-pins               @         P   )      main-gpio0-42-default-pins               @         P   +      main-gpio0-71-default-pins             $ @         P         main-gpio0-72-default-pins             ( @         P         main-gpio1-17-default-pins              @         P         main-gpio1-18-default-pins              @         P   :      main-gpio1-19-default-pins              @         P   j      main-gpio1-48-default-pins             @ @         P   =      main-gpio1-49-default-pins             D @         P         main-gpio1-50-default-pins             T @         P   q      main-i2c0-default-pins              @    @          P         main-i2c1-default-pins              @    @          P   &      main-i2c2-default-pins               @    @         P   '      main-i2c3-default-pins              @   @         P   (      main-system-audio-ext-reflock1-default-pins                        P         main-mcasp0-default-pins                 @    @         @          P   Z      main-mcasp1-default-pins                  @    @         @         P   [      main-mcan0-default-pins             @               P   U      main-mdio1-default-pins            `     \ @          P   M      main-mmc0-default-pins        P       @    @    @    @    @    @    @     @    @    @          P   ;      main-mmc1-default-pins        0     < @   4 @   0 @   , @   ( @   $ @          P   <      main-mmc2-default-pins        8       @    @    @    @    @    @    @          P   A      main-ospi0-default-pins       8             ,      0       @     @     @     @          P   F      main-rgmii1-default-pins          `     L @   P @   T @   X @   H @   D @   4     8     <     @     0     ,            P   G      main-rgmii2-default-pins          `      @    @    @    @    @   | @   l     p     t     x     h     d            P         main-spi1-default-pins                @   $ @   ( @         P   -      main-spi1-cs0-default-pins               @         P   .      main-system-clkout0-default-pins                          P   L      main-system-extint-default-pins             @          P   "      main-uart0-default-pins             @               P         main-uart1-default-pins              @       @             P         main-uart5-default-pins               @        4 @   8           P         main-usb1-default-pins             X            P   E      main-vout-default-pins                                                                                                                                     \     `           P   R      ivy-leds-default-pins         @      @   @   @   @    @    @    @   , @         P   |         esm@420000                     ti,j721e-esm                  B                                             P         timer@2400000             s         ti,am654-timer               @                  X       x                 $           	fck         %      $           5      $                 $            #         P         timer@2410000            ti,am654-timer               A                  X       y                 %           	fck         %      %           5      %                 %            #         P         timer@2420000            ti,am654-timer               B                  X       z                 &           	fck         %      &           5      &                 &            #         P         timer@2430000            ti,am654-timer               C                  X       {                 '           	fck         %      '           5      '                 '            #         P         timer@2440000            ti,am654-timer               D                  X       |                 (           	fck         %      (           5      (                 (            #         P         timer@2450000            ti,am654-timer               E                  X       }                 )           	fck         %      )           5      )                 )            #         P         timer@2460000            ti,am654-timer               F                  X       ~                 *           	fck         %      *           5      *                 *            #         P         timer@2470000            ti,am654-timer               G                  X                        +           	fck         %      +           5      +                 +            #         P         serial@2800000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk            0okay            7default         E            P         serial@2810000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk            0okay            7default         E            P         serial@2820000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk          	  0disabled             P         serial@2830000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk          	  0disabled             P         serial@2840000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk          	  0disabled             P         serial@2850000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk          	  0disabled            7default         E            P         serial@2860000           ti,am64-uart ti,am654-uart                                 X                                                     	fclk          	  0disabled             P         i2c@20000000             ti,am64-i2c ti,omap4-i2c                                     X                   "            1                  f                 f           	fck         0okay            7default         E                     P      dsi@e            toshiba,tc358778                        %                 5                 }x@        7default         E                            	refclk                                                           	  0disabled             P      ports            "            1             P      port@0                  endpoint            $           /   !         P   T         port@1                          tpm@2e        !   st,st33ktpm2xi2c tcg,tpm-tis-i2c                .      pmic@30          ti,tps65219             0        7default         E   "                     X                  ?   #        L   #        Y   #        f   $        r   %        ~   $           $                     regulators     buck1                              P         q        +VDD_CORE (PMIC BUCK1)           P         buck2                              w@         w@        +V1.8 (PMIC BUCK2)           P   %      buck3                                               +VDD_DDR (PMIC BUCK3)            P         ldo1             #                           2Z         2Z        +V3.3_1.8_SD (PMIC LDO1)             P   p      ldo2                               P         P        +VDDR_CORE (PMIC LDO2)           P         ldo3                               w@         w@        +V1.8A (PMIC LDO3)           P         ldo4                               &%         &%        +V2.5_ETH (PMIC LDO4)            P               rtc@32           epson,rx8130                2         P         sensor@48            ti,tmp1075              H      adc@49           ti,tla2024              I         "            1            :            P   }   channel@0                        L           X         channel@1                       L           X         channel@2                       L           X         channel@3                       L           X         channel@4                       L           X         channel@5                       L           X         channel@6                       L           X         channel@7                       L           X            eeprom@50            st,24c02 atmel,24c02            `               P         i2c@20010000             ti,am64-i2c ti,omap4-i2c                                    X                   "            1                  g                 g           	fck         0okay            7default         E   &         P      temperature-sensor@4f            ti,tmp1075              O      eeprom@57            st,24c02 atmel,24c02                W        `            i2c@20020000             ti,am64-i2c ti,omap4-i2c                                    X                   "            1                  h                 h           	fck       	  0disabled            7default         E   '         P         i2c@20030000             ti,am64-i2c ti,omap4-i2c                                    X                   "            1                  i                 i           	fck         0okay            7default         E   (         P      adc@40           ti,ads1119              @        7default         E   )                     X   )           i   *        u   *           *         "           :            1             P   r   channel@0                                     channel@1                                      adc@41           ti,ads1119              A        7default         E   +                     X   *           i   ,        u   ,           ,         "           :            1             P   w   channel@0                                     channel@1                                         spi@20100000             ti,am654-mcspi ti,omap4-mcspi                                   X                   "            1                                             	  0disabled             P         spi@20110000             ti,am654-mcspi ti,omap4-mcspi                                   X                   "            1                                               0okay            7default         E   -   .   /   0                        1         1               P      tpm@1         !   infineon,slb9670 tcg,tpm_tis-spi                        I      fram@2           fujitsu,mb85rs256 atmel,at25                                   d           @        `            spi@20120000             ti,am654-mcspi ti,omap4-mcspi                                   X                   "            1                                             	  0disabled             P         interrupt-controller@a00000          ti,sci-intr                                O            d                    y                                                     P   3      gpio@600000          ti,am64-gpio ti,keystone-gpio                 `               0     2               2       !   &   2   F   H                                   3         X                           d        y              \                          M                 M            	gpio          o     DIGI_1 DIGI_2 REL1 REL2      REL3                                                                                    7default         E   4   5   6   7   8   9         P         gpio@601000          ti,am64-gpio ti,keystone-gpio                 `                       @     2       ^   )   2   )         2   /         2   2                             3         X                           d        y              4                          N                 N            	gpio          \                    REL4                                                                              7default         E   :         P   >      mmc@fa10000          ti,am62-sdhci                                               X                        9                 9         9           	clk_ahb clk_xin                                                     %            <           R            i            0okay            7default         E   ;                  P         mmc@fa00000          ti,am62-sdhci                                               X       S                 :                 :         :           	clk_ahb clk_xin                                                                                                       	        R                        )            ?            0okay            7default         E   <   =        U   >   0            ^        i   ?        u   @                  P         mmc@fa20000          ti,am62-sdhci                                               X       R                                                      	clk_ahb clk_xin                                                                                                       	        R                        )            ?          	  0disabled            E   A         P         dwc3-usb@f900000             ti,am62-usb                                                             	ref            B             "            1                              ~        0okay                      P      usb@31000000          
   snps,dwc3                1                   X                            host peripheral         high-speed          otg                            	         	        0okay             P      port       endpoint            /   C         P   l               dwc3-usb@f910000             ti,am62-usb                                                             	ref            D             "            1                              ~        0okay                      P      usb@31100000          
   snps,dwc3                1                  X                            host peripheral         high-speed          host                              7default         E   E        0okay             P            bus@fc00000          simple-bus                                 "            1             ~         P      spi@fc40000          ti,am654-ospi cdns,qspi-nor                                               X                  	)           	9           	I                  K           %      K           5      K           	!              K            "            1          	  0disabled            7default         E   F         P            gpu@fd00000       8   ti,am62-gpu img,img-axe-1-16m img,img-axe img,img-rogue                                                 	core             X       V                            	^a            P         ethernet@8000000             ti,am642-cpsw-nuss           "            1                                 
  Lcpsw_nuss            ~                                                 %                 5                 	fck                        l                                                                        F          #  tx0 tx1 tx2 tx3 tx4 tx5 tx6 tx7 rx          0okay            7default         E   G         P      ethernet-ports           "            1       port@1                       	q        	}port1           	   H           	                	   I            	   J      	  	rgmii-id            0okay             P         port@2                       	q        	}port2           	   H           	                0okay            	   K      	  	rgmii-id             P            mdio@f00             ti,cpsw-mdio ti,davinci_mdio                                    "            1                              	fck         	 B@        0okay            %                 5                 }x@        7default         E   L   M         P      ethernet-phy@0           ethernet-phy-id2000.a231                                      X              7default         E   N   O                         	   
        	          	           	            P   J      ethernet-phy@2                      7default         E   P                     X   &           	            P   K         cpts@3d000           ti,j721e-cpts                                                  	cpts            
          f           cpts            
           
0            dss@30200000             ti,am625-dss                 0              0              0 `            0 p            0             0             0             0               +  Lcommon vidl1 vid ovr1 ovr2 vp1 vp2 common1                                       Q                 	fck vp1 vp2          X       T         	  0disabled            7default         E   R         P      oldi-transmitters            "            1       oldi@0                                         	serial          
I   S      	  0disabled             P      ports            "            1       port@0                        P         port@1                       P               oldi@1                                        	serial          
I   S      	  0disabled             P      ports            "            1       port@0                        P         port@1                       P                  ports            "            1             P      port@1                 endpoint            /   T         P   !               spinlock@2a000000            ti,am64-hwspinlock               *                  
Y            P         mailbox@29000000             ti,am64-mailbox              )                   X       L          M                      
g           
y           0okay             P      mbox-m4-0           
                    
                    P         mbox-r5-0           
                   
                    P            pwm@23100000             ti,am3352-ecap          
                #                       3                 3            	fck       	  0disabled             P         pwm@23110000             ti,am3352-ecap          
                #                       4                 4            	fck       	  0disabled             P         pwm@23120000             ti,am3352-ecap          
                #                       5                 5            	fck       	  0disabled             P         counter@23200000             ti,am62-eqep                 #                        ;                 ;             X       t         	  0disabled             P         counter@23210000             ti,am62-eqep                 #!                       <                 <             X       u         	  0disabled             P         counter@23220000             ti,am62-eqep                 #"                       >                 >             X       v         	  0disabled             P         can@20701000             bosch,m_can                p             p                Lm_can message_ram                 b                 b         b         
  	hclk cclk            X                          
  int0 int1            V          @   @   @   @                0okay            7default         E   U         P         watchdog@e000000             ti,j7-rti-wdt                                        }                  }           %      }            5      }            P         watchdog@e010000             ti,j7-rti-wdt                                       ~                  ~           %      ~            5      ~            P         watchdog@e020000             ti,j7-rti-wdt                                                                    %                  5                  P         watchdog@e030000             ti,j7-rti-wdt                                                                    %                  5                  P         watchdog@e0f0000             ti,j7-rti-wdt                                                                    %                  5                  P         pwm@23000000             ti,am64-epwm ti,am3352-ehrpwm           
                #                        V              V          V          
  	tbclk fck         	  0disabled            7default         E   W   X         P         pwm@23010000             ti,am64-epwm ti,am3352-ehrpwm           
                #                       W              V         W          
  	tbclk fck         	  0disabled            7default         E   Y         P         pwm@23020000             ti,am64-epwm ti,am3352-ehrpwm           
                #                       X              V         X          
  	tbclk fck         	  0disabled             P         audio-controller@2b00000             ti,am33xx-mcasp-audio                                               Lmpu dat          X                            tx rx                                   E             tx rx                             	fck         %                  5                                	  0disabled            7default         E   Z        
          @  
                                                                      
           
             P         audio-controller@2b10000             ti,am33xx-mcasp-audio                                               Lmpu dat          X                            tx rx                                  E            tx rx                             	fck         %                  5                                	  0disabled            7default         E   [        
          @  
                                                                      
           
             P         audio-controller@2b20000             ti,am33xx-mcasp-audio                                               Lmpu dat          X                            tx rx                                  E            tx rx                             	fck         %                  5                                	  0disabled             P        ticsi2rx@30102000            ti,j721e-csi2rx-shim                     G             rx0              0                                   "            1             ~      	  0disabled             P     csi-bridge@30101000          ti,j721e-csi2rx cdns,csi2rx              0                 X                            error_irq irq         H                                                                 F  	sys_clk p_clk pixel_if0_clk pixel_if1_clk pixel_if2_clk pixel_if3_clk           	   \        
dphy             P     ports            "            1       port@0                     	  0disabled             P        port@1                    	  0disabled             P        port@2                    	  0disabled             P        port@3                    	  0disabled             P        port@4                    	  0disabled             P                 phy@30110000             cdns,dphy-rx                 0                                            	  0disabled             P   \      pruss@30040000           ti,am625-pruss               0                       Q            "            1            ~        0              P  	   memories@0                                         Ldram0 dram1 shrdram2             P  
      cfg@26000            ti,pruss-cfg syscon           `             "            1            ~     `              P     clocks           "            1       coreclk-mux@3c              <                          Q          Q           %   ]        5      Q            P   ]      iepclk-mux@30               0                          Q      ]        %   ^        5   ]         P   ^            interrupt-controller@20000           ti,pruss-intc                            d        y         `   X       X          Y          Z          [          \          ]          ^          _         X  host_intr0 host_intr1 host_intr2 host_intr3 host_intr4 host_intr5 host_intr6 host_intr7          P   _      pru@34000            ti,am625-pru              @   0        $            Liram control debug          lam62x-pru0-fw               _         X                 vring            P        pru@38000            ti,am625-pru                 0  @     D            Liram control debug          lam62x-pru1-fw               _         X                 vring            P           memory-controller@3b000000           ti,am64-gpmc                  P                 P            	fck               ;              P                	  Lcfg data             X       j           
           
            "            1            d        y                             	  0disabled             P        ecc@25010000             ti,am64-elm              %                   X                        6                 6            	fck       	  0disabled             P           clock-divider-oldi           fixed-factor-clock                                                               P   Q      thermal-zones            P     main0-thermal                      -          ;   `             P     trips      main0-alert         K s        W          _passive          P   a      main0-crit          K (        W        	  _critical             P           cooling-maps       map0            b   a      0  g   b   c   d   e            main1-thermal                      -          ;   `            P     trips      main1-alert         K s        W          _passive          P   f      main1-crit          K (        W        	  _critical             P           cooling-maps       map0            b   f      0  g   b   c   d   e               cpus             "            1       cpu-map    cluster0             P     core0           v   b      core1           v   c      core2           v   d      core3           v   e            cpu@0            arm,cortex-a53                       zcpu         psci                          @                                 @                      g           h                                      P   b      cpu@1            arm,cortex-a53                      zcpu         psci                          @                                 @                      g           h                                      P   c      cpu@2            arm,cortex-a53                      zcpu         psci                          @                                 @                      g           h                                      P   d      cpu@3            arm,cortex-a53                      zcpu         psci                          @                                 @                      g           h                                      P   e         opp-table            operating-points-v2-ti-cpu                    +   i         P   h   opp-200000000           2             9              J [      opp-400000000           2    ׄ         9              J [      opp-600000000           2    #F         9              J [      opp-800000000           2    /         9              J [      opp-1000000000          2    ;         9              J [      opp-1250000000          2    J|        9              J [         [      opp-1400000000          2    SrN         9              J [         l2-cache0            cache            g        u                         @                    P   g      aliases         /bus@f0000/can@20701000       #  /bus@f0000/bus@4000000/can@4e08000        2  /bus@f0000/ethernet@8000000/ethernet-ports/port@1         2  /bus@f0000/ethernet@8000000/ethernet-ports/port@2           /bus@f0000/i2c@20000000         /bus@f0000/i2c@20010000         /bus@f0000/i2c@20020000       #  /bus@f0000/bus@4000000/i2c@4900000          /bus@f0000/i2c@20030000         /bus@f0000/mmc@fa10000          /bus@f0000/mmc@fa00000          /bus@f0000/mmc@fa20000          /bus@f0000/i2c@20000000/rtc@32        #  /bus@f0000/bus@b00000/rtc@2b1f0000          /bus@f0000/serial@2810000         6  /bus@f0000/bus@b00000/target-module@2b300050/serial@0           /bus@f0000/serial@2800000         &  /bus@f0000/bus@4000000/serial@4a00000           /bus@f0000/serial@2850000         )  /bus@f0000/dwc3-usb@f900000/usb@31000000          )  /bus@f0000/dwc3-usb@f910000/usb@31100000          connector         %   gpio-usb-b-connector usb-b-connector            7default         E   j           >               	}USB_1                       k   port       endpoint            /   l         P   C            gpio-keys         
   gpio-keys           7default         E   m      	  0disabled             P     key-wakeup          %   
        
                  	}Wake-Up         7            $         P           memory@80000000         zmemory                               regulator-vsodimm            regulator-fixed       
  +V_SODIMM            P   #      regulator-3v3            regulator-fixed          2Z         2Z        On-module +V3.3         B   #         P   $      regulator-1v2-dsi            regulator-fixed          O         O        On-module +V1.2_DSI         B   %         P         regulator-1v8-dsi            regulator-fixed          w@         w@        On-module +V1.8_DSI         B   %         P          regulator-1v0-eth            regulator-fixed          B@         B@        On-module +V1.0_ETH         B   %         P        regulator-1v8-eth            regulator-fixed          w@         w@        On-module +V1.8_ETH         B   %         P        regulator-force-sleep-moci           regulator-fixed          M                                            CTRL_SLEEP_MOCI#             P        regulator-sdhci1             regulator-fixed         7default         E   n         M                          `          2Z         2Z      	  +V3.3_SD            p  N          P   ?      regulator-sdhci1-vqmmc           regulator-gpio          7default         E   o        
                  LDO1-VSEL-SD (PMIC)          w@         2Z         w@     2Z           B   p         P   @      regulator-usb0-vbus          regulator-fixed         7default         E   q         M           >   2             LK@         LK@      	  USB_1_EN             P   k      reserved-memory          "            1             ~         P     tfa@9e780000                 x                                      P        optee@9e800000                                                    P        memory@9da00000          shared-dma-pool                                         P         memory@9db00000          shared-dma-pool                                         P         memory@9cb00000          shared-dma-pool                                         P         memory@9cc00000          shared-dma-pool                                         P            voltage-divider-ain1             voltage-divider         :              r                                   P   t      current-sense-shunt-ain1             current-sense-shunt         :               r                     P   v      mux-controller-0          	   gpio-mux            7default         E   s                          (             P   u      ain1-voltage             io-channel-mux          ain1_voltage               t            parent             u                ain1-current             io-channel-mux           ain1_current              v        parent             u                voltage-divider-ain2             voltage-divider         :              w                                   P   y      current-sense-shunt-ain2             current-sense-shunt         :               w                     P   {      mux-controller-1          	   gpio-mux            7default         E   x                          $             P   z      ain2-voltage             io-channel-mux          ain2_voltage               y            parent             z                ain2-current             io-channel-mux           ain2_current              {        parent             z                leds          
   gpio-leds           7default         E   |   led-0                      %off         3status          <           
   >             led-1                      %off         3status          <           
   >             led-2                      %off         3status          <           
   >   
          led-3                      %off         3status          <           
   >   	          led-4                      %off         3status          <           
                led-5                      %off         3status          <           
      %          led-6                      %off         3status          <           
      "          led-7                      %off         3status          <           
      !             regulator-3v2-ain1           regulator-fixed          0          0       
  +3V2_AIN1            P   *      regulator-3v2-ain2           regulator-fixed          0          0       
  +3V2_AIN2            P   ,      ivy-input-voltage            voltage-divider            }                      \      ivy-5v-voltage           voltage-divider            }             X          .      ivy-3v3-voltage          voltage-divider            }                       ix      ivy-1v8-voltage          voltage-divider            }             X          ix      __symbols__         P/firmware/psci          U/timer-cl0-cpu0         `/pmu          &  d/system-idle-states/system-partial-io         &  v/system-idle-states/system-deep-sleep         $  /system-idle-states/system-mcu-only       #  /system-idle-states/system-standby          /bus@f0000          /bus@f0000/bus@4000000        '  /bus@f0000/bus@4000000/pinctrl@4084000        @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-0-default-pins       @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-1-default-pins       @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-2-default-pins       @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-3-default-pins       @  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-gpio0-4-default-pins       =  /bus@f0000/bus@4000000/pinctrl@4084000/mcu-i2c0-default-pins          >  '/bus@f0000/bus@4000000/pinctrl@4084000/mcu-mcan0-default-pins         >  9/bus@f0000/bus@4000000/pinctrl@4084000/mcu-uart0-default-pins         A  K/bus@f0000/bus@4000000/pinctrl@4084000/wkup-clkout0-default-pins          ?  ]/bus@f0000/bus@4000000/pinctrl@4084000/wkup-uart0-default-pins        #  p/bus@f0000/bus@4000000/esm@4100000        %  x/bus@f0000/bus@4000000/timer@4800000          %  /bus@f0000/bus@4000000/timer@4810000          %  /bus@f0000/bus@4000000/timer@4820000          %  /bus@f0000/bus@4000000/timer@4830000          &  A/bus@f0000/bus@4000000/serial@4a00000         #  /bus@f0000/bus@4000000/i2c@4900000        #  /bus@f0000/bus@4000000/spi@4b00000        #  /bus@f0000/bus@4000000/spi@4b10000        4  /bus@f0000/bus@4000000/interrupt-controller@4210000       $  /bus@f0000/bus@4000000/gpio@4201000       5  /bus@f0000/bus@4000000/gpio@4201000/pcie-1-reset-hog          (  /bus@f0000/bus@4000000/watchdog@4880000       #  //bus@f0000/bus@4000000/can@4e08000        #  /bus@f0000/bus@4000000/can@4e18000        %  /bus@f0000/bus@4000000/m4fss@5000000            /bus@f0000/bus@b00000         #  /bus@f0000/bus@b00000/bus@43000000        -  /bus@f0000/bus@b00000/bus@43000000/chipid@14          -  !/bus@f0000/bus@b00000/bus@43000000/syscon@18          ;  1/bus@f0000/bus@b00000/bus@43000000/ethernet-mac-syscon@200        /  A/bus@f0000/bus@b00000/bus@43000000/syscon@4008        /  O/bus@f0000/bus@b00000/bus@43000000/syscon@4018        6  e/bus@f0000/bus@b00000/target-module@2b300050/serial@0         #  ]/bus@f0000/bus@b00000/i2c@2b200000        #  g/bus@f0000/bus@b00000/rtc@2b1f0000        (  q/bus@f0000/bus@b00000/watchdog@2b000000       %  {/bus@f0000/bus@b00000/r5fss@78000000          2  /bus@f0000/bus@b00000/r5fss@78000000/r5f@78000000         0  /bus@f0000/bus@b00000/temperature-sensor@b00000         /bus@f0000/sram@70000000          (  /bus@f0000/interrupt-controller@1800000       ?  /bus@f0000/interrupt-controller@1800000/msi-controller@1820000          /bus@f0000/bus@100000           /bus@f0000/bus@100000/phy@4044        ,  /bus@f0000/bus@100000/clock-controller@4130       ,  /bus@f0000/bus@100000/clock-controller@82e0       ,  /bus@f0000/bus@100000/clock-controller@82e4       .  /bus@f0000/bus@100000/oldi-io-controller@8600           	/bus@f0000/bus@48000000       )  /bus@f0000/bus@48000000/mailbox@4d000000          6   /bus@f0000/bus@48000000/interrupt-controller@48000000         0  //bus@f0000/bus@48000000/dma-controller@485c0100       0  :/bus@f0000/bus@48000000/dma-controller@485c0000       &  F/bus@f0000/system-controller@44043000         7  K/bus@f0000/system-controller@44043000/power-controller        7  R/bus@f0000/system-controller@44043000/clock-controller        7  Z/bus@f0000/system-controller@44043000/reset-controller          c/bus@f0000/crypto@40900000        (  j/bus@f0000/crypto@40900000/rng@40910000         n/bus@f0000/mailbox@43600000         /bus@f0000/pinctrl@f4000          2  /bus@f0000/pinctrl@f4000/main-epwm0a-default-pins         2  /bus@f0000/pinctrl@f4000/main-epwm0b-default-pins         2  /bus@f0000/pinctrl@f4000/main-epwm1a-default-pins         3  /bus@f0000/pinctrl@f4000/main-gpio0-0-default-pins        3  /bus@f0000/pinctrl@f4000/main-gpio0-3-default-pins        3  /bus@f0000/pinctrl@f4000/main-gpio0-4-default-pins        3  /bus@f0000/pinctrl@f4000/main-gpio0-5-default-pins        3  /bus@f0000/pinctrl@f4000/main-gpio0-6-default-pins        3  ,/bus@f0000/pinctrl@f4000/main-gpio0-7-default-pins        4  C/bus@f0000/pinctrl@f4000/main-gpio0-11-default-pins       4  Y/bus@f0000/pinctrl@f4000/main-gpio0-12-default-pins       4  p/bus@f0000/pinctrl@f4000/main-gpio0-15-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-16-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-17-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-20-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-21-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-22-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-25-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-26-default-pins       4  
/bus@f0000/pinctrl@f4000/main-gpio0-27-default-pins       4  !/bus@f0000/pinctrl@f4000/main-gpio0-29-default-pins       4  4/bus@f0000/pinctrl@f4000/main-gpio0-30-default-pins       4  H/bus@f0000/pinctrl@f4000/main-gpio0-31-default-pins       4  `/bus@f0000/pinctrl@f4000/main-gpio0-32-default-pins       4  x/bus@f0000/pinctrl@f4000/main-gpio0-34-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-35-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-36-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-38-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-40-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-41-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-42-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-71-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio0-72-default-pins       4  /bus@f0000/pinctrl@f4000/main-gpio1-17-default-pins       4  2/bus@f0000/pinctrl@f4000/main-gpio1-18-default-pins       4  I/bus@f0000/pinctrl@f4000/main-gpio1-19-default-pins       4  Y/bus@f0000/pinctrl@f4000/main-gpio1-48-default-pins       4  m/bus@f0000/pinctrl@f4000/main-gpio1-49-default-pins       4  ~/bus@f0000/pinctrl@f4000/main-gpio1-50-default-pins       0  /bus@f0000/pinctrl@f4000/main-i2c0-default-pins       0  /bus@f0000/pinctrl@f4000/main-i2c1-default-pins       0  /bus@f0000/pinctrl@f4000/main-i2c2-default-pins       0  /bus@f0000/pinctrl@f4000/main-i2c3-default-pins       E  /bus@f0000/pinctrl@f4000/main-system-audio-ext-reflock1-default-pins          2  /bus@f0000/pinctrl@f4000/main-mcasp0-default-pins         2  /bus@f0000/pinctrl@f4000/main-mcasp1-default-pins         1  /bus@f0000/pinctrl@f4000/main-mcan0-default-pins          1   /bus@f0000/pinctrl@f4000/main-mdio1-default-pins          0  /bus@f0000/pinctrl@f4000/main-mmc0-default-pins       0  /bus@f0000/pinctrl@f4000/main-mmc1-default-pins       0  +/bus@f0000/pinctrl@f4000/main-mmc2-default-pins       1  :/bus@f0000/pinctrl@f4000/main-ospi0-default-pins          2  H/bus@f0000/pinctrl@f4000/main-rgmii1-default-pins         2  W/bus@f0000/pinctrl@f4000/main-rgmii2-default-pins         0  f/bus@f0000/pinctrl@f4000/main-spi1-default-pins       4  s/bus@f0000/pinctrl@f4000/main-spi1-cs0-default-pins       :  /bus@f0000/pinctrl@f4000/main-system-clkout0-default-pins         9  /bus@f0000/pinctrl@f4000/main-system-extint-default-pins          1  /bus@f0000/pinctrl@f4000/main-uart0-default-pins          1  /bus@f0000/pinctrl@f4000/main-uart1-default-pins          1  /bus@f0000/pinctrl@f4000/main-uart5-default-pins          0  /bus@f0000/pinctrl@f4000/main-usb1-default-pins       0  /bus@f0000/pinctrl@f4000/main-vout-default-pins       /  /bus@f0000/pinctrl@f4000/ivy-leds-default-pins          /bus@f0000/esm@420000           /bus@f0000/timer@2400000            /bus@f0000/timer@2410000            (/bus@f0000/timer@2420000            4/bus@f0000/timer@2430000            @/bus@f0000/timer@2440000            L/bus@f0000/timer@2450000            X/bus@f0000/timer@2460000            d/bus@f0000/timer@2470000            p/bus@f0000/serial@2800000           {/bus@f0000/serial@2810000           /bus@f0000/serial@2820000           /bus@f0000/serial@2830000           /bus@f0000/serial@2840000           /bus@f0000/serial@2850000           /bus@f0000/serial@2860000           /bus@f0000/i2c@20000000         /bus@f0000/i2c@20000000/dsi@e         $  /bus@f0000/i2c@20000000/dsi@e/ports       4  /bus@f0000/i2c@20000000/dsi@e/ports/port@0/endpoint       1  /bus@f0000/i2c@20000000/pmic@30/regulators/buck1          1  /bus@f0000/i2c@20000000/pmic@30/regulators/buck2          1  /bus@f0000/i2c@20000000/pmic@30/regulators/buck3          0  /bus@f0000/i2c@20000000/pmic@30/regulators/ldo1       0  /bus@f0000/i2c@20000000/pmic@30/regulators/ldo2       0  (/bus@f0000/i2c@20000000/pmic@30/regulators/ldo3       0  1/bus@f0000/i2c@20000000/pmic@30/regulators/ldo4         =/bus@f0000/i2c@20000000/rtc@32          E/bus@f0000/i2c@20000000/adc@49          T/bus@f0000/i2c@20010000         ^/bus@f0000/i2c@20020000         h/bus@f0000/i2c@20030000         r/bus@f0000/i2c@20030000/adc@40          {/bus@f0000/i2c@20030000/adc@41          /bus@f0000/spi@20100000         /bus@f0000/spi@20110000         /bus@f0000/spi@20120000       '  /bus@f0000/interrupt-controller@a00000          /bus@f0000/gpio@600000          /bus@f0000/gpio@601000          /bus@f0000/mmc@fa10000          $/bus@f0000/mmc@fa00000          3/bus@f0000/mmc@fa20000          /bus@f0000/dwc3-usb@f900000       )  /bus@f0000/dwc3-usb@f900000/usb@31000000          7  /bus@f0000/dwc3-usb@f900000/usb@31000000/port/endpoint          /bus@f0000/dwc3-usb@f910000       )  /bus@f0000/dwc3-usb@f910000/usb@31100000            /bus@f0000/bus@fc00000        #  B/bus@f0000/bus@fc00000/spi@fc40000          /bus@f0000/gpu@fd00000          /bus@f0000/ethernet@8000000       2  /bus@f0000/ethernet@8000000/ethernet-ports/port@1         2  /bus@f0000/ethernet@8000000/ethernet-ports/port@2         %  /bus@f0000/ethernet@8000000/mdio@f00          4  
/bus@f0000/ethernet@8000000/mdio@f00/ethernet-phy@0       4  /bus@f0000/ethernet@8000000/mdio@f00/ethernet-phy@2         "/bus@f0000/dss@30200000       1  &/bus@f0000/dss@30200000/oldi-transmitters/oldi@0          >  ,/bus@f0000/dss@30200000/oldi-transmitters/oldi@0/ports/port@0         >  8/bus@f0000/dss@30200000/oldi-transmitters/oldi@0/ports/port@1         1  D/bus@f0000/dss@30200000/oldi-transmitters/oldi@1          >  J/bus@f0000/dss@30200000/oldi-transmitters/oldi@1/ports/port@0         >  V/bus@f0000/dss@30200000/oldi-transmitters/oldi@1/ports/port@1           b/bus@f0000/dss@30200000/ports         .  l/bus@f0000/dss@30200000/ports/port@1/endpoint           t/bus@f0000/spinlock@2a000000            /bus@f0000/mailbox@29000000       &  /bus@f0000/mailbox@29000000/mbox-m4-0         &  /bus@f0000/mailbox@29000000/mbox-r5-0           /bus@f0000/pwm@23100000         /bus@f0000/pwm@23110000         /bus@f0000/pwm@23120000         /bus@f0000/counter@23200000         /bus@f0000/counter@23210000         /bus@f0000/counter@23220000         /bus@f0000/can@20701000         /bus@f0000/watchdog@e000000         /bus@f0000/watchdog@e010000         /bus@f0000/watchdog@e020000         /bus@f0000/watchdog@e030000         /bus@f0000/watchdog@e0f0000         /bus@f0000/pwm@23000000         /bus@f0000/pwm@23010000         /bus@f0000/pwm@23020000       $  /bus@f0000/audio-controller@2b00000       $  /bus@f0000/audio-controller@2b10000       $  /bus@f0000/audio-controller@2b20000          /bus@f0000/ticsi2rx@30102000          1  +/bus@f0000/ticsi2rx@30102000/csi-bridge@30101000          >  8/bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@0         >  C/bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@1         >  N/bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@2         >  Y/bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@3         >  d/bus@f0000/ticsi2rx@30102000/csi-bridge@30101000/ports/port@4           o/bus@f0000/phy@30110000         u/bus@f0000/pruss@30040000         %  {/bus@f0000/pruss@30040000/memories@0          $  /bus@f0000/pruss@30040000/cfg@26000       :  /bus@f0000/pruss@30040000/cfg@26000/clocks/coreclk-mux@3c         9  /bus@f0000/pruss@30040000/cfg@26000/clocks/iepclk-mux@30          5  /bus@f0000/pruss@30040000/interrupt-controller@20000          $  /bus@f0000/pruss@30040000/pru@34000       $  /bus@f0000/pruss@30040000/pru@38000       &  /bus@f0000/memory-controller@3b000000           /bus@f0000/ecc@25010000         /clock-divider-oldi         /thermal-zones          /thermal-zones/main0-thermal          /  /thermal-zones/main0-thermal/trips/main0-alert        .  /thermal-zones/main0-thermal/trips/main0-crit           /thermal-zones/main1-thermal          /  /thermal-zones/main1-thermal/trips/main1-alert        .  +/thermal-zones/main1-thermal/trips/main1-crit           /cpus/cpu-map/cluster0          6/cpus/cpu@0         ;/cpus/cpu@1         @/cpus/cpu@2         E/cpus/cpu@3         J/opp-table          X/l2-cache0          ]/connector/port/endpoint            n/gpio-keys          /gpio-keys/key-wakeup           /regulator-vsodimm          /regulator-3v3          /regulator-1v2-dsi          /regulator-1v8-dsi          /regulator-1v0-eth          /regulator-1v8-eth          /regulator-force-sleep-moci         /regulator-sdhci1           /regulator-sdhci1-vqmmc         	/regulator-usb0-vbus            /reserved-memory            '/reserved-memory/tfa@9e780000            6/reserved-memory/optee@9e800000       !  A/reserved-memory/memory@9da00000          !  e/reserved-memory/memory@9db00000          !  /reserved-memory/memory@9cb00000          !  /reserved-memory/memory@9cc00000            /voltage-divider-ain1           /current-sense-shunt-ain1           /mux-controller-0           /voltage-divider-ain2           /current-sense-shunt-ain2           (/mux-controller-1           ;/regulator-3v2-ain1         H/regulator-3v2-ain2          	model compatible interrupt-parent #address-cells #size-cells stdout-path method phandle interrupts idle-state-name bootph-all ranges reg #pinctrl-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,pins bootph-pre-ram ti,esm-pins clocks clock-names power-domains ti,timer-pwm status pinctrl-names pinctrl-0 ti,intr-trigger-type interrupt-controller #interrupt-cells ti,sci ti,sci-dev-id ti,interrupt-ranges gpio-controller #gpio-cells ti,ngpio ti,davinci-gpio-unbanked gpio-line-names gpio-hog gpios line-name output-low assigned-clocks assigned-clock-parents reg-names bosch,mram-cfg resets firmware-name ti,sci-proc-ids mboxes memory-region ti,sysc-mask ti,sysc-sidle ti,syss-mask ti,no-reset-on-init linux,rs485-enabled-at-boot-time rs485-rts-active-low rs485-rx-during-tx wakeup-source ti,atcm-enable ti,btcm-enable ti,loczrama #thermal-sensor-cells socionext,synquacer-pre-its msi-controller #msi-cells #phy-cells #clock-cells assigned-clock-rates dma-ranges #mbox-cells interrupt-names ti,unmapped-event-sources msi-parent #dma-cells ti,sci-rm-range-bchan ti,sci-rm-range-rchan ti,sci-rm-range-tchan ti,sci-rm-range-tflow ti,sci-rm-range-rflow ti,host-id mbox-names #power-domain-cells #reset-cells dmas dma-names clock-frequency reset-gpios vddc-supply vddmipi-supply vddio-supply data-lines remote-endpoint buck1-supply buck2-supply buck3-supply ldo1-supply ldo2-supply ldo3-supply ldo4-supply system-power-controller ti,power-button regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-allow-bypass #io-channel-cells ti,datarate ti,gain pagesize avdd-supply dvdd-supply vref-supply diff-channels ti,pindir-d0-out-d1-in cs-gpios spi-max-frequency address-width gpio-ranges bus-width mmc-hs200-1_8v ti,clkbuf-sel ti,otap-del-sel-legacy ti,otap-del-sel-mmc-hs ti,otap-del-sel-hs200 ti,itap-del-sel-legacy ti,itap-del-sel-mmc-hs non-removable ti,otap-del-sel-sd-hs ti,otap-del-sel-sdr12 ti,otap-del-sel-sdr25 ti,otap-del-sel-sdr50 ti,otap-del-sel-sdr104 ti,otap-del-sel-ddr50 ti,itap-del-sel-sd-hs ti,itap-del-sel-sdr12 ti,itap-del-sel-sdr25 cd-gpios disable-wp vmmc-supply vqmmc-supply ti,fails-without-test-cd ti,syscon-phy-pll-refclk ti,vbus-divider maximum-speed dr_mode snps,usb2-gadget-lpm-disable snps,usb2-lpm-disable adp-disable usb-role-switch cdns,fifo-depth cdns,fifo-width cdns,trigger-address power-domain-names ti,mac-only label phys mac-address ti,syscon-efuse phy-handle phy-mode bus_freq reset-assert-us reset-deassert-us ti,fifo-depth ti,rx-internal-delay interrupts-extended ti,cpts-ext-ts-inputs ti,cpts-periodic-outputs ti,oldi-io-ctrl #hwlock-cells ti,mbox-num-users ti,mbox-num-fifos ti,mbox-rx ti,mbox-tx #pwm-cells op-mode serial-dir tdm-slots #sound-dai-cells phy-names gpmc,num-cs gpmc,num-waitpins clock-div clock-mult polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device cpu device_type enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 #cooling-cells opp-shared syscon opp-hz opp-supported-hw clock-latency-ns opp-suspend cache-unified cache-level can0 can1 ethernet0 ethernet1 i2c0 i2c1 i2c2 i2c3 i2c4 mmc0 mmc1 mmc2 rtc0 rtc1 serial0 serial1 serial2 serial3 serial4 usb0 usb1 id-gpios self-powered vbus-supply debounce-interval linux,code vin-supply enable-active-high off-on-delay-us startup-delay-us states alignment no-map io-channels full-ohms output-ohms shunt-resistor-micro-ohms #mux-control-cells mux-gpios io-channel-names mux-controls settle-time-us color default-state function function-enumerator psci a53_timer0 pmu system_partial_io system_deep_sleep system_mcu_only system_standby cbass_main cbass_mcu mcu_pmx0 pinctrl_pcie_1_reset pinctrl_gpio_1 pinctrl_gpio_2 pinctrl_gpio_3 pinctrl_gpio_4 pinctrl_mcu_i2c0 pinctrl_mcu_mcan0 pinctrl_mcu_uart0 pinctrl_csi1_mclk pinctrl_wkup_uart0 mcu_esm mcu_timer0 mcu_timer1 mcu_timer2 mcu_timer3 mcu_spi0 mcu_spi1 mcu_gpio_intr mcu_gpio0 verdin_pcie_1_reset_hog mcu_rti0 mcu_mcan1 mcu_m4fss cbass_wakeup wkup_conf chipid opp_efuse_table cpsw_mac_syscon usb0_phy_ctrl usb1_phy_ctrl wkup_i2c0 wkup_rtc0 wkup_rti0 wkup_r5fss0 wkup_r5fss0_core0 wkup_vtm0 oc_sram gic500 gic_its main_conf phy_gmii_sel epwm_tbclk audio_refclk0 audio_refclk1 dss_oldi_io_ctrl dmss secure_proxy_main inta_main_dmss main_bcdma main_pktdma dmsc k3_pds k3_clks k3_reset crypto rng secure_proxy_sa3 main_pmx0 pinctrl_epwm0_a pinctrl_epwm0_b pinctrl_epwm1_a pinctrl_qspi1_clk_gpio pinctrl_qspi1_io0_gpio pinctrl_qspi1_io1_gpio pinctrl_qspi1_io2_gpio pinctrl_qspi1_io3_gpio pinctrl_qspi1_io4_gpio pinctrl_qspi1_cs_gpio pinctrl_qspi1_cs2_gpio pinctrl_wifi_w_wkup_host pinctrl_bt_wkup_host pinctrl_eth_reset pinctrl_bridge_reset pinctrl_vsel_sd pinctrl_wifi_en pinctrl_eth_int pinctrl_wifi_wkup_bt pinctrl_wifi_wkup_wlan pinctrl_sd1_pwr_en pinctrl_dsi1_bkl_en pinctrl_ctrl_sleep_moci pinctrl_ctrl_wake1_mico pinctrl_i2s_2_d_out_gpio pinctrl_i2s_2_bclk_gpio pinctrl_gpio_6 pinctrl_eth2_rgmii_int pinctrl_gpio_5 pinctrl_gpio_7 pinctrl_gpio_8 pinctrl_usb1_oc pinctrl_usb2_oc pinctrl_pwm3_dsi_gpio pinctrl_qspi1_dqs_gpio pinctrl_usb0_id pinctrl_sd1_cd_gpio pinctrl_dsi1_int pinctrl_usb0_en pinctrl_i2c0 pinctrl_i2c1 pinctrl_i2c2 pinctrl_i2c3 pinctrl_i2s1_mclk pinctrl_mcasp0 pinctrl_mcasp1 pinctrl_mcan0 pinctrl_mdio pinctrl_sdhci0 pinctrl_sdhci1 pinctrl_sdhci2 pinctrl_ospi0 pinctrl_rgmii1 pinctrl_rgmii2 pinctrl_spi1 pinctrl_spi1_cs0 pinctrl_eth_clock pinctrl_pmic_extint pinctrl_uart0 pinctrl_uart1 pinctrl_uart5 pinctrl_usb1 pinctrl_parallel_rgb pinctrl_ivy_leds main_esm main_timer0 main_timer1 main_timer2 main_timer3 main_timer4 main_timer5 main_timer6 main_timer7 main_uart0 main_uart1 main_uart2 main_uart3 main_uart4 main_uart5 main_uart6 main_i2c0 dsi_bridge dsi_bridge_ports rgb_in reg_vdd_core reg_1v8 reg_vdd_ddr reg_sd_3v3_1v8 reg_vddr_core reg_1v8a reg_eth_2v5 rtc_i2c verdin_som_adc main_i2c1 main_i2c2 main_i2c3 ivy_adc1 ivy_adc2 main_spi0 main_spi1 main_spi2 main_gpio_intr main_gpio0 main_gpio1 usbss0 usb0_ep usbss1 gpu cpsw3g cpsw_port1 cpsw_port2 cpsw3g_mdio cpsw3g_phy0 cpsw3g_phy1 dss oldi0 oldi0_port0 oldi0_port1 oldi1 oldi1_port0 oldi1_port1 dss_ports dpi_out hwspinlock mailbox0_cluster0 mbox_m4_0 mbox_r5_0 ecap0 ecap1 ecap2 eqep0 eqep1 eqep2 main_mcan0 main_rti0 main_rti1 main_rti2 main_rti3 main_rti15 epwm0 epwm1 epwm2 mcasp2 ti_csi2rx0 cdns_csi2rx0 csi0_port0 csi0_port1 csi0_port2 csi0_port3 csi0_port4 dphy0 pruss pruss_mem pruss_cfg pruss_coreclk_mux pruss_iepclk_mux pruss_intc pru0 pru1 gpmc0 elm0 dss_vp1_clk thermal_zones main0_thermal main0_alert main0_crit main1_thermal main1_alert main1_crit cpu0 cpu1 cpu2 cpu3 a53_opp_table L2_0 usb_dr_connector verdin_gpio_keys verdin_key_wakeup reg_vsodimm reg_3v3 reg_1v2_dsi reg_1v8_dsi reg_1v0_eth reg_1v8_eth reg_force_sleep_moci reg_sdhc1_vmmc reg_sdhc1_vqmmc reg_usb0_vbus reserved_memory secure_tfa_ddr secure_ddr wkup_r5fss0_core0_dma_memory_region wkup_r5fss0_core0_memory_region mcu_m4fss_dma_memory_region mcu_m4fss_memory_region ain1_voltage_unmanaged ain1_current_unmanaged ain1_mode_mux_ctrl ain2_voltage_unmanaged ain2_current_unmanaged ain2_mode_mux_ctrl reg_3v2_ain1 reg_3v2_ain2 