     8     (                                                                                 %   ,radxa,e25 radxa,cm3i rockchip,rk3568             7Radxa E25 Carrier Board    aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe310000            /mmc@fe2b0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                       psci                       (   @        :           G           T   @        f           s                                    
      cpu@100          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                          cpu@200          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                          cpu@300          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                             l3-cache             ,cache                                          *   @        <                    display-subsystem            ,rockchip,display-subsystem                   	  disabled          firmware       scmi             ,arm,scmi-smc            ҂                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI            i2s                   	  disabled       simple-audio-card,codec         :         simple-audio-card,cpu           :   	         pmu          ,arm,cortex-a55-pmu        0  D                                                O   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   b   shmem@10f000             ,arm,scmi-shmem                                 i                    timer            ,arm,armv8-timer       0  D                                 
            p      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          D       _                       	  sata-phy                                     okay          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          D       `                       	  sata-phy                                   	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          D                                             ref_clk suspend_clk bus_clk         otg       
  utmi_wide                                                okay                             usb2-phy usb3-phy           .         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          D                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                              	  disabled          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 D      	            5        J           [    A          e  (            p         b                                                msi-controller@fd440000          ,arm,gic-v3-its               D                           p                      V         usb@fd800000             ,generic-ehci                                  D                                                        usb         okay          usb@fd840000             ,generic-ohci                                  D                                                        usb         okay          usb@fd880000             ,generic-ehci                                  D                                                        usb         okay          usb@fd8c0000             ,generic-ohci                                  D                                                        usb         okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     T   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay                                                                                                    
            syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                           syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                               clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                                %                          5   G          J              a                     i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               D       .                        -      	  i2c pclk               !        default                                   okay       regulator@1c             ,tcs,tcs4525                     n           vdd_cpu                            5          0                     "              regulator-state-mem                   pmic@20          ,rockchip,rk809                            #        D                         default            $         )         A        O   %        [   %        g   %        s   %           %           %           %           %           %   regulators     DCDC_REG1         
  vdd_logic                                                   p          q   regulator-state-mem                   DCDC_REG2           vdd_gpu                                        p          q           G   regulator-state-mem                   DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                               p          q   regulator-state-mem                   DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem                   LDO_REG1            vdda0v9_image                        regulator-state-mem                   LDO_REG2          	  vdda_0v9                                           regulator-state-mem                   LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                            LDO_REG4            vccio_acodec                      2Z         2Z              regulator-state-mem                   LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem                   LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem                   LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                   w@         LDO_REG9            vcca1v8_image            w@         w@   regulator-state-mem                   SWITCH_REG1         vcc_3v3                                 regulator-state-mem                   SWITCH_REG2       
  vcc3v3_sd              ]   regulator-state-mem                            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 D       t                        ,        baudclk apb_pclk               &       &              '        default                             	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               (        default         "         	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               )        default         "           okay                     pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               *        default         "           okay                     pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               +        default         "         	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            -                                           power-domain@7                                           A   ,        -          power-domain@8                                           A   -   .   /        -          power-domain@9              	                                   A   0   1   2        -          power-domain@10             
                             A   3   4   5   6   7   8        -          power-domain@11                                    A   9        -          power-domain@13                                   A   :        -          power-domain@14                                   A   ;   <   =        -          power-domain@15                                     A   >   ?   @   A   B   C   D   E        -                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  D       (          )          '           Hjob mmu gpu                              gpu bus                                   okay               F        X   G                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               D                  Hvdpu                               
  aclk hclk           d   H                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        D                  aclk iface                                             k               H      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              D       Z                                      aclk hclk sclk               &     $     %        xcore axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  D       @                              
  aclk hclk           d   I              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        D       ?                                aclk iface                
        k               I      video-capture@fdfe0000           ,rockchip,rk3568-vicap                                 D                  %              5                                           aclk hclk dclk iclk         d   J                    (                                        xarst hrst drst prst irst            a          	  disabled       ports                                port@0                     port@1                          iommu@fdfe0800           ,rockchip,rk3568-iommu                                D                                       aclk iface          k                                 	  disabled               J      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         D       d                                           biu ciu ciu-drive ciu-sample                       р                      xreset         	  disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 D                             Hmacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  xstmmaceth           a               K                    L           M               	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                       "              K      rx-queues-config            2              L   queue0           tx-queues-config            H              M   queue0              vop@fe040000                          0     @                ^vop gamma-lut           D                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            d   N              	        a          	  disabled             ,rockchip,rk3568-vop    ports                                           port@0                                               port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                D                                       aclk iface          k                  	      	  disabled               N      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       D           pclk                           dphy               O              	        xapb                      a          	  disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       E           pclk                           dphy               P              	        xapb                      a          	  disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 D       -         (                          (              iahb isfr cec ref           default            Q   R   S              	                   a            h          	  disabled                  ports                                port@0                     port@1                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe138080             ,rockchip,rk3568-qos syscon                                  ;      qos@fe138100             ,rockchip,rk3568-qos syscon                                   <      qos@fe138180             ,rockchip,rk3568-qos syscon                                  =      qos@fe148000             ,rockchip,rk3568-qos syscon                                   -      qos@fe148080             ,rockchip,rk3568-qos syscon                                  .      qos@fe148100             ,rockchip,rk3568-qos syscon                                   /      qos@fe150000             ,rockchip,rk3568-qos syscon                                    9      qos@fe158000             ,rockchip,rk3568-qos syscon                                   3      qos@fe158100             ,rockchip,rk3568-qos syscon                                   4      qos@fe158180             ,rockchip,rk3568-qos syscon                                  5      qos@fe158200             ,rockchip,rk3568-qos syscon                                   6      qos@fe158280             ,rockchip,rk3568-qos syscon                                  7      qos@fe158300             ,rockchip,rk3568-qos syscon                                   8      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    >      qos@fe190280             ,rockchip,rk3568-qos syscon                                  B      qos@fe190300             ,rockchip,rk3568-qos syscon                                   C      qos@fe190380             ,rockchip,rk3568-qos syscon                                  D      qos@fe190400             ,rockchip,rk3568-qos syscon                                   E      qos@fe198000             ,rockchip,rk3568-qos syscon                                   :      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   0      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  1      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   2      dfi@fe230000             ,rockchip,rk3568-dfi              #                 D                  y   T      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               ^dbi apb config        <  D       K          J          I          H          G           Hsys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         J                                `                    U                      U                     U                     U                                                               V                                      	  pcie-phy                        T  b                                                                  @                         xpipe                                     okay            default            W           X   
               Y   legacy-interrupt-controller                      J            5                     D       H              U         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         D       b                                           biu ciu ciu-drive ciu-sample                       р                      xreset           okay                        '        8   #               A        default            Z   [   \         L        Z   ]        f         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         D       c                                           biu ciu ciu-drive ciu-sample                       р                      xreset         	  disabled          spi@fe300000             ,rockchip,sfc                 0        @         D       e                  x      v        clk_sfc hclk_sfc               ^        default       	  disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 D                  %      {      }        5 n6       (         |      z      y      {      }        core bus axi block timer            okay                                 s        default            _   `   a   b        Z           f         rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb                  m        okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 D       4           %      =      A        5Fq Fq                ?      C      9        mclk_tx mclk_rx hclk               c            tx                P      Q      
  xtx-m rx-m           a            h          	  disabled               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 D       5           %      E      I        5Fq Fq                G      K      :        mclk_tx mclk_rx hclk               c      c           rx tx                 R      S      
  xtx-m rx-m           a            default       0     d   e   f   g   h   i   j   k   l   m   n   o        h          	  disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 D       6           %      M        5Fq                O      O      ;        mclk_tx mclk_rx hclk               c      c           tx rx                 T        xtx-m            a            default            p   q   r   s        h          	  disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 D       7                  S      W      <        mclk_tx mclk_rx hclk               c      c           tx rx                 U      V      
  xtx-m rx-m           a            h          	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 D       L                  Z      Y        pdm_clk pdm_hclk               c   	        rx             t   u   v   w   x   y        default               X        xpdm-m           h          	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 D       f         
  mclk hclk                  _      \           c           tx          default            z        h          	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         D                                                 	  apb_pclk                          &      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         D                                                 	  apb_pclk                          c      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 D       /                 H     G      	  i2c pclk               {        default                                 	  disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 D       0                 J     I      	  i2c pclk               |        default                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 D       1                 L     K      	  i2c pclk               }        default                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 D       2                 N     M      	  i2c pclk               ~        default                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 D       3                 P     O      	  i2c pclk                       default                                 	  disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 D                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 D       g                 R     Q        spiclk apb_pclk            &      &           tx rx           default                                                  	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 D       h                 T     S        spiclk apb_pclk            &      &           tx rx           default                                                  	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 D       i                 V     U        spiclk apb_pclk            &      &           tx rx           default                                                  	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 D       j                 X     W        spiclk apb_pclk            &      &           tx rx           default                                                  	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 D       u                              baudclk apb_pclk               &      &                      default                             	  disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 D       v                 #              baudclk apb_pclk               &      &                      default                               okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 D       w                 '     $        baudclk apb_pclk               &      &                      default                             	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 D       x                 +     (        baudclk apb_pclk               &      &   	                   default                             	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 D       y                 /     ,        baudclk apb_pclk               &   
   &                      default                             	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 D       z                 3     0        baudclk apb_pclk               &      &                      default                             	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 D       {                 7     4        baudclk apb_pclk               &      &                      default                             	  disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 D       |                 ;     8        baudclk apb_pclk               &      &                      default                             	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 D       }                 ?     <        baudclk apb_pclk               &      &                      default                             	  disabled          thermal-zones      cpu-thermal            d                            trips      cpu_alert0           p                   passive                  cpu_alert1           $                   passive       cpu_crit             s                	   critical             cooling-maps       map0                     0     
                     gpu-thermal                                       trips      gpu-threshold            p                   passive       gpu-target           $                   passive                  gpu-crit             s                	   critical             cooling-maps       map0                                         tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 D       s           %                  5f@ 
`                           tsadc apb_pclk                                 a            	 s        default sleep                      	#           	-           okay            	C           	Z                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 D       ]                              saradc apb_pclk                      xsaradc-apb          	u           okay            	         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         "         	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         "         	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         "         	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default         "         	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         "         	  disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         "         	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         "         	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default         "         	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         "           okay                     pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         "         	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         "         	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default         "         	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe            %      "        5                      xphy         	           	           	           okay            	                    phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe            %      %        5                      xphy         	           	           	           okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            	                         xapb         a          	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        	                  	        xapb                    	  disabled               O      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        	                  	        xapb                    	  disabled               P      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            D                  	                       okay                  host-port           	          	  disabled                     otg-port            	            okay            	                       usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            D                  	                       okay       host-port           	            okay            	                    otg-port            	            okay            	                       pinctrl          ,rockchip,rk3568-pinctrl         a            y   T                                  b              gpio@fdd60000            ,rockchip,gpio-bank                                D       !                  .               	        	                       	            5        J              #      gpio@fe740000            ,rockchip,gpio-bank               t                 D       "                 c     d         	        	                       	            5        J              X      gpio@fe750000            ,rockchip,gpio-bank               u                 D       #                 e     f         	        	          @            	            5        J                    gpio@fe760000            ,rockchip,gpio-bank               v                 D       $                 g     h         	        	          `            	            5        J                    gpio@fe770000            ,rockchip,gpio-bank               w                 D       %                 i     j         	        	                      	            5        J         pcfg-pull-up             
	                 pcfg-pull-none           
                 pcfg-pull-none-drv-level-1           
        
#                    pcfg-pull-none-drv-level-2           
        
#                    pcfg-pull-none-drv-level-3           
        
#                    pcfg-pull-up-drv-level-1             
	        
#                    pcfg-pull-up-drv-level-2             
	        
#                    pcfg-pull-none-smt           
         
2                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
G                                              can1       can1m0-pins          
G                                             can2       can2m0-pins          
G                                            cif       clk32k     clk32k-out0         
G                                 cpu       ebc       edpdp         emmc       emmc-bus8           
G                                                                                                           _      emmc-clk            
G                       `      emmc-cmd            
G                       a      emmc-datastrobe         
G                       b         eth0          eth1          flash         fspi       fspi-pins         `  
G                                                                                   ^         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
G                       S      hdmitx-scl          
G                       Q      hdmitx-sda          
G                       R         i2c0       i2c0-xfer            
G       	             
                 !         i2c1       i2c1-xfer            
G                                     {         i2c2       i2c2m0-xfer          
G                                     |         i2c3       i2c3m0-xfer          
G                                    }         i2c4       i2c4m0-xfer          
G                  
                 ~         i2c5       i2c5m0-xfer          
G                                            i2s1       i2s1m0-lrckrx           
G                       g      i2s1m0-lrcktx           
G                       f      i2s1m0-sclkrx           
G                       e      i2s1m0-sclktx           
G                       d      i2s1m0-sdi0         
G                       h      i2s1m0-sdi1         
G      
                 i      i2s1m0-sdi2         
G      	                 j      i2s1m0-sdi3         
G                       k      i2s1m0-sdo0         
G                       l      i2s1m0-sdo1         
G                       m      i2s1m0-sdo2         
G      	                 n      i2s1m0-sdo3         
G      
                 o         i2s2       i2s2m0-lrcktx           
G                       q      i2s2m0-sclktx           
G                       p      i2s2m0-sdi          
G                       r      i2s2m0-sdo          
G                       s         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
G                       t      pdmm0-clk1          
G                       u      pdmm0-sdi0          
G                       v      pdmm0-sdi1          
G      
                 w      pdmm0-sdi2          
G      	                 x      pdmm0-sdi3          
G                       y         pmic       pmic_int            
G                         $         pmu       pwm0       pwm0m0-pins         
G                        (         pwm1       pwm1m0-pins         
G                        )         pwm2       pwm2m0-pins         
G                        *         pwm3       pwm3-pins           
G                        +         pwm4       pwm4-pins           
G                                 pwm5       pwm5-pins           
G                                 pwm6       pwm6-pins           
G                                 pwm7       pwm7-pins           
G                                 pwm8       pwm8m0-pins         
G      	                          pwm9       pwm9m0-pins         
G      
                          pwm10      pwm10m0-pins            
G                                pwm11      pwm11m0-pins            
G                                pwm12      pwm12m1-pins            
G                                pwm13      pwm13m0-pins            
G                                pwm14      pwm14m0-pins            
G                                pwm15      pwm15m0-pins            
G                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
G                                                            Z      sdmmc0-clk          
G                       [      sdmmc0-cmd          
G                       \         sdmmc1        sdmmc2        spdif      spdifm0-tx          
G                       z         spi0       spi0m0-pins       0  
G                                                        spi0m0-cs0          
G                              spi0m0-cs1          
G                                 spi1       spi1m0-pins       0  
G                                                     spi1m0-cs0          
G                             spi1m0-cs1          
G                                spi2       spi2m0-pins       0  
G                                                     spi2m0-cs0          
G                             spi2m0-cs1          
G                                spi3       spi3m0-pins       0  
G                              
                       spi3m0-cs0          
G                             spi3m0-cs1          
G                                tsadc      tsadc-shutorg           
G                              tsadc-pin           
G                                  uart0      uart0-xfer           
G                                     '         uart1      uart1m0-xfer             
G                                            uart2      uart2m0-xfer             
G                                              uart3      uart3m0-xfer             
G                                             uart4      uart4m0-xfer             
G                                            uart5      uart5m0-xfer             
G                                            uart6      uart6m0-xfer             
G                                            uart7      uart7m0-xfer             
G                                            uart8      uart8m0-xfer             
G                                            uart9      uart9m0-xfer             
G                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       leds       led_user_en         
G                                  pcie       pcie20-reset-h          
G      
                  W      pcie30x1-enable-h           
G                               pcie30x1-reset-h            
G                               pcie30x2-reset-h            
G                              pcie-enable-h           
G                                  usb    minipcie-enable-h           
G                              ngffpcie-enable-h           
G                               vbus_typec_en           
G                                     opp-table-0          ,operating-points-v2          
U              opp-408000000           
`    Q         
g P P 0        
u  @      opp-600000000           
`    #F         
g P P 0        
u  @      opp-816000000           
`    0,         
g P P 0        
u  @         
      opp-1104000000          
`    Aʹ         
g   0        
u  @      opp-1416000000          
`    Tfr         
g   0        
u  @      opp-1608000000          
`    _"         
g   0        
u  @      opp-1800000000          
`    kI         
g 0 0 0        
u  @      opp-1992000000          
`    v         
g 0 0 0        
u  @         opp-table-1          ,operating-points-v2            F   opp-200000000           
`             
g P P B@      opp-300000000           
`             
g P P B@      opp-400000000           
`    ׄ         
g P P B@      opp-600000000           
`    #F         
g   B@      opp-700000000           
`    )'         
g ~ ~ B@      opp-800000000           
`    /         
g B@ B@ B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                            sata pmalive rxoob          D       ^                       	  sata-phy                                   	  disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        qos@fe190080             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190100             ,rockchip,rk3568-qos syscon                                   @      qos@fe190200             ,rockchip,rk3568-qos syscon                                   A      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                 	                   &      '     w        refclk_m refclk_n pclk                       xphy         
           okay            
                       pcie@fe270000            ,rockchip,rk3568-pcie                                                 (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  D                                                          Hsys pmc msg legacy err          J                                `                                                                                                                                                 V                                  	  pcie-phy                        0      @       @      '                             T  b                                                   @      @       @           ^dbi apb config                        xpipe            okay            default                       #                     legacy-interrupt-controller          5                     J                        D                              pcie@fe280000            ,rockchip,rk3568-pcie                                            /      (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  D                                                          Hsys pmc msg legacy err          J                                `                                                                                                                                                  V                                   	  pcie-phy                        0             @      (                             T  b                                                                @           ^dbi apb config                        xpipe            okay            default                                         Y   legacy-interrupt-controller          5                     J                        D                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                 D                            Hmacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  xstmmaceth           a                                                             	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                       "                    rx-queues-config            2                 queue0           tx-queues-config            H                 queue0              can@fe570000             ,rockchip,rk3568v2-canfd              W                 D                        A     @      
  baud pclk                U     T      	  xcore apb            default                  	  disabled          can@fe580000             ,rockchip,rk3568v2-canfd              X                 D                        C     B      
  baud pclk                W     V      	  xcore apb            default                  	  disabled          can@fe590000             ,rockchip,rk3568v2-canfd              Y                 D                        E     D      
  baud pclk                Y     X      	  xcore apb            default                  	  disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                            |              ref apb pipe            %              5                      xphy         	           	           	           okay                     chosen          
serial2:115200n8          gpio-leds         
   ,gpio-leds      led-0              #             
  
heartbeat           
         
  
heartbeat           default                     regulator-pcie30-avdd0v9             ,regulator-fixed         pcie30_avdd0v9                                                 %      regulator-pcie30-avdd1v8             ,regulator-fixed         pcie30_avdd1v8                             w@         w@           %      regulator-vcc3v3-sys             ,regulator-fixed         vcc3v3_sys                             2Z         2Z           "           %      regulator-vcc5v0-sys             ,regulator-fixed         vcc5v0_sys                             LK@         LK@           "                 regulator-vcc5v-input            ,regulator-fixed         vcc5v_input                            LK@         LK@           "      pwm-leds             ,pwm-leds-multicolor    multi-led           
   	        
status          
      led-red         
           
        B@          led-green           
           
        B@          led-blue            
           
        B@                regulator-vbus-typec             ,regulator-fixed          
           #               default                    vbus_typec           LK@         LK@                            regulator-vcc3v3-minipcie            ,regulator-fixed          
                          default                    vcc3v3_minipcie          2Z         2Z           Y                 regulator-vcc3v3-ngff            ,regulator-fixed          
           #               default                    vcc3v3_ngff          2Z         2Z                            regulator-vcc3v3-pcie30x1            ,regulator-fixed          
           #               default                    vcc3v3_pcie30x1          2Z         2Z                            regulator-vcc3v3-pi6c-05             ,regulator-fixed          
           #               default                    vcc3v3_pcie          2Z         2Z                      Y         	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports status arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names rockchip,disable-mmu-reset fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names #sound-dai-cells rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes reset-gpios vpcie3v3-supply bus-width cap-sd-highspeed cd-gpios disable-wp sd-uhs-sdr104 vmmc-supply vqmmc-supply non-removable dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells phy-supply rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf data-lanes stdout-path function color linux,default-trigger max-brightness pwms enable-active-high gpio 