  _   8  Ռ   (            
  T                                                                      ,prt,mecsbc rockchip,rk3568           7Protonic MECSBC    aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe310000            /mmc@fe2b0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                       psci                       (   @        :           G           T   @        f           s                                    
      cpu@100          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                          cpu@200          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                          cpu@300          cpu          ,arm,cortex-a55                                                      psci                       (   @        :           G           T   @        f           s                                             l3-cache             ,cache                                          *   @        <                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            ˂                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI             i2s                  	  3disabled       simple-audio-card,codec         :         simple-audio-card,cpu           :   	         pmu          ,arm,cortex-a55-pmu        0  D                                                O   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   b   shmem@10f000             ,arm,scmi-shmem                                 i                    timer            ,arm,armv8-timer       0  D                                 
            p      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          D       _                       	  sata-phy                                   	  3disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          D       `                       	  sata-phy                                   	  3disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          D                                             ref_clk suspend_clk bus_clk         host          
  utmi_wide                                                3okay                             usb2-phy usb3-phy           .         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          D                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                                3okay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 D      	            5        J           [    A          e  (            p         b                                                msi-controller@fd440000          ,arm,gic-v3-its               D                           p                      Y         usb@fd800000             ,generic-ehci                                  D                                                        usb         3okay          usb@fd840000             ,generic-ohci                                  D                                                        usb         3okay          usb@fd880000             ,generic-ehci                                  D                                                        usb         3okay          usb@fd8c0000             ,generic-ohci                                  D                                                        usb         3okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     W   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           3okay                                                                                                    
            syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                               clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                                %                          5   G          J              a                    i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               D       .                        -      	  i2c pclk                       default                                   3okay       regulator@60             ,fcs,fan53555                `        n           vdd_cpu                            5          0                        regulator-state-mem                      serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 D       t                        ,        baudclk apb_pclk                                      !        default         #           0         	  3disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               "        default         :         	  3disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               #        default         :           3okay                     pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               $        default         :           3okay                     pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               %        default         :         	  3disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            E                                           power-domain@7                                           Y   &        E          power-domain@8                                           Y   '   (   )        E          power-domain@9              	                                   Y   *   +   ,        E          power-domain@10             
                             Y   -   .   /   0   1   2        E          power-domain@11                                    Y   3        E          power-domain@13                                   Y   4        E          power-domain@14                                   Y   5   6   7        E          power-domain@15                                     Y   8   9   :   ;   <   =   >   ?        E                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  D       (          )          '           `job mmu gpu                              gpu bus                                   3okay               @        p   A                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               D                  `vdpu                               
  aclk hclk           |   B                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        D                  aclk iface                                                            B      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              D       Z                                      aclk hclk sclk               &     $     %        core axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  D       @                              
  aclk hclk           |   C              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        D       ?                                aclk iface                
                       C      video-capture@fdfe0000           ,rockchip,rk3568-vicap                                 D                  %              5                                           aclk hclk dclk iclk         |   D                    (                                        arst hrst drst prst irst            a         	  3disabled       ports                                port@0                     port@1                          iommu@fdfe0800           ,rockchip,rk3568-iommu                                D                                       aclk iface                                           	  3disabled               D      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         D       d                                           biu ciu ciu-drive ciu-sample                       р                      reset         	  3disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 D                             `macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  stmmaceth           a              E                    F           G                 3okay            %                  J                       H      	  +rgmii-id            4output          default            I   J   K   L   M   N   mdio             ,snps,dwmac-mdio                              ethernet-phy@2           ,ethernet-phy-ieee802.3-c22                      default            O        A  N         Q         c   P                 H         stmmac-axi-config           o                                 y                         E      rx-queues-config                          F   queue0           tx-queues-config                          G   queue0              vop@fe040000                          0     @                vop gamma-lut           D                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            |   Q              	        a         	  3disabled             ,rockchip,rk3568-vop    ports                                           port@0                                               port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                D                                       aclk iface                            	      	  3disabled               Q      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       D           pclk                           dphy               R              	        apb                      a         	  3disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 D       E           pclk                           dphy               S              	        apb                      a         	  3disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 D       -         (                          (              iahb isfr cec ref           default            T   U   V              	        #           a                     	  3disabled                  ports                                port@0                     port@1                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   &      qos@fe138080             ,rockchip,rk3568-qos syscon                                  5      qos@fe138100             ,rockchip,rk3568-qos syscon                                   6      qos@fe138180             ,rockchip,rk3568-qos syscon                                  7      qos@fe148000             ,rockchip,rk3568-qos syscon                                   '      qos@fe148080             ,rockchip,rk3568-qos syscon                                  (      qos@fe148100             ,rockchip,rk3568-qos syscon                                   )      qos@fe150000             ,rockchip,rk3568-qos syscon                                    3      qos@fe158000             ,rockchip,rk3568-qos syscon                                   -      qos@fe158100             ,rockchip,rk3568-qos syscon                                   .      qos@fe158180             ,rockchip,rk3568-qos syscon                                  /      qos@fe158200             ,rockchip,rk3568-qos syscon                                   0      qos@fe158280             ,rockchip,rk3568-qos syscon                                  1      qos@fe158300             ,rockchip,rk3568-qos syscon                                   2      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    8      qos@fe190280             ,rockchip,rk3568-qos syscon                                  <      qos@fe190300             ,rockchip,rk3568-qos syscon                                   =      qos@fe190380             ,rockchip,rk3568-qos syscon                                  >      qos@fe190400             ,rockchip,rk3568-qos syscon                                   ?      qos@fe198000             ,rockchip,rk3568-qos syscon                                   4      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   *      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  +      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   ,      dfi@fe230000             ,rockchip,rk3568-dfi              #                 D                     W      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               dbi apb config        <  D       K          J          I          H          G           `sys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         J                                `  
                  X                      X                     X                     X                       )           8           G           V       Y               ^                       	  pcie-phy                        T  b                                                                  @                         pipe                                     3okay            default            Z        c   [          legacy-interrupt-controller                      J            5                     D       H              X         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         D       b                                           biu ciu ciu-drive ciu-sample                       р                      reset           3okay            h            r           \                       default            ]   ^   _   `                                              mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         D       c                                           biu ciu ciu-drive ciu-sample                       р                      reset         	  3disabled          spi@fe300000             ,rockchip,sfc                 0        @         D       e                  x      v        clk_sfc hclk_sfc               a        default       	  3disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 D                  %      {      }        5 n6       (         |      z      y      {      }        core bus axi block timer            3okay            h                             default            b   c   d   e                                                       rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb                  m        3okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 D       4           %      =      A        5Fq Fq                ?      C      9        mclk_tx mclk_rx hclk               f            tx                P      Q      
  tx-m rx-m           a                     	  3disabled               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 D       5           %      E      I        5Fq Fq                G      K      :        mclk_tx mclk_rx hclk               f      f           rx tx                 R      S      
  tx-m rx-m           a           default            g   h   i   j                    3okay                               i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 D       6           %      M        5Fq                O      O      ;        mclk_tx mclk_rx hclk               f      f           tx rx                 T        tx-m            a           default            k   l   m   n                  	  3disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 D       7                  S      W      <        mclk_tx mclk_rx hclk               f      f           tx rx                 U      V      
  tx-m rx-m           a                     	  3disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 D       L                  Z      Y        pdm_clk pdm_hclk               f   	        rx             o   p   q   r   s   t        default               X        pdm-m                     	  3disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 D       f         
  mclk hclk                  _      \           f           tx          default            u                  	  3disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         D                                                 	  apb_pclk            2                     dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         D                                                 	  apb_pclk            2              f      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 D       /                 H     G      	  i2c pclk               v        default                                 	  3disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 D       0                 J     I      	  i2c pclk               w        default                                 	  3disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 D       1                 L     K      	  i2c pclk               x        default                                   3okay       amplifier@4c             ,ti,tas2562              L                    =   y                    y        default            z        D              L                        i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 D       2                 N     M      	  i2c pclk               {        default                                 	  3disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 D       3                 P     O      	  i2c pclk               |        default                                   3okay       temperature-sensor@48            ,ti,tmp1075              H      rtc@51           ,nxp,pcf85363                Q                    rtcic_32kout             watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 D                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 D       g                 R     Q        spiclk apb_pclk                               tx rx           default            }   ~                                  3okay       fram@0           ,fujitsu,mb85rs128ty                      \@         spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 D       h                 T     S        spiclk apb_pclk                               tx rx           default                                                  	  3disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 D       i                 V     U        spiclk apb_pclk                               tx rx           default                                                  	  3disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 D       j                 X     W        spiclk apb_pclk                               tx rx           default                                                  	  3disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 D       u                              baudclk apb_pclk                                             default         #           0         	  3disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 D       v                 #              baudclk apb_pclk                                             default         #           0           3okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 D       w                 '     $        baudclk apb_pclk                                             default         #           0         	  3disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 D       x                 +     (        baudclk apb_pclk                          	                   default         #           0         	  3disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 D       y                 /     ,        baudclk apb_pclk                   
                          default         #           0         	  3disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 D       z                 3     0        baudclk apb_pclk                                             default         #           0         	  3disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 D       {                 7     4        baudclk apb_pclk                                             default         #           0         	  3disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 D       |                 ;     8        baudclk apb_pclk                                             default         #           0         	  3disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 D       }                 ?     <        baudclk apb_pclk                                             default         #           0         	  3disabled          thermal-zones      cpu-thermal         n   d                            trips      cpu_alert0           p                   passive                  cpu_alert1           $                   passive       cpu_crit             s                	   critical             cooling-maps       map0                     0     
                     gpu-thermal         n                              trips      gpu-threshold            p                   passive       gpu-target           $                   passive                  gpu-crit             s                	   critical             cooling-maps       map0                                         tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 D       s           %                  5f@ 
`                           tsadc apb_pclk                                 a            s        default sleep                                            3okay            	           	                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 D       ]                              saradc apb_pclk                      saradc-apb          	6           3okay            	H         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         :         	  3disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default         :         	  3disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default         :         	  3disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default         :         	  3disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         :         	  3disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default         :         	  3disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default         :         	  3disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default         :         	  3disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         :         	  3disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default         :         	  3disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default         :         	  3disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default         :         	  3disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe            %      "        5                      phy         	T           	f           	|           3okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe            %      %        5                      phy         	T           	f           	|           3okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            	|                         apb         a         	  3disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        	|                  	        apb                    	  3disabled               R      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        	|                  	        apb                    	  3disabled               S      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            D                  	                       3okay                  host-port           	|            3okay                     otg-port            	|            3okay                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            D                  	                       3okay       host-port           	|            3okay                     otg-port            	|            3okay                        pinctrl          ,rockchip,rk3568-pinctrl         a              W                                  b              gpio@fdd60000            ,rockchip,gpio-bank                                D       !                  .               	        	                       	            5        J              \      gpio@fe740000            ,rockchip,gpio-bank               t                 D       "                 c     d         	        	                       	            5        J              y      gpio@fe750000            ,rockchip,gpio-bank               u                 D       #                 e     f         	        	          @            	            5        J                    gpio@fe760000            ,rockchip,gpio-bank               v                 D       $                 g     h         	        	          `            	            5        J              [      gpio@fe770000            ,rockchip,gpio-bank               w                 D       %                 i     j         	        	                      	            5        J              P      pcfg-pull-up             	                 pcfg-pull-none           	                 pcfg-pull-none-drv-level-1           	        	                    pcfg-pull-none-drv-level-2           	        	                    pcfg-pull-none-drv-level-3           	        	                    pcfg-pull-up-drv-level-1             	        	                    pcfg-pull-up-drv-level-2             	        	                    pcfg-pull-none-smt           	         	                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          	                                              can1       can1m1-pins          	                                            can2       can2m0-pins          	                                            cif       clk32k     clk32k-out0         	                                 cpu       ebc       edpdp         emmc       emmc-bus8           	                                                                                                           b      emmc-clk            	                       c      emmc-cmd            	                       d      emmc-datastrobe         	                       e         eth0          eth1          flash         fspi       fspi-pins         `  	                                                                                   a         gmac0         gmac1      gmac1m1-miim             	                                   I      gmac1m1-clkinout            	                       M      gmac1m1-rx-bus2       0  	                              	                 K      gmac1m1-tx-bus2       0  	                                               J      gmac1m1-rgmii-clk            	                                    L      gmac1m1-rgmii-bus         @  	                                                           N         gpu       hdmitx     hdmitxm0-cec            	                       V      hdmitx-scl          	                       T      hdmitx-sda          	                       U         i2c0       i2c0-xfer            	       	             
                          i2c1       i2c1-xfer            	                                     v         i2c2       i2c2m0-xfer          	                                     w         i2c3       i2c3m0-xfer          	                                    x         i2c4       i2c4m0-xfer          	                  
                 {         i2c5       i2c5m0-xfer          	                                   |         i2s1       i2s1m0-lrcktx           	                       h      i2s1m0-sclktx           	                       g      i2s1m0-sdi0         	                       i      i2s1m0-sdo0         	                       j         i2s2       i2s2m0-lrcktx           	                       l      i2s2m0-sclktx           	                       k      i2s2m0-sdi          	                       m      i2s2m0-sdo          	                       n         i2s3          isp       jtag          lcdc          mcu       npu       pcie20     pcie20m1-pins         0  	                                               Z         pcie30x1          pcie30x2       pcie30x2m1-pins       0  	                                                        pdm    pdmm0-clk           	                       o      pdmm0-clk1          	                       p      pdmm0-sdi0          	                       q      pdmm0-sdi1          	      
                 r      pdmm0-sdi2          	      	                 s      pdmm0-sdi3          	                       t         pmic          pmu       pwm0       pwm0m0-pins         	                        "         pwm1       pwm1m0-pins         	                        #         pwm2       pwm2m0-pins         	                        $         pwm3       pwm3-pins           	                        %         pwm4       pwm4-pins           	                                 pwm5       pwm5-pins           	                                 pwm6       pwm6-pins           	                                 pwm7       pwm7-pins           	                                 pwm8       pwm8m0-pins         	      	                          pwm9       pwm9m0-pins         	      
                          pwm10      pwm10m0-pins            	                                pwm11      pwm11m0-pins            	                                pwm12      pwm12m0-pins            	                                pwm13      pwm13m0-pins            	                                pwm14      pwm14m0-pins            	                                pwm15      pwm15m0-pins            	                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  	                                                            ]      sdmmc0-clk          	                       ^      sdmmc0-cmd          	                       _      sdmmc0-det          	                        `         sdmmc1        sdmmc2        spdif      spdifm0-tx          	                       u         spi0       spi0m0-pins       0  	                                                  }      spi0m0-cs0          	                        ~         spi1       spi1m0-pins       0  	                                                     spi1m0-cs0          	                             spi1m0-cs1          	                                spi2       spi2m0-pins       0  	                                                     spi2m0-cs0          	                             spi2m0-cs1          	                                spi3       spi3m0-pins       0  	                              
                       spi3m0-cs0          	                             spi3m0-cs1          	                                tsadc      tsadc-shutorg           	                              tsadc-pin           	                                  uart0      uart0-xfer           	                                     !         uart1      uart1m0-xfer             	                                            uart2      uart2m0-xfer             	                                              uart3      uart3m0-xfer             	                                             uart4      uart4m0-xfer             	                                            uart5      uart5m0-xfer             	                                            uart6      uart6m0-xfer             	                                            uart7      uart7m0-xfer             	                                            uart8      uart8m0-xfer             	                                            uart9      uart9m0-xfer             	                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       ethernet       eth-phy1-rst            	                        O         tas2562    tas2562         	                        z            opp-table-0          ,operating-points-v2          
              opp-408000000           
    Q         
 P P 0        
+  @      opp-600000000           
    #F         
 P P 0        
+  @      opp-816000000           
    0,         
 P P 0        
+  @         
<      opp-1104000000          
    Aʹ         
   0        
+  @      opp-1416000000          
    Tfr         
   0        
+  @      opp-1608000000          
    _"         
   0        
+  @      opp-1800000000          
    kI         
 0 0 0        
+  @      opp-1992000000          
    v         
 0 0 0        
+  @         opp-table-1          ,operating-points-v2            @   opp-200000000           
             
 8      opp-300000000           
             
 8      opp-400000000           
    ׄ         
 8      opp-600000000           
    #F         
 	      opp-700000000           
    )'         
 ~      opp-800000000           
    /         
 B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                            sata pmalive rxoob          D       ^                       	  sata-phy                                   	  3disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        qos@fe190080             ,rockchip,rk3568-qos syscon                                   9      qos@fe190100             ,rockchip,rk3568-qos syscon                                   :      qos@fe190200             ,rockchip,rk3568-qos syscon                                   ;      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                 	|                   &      '     w        refclk_m refclk_n pclk                       phy         
H           3okay                     pcie@fe270000            ,rockchip,rk3568-pcie                                                 (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  D                                                          `sys pmc msg legacy err          J                                `  
                                                                                                        )           8           G           V      Y              ^                    	  pcie-phy                        0      @       @      '                             T  b                                                   @      @       @           dbi apb config                        pipe          	  3disabled       legacy-interrupt-controller          5                     J                        D                              pcie@fe280000            ,rockchip,rk3568-pcie                                            /      (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  D                                                          `sys pmc msg legacy err          J                                `  
                                                                                                        )           8           G           V       Y               ^                    	  pcie-phy                        0             @      (                             T  b                                                                @           dbi apb config                        pipe            3okay            default                    c                  
Y      legacy-interrupt-controller          5                     J                        D                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                 D                            `macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  stmmaceth           a                                                            	  3disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config           o                                 y                               rx-queues-config                             queue0           tx-queues-config                             queue0              can@fe570000          0   ,rockchip,rk3568v3-canfd rockchip,rk3568v2-canfd              W                 D                        A     @      
  baud pclk                U     T      	  core apb            default                    3okay          can@fe580000          0   ,rockchip,rk3568v3-canfd rockchip,rk3568v2-canfd              X                 D                        C     B      
  baud pclk                W     V      	  core apb            default                    3okay          can@fe590000             ,rockchip,rk3568v2-canfd              Y                 D                        E     D      
  baud pclk                Y     X      	  core apb            default                  	  3disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                            |              ref apb pipe            %              5                      phy         	T           	f           	|           3okay                     chosen          
iserial2:1500000n8         tas2562-sound            ,simple-audio-card            i2s         Speaker               simple-audio-card,cpu           :         simple-audio-card,codec         :            regulator-vdd-gpu            ,pwm-regulator           
u                    vdd_gpu          8         B@                          
z           
       d           A      regulator-p3v3           ,regulator-fixed         p3v3                               2Z         2Z                 regulator-p1v8           ,regulator-fixed         p1v8                               w@         w@                 regulator-sd             ,regulator-gpio          
   \                
        i   \               sdcard-gpio-supply           w@         2Z        
 w@    2Z                     regulator-vdd-npu            ,pwm-regulator           
u                    vdd_npu          8         B@                          
z           
       d         	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names rockchip,disable-mmu-reset fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-handle phy-mode clock_in_out reset-assert-us reset-deassert-us reset-gpios snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names #sound-dai-cells rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-sd-highspeed cd-gpios disable-wp sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply non-removable mmc-hs200-1_8v no-sd no-sdio dma-names rockchip,trcm-sync-tx-only arm,pl330-periph-burst #dma-cells shutdown-gpios ti,imon-slot-no spi-max-frequency polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf vpcie3v3-supply stdout-path pwms regulator-settling-time-up-us pwm-dutycycle-range enable-gpios enable-active-high states 