  R   8  4   (                                                                                 %   ,lunzn,fastrhino-r66s rockchip,rk3568             7Lunzn FastRhino R66S       aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe2b0000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                       psci                       #   @        5           B           O   @        a           n                                    
      cpu@100          cpu          ,arm,cortex-a55                                                      psci                       #   @        5           B           O   @        a           n                                          cpu@200          cpu          ,arm,cortex-a55                                                      psci                       #   @        5           B           O   @        a           n                                          cpu@300          cpu          ,arm,cortex-a55                                                      psci                       #   @        5           B           O   @        a           n                                             l3-cache             ,cache                                          %   @        7                    display-subsystem            ,rockchip,display-subsystem                   	  disabled          firmware       scmi             ,arm,scmi-smc            ͂                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI            i2s                  	  disabled       simple-audio-card,codec         5         simple-audio-card,cpu           5   	         pmu          ,arm,cortex-a55-pmu        0  ?                                                J   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   ]   shmem@10f000             ,arm,scmi-shmem                                 d                    timer            ,arm,armv8-timer       0  ?                                 
            k      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          ?       _                       	  sata-phy                                   	  disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          ?       `                       	  sata-phy                                   	  disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          ?                                             ref_clk suspend_clk bus_clk         host          
   utmi_wide                         	                       okay                             usb2-phy usb3-phy           )         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          ?                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
   utmi_wide                         	                       okay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 ?      	            0        E           V    A          `  (            k         ]                                  z              msi-controller@fd440000          ,arm,gic-v3-its               D                  z         k                      U         usb@fd800000             ,generic-ehci                                  ?                                                        usb       	  disabled          usb@fd840000             ,generic-ohci                                  ?                                                        usb       	  disabled          usb@fd880000             ,generic-ehci                                  ?                                                        usb       	  disabled          usb@fd8c0000             ,generic-ohci                                  ?                                                        usb       	  disabled          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     S   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           okay                                                                                                                syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                               clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                                                           0   G          E              \                    i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               ?       .                        -      	  i2c pclk                        default                                   okay       regulator@1c             ,tcs,tcs4525                     i           vdd_cpu                            5          0                      !              regulator-state-mem                   pmic@20          ,rockchip,rk809                            "        ?                         default            #         $        <   $        H   $        T   $        `   $        l   $        x   $           $           $           $            regulators     DCDC_REG1         
  vdd_logic                                                   p          q   regulator-state-mem                   DCDC_REG2           vdd_gpu                                        p          q           F   regulator-state-mem                   DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                               p          q   regulator-state-mem                   DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem                   LDO_REG1            vdda0v9_image            ~         ~   regulator-state-mem                   LDO_REG2          	  vdda_0v9                                           regulator-state-mem                   LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                            LDO_REG4            vccio_acodec                      2Z         2Z   regulator-state-mem                   LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem                   LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem                   LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                   w@         LDO_REG9            vcca1v8_image            ~         w@   regulator-state-mem                   ~         SWITCH_REG1         vcc_3v3                                 regulator-state-mem                   SWITCH_REG2       
  vcc3v3_sd              Z   regulator-state-mem                            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 ?       t                        ,        baudclk apb_pclk               %       %              &        default                             	  disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               '        default                  	  disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               (        default                  	  disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               )        default                  	  disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               *        default                  	  disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            (                                           power-domain@7                                           <   +        (          power-domain@8                                           <   ,   -   .        (          power-domain@9              	                                   <   /   0   1        (          power-domain@10             
                             <   2   3   4   5   6   7        (          power-domain@11                                    <   8        (          power-domain@13                                   <   9        (          power-domain@14                                   <   :   ;   <        (          power-domain@15                                     <   =   >   ?   @   A   B   C   D        (                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  ?       (          )          '           Cjob mmu gpu                              gpu bus                                   okay               E        S   F                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               ?                  Cvdpu                               
  aclk hclk           _   G                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        ?                  aclk iface                                             f               G      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              ?       Z                                      aclk hclk sclk          	     &     $     %        score axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  ?       @                              
  aclk hclk           _   H              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        ?       ?                                aclk iface                
        f               H      video-capture@fdfe0000           ,rockchip,rk3568-vicap                                 ?                                 0                                           aclk hclk dclk iclk         _   I                    (  	                                      sarst hrst drst prst irst            \         	  disabled       ports                                port@0                     port@1                          iommu@fdfe0800           ,rockchip,rk3568-iommu                                ?                                       aclk iface          f                                 	  disabled               I      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         ?       d                                           biu ciu ciu-drive ciu-sample                       р        	              sreset         	  disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 ?                             Cmacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          	            
  sstmmaceth           \              J                    K           L               	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                     J      rx-queues-config            -              K   queue0           tx-queues-config            C              L   queue0              vop@fe040000                          0     @                Yvop gamma-lut           ?                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            _   M              	        \           okay             ,rockchip,rk3568-vop                              E               ports                                           port@0                                               port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                ?                                       aclk iface          f                  	        okay               M      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 ?       D           pclk                           dphy               N              	        sapb         	             \         	  disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 ?       E           pclk                           dphy               O              	        sapb         	             \         	  disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 ?       -         (                          (              iahb isfr cec ref           default            P   Q   R              	                   \           c          	  disabled                  ports                                port@0                     port@1                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   +      qos@fe138080             ,rockchip,rk3568-qos syscon                                  :      qos@fe138100             ,rockchip,rk3568-qos syscon                                   ;      qos@fe138180             ,rockchip,rk3568-qos syscon                                  <      qos@fe148000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe148080             ,rockchip,rk3568-qos syscon                                  -      qos@fe148100             ,rockchip,rk3568-qos syscon                                   .      qos@fe150000             ,rockchip,rk3568-qos syscon                                    8      qos@fe158000             ,rockchip,rk3568-qos syscon                                   2      qos@fe158100             ,rockchip,rk3568-qos syscon                                   3      qos@fe158180             ,rockchip,rk3568-qos syscon                                  4      qos@fe158200             ,rockchip,rk3568-qos syscon                                   5      qos@fe158280             ,rockchip,rk3568-qos syscon                                  6      qos@fe158300             ,rockchip,rk3568-qos syscon                                   7      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    =      qos@fe190280             ,rockchip,rk3568-qos syscon                                  A      qos@fe190300             ,rockchip,rk3568-qos syscon                                   B      qos@fe190380             ,rockchip,rk3568-qos syscon                                  C      qos@fe190400             ,rockchip,rk3568-qos syscon                                   D      qos@fe198000             ,rockchip,rk3568-qos syscon                                   9      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   /      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  0      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   1      dfi@fe230000             ,rockchip,rk3568-dfi              #                 ?                  t   S      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               Ydbi apb config        <  ?       K          J          I          H          G           Csys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         E                                `                    T                      T                     T                     T                                                               U                                      	  pcie-phy                        T  ]                                                                  @           	              spipe                                   	  disabled       legacy-interrupt-controller                      E            0                     ?       H              T         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         ?       b                                           biu ciu ciu-drive ciu-sample                       р        	              sreset           okay                                          )         4         <         C        default            V   W   X   Y        P   Z        \         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         ?       c                                           biu ciu ciu-drive ciu-sample                       р        	              sreset         	  disabled          spi@fe300000             ,rockchip,sfc                 0        @         ?       e                  x      v        clk_sfc hclk_sfc               [        default       	  disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 ?                         {      }        0 n6       (         |      z      y      {      }        core bus axi block timer          	  disabled          rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb            	      m        okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 ?       4                  =      A        0Fq Fq                ?      C      9        mclk_tx mclk_rx hclk               \            itx          	      P      Q      
  stx-m rx-m           \           c          	  disabled               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 ?       5                  E      I        0Fq Fq                G      K      :        mclk_tx mclk_rx hclk               \      \           irx tx           	      R      S      
  stx-m rx-m           \           default       0     ]   ^   _   `   a   b   c   d   e   f   g   h        c          	  disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 ?       6                  M        0Fq                O      O      ;        mclk_tx mclk_rx hclk               \      \           itx rx           	      T        stx-m            \           default            i   j   k   l        c          	  disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 ?       7                  S      W      <        mclk_tx mclk_rx hclk               \      \           itx rx           	      U      V      
  stx-m rx-m           \           c          	  disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 ?       L                  Z      Y        pdm_clk pdm_hclk               \   	        irx             m   n   o   p   q   r        default         	      X        spdm-m           c          	  disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 ?       f         
  mclk hclk                  _      \           \           itx          default            s        c          	  disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         ?                             s                    	  apb_pclk                          %      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         ?                             s                    	  apb_pclk                          \      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 ?       /                 H     G      	  i2c pclk               t        default                                 	  disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 ?       0                 J     I      	  i2c pclk               u        default                                 	  disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 ?       1                 L     K      	  i2c pclk               v        default                                 	  disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 ?       2                 N     M      	  i2c pclk               w        default                                 	  disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 ?       3                 P     O      	  i2c pclk               x        default                                 	  disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 ?                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 ?       g                 R     Q        spiclk apb_pclk            %      %           itx rx           default            y   z   {                                	  disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 ?       h                 T     S        spiclk apb_pclk            %      %           itx rx           default            |   }   ~                                	  disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 ?       i                 V     U        spiclk apb_pclk            %      %           itx rx           default                                                  	  disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 ?       j                 X     W        spiclk apb_pclk            %      %           itx rx           default                                                  	  disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 ?       u                              baudclk apb_pclk               %      %                      default                             	  disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 ?       v                 #              baudclk apb_pclk               %      %                      default                               okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 ?       w                 '     $        baudclk apb_pclk               %      %                      default                             	  disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 ?       x                 +     (        baudclk apb_pclk               %      %   	                   default                             	  disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 ?       y                 /     ,        baudclk apb_pclk               %   
   %                      default                             	  disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 ?       z                 3     0        baudclk apb_pclk               %      %                      default                             	  disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 ?       {                 7     4        baudclk apb_pclk               %      %                      default                             	  disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 ?       |                 ;     8        baudclk apb_pclk               %      %                      default                             	  disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 ?       }                 ?     <        baudclk apb_pclk               %      %                      default                             	  disabled          thermal-zones      cpu-thermal            d                            trips      cpu_alert0           p                   passive                  cpu_alert1           $                   passive       cpu_crit             s                	   critical             cooling-maps       map0                     0     
                     gpu-thermal                                       trips      gpu-threshold            p                   passive       gpu-target           $                   passive                  gpu-crit             s                	   critical             cooling-maps       map0                                         tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 ?       s                              0f@ 
`                           tsadc apb_pclk          	                       \            s        default sleep                      	           	           okay            	+           	B                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 ?       ]                              saradc apb_pclk         	             ssaradc-apb          	]           okay            	o         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default                  	  disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default                  	  disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default                  	  disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default                  	  disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default                  	  disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default                  	  disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe                   "        0         	             sphy         	{           	           	           okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe                   %        0         	             sphy         	{           	           	         	  disabled                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            	            	             sapb         \         	  disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        	                  	        sapb         	           	  disabled               N      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        	                  	        sapb         	           	  disabled               O      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            ?                  	                       okay                  host-port           	            okay            	   !                 otg-port            	            okay            	                       usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            ?                  	                     	  disabled       host-port           	          	  disabled                     otg-port            	          	  disabled                        pinctrl          ,rockchip,rk3568-pinctrl         \           t   S                                  ]              gpio@fdd60000            ,rockchip,gpio-bank                                ?       !                  .               	        	                       	            0        E              "      gpio@fe740000            ,rockchip,gpio-bank               t                 ?       "                 c     d         	        	                       	            0        E         gpio@fe750000            ,rockchip,gpio-bank               u                 ?       #                 e     f         	        	          @            	            0        E         gpio@fe760000            ,rockchip,gpio-bank               v                 ?       $                 g     h         	        	          `            	            0        E         gpio@fe770000            ,rockchip,gpio-bank               w                 ?       %                 i     j         	        	                      	            0        E         pcfg-pull-up             	                 pcfg-pull-none           	                 pcfg-pull-none-drv-level-1           	        
                    pcfg-pull-none-drv-level-2           	        
                    pcfg-pull-none-drv-level-3           	        
                    pcfg-pull-up-drv-level-1             	        
                    pcfg-pull-up-drv-level-2             	        
                    pcfg-pull-none-smt           	         
                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
/                                              can1       can1m0-pins          
/                                             can2       can2m0-pins          
/                                            cif       clk32k     clk32k-out0         
/                                 cpu       ebc       edpdp         emmc          eth0          eth1          flash         fspi       fspi-pins         `  
/                                                                                   [         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
/                       R      hdmitx-scl          
/                       P      hdmitx-sda          
/                       Q         i2c0       i2c0-xfer            
/       	             
                           i2c1       i2c1-xfer            
/                                     t         i2c2       i2c2m0-xfer          
/                                     u         i2c3       i2c3m0-xfer          
/                                    v         i2c4       i2c4m0-xfer          
/                  
                 w         i2c5       i2c5m0-xfer          
/                                   x         i2s1       i2s1m0-lrckrx           
/                       `      i2s1m0-lrcktx           
/                       _      i2s1m0-sclkrx           
/                       ^      i2s1m0-sclktx           
/                       ]      i2s1m0-sdi0         
/                       a      i2s1m0-sdi1         
/      
                 b      i2s1m0-sdi2         
/      	                 c      i2s1m0-sdi3         
/                       d      i2s1m0-sdo0         
/                       e      i2s1m0-sdo1         
/                       f      i2s1m0-sdo2         
/      	                 g      i2s1m0-sdo3         
/      
                 h         i2s2       i2s2m0-lrcktx           
/                       j      i2s2m0-sclktx           
/                       i      i2s2m0-sdi          
/                       k      i2s2m0-sdo          
/                       l         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
/                       m      pdmm0-clk1          
/                       n      pdmm0-sdi0          
/                       o      pdmm0-sdi1          
/      
                 p      pdmm0-sdi2          
/      	                 q      pdmm0-sdi3          
/                       r         pmic       pmic-int            
/                         #         pmu       pwm0       pwm0m0-pins         
/                        '         pwm1       pwm1m0-pins         
/                        (         pwm2       pwm2m0-pins         
/                        )         pwm3       pwm3-pins           
/                        *         pwm4       pwm4-pins           
/                                 pwm5       pwm5-pins           
/                                 pwm6       pwm6-pins           
/                                 pwm7       pwm7-pins           
/                                 pwm8       pwm8m0-pins         
/      	                          pwm9       pwm9m0-pins         
/      
                          pwm10      pwm10m0-pins            
/                                pwm11      pwm11m0-pins            
/                                pwm12      pwm12m0-pins            
/                                pwm13      pwm13m0-pins            
/                                pwm14      pwm14m0-pins            
/                                pwm15      pwm15m0-pins            
/                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
/                                                            V      sdmmc0-clk          
/                       W      sdmmc0-cmd          
/                       X      sdmmc0-det          
/                        Y         sdmmc1        sdmmc2        spdif      spdifm0-tx          
/                       s         spi0       spi0m0-pins       0  
/                                                  {      spi0m0-cs0          
/                        y      spi0m0-cs1          
/                        z         spi1       spi1m0-pins       0  
/                                               ~      spi1m0-cs0          
/                       |      spi1m0-cs1          
/                       }         spi2       spi2m0-pins       0  
/                                                     spi2m0-cs0          
/                             spi2m0-cs1          
/                                spi3       spi3m0-pins       0  
/                              
                       spi3m0-cs0          
/                             spi3m0-cs1          
/                                tsadc      tsadc-shutorg           
/                              tsadc-pin           
/                                  uart0      uart0-xfer           
/                                     &         uart1      uart1m0-xfer             
/                                            uart2      uart2m0-xfer             
/                                              uart3      uart3m0-xfer             
/                                             uart4      uart4m0-xfer             
/                                            uart5      uart5m0-xfer             
/                                            uart6      uart6m0-xfer             
/                                            uart7      uart7m0-xfer             
/                                            uart8      uart8m0-xfer             
/                                            uart9      uart9m0-xfer             
/                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       gpio-leds      status-led-pin          
/                                  rockchip-key       reset-button-pin            
/                                  usb    vcc5v0-usb-otg-en           
/                                     opp-table-0          ,operating-points-v2          
=              opp-408000000           
H    Q         
O P P 0        
]  @      opp-600000000           
H    #F         
O P P 0        
]  @      opp-816000000           
H    0,         
O P P 0        
]  @         
n      opp-1104000000          
H    Aʹ         
O   0        
]  @      opp-1416000000          
H    Tfr         
O   0        
]  @      opp-1608000000          
H    _"         
O   0        
]  @      opp-1800000000          
H    kI         
O 0 0 0        
]  @      opp-1992000000          
H    v         
O 0 0 0        
]  @         opp-table-1          ,operating-points-v2            E   opp-200000000           
H             
O P P B@      opp-300000000           
H             
O P P B@      opp-400000000           
H    ׄ         
O P P B@      opp-600000000           
H    #F         
O   B@      opp-700000000           
H    )'         
O ~ ~ B@      opp-800000000           
H    /         
O B@ B@ B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                            sata pmalive rxoob          ?       ^                       	  sata-phy                                   	  disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        qos@fe190080             ,rockchip,rk3568-qos syscon                                   >      qos@fe190100             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190200             ,rockchip,rk3568-qos syscon                                   @      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                 	                   &      '     w        refclk_m refclk_n pclk          	             sphy         
z           okay            
                       pcie@fe270000            ,rockchip,rk3568-pcie                                                 (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  ?                                                          Csys pmc msg legacy err          E                                `                                                                                                                                                 U                                  	  pcie-phy                        0      @       @      '                             T  ]                                                   @      @       @           Ydbi apb config          	              spipe            okay            
   "               
      legacy-interrupt-controller          0                     E                        ?                              pcie@fe280000            ,rockchip,rk3568-pcie                                            /      (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  ?                                                          Csys pmc msg legacy err          E                                `                                                                                                                                                  U                                   	  pcie-phy                        0             @      (                             T  ]                                                                @           Ydbi apb config          	              spipe            okay            
   "               
      legacy-interrupt-controller          0                     E                        ?                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                 ?                            Cmacirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref          	            
  sstmmaceth           \                                                            	  disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                           rx-queues-config            -                 queue0           tx-queues-config            C                 queue0              can@fe570000             ,rockchip,rk3568v2-canfd              W                 ?                        A     @      
  baud pclk           	     U     T      	  score apb            default                  	  disabled          can@fe580000             ,rockchip,rk3568v2-canfd              X                 ?                        C     B      
  baud pclk           	     W     V      	  score apb            default                  	  disabled          can@fe590000             ,rockchip,rk3568v2-canfd              Y                 ?                        E     D      
  baud pclk           	     Y     X      	  score apb            default                  	  disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                            |              ref apb pipe                           0         	             sphy         	{           	           	           okay                     chosen          
serial2:1500000n8         gpio-keys         
   ,gpio-keys           default               button-reset            
   2        
   "              
reset           
           gpio-leds         
   ,gpio-leds           default               led-status          
           
status          
   "             
  
heartbeat            regulator-vcc12v-dcin            ,regulator-fixed         vcc12v_dcin                                                        regulator-vcc3v3-pcie            ,regulator-fixed         vcc3v3_pcie                            2Z         2Z            !                 regulator-vcc3v3-sys             ,regulator-fixed         vcc3v3_sys                             2Z         2Z                       $      regulator-vcc5v0-sys             ,regulator-fixed         vcc5v0_sys                             LK@         LK@                       !      regulator-vcc5v0-usb-otg             ,regulator-fixed                     "               default                    vcc5v0_usb_otg           LK@         LK@            !                    	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports status arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply vccio3-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names rockchip,disable-mmu-reset fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names #sound-dai-cells rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp no-sdio no-mmc sd-uhs-sdr50 vmmc-supply vqmmc-supply dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf data-lanes reset-gpios vpcie3v3-supply stdout-path debounce-interval label linux,code color function linux,default-trigger enable-active-high gpio 