  {   8  t   (              t                             )    friendlyarm,nanopi-zero2 rockchip,rk3528                                     +            7FriendlyElec NanoPi Zero2      aliases          =/pinctrl/gpio@ff610000           C/pinctrl/gpio@ffaf0000           I/pinctrl/gpio@ffb00000           O/pinctrl/gpio@ffb10000           U/pinctrl/gpio@ffb20000           [/soc/ethernet@ffbe0000           e/soc/i2c@ffa58000            j/soc/mmc@ffbf0000            o/soc/mmc@ffc30000            t/soc/serial@ff9f0000          cpus                         +       cpu-map    cluster0       core0            |         core1            |         core2            |         core3            |               cpu@0             arm,cortex-a53                        cpu          psci                                                             cpu@1             arm,cortex-a53                       cpu          psci                                                             cpu@2             arm,cortex-a53                       cpu          psci                                                             cpu@3             arm,cortex-a53                       cpu          psci                                                                firmware       scmi              arm,scmi-smc             ̂              	                     +       protocol@14                                                 opp-table-cpu             operating-points-v2                          opp-1200000000               G           Y Y         
  @      opp-1416000000               Tfr           H H         
  @      opp-1608000000               _"                     
  @      opp-1800000000               kI           Լ Լ         
  @      opp-2016000000               x)                     
  @         opp-table-gpu             operating-points-v2             .   opp-300000000                           Y Y B@               opp-500000000                e           Y Y B@      opp-600000000                #F           Y Y B@      opp-700000000                )'             B@      opp-800000000                /           ~ ~ B@         pinctrl           rockchip,rk3528-pinctrl         '   
                     +            4               gpio@ff610000             rockchip,gpio-bank               a                       r     s        ;       G            F        V           b                        n                 gpio@ffaf0000             rockchip,gpio-bank                                                     ;       I            F        V           b                        n                               gpio@ffb00000             rockchip,gpio-bank                                      $     %        ;       K            F        V           b          @             n                               gpio@ffb10000             rockchip,gpio-bank                                                     ;       L            F        V           b          `             n                               gpio@ffb20000             rockchip,gpio-bank                                                     ;       N            F        V           b                       n                                     3      pcfg-pull-up                               pcfg-pull-none                             pcfg-pull-none-drv-level-0                                         pcfg-pull-none-drv-level-2                                        pcfg-pull-up-drv-level-2                                          pcfg-pull-none-smt                                      arm       clk       emmc       emmc-bus8                                                                                                                       N      emmc-clk                                    O      emmc-cmd                                    P      emmc-strb                                   Q         eth       fephy      fephym0-led-link                                    @      fephym0-led-spd                                 A         fspi          gpu       hdmi          hsm       i2c0          i2c1       i2c1m0-xfer                                              2         i2c2       i2c2m1-xfer                                              5         i2c3          i2c4       i2c4-xfer                                                 6         i2c5          i2c6          i2c7       i2c7-xfer                                                7         i2s0          i2s1          jtag          pcie          pdm       pmu       pwm0          pwm1       pwm1m0-pins                                 8         pwm2       pwm2m0-pins                                 9         pwm3          pwm4          pwm5          pwm6          pwm7          pwr       ref       rgmii      rgmii-miim                                               H      rgmii-rx-bus2         0                                                  J      rgmii-tx-bus2         0                                                   I      rgmii-rgmii-clk                                              K      rgmii-rgmii-bus       @                                	                              L         scr       sdio0      sdio0-bus4        @                                                               R      sdio0-clk                                   S      sdio0-cmd                                   T         sdio1      sdio1-bus4        @                                            	                  U      sdio1-clk                                   V      sdio1-cmd                                   W         sdmmc      sdmmc-bus4        @                                                               X      sdmmc-clk                                   Y      sdmmc-cmd                                   Z      sdmmc-det                                   [      sdmmc-vol-ctrl-h                                     e      sdmmc-pwren-l                                    c         spdif         spi0          spi1          tsi0          tsi1          uart0      uart0m0-xfer                                                 1         uart1         uart2         uart3         uart4         uart5         uart6         uart7         ethernet       gmac1-rstn-l                                     M         leds       led1                  	                   `      led-sys                                  a         rtc    rtc-int-l                                    4         usb    usb20-host1-pwren                                    d            psci              arm,psci-1.0 arm,psci-0.2            smc       reserved-memory                      +            4   shmem@10f000              arm,scmi-shmem                                             	         timer             arm,armv8-timer       0  ;                              
        clock-xin24m              fixed-clock         n6         xin24m                                 clock-gmac50m             fixed-clock                 gmac0                                  soc           simple-bus          4                  D                        +      pcie@fe000000         *    rockchip,rk3528-pcie rockchip,rk3568-pcie         0               @      O                               dbi apb config          "             (                                       $  ,aclk_mst aclk_slv aclk_dbi pclk aux          pci       H  ;                                                                    8sys pmc msg legacy err msi                     H                     `  [                                                                                             i            z                                  	  pcie-phy                        T  4                                                                  @                 d      b      	  pwr pipe                         +         	  disabled       legacy-interrupt-controller          n                    ;                                                       interrupt-controller@fed01000             arm,gic-400       @                                 @             `                 ;      	           n                                          qos@ff200000              rockchip,rk3528-qos syscon                                qos@ff200080              rockchip,rk3528-qos syscon                               qos@ff200100              rockchip,rk3528-qos syscon                               qos@ff200200              rockchip,rk3528-qos syscon                               qos@ff200280              rockchip,rk3528-qos syscon                              qos@ff200300              rockchip,rk3528-qos syscon                               qos@ff200380              rockchip,rk3528-qos syscon                              qos@ff210000              rockchip,rk3528-qos syscon               !                qos@ff210080              rockchip,rk3528-qos syscon               !               qos@ff220000              rockchip,rk3528-qos syscon               "                            qos@ff220080              rockchip,rk3528-qos syscon               "                           qos@ff240000              rockchip,rk3528-qos syscon               $                qos@ff250000              rockchip,rk3528-qos syscon               %                            qos@ff260000              rockchip,rk3528-qos syscon               &                            qos@ff270000              rockchip,rk3528-qos syscon               '                            qos@ff270080              rockchip,rk3528-qos syscon               '                           qos@ff270100              rockchip,rk3528-qos syscon               '                           qos@ff270200              rockchip,rk3528-qos syscon               '                           qos@ff270280              rockchip,rk3528-qos syscon               '                           qos@ff270300              rockchip,rk3528-qos syscon               '                     !      qos@ff270380              rockchip,rk3528-qos syscon               '                    "      qos@ff270480              rockchip,rk3528-qos syscon               '                    #      qos@ff270500              rockchip,rk3528-qos syscon               '                     $      qos@ff280000              rockchip,rk3528-qos syscon               (                      %      qos@ff280080              rockchip,rk3528-qos syscon               (                     &      qos@ff280100              rockchip,rk3528-qos syscon               (                     '      qos@ff280180              rockchip,rk3528-qos syscon               (                    (      qos@ff280200              rockchip,rk3528-qos syscon               (                     )      qos@ff280280              rockchip,rk3528-qos syscon               (                    *      qos@ff280300              rockchip,rk3528-qos syscon               (                     +      qos@ff280380              rockchip,rk3528-qos syscon               (                    ,      qos@ff280400              rockchip,rk3528-qos syscon               (                     -      syscon@ff340000           rockchip,rk3528-vpu-grf syscon               4                     B      syscon@ff348000       $    rockchip,rk3528-pipe-phy-grf syscon              4                    ^      syscon@ff360000           rockchip,rk3528-vo-grf syscon                6                     <      clock-controller@ff4a0000             rockchip,rk3528-cru              J                      t                                                      	      
                              z      y            L      L     Fq ; ;] Q 沀e  р  C ׄ #F  sY@e                        ,xin24m gmac0                                             syscon@ff540000           rockchip,rk3528-ioc-grf syscon               T                     
      power-management@ff600000         &    rockchip,rk3528-pmu syscon simple-mfd                `             power-controller          !    rockchip,rk3528-power-controller                                    +                   power-domain@4                                                                   power-domain@5                                           	  disabled          power-domain@6                                           power-domain@7                    $                     !   "   #   $                  power-domain@8                    $     %   &   '   (   )   *   +   ,   -                        gpu@ff700000          "    rockchip,rk3528-mali arm,mali-450                p                                     @                            	  ,bus core          T  ;       X          Y          V          \          ]          Z          [         "  8gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1               .                            w        okay            	   /      spi@ff9c0000          (    rockchip,rk3528-spi rockchip,rk3066-spi                                                    ,spiclk apb_pclk         ;                     0      0           tx rx                                      +          	  disabled          spi@ff9d0000          (    rockchip,rk3528-spi rockchip,rk3066-spi                                                    ,spiclk apb_pclk         ;                     0      0           tx rx                                      +          	  disabled          serial@ff9f0000       &    rockchip,rk3528-uart snps,dw-apb-uart                                              k        ,baudclk apb_pclk            ;       (              0   	   0           $           1           okay            ;default         I   1      serial@ff9f8000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                     ,baudclk apb_pclk            ;       )              0      0   
                      $           1         	  disabled          serial@ffa00000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                      ,baudclk apb_pclk            ;       *              0      0                         $           1         	  disabled          serial@ffa08000       &    rockchip,rk3528-uart snps,dw-apb-uart                                                     ,baudclk apb_pclk            ;       +              0      0                         $           1         	  disabled          serial@ffa10000       &    rockchip,rk3528-uart snps,dw-apb-uart                                             1        ,baudclk apb_pclk            ;       ,              0      0                         $           1         	  disabled          serial@ffa18000       &    rockchip,rk3528-uart snps,dw-apb-uart                                       "              ,baudclk apb_pclk            ;       -              0      0                         $           1         	  disabled          serial@ffa20000       &    rockchip,rk3528-uart snps,dw-apb-uart                                        %              ,baudclk apb_pclk            ;       .              0      0                         $           1         	  disabled          serial@ffa28000       &    rockchip,rk3528-uart snps,dw-apb-uart                                       (              ,baudclk apb_pclk            ;       /              0      0                         $           1         	  disabled          i2c@ffa50000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                  	  ,i2c pclk            ;       =                                      +          	  disabled          i2c@ffa58000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  ,i2c pclk            ;       >                                      +            okay            ;default         I   2   rtc@51            haoyu,hym8563               Q                         3        ;              ;default         I   4         S         i2c@ffa60000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                     j     i      	  ,i2c pclk            ;       ?           ;default         I   5                     +          	  disabled          i2c@ffa68000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  ,i2c pclk            ;       @                                      +          	  disabled          i2c@ffa70000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                     3     2      	  ,i2c pclk            ;       A           ;default         I   6                                   +          	  disabled          i2c@ffa78000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                 	  ,i2c pclk            ;       B                                      +          	  disabled          i2c@ffa80000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                                  	  ,i2c pclk            ;       C                                      +          	  disabled          i2c@ffa88000          (    rockchip,rk3528-i2c rockchip,rk3399-i2c                                    5     4      	  ,i2c pclk            ;       D           ;default         I   7                                   +          	  disabled          pwm@ffa90000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                      o      n      	  ,pwm pclk            a         	  disabled          pwm@ffa90010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     o      n      	  ,pwm pclk            a           okay            ;default         I   8            f      pwm@ffa90020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                      o      n      	  ,pwm pclk            a           okay            ;default         I   9            g      pwm@ffa90030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm               0                      o      n      	  ,pwm pclk            a         	  disabled          pwm@ffa98000          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     r      q      	  ,pwm pclk            a         	  disabled          pwm@ffa98010          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                    r      q      	  ,pwm pclk            a         	  disabled          pwm@ffa98020          (    rockchip,rk3528-pwm rockchip,rk3328-pwm                                     r      q      	  ,pwm pclk            a         	  disabled          pwm@ffa98030          (    rockchip,rk3528-pwm rockchip,rk3328-pwm              0                      r      q      	  ,pwm pclk            a         	  disabled          adc@ffae0000              rockchip,rk3528-saradc                                                     ,saradc apb_pclk         ;                                      o        saradc-apb          l           okay            ~   :            _      ethernet@ffbd0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                               0                                       >  ,stmmaceth clk_mac_ref mac_clk_rx mac_clk_tx pclk_mac aclk_mac           ;       q          t           8macirq eth_wake_irq            ;        rmii                                      
  stmmaceth           '   <           =                    >           ?               	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@2            ethernet-phy-ieee802.3-c22                            "                 ;default         I   @   A                          ;         stmmac-axi-config                                             
                          =      rx-queues-config            *               >   queue0           tx-queues-config            @               ?   queue0              ethernet@ffbe0000         &    rockchip,rk3528-gmac snps,dwmac-4.20a                                                                 (  ,stmmaceth clk_mac_ref pclk_mac aclk_mac         ;       y          |           8macirq eth_wake_irq                             a      
  stmmaceth           '   B           C                    D           E                 okay            Voutput             F      	  rgmii-id            c   G        ;default         I   H   I   J   K   L   mdio              snps,dwmac-mdio                      +       ethernet-phy@1            ethernet-phy-ieee802.3-c22                      ;default         I   M        n  N         ~            3                  F         stmmac-axi-config                                             
                          C      rx-queues-config            *               D   queue0           tx-queues-config            @               E   queue0              mmc@ffbf0000          0    rockchip,rk3528-dwcmshc rockchip,rk3588-dwcmshc                                                          n6        (                                         ,core bus axi block timer            ;                           ;default         I   N   O   P   Q                    (        A      B      C      D      E        core bus axi block timer            okay                                                                       G           :      mmc@ffc10000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                                         ,biu ciu ciu-drive ciu-sample            
           ;                           ;default         I   R   S   T                            g        reset         	  disabled          mmc@ffc20000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                                         ,biu ciu ciu-drive ciu-sample            
           ;                           ;default         I   U   V   W                            h        reset         	  disabled          mmc@ffc30000          0    rockchip,rk3528-dw-mshc rockchip,rk3288-dw-mshc                      @                (     '                  ,biu ciu ciu-drive ciu-sample            
           ;                  р        ;default         I   X   Y   Z   [                                    reset              Z        okay                                 3         D         O           \           ]      dma-controller@ffd60000           arm,pl330 arm,primecell                      @                ^      	  ,apb_pclk          l  ;                                                                                                   ]            h            0      phy@ffdc0000              rockchip,rk3528-naneng-combphy                                      {                        {                    ,ref apb pipe                                c      e        phy apb                       B           ^      	  disabled                         chosen          serial0:1500000n8         adc-keys-0        	    adc-keys               _            buttons          w@           d   button-maskrom          MASK            	                        adc-keys-1        	    adc-keys               _           buttons          w@           d   button-recovery       	  RECOVERY            	  h                     leds          
    gpio-leds           ;default         I   `   a   led-0           .           4on        
  Bheartbeat              3             
  Kheartbeat         led-1           .           4on          Bstatus             3   	            Kdefault-on           regulator-0v6-vcc-ddr             regulator-fixed         avcc0v6_ddr           p                  	'         	'           b      regulator-0v9-vdd             regulator-fixed         avdd_0v9          p                                      b      regulator-1v1-vcc-ddr             regulator-fixed         avcc_ddr          p                                      b      regulator-1v8-vcc             regulator-fixed         avcc_1v8          p                  w@         w@           G            :      regulator-3v3-vcc             regulator-fixed         avcc_3v3          p                  2Z         2Z           b            G      regulator-3v3-vcc-sd              regulator-fixed            3              ;default         I   c      
  avcc3v3_sd            2Z         2Z           G            \      regulator-5v0-vcc-sys             regulator-fixed         avcc5v0_sys           p                  LK@         LK@            b      regulator-5v0-usb2-host           regulator-fixed                     3               ;default         I   d        ausb2_host_5v             LK@         LK@           b      regulator-vccio-sd            regulator-gpio             3               ;default         I   e      	  avccio_sd             w@         2Z         w@     2Z              b            ]      regulator-vdd-arm             pwm-regulator              f                    b        avdd_arm          p                  b         Sh                             regulator-vdd-logic           pwm-regulator              g                    b      
  avdd_logic            p                  
         Y                       /         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 ethernet0 i2c1 mmc0 mmc1 serial0 cpu reg device_type enable-method clocks operating-points-v2 cpu-supply phandle arm,smc-id shmem #clock-cells opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,grf ranges interrupts gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells power-domains bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins no-map clock-frequency clock-output-names reg-names bus-range clock-names interrupt-names interrupt-map-mask interrupt-map linux,pci-domain max-link-speed num-lanes phys phy-names resets reset-names status assigned-clocks assigned-clock-rates #reset-cells #power-domain-cells pm_qos mali-supply dmas dma-names reg-io-width reg-shift pinctrl-names pinctrl-0 wakeup-source #pwm-cells #io-channel-cells vref-supply phy-handle phy-mode snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso phy-is-integrated snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use clock_in_out phy-supply reset-assert-us reset-deassert-us reset-gpios max-frequency bus-width cap-mmc-highspeed mmc-hs200-1_8v no-sd no-sdio non-removable vmmc-supply vqmmc-supply fifo-depth rockchip,default-sample-phase cap-sd-highspeed disable-wp sd-uhs-sdr104 #dma-cells arm,pl330-periph-burst #phy-cells rockchip,pipe-grf rockchip,pipe-phy-grf stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt color default-state function linux,default-trigger regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt vin-supply enable-active-high states pwms pwm-supply regulator-settling-time-up-us 