  qa   8  j   (              jd                             #    geekbuying,geekbox rockchip,rk3368                                   +            7GeekBox    aliases          =/pinctrl/gpio@ff750000           C/pinctrl/gpio@ff780000           I/pinctrl/gpio@ff790000           O/pinctrl/gpio@ff7a0000           U/i2c@ff650000            Z/i2c@ff660000            _/i2c@ff140000            d/i2c@ff150000            i/i2c@ff160000            n/i2c@ff170000            s/serial@ff180000             {/serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /ethernet@ff290000           /mmc@ff0f0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     display-subsystem             rockchip,display-subsystem              
      	   disabled          arm-pmu           arm,cortex-a53-pmu        `          p          q          r          s          t          u          v          w            
            	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock         n6         -xin24m          @                B      mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Mр         [           D      r      v        bbiu ciu ciu-drive ciu-sample            n                               y              reset         	   disabled          mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Mр         [           E      s      w        bbiu ciu ciu-drive ciu-sample            n                   !           y              reset         	   disabled          mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Mр         [           G      u      y        bbiu ciu ciu-drive ciu-sample            n                   #           y              reset            okay                                р                                       default                        saradc@ff100000           rockchip,saradc                                       $                      [      I     [        bsaradc apb_pclk         y      W        saradc-apb        	   disabled          spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               [      A     R        bspiclk apb_pclk                 ,           default                                          +          	   disabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               [      B     S        bspiclk apb_pclk                 -           default                                          +          	   disabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               [      C     T        bspiclk apb_pclk                 )           default                                          +          	   disabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            bi2c         [     N        default                  	   disabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            bi2c         [     O        default                  	   disabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            bi2c         [     P        default                  	   disabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            bi2c         [     Q        default                   	   disabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      M     U        bbaudclk apb_pclk                    7                               	   disabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      N     V        bbaudclk apb_pclk                    8                               	   disabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      P     X        bbaudclk apb_pclk                    :                               	   disabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      Q     Y        bbaudclk apb_pclk                    ;                               	   disabled          dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                                           6        [            	  bapb_pclk          thermal-zones      cpu-thermal         M   d        c          q   !       trips      cpu_alert0           $                   passive             "      cpu_alert1           8                   passive             #      cpu_crit             s                	   critical             cooling-maps       map0               "      0                    map1               #      0              	            gpu-thermal         M   d        c          q   !      trips      gpu_alert0           8                   passive             $      gpu_crit             8                	   critical             cooling-maps       map0               $      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           [      H     Z        btsadc apb_pclk          y            
  tsadc-apb           init default sleep             %           &           %                    s         okay                                       !      ethernet@ff290000             rockchip,rk3368-gmac                 )                                    macirq          /   '      8  [            f      g      c                 ]      M  bstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac             okay            <   (        Grgmii           Pinput           ]              m   )        default            *           0                 usb@ff500000              generic-ehci                 P                                    [              okay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    [             botg         otg                                          @   @             okay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                                            6        [            	  bapb_pclk                C      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 [     L        bi2c                 <           default            +                     +             okay       pmic@1b           rockchip,rk808                      default            ,   -            .                                   /           /           /        
   /           /        "   /        .           :   /        F   /        S   /        `           -xin32k rk808-clkout2            @      regulators     DCDC_REG1            m                  
`         `        vdd_cpu       DCDC_REG2            m                  
`         `        vdd_log       DCDC_REG3            m                 vcc_ddr       DCDC_REG4            m                  2Z         2Z        vcc_io                    LDO_REG1             m                  w@         w@        vcc18_flash                   LDO_REG2             m                  2Z         2Z      
  vcc33_lcd         LDO_REG3             m                  B@         B@        vdd_10        LDO_REG4                      w@         w@        vcca_18       LDO_REG5             m                  w@         2Z      	  vccio_sd          LDO_REG6             m                  B@         B@      
  vdd10_lcd         LDO_REG7             m                  w@         w@        vcc_18        LDO_REG8             m                  w@         w@      
  vcc18_lcd         SWITCH_REG1         vcc_sd        SWITCH_REG2          m                 vcc_lan             (               i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            bi2c         [     M        default            0      	   disabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            default            1        [     _      	   disabled          pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           default            2        [     _      	   disabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            [     _      	   disabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          default            3        [     _      	   disabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 [      O     W        bbaudclk apb_pclk                    9           default            4                               okay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   [     E        bpclk_mailbox                     	   disabled          power-management@ff730000         &    rockchip,rk3368-pmu syscon simple-mfd                s            power-controller          !    rockchip,rk3368-power-controller                                    +                F   power-domain@12                     [                                                                             c     h     g     n     o     r     s     f     d      d      h      i      l      k      j      n      m      $     5   6   7   8   9   :   ;   <   =                  power-domain@14                      [                 o      p           >   ?   @                  power-domain@16                     [                  @           A                        syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    K   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain         	   disabled          reboot-mode           syscon-reboot-mode                     RB         RB        %RB	        5RB         clock-controller@ff760000             rockchip,rk3368-cru              v                 [   B        bxin24m          /   '        @           A                     syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     '   io-domains        "    rockchip,rk3368-io-voltage-domain         	   disabled             watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               [     p                O            okay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B           [     a      U        bpclk timer        spdif@ff880000            rockchip,rk3368-spdif                                         6           [      S           
  bmclk hclk           N   C           Stx          default            D        ]          	   disabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           bi2s_clk i2s_hclk            [      T             N   C      C           Stx rx           ]          	   disabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           bi2s_clk i2s_hclk            [      R             N   C       C           Stx rx           default            E        ]          	   disabled          iommu@ff900800            rockchip,iommu                                                  [                   baclk iface          n   F           |          	   disabled          iommu@ff914000            rockchip,iommu                @            P                                   [                   baclk iface          |            n   F                  	   disabled          vop@ff930000              rockchip,rk3368-vop                                                              ]                   ׄ          [                         baclk_vop dclk_vop hclk_vop             G        n   F           y      d      e      f        axi ahb dclk          	   disabled       port                         +                
   endpoint@0                          H            J            iommu@ff930300            rockchip,iommu                                                  [                   baclk iface          n   F           |          	   disabled                G      dsi@ff960000          *    rockchip,rk3368-mipi-dsi snps,dw-mipi-dsi                        @                            [     d        bpclk               I        dphy            n   F           y      s        apb         /   '      	   disabled       ports                        +       port@0                  endpoint               J            H         port@1                          phy@ff968000              rockchip,rk3368-dsi-dphy                        @         [           s      	  bref pclk                        y      r        apb       	   disabled                I      iommu@ff9a0440            rockchip,iommu                @       @           @                           [                   baclk iface          |          	   disabled          iommu@ff9a0800            rockchip,iommu                                       	          
           [                   baclk iface          |          	   disabled          qos@ffad0000              rockchip,rk3368-qos syscon                                     5      qos@ffad0080              rockchip,rk3368-qos syscon                                    6      qos@ffad0100              rockchip,rk3368-qos syscon                                    7      qos@ffad0180              rockchip,rk3368-qos syscon                                   8      qos@ffad0200              rockchip,rk3368-qos syscon                                    9      qos@ffad0280              rockchip,rk3368-qos syscon                                   :      qos@ffad0300              rockchip,rk3368-qos syscon                                    ;      qos@ffad0380              rockchip,rk3368-qos syscon                                   <      qos@ffad0400              rockchip,rk3368-qos syscon                                    =      qos@ffae0000              rockchip,rk3368-qos syscon                                     >      qos@ffae0100              rockchip,rk3368-qos syscon                                    ?      qos@ffae0180              rockchip,rk3368-qos syscon                                   @      qos@ffaf0000              rockchip,rk3368-qos syscon                                     A      efuse@ffb00000            rockchip,rk3368-efuse                                               +           [     q        bpclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400                                        @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl         /   '           K                     +               gpio@ff750000             rockchip,gpio-bank               u                 [     @                Q            $        4                                   .      gpio@ff780000             rockchip,gpio-bank               x                 [     A                R            $        4                             gpio@ff790000             rockchip,gpio-bank               y                 [     B                S            $        4                                   R      gpio@ff7a0000             rockchip,gpio-bank               z                 [     C                T            $        4                                   O      pcfg-pull-up             @            M      pcfg-pull-down           M      pcfg-pull-none           \            L      pcfg-pull-none-12ma          \        i               N      emmc       emmc-clk            x            L                  emmc-cmd            x            M                  emmc-pwr            x            M      emmc-bus1           x            M      emmc-bus4         @  x            M            M            M            M      emmc-bus8           x            M            M            M            M            M            M            M            M                     gmac       rgmii-pins          x            L            L            L            N      	      N      
      N            N            N            N            L            L            L            L            L            L            *      rmii-pins           x            L            L            L            N      	      N            N            L            L            L            L         i2c0       i2c0-xfer            x             L             L            +         i2c1       i2c1-xfer            x            L            L            0         i2c2       i2c2-xfer            x       	      L            L                     i2c3       i2c3-xfer            x            L            L                     i2c4       i2c4-xfer            x            L            L                     i2c5       i2c5-xfer            x            L            L                      i2s    i2s-8ch-bus         x            L            L            L            L            L            L            L            L            L            E         pwm0       pwm0-pin            x            L            1         pwm1       pwm1-pin            x             L            2         pwm3       pwm3-pin            x            L            3         sdio0      sdio0-bus1          x            M      sdio0-bus4        @  x            M            M            M            M      sdio0-cmd           x             M      sdio0-clk           x            L      sdio0-cd            x            M      sdio0-wp            x            M      sdio0-pwr           x            M      sdio0-bkpwr         x            M      sdio0-int           x            M         sdmmc      sdmmc-clk           x      	      L      sdmmc-cmd           x      
      M      sdmmc-cd            x            M      sdmmc-bus1          x            M      sdmmc-bus4        @  x            M            M            M            M         spdif      spdif-tx            x            L            D         spi0       spi0-clk            x            M                  spi0-cs0            x            M                  spi0-cs1            x            M      spi0-tx         x            M                  spi0-rx         x            M                     spi1       spi1-clk            x            M                  spi1-cs0            x            M                  spi1-cs1            x            M      spi1-rx         x            M                  spi1-tx         x            M                     spi2       spi2-clk            x             M                  spi2-cs0            x             M                  spi2-rx         x       
      M                  spi2-tx         x             M                     tsadc      otp-pin         x              L            %      otp-out         x             L            &         uart0      uart0-xfer           x            M            L      uart0-cts           x            L      uart0-rts           x            L         uart1      uart1-xfer           x             M             L      uart1-cts           x             L      uart1-rts           x             L         uart2      uart2-xfer           x            M            L            4         uart3      uart3-xfer           x            M            L      uart3-cts           x            L      uart3-rts           x            L         uart4      uart4-xfer           x             M             L      uart4-cts           x             L      uart4-rts           x             L         ir     ir-int          x             L            P         keys       pwr-key         x              L            Q         pmic       pmic-sleep          x              L            -      pmic-int            x              M            ,            chosen          serial2:115200n8          memory@0             memory                                gmac-clk              fixed-clock         sY@      	  -ext_gmac            @                )      ir-receiver           gpio-ir-receiver               O              default            P      gpio-keys         
    gpio-keys           default            Q   key-power              .              GPIO Power             t                  gpio-leds         
    gpio-leds      led-0              R               geekbox:blue:led            on        led-1              R               geekbox:red:led         off          regulator-vcc-sys             regulator-fixed         vcc_sys          LK@         LK@         m                     /         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 ethernet0 mmc0 cpu device_type reg enable-method #cooling-cells phandle ports status interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names bus-width cap-mmc-highspeed non-removable vmmc-supply vqmmc-supply pinctrl-names pinctrl-0 #io-channel-cells reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf phy-supply phy-mode clock_in_out assigned-clocks assigned-clock-parents tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-name #pwm-cells #mbox-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells dmas dma-names #sound-dai-cells power-domains #iommu-cells rockchip,disable-mmu-reset assigned-clock-rates iommus remote-endpoint phys phy-names #phy-cells interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path gpios label linux,code wakeup-source default-state 