  w|   8  p   (              pH                             ,    rockchip,rk3368-evb-act8846 rockchip,rk3368                                  +         &   7Rockchip RK3368 EVB with ACT8846 pmic      aliases          =/pinctrl/gpio@ff750000           C/pinctrl/gpio@ff780000           I/pinctrl/gpio@ff790000           O/pinctrl/gpio@ff7a0000           U/i2c@ff650000            Z/i2c@ff660000            _/i2c@ff140000            d/i2c@ff150000            i/i2c@ff160000            n/i2c@ff170000            s/serial@ff180000             {/serial@ff190000             /serial@ff690000             /serial@ff1b0000             /serial@ff1c0000             /spi@ff110000            /spi@ff120000            /spi@ff130000            /ethernet@ff290000           /mmc@ff0f0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3               	            cpu@0            cpu           arm,cortex-a53                            psci                                  cpu@1            cpu           arm,cortex-a53                           psci                                  cpu@2            cpu           arm,cortex-a53                           psci                                  cpu@3            cpu           arm,cortex-a53                           psci                            	      cpu@100          cpu           arm,cortex-a53                           psci                                  cpu@101          cpu           arm,cortex-a53                          psci                                  cpu@102          cpu           arm,cortex-a53                          psci                                  cpu@103          cpu           arm,cortex-a53                          psci                                     display-subsystem             rockchip,display-subsystem              
      	   disabled          arm-pmu           arm,cortex-a53-pmu        `          p          q          r          s          t          u          v          w            
            	                  psci              arm,psci-0.2             smc       timer             arm,armv8-timer       0                                 
        oscillator            fixed-clock         n6         -xin24m          @                @      mmc@ff0c0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Mр         [           D      r      v        bbiu ciu ciu-drive ciu-sample            n                               y              reset         	   disabled          mmc@ff0d0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Mр         [           E      s      w        bbiu ciu ciu-drive ciu-sample            n                   !           y              reset         	   disabled          mmc@ff0f0000          0    rockchip,rk3368-dw-mshc rockchip,rk3288-dw-mshc                      @         Mр         [           G      u      y        bbiu ciu ciu-drive ciu-sample            n                   #           y              reset            okay                                                    default                        saradc@ff100000           rockchip,saradc                                       $                      [      I     [        bsaradc apb_pclk         y      W        saradc-apb        	   disabled          spi@ff110000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               [      A     R        bspiclk apb_pclk                 ,           default                                          +          	   disabled          spi@ff120000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               [      B     S        bspiclk apb_pclk                 -           default                                          +          	   disabled          spi@ff130000          (    rockchip,rk3368-spi rockchip,rk3066-spi                               [      C     T        bspiclk apb_pclk                 )           default                                          +          	   disabled          i2c@ff140000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       >                        +            bi2c         [     N        default                  	   disabled          i2c@ff150000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       ?                        +            bi2c         [     O        default                  	   disabled          i2c@ff160000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       @                        +            bi2c         [     P        default                  	   disabled          i2c@ff170000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c                                       A                        +            bi2c         [     Q        default                  	   disabled          serial@ff180000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      M     U        bbaudclk apb_pclk                    7                               	   disabled          serial@ff190000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      N     V        bbaudclk apb_pclk                    8                               	   disabled          serial@ff1b0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      P     X        bbaudclk apb_pclk                    :                               	   disabled          serial@ff1c0000       &    rockchip,rk3368-uart snps,dw-apb-uart                                 n6         [      Q     Y        bbaudclk apb_pclk                    ;                               	   disabled          dma-controller@ff250000           arm,pl330 arm,primecell              %        @                                                           (        [            	  bapb_pclk          thermal-zones      cpu-thermal         ?   d        U          c           trips      cpu_alert0          s $                   passive             !      cpu_alert1          s 8                   passive             "      cpu_crit            s s                	   critical             cooling-maps       map0               !      0                    map1               "      0              	            gpu-thermal         ?   d        U          c          trips      gpu_alert0          s 8                   passive             #      gpu_crit            s 8                	   critical             cooling-maps       map0               #      0                             tsadc@ff280000            rockchip,rk3368-tsadc                (                         %           [      H     Z        btsadc apb_pclk          y            
  tsadc-apb           init default sleep             $           %           $                    s         okay                                               ethernet@ff290000             rockchip,rk3368-gmac                 )                                    macirq          !   &      8  [            f      g      c                 ]      M  bstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac             okay            .   '        9rmii            Boutput          O   (                _        u      ' B@        default            )           0                 usb@ff500000              generic-ehci                 P                                    [              okay          usb@ff580000          2    rockchip,rk3368-usb rockchip,rk3066-usb snps,dwc2                X                                    [             botg         host                                             @   @             okay          dma-controller@ff600000           arm,pl330 arm,primecell              `        @                                                            (        [            	  bapb_pclk                A      i2c@ff650000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              e                 [     L        bi2c                 <           default            *                     +             okay                syr827@40             silergy,syr827              @                   vdd_cpu           P         p         0         D        V   +      syr828@41             silergy,syr828              A                   vdd_gpu           P         p         0        V   +      act8846@5a            active-semi,act8846             Z         okay            a   +        l   +        w   +           +           ,           +           -   regulators     REG1            VCC_DDR           O         O         0      REG2            VCC_IO            2Z         2Z         0            ,      REG3            VDD_LOG           
`         `         0      REG4            VCC_20                              0            -      REG5          	  VCCIO_SD              w@         2Z         0      REG6          
  VDD10_LCD             B@         B@         0      REG7            VCCA_CODEC            2Z         2Z         0      REG8            VCCA_TP           2Z         2Z         0      REG9          
  VCCIO_PMU             2Z         2Z         0      REG10           VDD_10            B@         B@         0      REG11           VCC_18            w@         w@         0      REG12         
  VCC18_LCD             w@         w@         0               i2c@ff660000          (    rockchip,rk3368-i2c rockchip,rk3288-i2c              f                         =                        +            bi2c         [     M        default            .      	   disabled          pwm@ff680000          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            default            /        [     _         okay                Q      pwm@ff680010          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                           default            0        [     _      	   disabled          pwm@ff680020          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h                            [     _      	   disabled          pwm@ff680030          (    rockchip,rk3368-pwm rockchip,rk3288-pwm              h 0                          default            1        [     _      	   disabled          serial@ff690000       &    rockchip,rk3368-uart snps,dw-apb-uart                i                 [      O     W        bbaudclk apb_pclk                    9           default            2                               okay          mbox@ff6b0000             rockchip,rk3368-mailbox              k               0                                                   [     E        bpclk_mailbox                     	   disabled          power-management@ff730000         &    rockchip,rk3368-pmu syscon simple-mfd                s            power-controller          !    rockchip,rk3368-power-controller                                    +                D   power-domain@12                     [                                                                             c     h     g     n     o     r     s     f     d      d      h      i      l      k      j      n      m      $     3   4   5   6   7   8   9   :   ;                  power-domain@14                      [                 o      p           <   =   >                  power-domain@16                     [                  @           ?                        syscon@ff738000       )    rockchip,rk3368-pmugrf syscon simple-mfd                 s                    I   io-domains        &    rockchip,rk3368-pmu-io-voltage-domain         	   disabled          reboot-mode           syscon-reboot-mode                     RB         RB        RB	        RB         clock-controller@ff760000             rockchip,rk3368-cru              v                 [   @        bxin24m          !   &        @                                 syscon@ff770000       &    rockchip,rk3368-grf syscon simple-mfd                w                     &   io-domains        "    rockchip,rk3368-io-voltage-domain         	   disabled             watchdog@ff800000              rockchip,rk3368-wdt snps,dw-wdt                               [     p                O            okay          timer@ff810000        ,    rockchip,rk3368-timer rockchip,rk3288-timer                                        B           [     a      U        bpclk timer        spdif@ff880000            rockchip,rk3368-spdif                                         6           [      S           
  bmclk hclk           -   A           2tx          default            B        <          	   disabled          i2s-2ch@ff890000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                       (           bi2s_clk i2s_hclk            [      T             -   A      A           2tx rx           <          	   disabled          i2s-8ch@ff898000          (    rockchip,rk3368-i2s rockchip,rk3066-i2s                                      5           bi2s_clk i2s_hclk            [      R             -   A       A           2tx rx           default            C        <          	   disabled          iommu@ff900800            rockchip,iommu                                                  [                   baclk iface          M   D           [          	   disabled          iommu@ff914000            rockchip,iommu                @            P                                   [                   baclk iface          [            M   D            h      	   disabled          vop@ff930000              rockchip,rk3368-vop                                                                                 ׄ          [                         baclk_vop dclk_vop hclk_vop             E        M   D           y      d      e      f        axi ahb dclk          	   disabled       port                         +                
   endpoint@0                          F            H            iommu@ff930300            rockchip,iommu                                                  [                   baclk iface          M   D           [          	   disabled                E      dsi@ff960000          *    rockchip,rk3368-mipi-dsi snps,dw-mipi-dsi                        @                            [     d        bpclk               G        dphy            M   D           y      s        apb         !   &      	   disabled       ports                        +       port@0                  endpoint               H            F         port@1                          phy@ff968000              rockchip,rk3368-dsi-dphy                        @         [           s      	  bref pclk                        y      r        apb       	   disabled                G      iommu@ff9a0440            rockchip,iommu                @       @           @                           [                   baclk iface          [          	   disabled          iommu@ff9a0800            rockchip,iommu                                       	          
           [                   baclk iface          [          	   disabled          qos@ffad0000              rockchip,rk3368-qos syscon                                     3      qos@ffad0080              rockchip,rk3368-qos syscon                                    4      qos@ffad0100              rockchip,rk3368-qos syscon                                    5      qos@ffad0180              rockchip,rk3368-qos syscon                                   6      qos@ffad0200              rockchip,rk3368-qos syscon                                    7      qos@ffad0280              rockchip,rk3368-qos syscon                                   8      qos@ffad0300              rockchip,rk3368-qos syscon                                    9      qos@ffad0380              rockchip,rk3368-qos syscon                                   :      qos@ffad0400              rockchip,rk3368-qos syscon                                    ;      qos@ffae0000              rockchip,rk3368-qos syscon                                     <      qos@ffae0100              rockchip,rk3368-qos syscon                                    =      qos@ffae0180              rockchip,rk3368-qos syscon                                   >      qos@ffaf0000              rockchip,rk3368-qos syscon                                     ?      efuse@ffb00000            rockchip,rk3368-efuse                                               +           [     q        bpclk_efuse     cpu-leakage@17                       temp-adjust@1f                          interrupt-controller@ffb71000             arm,gic-400                                        @                                 @             `                        	                    pinctrl           rockchip,rk3368-pinctrl         !   &           I                     +               gpio@ff750000             rockchip,gpio-bank               u                 [     @                Q                    #                                   O      gpio@ff780000             rockchip,gpio-bank               x                 [     A                R                    #                             gpio@ff790000             rockchip,gpio-bank               y                 [     B                S                    #                                   S      gpio@ff7a0000             rockchip,gpio-bank               z                 [     C                T                    #                                   (      pcfg-pull-up             /            L      pcfg-pull-down           <      pcfg-pull-none           K            M      pcfg-pull-none-12ma          K        X               N      emmc       emmc-clk            g            J                  emmc-cmd            g            K                  emmc-pwr            g            L      emmc-bus1           g            L      emmc-bus4         @  g            L            L            L            L      emmc-bus8           g            K            K            K            K            K            K            K            K                  emmc-reset          g             M            R         gmac       rgmii-pins          g            M            M            M            N      	      N      
      N            N            N            N            M            M            M            M            M            M      rmii-pins           g            M            M            M            N      	      N            N            M            M            M            M            )         i2c0       i2c0-xfer            g             M             M            *         i2c1       i2c1-xfer            g            M            M            .         i2c2       i2c2-xfer            g       	      M            M                     i2c3       i2c3-xfer            g            M            M                     i2c4       i2c4-xfer            g            M            M                     i2c5       i2c5-xfer            g            M            M                     i2s    i2s-8ch-bus         g            M            M            M            M            M            M            M            M            M            C         pwm0       pwm0-pin            g            M            /         pwm1       pwm1-pin            g             M            0         pwm3       pwm3-pin            g            M            1         sdio0      sdio0-bus1          g            L      sdio0-bus4        @  g            L            L            L            L      sdio0-cmd           g             L      sdio0-clk           g            M      sdio0-cd            g            L      sdio0-wp            g            L      sdio0-pwr           g            L      sdio0-bkpwr         g            L      sdio0-int           g            L         sdmmc      sdmmc-clk           g      	      M      sdmmc-cmd           g      
      L      sdmmc-cd            g            L      sdmmc-bus1          g            L      sdmmc-bus4        @  g            L            L            L            L         spdif      spdif-tx            g            M            B         spi0       spi0-clk            g            L                  spi0-cs0            g            L                  spi0-cs1            g            L      spi0-tx         g            L                  spi0-rx         g            L                     spi1       spi1-clk            g            L                  spi1-cs0            g            L                  spi1-cs1            g            L      spi1-rx         g            L                  spi1-tx         g            L                     spi2       spi2-clk            g             L                  spi2-cs0            g             L                  spi2-rx         g       
      L                  spi2-tx         g             L                     tsadc      otp-pin         g              M            $      otp-out         g             M            %         uart0      uart0-xfer           g            L            M      uart0-cts           g            M      uart0-rts           g            M         uart1      uart1-xfer           g             L             M      uart1-cts           g             M      uart1-rts           g             M         uart2      uart2-xfer           g            L            M            2         uart3      uart3-xfer           g            L            M      uart3-cts           g            M      uart3-rts           g            M         uart4      uart4-xfer           g             L             M      uart4-cts           g             M      uart4-rts           g             M         pcfg-pull-none-drv-8ma           K        X               J      pcfg-pull-up-drv-8ma             /        X               K      backlight      bl-en           g              M            P         keys       pwr-key         g              L            T         pmic       pmic-int            g              L         sdio       wifi-reg-on         g             M      bt-rst          g             M         usb    host-vbus-drv           g              M            U            chosen          userial2:115200n8          memory@0             memory                       @         backlight             pwm-backlight                                          	   
                                                                      !   "   #   $   %   &   '   (   )   *   +   ,   -   .   /   0   1   2   3   4   5   6   7   8   9   :   ;   <   =   >   ?   @   A   B   C   D   E   F   G   H   I   J   K   L   M   N   O   P   Q   R   S   T   U   V   W   X   Y   Z   [   \   ]   ^   _   `   a   b   c   d   e   f   g   h   i   j   k   l   m   n   o   p   q   r   s   t   u   v   w   x   y   z   {   |   }   ~                                                                                                                                                                                                                                                                                                                                                                                                                         O               default            P           Q     B@         emmc-pwrseq           mmc-pwrseq-emmc            R        default            S                         gpio-keys         
    gpio-keys           default            T   key-power                       O              GPIO Power             t         regulator-vcc-host            regulator-fixed                  Z   O               default            U      	  vcc_host             0         D        V   +      regulator-vcc-lan             regulator-fixed         vcc_lan           2Z         2Z         0         D        V   ,            '      regulator-vcc-sys             regulator-fixed         vcc_sys           LK@         LK@         0         D            +         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 spi0 spi1 spi2 ethernet0 mmc0 cpu device_type reg enable-method #cooling-cells phandle ports status interrupts interrupt-affinity clock-frequency clock-output-names #clock-cells max-frequency clocks clock-names fifo-depth resets reset-names bus-width cap-mmc-highspeed mmc-pwrseq non-removable pinctrl-names pinctrl-0 #io-channel-cells reg-shift reg-io-width #dma-cells arm,pl330-broken-no-flushp arm,pl330-periph-burst polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device pinctrl-1 pinctrl-2 #thermal-sensor-cells rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity interrupt-names rockchip,grf phy-supply phy-mode clock_in_out snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size fcs,suspend-voltage-selector regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on vin-supply vp1-supply vp2-supply vp3-supply vp4-supply inl1-supply inl2-supply inl3-supply #pwm-cells #mbox-cells #power-domain-cells pm_qos offset mode-normal mode-recovery mode-bootloader mode-loader #reset-cells dmas dma-names #sound-dai-cells power-domains #iommu-cells rockchip,disable-mmu-reset assigned-clocks assigned-clock-rates iommus remote-endpoint phys phy-names #phy-cells interrupt-controller #interrupt-cells rockchip,pmu ranges gpio-controller #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength rockchip,pins stdout-path brightness-levels default-brightness-level enable-gpios pwms reset-gpios wakeup-source label linux,code enable-active-high 