     8  0   (            	i                               $    rockchip,rk3328-evb rockchip,rk3328                                  +            7Rockchip RK3328 EVB    aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            /ethernet@ff550000           /mmc@ff500000            /mmc@ff510000            /mmc@ff520000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                      @        +           8           E   @        W           d           u              	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u              
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u                    cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                      @        +           8           E   @        W           d           u                    idle-states         psci       cpu-sleep             arm,idle-state                                 x                                         l2-cache              cache                                             @        -                       opp-table-0           operating-points-v2          	              opp-408000000               Q          ~        )  @         :      opp-600000000               #F          ~        )  @      opp-816000000               0,          B@        )  @      opp-1008000000              <                  )  @      opp-1200000000              G          (        )  @      opp-1296000000              M?d                   )  @         analog-sound              simple-audio-card           Fi2s         _           yAnalog        	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g              	   
            display-subsystem             rockchip,display-subsystem                   hdmi-sound            simple-audio-card           Fi2s         _           yHDMI          	  disabled       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock                     n6         xin24m             D      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        i2s_clk i2s_hclk                                tx rx                     	  disabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        i2s_clk i2s_hclk                                 tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  mclk hclk                 
        tx          !default         /                     	  disabled          pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          !default sleep           /                       9                     	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                    B   io-domains        "    rockchip,rk3328-io-voltage-domain         	  disabled          gpio              rockchip,rk3328-grf-gpio             C        S         power-controller          !    rockchip,rk3328-power-controller            _                        +               9   power-domain@1                                     _          power-domain@6                             D        _          power-domain@5                                   B      A      B        _          power-domain@8                                  F        _             reboot-mode           syscon-reboot-mode          s          zRB         RB        RB	        RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              baudclk apb_pclk                                tx rx           !default         /                                     	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              baudclk apb_pclk                                tx rx           !default         /          !                            	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              baudclk apb_pclk                                tx rx           !default         /   "                              okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  i2c pclk            !default         /   #      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  i2c pclk            !default         /   $        okay       pmic@18           rockchip,rk805                          %                                 xin32k rk805-clkout2             C        S           !default         /   &                             '           '           '           '           (        )   (   regulators     DCDC_REG1         
  5vdd_logic           D 
4        \           t            regulator-state-mem                   B@         DCDC_REG2           5vdd_arm         D 
4        \           t                       regulator-state-mem                   ~         DCDC_REG3           5vcc_ddr          t            regulator-state-mem                   DCDC_REG4           5vcc_io          D 2Z        \ 2Z         t                    (   regulator-state-mem                   2Z         LDO_REG1            5vcc_18          D w@        \ w@         t            regulator-state-mem                   w@         LDO_REG2            5vcc18_emmc          D w@        \ w@         t            regulator-state-mem                   w@         LDO_REG3            5vdd_10          D B@        \ B@         t            regulator-state-mem                   B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  i2c pclk            !default         /   )      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  i2c pclk            !default         /   *      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  spiclk apb_pclk                     	        tx rx           !default         /   +   ,   -   .      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            !default         /   /                 	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            !default         /   0                 	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            !default         /   1                 	  disabled          pwm@ff1b0030              rockchip,rk3328-pwm               0                      <            	  pwm pclk            !default         /   2                 	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                                            	  apb_pclk                                thermal-zones      soc-thermal                                        1   3       trips      trip-point0         A p        M           passive       trip-point1         A L        M           passive            4      soc-crit            A s        M        	   critical             cooling-maps       map0            X   4      0  ]   	   
              l         map1            X   4        ]   5        l                  tsadc@ff250000            rockchip,rk3328-tsadc                %                        :           y      $          P               $              tsadc apb_pclk          !init default sleep          /   6        9   7           6              B      
  tsadc-apb                               okay               3      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                                          E         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P                             %              saradc apb_pclk               V        saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                8        #   9                 f                       5      opp-table-gpu             operating-points-v2            8   opp-200000000                         g8      opp-300000000                         g8      opp-400000000               ׄ          g8      opp-500000000               e          0      	  disabled             iommu@ff330200            rockchip,iommu               3                       `                                aclk iface          1          	  disabled          iommu@ff340800            rockchip,iommu               4        @               b                       F        aclk iface          1          	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           vdpu                        F      
  aclk hclk           >   :        #   9         iommu@ff350800            rockchip,iommu               5        @                                      F        aclk iface          1            #   9              :      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                                               B      A      B        axi ahb cabac core          y            A      B        ׄ ׄ          >   ;        #   9         iommu@ff360480            rockchip,iommu                6       @    6       @               J                       B        aclk iface          1            #   9              ;      vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        aclk_vop dclk_vop hclk_vop                                    axi ahb dclk            >   <      	  disabled       port                  endpoint            E   =           C            iommu@ff373f00            rockchip,iommu               7?                                               ;        aclk iface          1          	  disabled               <      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #                        F              iahb isfr cec           U   >        Zhdmi            !default         /   ?   @   A        d   B                  	  disabled                  ports                        +       port@0                  endpoint            E   C           =         port@1                          codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk           d   B                  	  disabled                     phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     D      y        sysclk refoclk refpclk        	  hdmi_phy                        q   E        }cpu-version                   	  disabled               >      clock-controller@ff440000             rockchip,rk3328-cru              D                     D        xin24m          d   B                              y      x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $        z               D   D   D      |           n6 n6 n6     ׄ     n6 #F L  G рxhxhрxhxh                    syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            D        phyclk          usb480m_phy                     y      {           F        okay               F   otg-port                      $         ;          <          =           otg-bvalid otg-id linestate         okay               W      host-port                              >         
  linestate           okay               X            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        biu ciu ciu-drive ciu-sample                       р              m        reset           okay                                                  !default         /   G   H   I   J           K      mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        biu ciu ciu-drive ciu-sample                       р              n        reset           okay                                          '        =   L         H        !default         /   M   N   O      mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        biu ciu ciu-drive ciu-sample                       р              o        reset           okay                                 H        !default         /   P   Q   R      ethernet@ff540000             rockchip,rk3328-gmac                 T                                   macirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac                  c      
  stmmaceth           d   B        V           d           r         	  disabled          ethernet@ff550000             rockchip,rk3328-gmac                 U                 d   B                          macirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy                  b      
  stmmaceth           }rmii               S        V           d           r           output          okay               T                y      e              T   mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V              d        !default         /   U   V                    S            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        otg         otg                                          @               U   W      	  Zusb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   F        U   X        Zusb         okay          usb@ff5d0000              generic-ohci                 ]                                         N   F        U   X        Zusb         okay          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              _        @                                  @            M      Q        biu ciu ciu-drive ciu-sample                       р              h        reset         	  disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              ref_clk suspend_clk bus_clk         otg       
  utmi_wide                              5         W         x               	  disabled          interrupt-controller@ff811000             arm,gic-400                                        @                                 @             `                       	                   crypto@ff060000           rockchip,rk3328-crypto                       @                                 P     Q      ;        hclk_master hclk_slave sclk               D        crypto-rst        pinctrl           rockchip,rk3328-pinctrl         d   B                     +               gpio@ff210000             rockchip,gpio-bank               !                        3                           C        S                                  f      gpio@ff220000             rockchip,gpio-bank               "                        4                           C        S                                  e      gpio@ff230000             rockchip,gpio-bank               #                        5                           C        S                                  %      gpio@ff240000             rockchip,gpio-bank               $                        6                           C        S                             pcfg-pull-up                        [      pcfg-pull-down                      c      pcfg-pull-none                      Y      pcfg-pull-none-2ma                   	               b      pcfg-pull-up-2ma                     	          pcfg-pull-up-4ma                     	               \      pcfg-pull-none-4ma                   	               _      pcfg-pull-down-4ma                   	          pcfg-pull-none-8ma                   	               ]      pcfg-pull-up-8ma                     	               ^      pcfg-pull-none-12ma                  	               `      pcfg-pull-up-12ma                    	               a      pcfg-output-high             	      pcfg-output-low          	      pcfg-input-high                   	&           Z      pcfg-input           	&      i2c0       i2c0-xfer            	3            Y            Y           #         i2c1       i2c1-xfer            	3            Y            Y           $         i2c2       i2c2-xfer            	3            Y            Y           )         i2c3       i2c3-xfer            	3             Y             Y           *      i2c3-pins            	3              Y              Y         hdmi_i2c       hdmii2c-xfer             	3             Y             Y           @         pdm-0      pdmm0-clk           	3            Y                 pdmm0-fsync         	3            Y      pdmm0-sdi0          	3            Y                 pdmm0-sdi1          	3            Y                 pdmm0-sdi2          	3            Y                 pdmm0-sdi3          	3            Y                 pdmm0-clk-sleep         	3             Z                 pdmm0-sdi0-sleep            	3             Z                 pdmm0-sdi1-sleep            	3             Z                 pdmm0-sdi2-sleep            	3             Z                 pdmm0-sdi3-sleep            	3             Z                 pdmm0-fsync-sleep           	3             Z         tsadc      otp-pin         	3             Y           6      otp-out         	3            Y           7         uart0      uart0-xfer           	3      	      Y            [                 uart0-cts           	3            Y                 uart0-rts           	3      
      Y                 uart0-rts-pin           	3      
       Y         uart1      uart1-xfer           	3            Y            [                 uart1-cts           	3            Y                  uart1-rts           	3            Y           !      uart1-rts-pin           	3             Y         uart2-0    uart2m0-xfer             	3             Y            [         uart2-1    uart2m1-xfer             	3             Y            [           "         spi0-0     spi0m0-clk          	3            [      spi0m0-cs0          	3            [      spi0m0-tx           	3      	      [      spi0m0-rx           	3      
      [      spi0m0-cs1          	3            [         spi0-1     spi0m1-clk          	3            [      spi0m1-cs0          	3            [      spi0m1-tx           	3            [      spi0m1-rx           	3            [      spi0m1-cs1          	3            [         spi0-2     spi0m2-clk          	3             [           +      spi0m2-cs0          	3            [           .      spi0m2-tx           	3            [           ,      spi0m2-rx           	3            [           -         i2s1       i2s1-mclk           	3            Y      i2s1-sclk           	3            Y      i2s1-lrckrx         	3            Y      i2s1-lrcktx         	3            Y      i2s1-sdi            	3            Y      i2s1-sdo            	3            Y      i2s1-sdio1          	3            Y      i2s1-sdio2          	3            Y      i2s1-sdio3          	3            Y      i2s1-sleep          	3             Z             Z             Z             Z             Z             Z             Z             Z             Z         i2s2-0     i2s2m0-mclk         	3            Y      i2s2m0-sclk         	3            Y      i2s2m0-lrckrx           	3            Y      i2s2m0-lrcktx           	3            Y      i2s2m0-sdi          	3            Y      i2s2m0-sdo          	3            Y      i2s2m0-sleep          `  	3             Z             Z             Z             Z             Z             Z         i2s2-1     i2s2m1-mclk         	3            Y      i2s2m1-sclk         	3             Y      i2sm1-lrckrx            	3            Y      i2s2m1-lrcktx           	3            Y      i2s2m1-sdi          	3            Y      i2s2m1-sdo          	3            Y      i2s2m1-sleep          P  	3             Z              Z             Z             Z             Z         spdif-0    spdifm0-tx          	3             Y         spdif-1    spdifm1-tx          	3            Y         spdif-2    spdifm2-tx          	3             Y                    sdmmc0-0       sdmmc0m0-pwren          	3            \      sdmmc0m0-pin            	3             \         sdmmc0-1       sdmmc0m1-pwren          	3             \      sdmmc0m1-pin            	3              \           g         sdmmc0     sdmmc0-clk          	3            ]           G      sdmmc0-cmd          	3            ^           H      sdmmc0-dectn            	3            \           I      sdmmc0-wrprt            	3            \      sdmmc0-bus1         	3             ^      sdmmc0-bus4       @  	3             ^            ^            ^            ^           J      sdmmc0-pins         	3             \             \             \             \             \             \             \              \         sdmmc0ext      sdmmc0ext-clk           	3            _      sdmmc0ext-cmd           	3             \      sdmmc0ext-wrprt         	3            \      sdmmc0ext-dectn         	3            \      sdmmc0ext-bus1          	3            \      sdmmc0ext-bus4        @  	3            \            \            \            \      sdmmc0ext-pins          	3              \             \             \             \             \             \             \             \         sdmmc1     sdmmc1-clk          	3            ]           O      sdmmc1-cmd          	3            ^           N      sdmmc1-pwren            	3            ^      sdmmc1-wrprt            	3            ^      sdmmc1-dectn            	3            ^      sdmmc1-bus1         	3            ^      sdmmc1-bus4       @  	3            ^            ^            ^            ^           M      sdmmc1-pins         	3             \             \             \             \             \             \             \             \             \         emmc       emmc-clk            	3            `           P      emmc-cmd            	3            a           Q      emmc-pwren          	3            Y      emmc-rstnout            	3            Y      emmc-bus1           	3             a      emmc-bus4         @  	3             a            a            a            a      emmc-bus8           	3             a            a            a            a            a            a            a            a           R         pwm0       pwm0-pin            	3            Y           /         pwm1       pwm1-pin            	3            Y           0         pwm2       pwm2-pin            	3            Y           1         pwmir      pwmir-pin           	3            Y           2         gmac-1     rgmiim1-pins         `  	3            ]            _            _            ]            _            _            _      
      _            _            ]      	      ]            _            _            ]            ]             ]             ]             _             ]             ]             ]             ]      rmiim1-pins         	3            b            `            b            b            b            b      
      b            b            `      	      `             Y             Y             Y             Y             Y             Y         gmac2phy       fephyled-speed10            	3             Y      fephyled-duplex         	3             Y      fephyled-rxm1           	3            Y           U      fephyled-txm1           	3            Y      fephyled-linkm1         	3            Y           V         tsadc_pin      tsadc-int           	3            Y      tsadc-pin           	3             Y         hdmi_pin       hdmi-cec            	3             Y           ?      hdmi-hpd            	3             c           A         cif-0      dvp-d2d9-m0         	3            Y            Y            Y            Y            Y      	      Y      
      Y            Y            Y             Y            Y            Y         cif-1      dvp-d2d9-m1         	3            Y            Y            Y            Y            Y            Y            Y            Y            Y             Y            Y            Y         pmic       pmic-int-l          	3             [           &         sdio-pwrseq    wifi-enable-h           	3             Y           d            chosen          	Aserial2:1500000n8         regulator-dc-12v              regulator-fixed         5dc_12v           t                 D          \             h      sdio-pwrseq           mmc-pwrseq-simple           !default         /   d        	M   e                 L      regulator-sdmmc           regulator-fixed         	Y   f              !default         /   g        5vcc_sd          D 2Z        \ 2Z        	^   (           K      regulator-vcc-sys             regulator-fixed         5vcc_sys          t                 D LK@        \ LK@        	^   h           '      regulator-vcc-phy             regulator-fixed         5vcc_phy          t                    T         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells interrupt-names power-domains #iommu-cells iommus remote-endpoint phys phy-names rockchip,grf nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vmmc-supply cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable tx-fifo-depth rx-fifo-depth snps,txpbl phy-mode phy-handle clock_in_out phy-supply phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path reset-gpios gpio vin-supply 