  p   8     (            
                                   azw,beelink-a1 rockchip,rk3328                                   +            7Beelink A1     aliases          =/pinctrl/gpio@ff210000           C/pinctrl/gpio@ff220000           I/pinctrl/gpio@ff230000           O/pinctrl/gpio@ff240000           U/serial@ff110000             ]/serial@ff120000             e/serial@ff130000             m/i2c@ff150000            r/i2c@ff160000            w/i2c@ff170000            |/i2c@ff180000            /ethernet@ff540000           /mmc@ff500000            /mmc@ff520000         cpus                         +       cpu@0            cpu           arm,cortex-a53                                                                      x         psci                                      @        &           3           @   @        R           _           p           {   	      cpu@1            cpu           arm,cortex-a53                                                                     x         psci                                      @        &           3           @   @        R           _           p           {   
      cpu@2            cpu           arm,cortex-a53                                                                     x         psci                                      @        &           3           @   @        R           _           p           {         cpu@3            cpu           arm,cortex-a53                                                                     x         psci                                      @        &           3           @   @        R           _           p           {         idle-states         psci       cpu-sleep             arm,idle-state                                 x                             {            l2-cache              cache                               	              @        (           {            opp-table-0           operating-points-v2                  {      opp-408000000               Q          ~        $  @         5      opp-600000000               #F          ~        $  @      opp-816000000               0,          B@        $  @      opp-1008000000              <                  $  @      opp-1200000000              G          (        $  @      opp-1296000000              M?d                   $  @         analog-sound              simple-audio-card           Ai2s         Z           tAnalog A/V          okay       simple-audio-card,cpu                    simple-audio-card,codec                     arm-pmu           arm,cortex-a53-pmu        0         d          e          f          g              	   
            display-subsystem             rockchip,display-subsystem                   hdmi-sound            simple-audio-card           Ai2s         Z           tHDMI            okay       simple-audio-card,cpu                    simple-audio-card,codec                     psci              arm,psci-1.0 arm,psci-0.2            smc       timer             arm,armv8-timer       0                                
        xin24m            fixed-clock                     n6         xin24m          {   H      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                         )     7        i2s_clk i2s_hclk                                tx rx                       okay            {         i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        *     8        i2s_clk i2s_hclk                                tx rx                       okay            {         i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s                                                        +     9        i2s_clk i2s_hclk                                 tx rx                     	  disabled          spdif@ff030000            rockchip,rk3328-spdif                                                          .     :      
  mclk hclk                 
        tx          default         *                       okay            {   o      pdm@ff040000              rockchip,pdm                                         =     R        pdm_clk pdm_hclk                          rx          default sleep           *                       4                     	  disabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd                                 {   E   io-domains        "    rockchip,rk3328-io-voltage-domain           okay            >           L           Z           h           v                               gpio              rockchip,rk3328-grf-gpio                                {   G      power-controller          !    rockchip,rk3328-power-controller                                    +            {   ;   power-domain@1                                               power-domain@6                             D                  power-domain@5                                   B      A      B                  power-domain@8                                  F                     reboot-mode           syscon-reboot-mode                    RB         RB        RB	         RB         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        7                  &              baudclk apb_pclk                                tx rx           default         *          !                            	  disabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        8                  '              baudclk apb_pclk                                tx rx           default         *   "   #   $                            	  disabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart                                        9                  (              baudclk apb_pclk                                tx rx           default         *   %                              okay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      $                        +                   7            	  i2c pclk            default         *   &      	  disabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      %                        +                   8            	  i2c pclk            default         *   '        okay             B@        #           ;   S   pmic@18           rockchip,rk805                          (                      default         *   )         R         j                    x   *           *           *           *                         regulators     DCDC_REG1         
  vdd_logic            
`         p                          {   <   regulator-state-mem          %        = B@         DCDC_REG2           vdd_arm          
`         p                          {      regulator-state-mem          %        = ~         DCDC_REG3           vcc_ddr                      regulator-state-mem          %         DCDC_REG4           vcc_io           2Z         2Z                          {      regulator-state-mem          %        = 2Z         LDO_REG1            vdd_18           w@         w@                          {      regulator-state-mem          %        = w@         LDO_REG2            vcc_18emmc           w@         w@                          {      regulator-state-mem          %        = w@         LDO_REG3            vdd_11                                         regulator-state-mem          %        =                   i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      &                        +                   9            	  i2c pclk            default         *   +      	  disabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c                                      '                        +                   :            	  i2c pclk            default         *   ,      	  disabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi                                      1                        +                                  spiclk apb_pclk                     	        tx rx           default         *   -   .   /   0      	  disabled          watchdog@ff1a0000              rockchip,rk3328-wdt snps,dw-wdt                                      (                        pwm@ff1b0000              rockchip,rk3328-pwm                                      <            	  pwm pclk            default         *   1        Y         	  disabled          pwm@ff1b0010              rockchip,rk3328-pwm                                     <            	  pwm pclk            default         *   2        Y         	  disabled          pwm@ff1b0020              rockchip,rk3328-pwm                                      <            	  pwm pclk            default         *   3        Y         	  disabled          pwm@ff1b0030              rockchip,rk3328-pwm               0                      <            	  pwm pclk            default         *   4        Y         	  disabled          dma-controller@ff1f0000           arm,pl330 arm,primecell                      @                                       d                     	  apb_pclk            {           {         thermal-zones      soc-thermal                                           5       trips      trip-point0          p                   passive       trip-point1          L                   passive         {   6      soc-crit             s                	   critical             cooling-maps       map0               6      0     	   
                       map1               6           7                          tsadc@ff250000            rockchip,rk3328-tsadc                %                        :                 $          P               $              tsadc apb_pclk          init default sleep          *   8        4   9        )   8        3      B      
  :tsadc-apb           F         ]           okay            s                        {   5      efuse@ff260000            rockchip,rk3328-efuse                &         P                     +                  >        pclk_efuse                 id@7                         cpu-leakage@17                       logic-leakage@19                         cpu-version@1a                                       {   I         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc                (                        P                             %              saradc apb_pclk         3      V        :saradc-apb        	  disabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450                0               T         Z          W          ]          X          Y          [          \         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1                              	  bus core                :           ;           3      f                       <        {   7      opp-table-gpu             operating-points-v2         {   :   opp-200000000                         g8      opp-300000000                         g8      opp-400000000               ׄ          g8      opp-500000000               e          0      	  disabled             iommu@ff330200            rockchip,iommu               3                       `                                aclk iface                    	  disabled          iommu@ff340800            rockchip,iommu               4        @               b                       F        aclk iface                    	  disabled          video-codec@ff350000              rockchip,rk3328-vpu              5                        	           vdpu                        F      
  aclk hclk              =           ;         iommu@ff350800            rockchip,iommu               5        @                                      F        aclk iface                         ;           {   =      video-codec@ff360000          *    rockchip,rk3328-vdec rockchip,rk3399-vdec                6                                               B      A      B        axi ahb cabac core                      A      B        ׄ ׄ             >           ;         iommu@ff360480            rockchip,iommu                6       @    6       @               J                       B        aclk iface                         ;           {   >      vop@ff370000              rockchip,rk3328-vop              7        >                                        x     ;        aclk_vop dclk_vop hclk_vop          3                          :axi ahb dclk               ?        okay       port            {      endpoint               @        {   F            iommu@ff373f00            rockchip,iommu               7?                                               ;        aclk iface                      okay            {   ?      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi              <                                   #                        F              iahb isfr cec              A        #hdmi            default         *   B   C   D        -   E                    okay            {      ports                        +       port@0                  endpoint               F        {   @         port@1                          codec@ff410000            rockchip,rk3328-codec                A                              *      
  pclk mclk           -   E                    okay            :   G               {         phy@ff430000              rockchip,rk3328-hdmi-phy                 C                        S                     H      y        sysclk refoclk refpclk        	  hdmi_phy                        E   I        Qcpu-version         b            okay            {   A      clock-controller@ff440000             rockchip,rk3328-cru              D                     H        xin24m          -   E                   m                 x      =            &      '      (                                                      A      B      D      C      "      \      5                             H                 4                  $  z      z               H   H   H      |           n6 n6 n6     ׄ     n6 #F L  G рxhxhрxhxh           {         syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd                E                              +      usb2phy@100           rockchip,rk3328-usb2phy                            H        phyclk          usb480m_phy                           {        z   J        okay            {   J   otg-port            b          $         ;          <          =           otg-bvalid otg-id linestate         okay            {   X      host-port           b                   >         
  linestate           okay            {   Y            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              P        @                                  =      !      J      N        biu ciu ciu-drive ciu-sample                       р        3      m        :reset           okay                                                  default         *   K   L   M   N                            mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              Q        @                                  >      "      K      O        biu ciu ciu-drive ciu-sample                       р        3      n        :reset         	  disabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              R        @                                  ?      #      L      P        biu ciu ciu-drive ciu-sample                       р        3      o        :reset           okay                                                                     %        default         *   O   P   Q                            ethernet@ff540000             rockchip,rk3328-gmac                 T                                   macirq        8         d      W      X      Z      Y                  M  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            3      c      
  :stmmaceth           -   E        3           A           O           okay                  d      f        z   R   R        Zinput           g   S        rrgmii           {           default         *   T                      &              mdio              snps,dwmac-mdio                      +       ethernet-phy@0                         '          u0           (              {   S            ethernet@ff550000             rockchip,rk3328-gmac                 U                 -   E                          macirq        8         T      S      S      U                  V      I  stmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy            3      b      
  :stmmaceth           rrmii            g   U        3           A           O           Zoutput        	  disabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22                             V        3      d        default         *   V   W                 {   U            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2                X                                         M        otg         host                                 	
            @                  X      	  #usb2-phy            okay          usb@ff5c0000              generic-ehci                 \                                         N   J           Y        #usb         okay            default         *   Z   [   \   ]   ^   _      usb@ff5d0000              generic-ohci                 ]                                         N   J           Y        #usb       	  disabled          mmc@ff5f0000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc              _        @                                  @            M      Q        biu ciu ciu-drive ciu-sample                       р        3      h        :reset         	  disabled          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3               `                        C                  `      a              ref_clk suspend_clk bus_clk         host          
  	utmi_wide            	"         	C         	[         	}         	         	        okay          interrupt-controller@ff811000             arm,gic-400         	                         	      @                                 @             `                       	          {         crypto@ff060000           rockchip,rk3328-crypto                       @                                 P     Q      ;        hclk_master hclk_slave sclk         3      D        :crypto-rst        pinctrl           rockchip,rk3328-pinctrl         -   E                     +            	   gpio@ff210000             rockchip,gpio-bank               !                        3                                               	        	           {   m      gpio@ff220000             rockchip,gpio-bank               "                        4                                               	        	         gpio@ff230000             rockchip,gpio-bank               #                        5                                               	        	           {   (      gpio@ff240000             rockchip,gpio-bank               $                        6                                               	        	         pcfg-pull-up             	        {   b      pcfg-pull-down           

        {   j      pcfg-pull-none           
        {   `      pcfg-pull-none-2ma           
        
&           {   i      pcfg-pull-up-2ma             	        
&         pcfg-pull-up-4ma             	        
&           {   c      pcfg-pull-none-4ma           
        
&           {   f      pcfg-pull-down-4ma           

        
&         pcfg-pull-none-8ma           
        
&           {   d      pcfg-pull-up-8ma             	        
&           {   e      pcfg-pull-none-12ma          
        
&           {   g      pcfg-pull-up-12ma            	        
&           {   h      pcfg-output-high             
5        {   l      pcfg-output-low          
A        {   k      pcfg-input-high          	         
L        {   a      pcfg-input           
L      i2c0       i2c0-xfer            
Y            `            `        {   &         i2c1       i2c1-xfer            
Y            `            `        {   '         i2c2       i2c2-xfer            
Y            `            `        {   +         i2c3       i2c3-xfer            
Y             `             `        {   ,      i2c3-pins            
Y              `              `         hdmi_i2c       hdmii2c-xfer             
Y             `             `        {   C         pdm-0      pdmm0-clk           
Y            `        {         pdmm0-fsync         
Y            `      pdmm0-sdi0          
Y            `        {         pdmm0-sdi1          
Y            `        {         pdmm0-sdi2          
Y            `        {         pdmm0-sdi3          
Y            `        {         pdmm0-clk-sleep         
Y             a        {         pdmm0-sdi0-sleep            
Y             a        {         pdmm0-sdi1-sleep            
Y             a        {         pdmm0-sdi2-sleep            
Y             a        {         pdmm0-sdi3-sleep            
Y             a        {         pdmm0-fsync-sleep           
Y             a         tsadc      otp-pin         
Y             `        {   8      otp-out         
Y            `        {   9         uart0      uart0-xfer           
Y      	      `            b        {         uart0-cts           
Y            `        {          uart0-rts           
Y      
      `        {   !      uart0-rts-pin           
Y      
       `         uart1      uart1-xfer           
Y            `            b        {   "      uart1-cts           
Y            `        {   #      uart1-rts           
Y            `        {   $      uart1-rts-pin           
Y             `         uart2-0    uart2m0-xfer             
Y             `            b         uart2-1    uart2m1-xfer             
Y             `            b        {   %         spi0-0     spi0m0-clk          
Y            b      spi0m0-cs0          
Y            b      spi0m0-tx           
Y      	      b      spi0m0-rx           
Y      
      b      spi0m0-cs1          
Y            b         spi0-1     spi0m1-clk          
Y            b      spi0m1-cs0          
Y            b      spi0m1-tx           
Y            b      spi0m1-rx           
Y            b      spi0m1-cs1          
Y            b         spi0-2     spi0m2-clk          
Y             b        {   -      spi0m2-cs0          
Y            b        {   0      spi0m2-tx           
Y            b        {   .      spi0m2-rx           
Y            b        {   /         i2s1       i2s1-mclk           
Y            `      i2s1-sclk           
Y            `      i2s1-lrckrx         
Y            `      i2s1-lrcktx         
Y            `      i2s1-sdi            
Y            `      i2s1-sdo            
Y            `      i2s1-sdio1          
Y            `      i2s1-sdio2          
Y            `      i2s1-sdio3          
Y            `      i2s1-sleep          
Y             a             a             a             a             a             a             a             a             a         i2s2-0     i2s2m0-mclk         
Y            `      i2s2m0-sclk         
Y            `      i2s2m0-lrckrx           
Y            `      i2s2m0-lrcktx           
Y            `      i2s2m0-sdi          
Y            `      i2s2m0-sdo          
Y            `      i2s2m0-sleep          `  
Y             a             a             a             a             a             a         i2s2-1     i2s2m1-mclk         
Y            `      i2s2m1-sclk         
Y             `      i2sm1-lrckrx            
Y            `      i2s2m1-lrcktx           
Y            `      i2s2m1-sdi          
Y            `      i2s2m1-sdo          
Y            `      i2s2m1-sleep          P  
Y             a              a             a             a             a         spdif-0    spdifm0-tx          
Y             `        {            spdif-1    spdifm1-tx          
Y            `         spdif-2    spdifm2-tx          
Y             `         sdmmc0-0       sdmmc0m0-pwren          
Y            c      sdmmc0m0-pin            
Y             c         sdmmc0-1       sdmmc0m1-pwren          
Y             c      sdmmc0m1-pin            
Y              c         sdmmc0     sdmmc0-clk          
Y            d        {   K      sdmmc0-cmd          
Y            e        {   L      sdmmc0-dectn            
Y            c        {   M      sdmmc0-wrprt            
Y            c      sdmmc0-bus1         
Y             e      sdmmc0-bus4       @  
Y             e            e            e            e        {   N      sdmmc0-pins         
Y             c             c             c             c             c             c             c              c         sdmmc0ext      sdmmc0ext-clk           
Y            f      sdmmc0ext-cmd           
Y             c      sdmmc0ext-wrprt         
Y            c      sdmmc0ext-dectn         
Y            c      sdmmc0ext-bus1          
Y            c      sdmmc0ext-bus4        @  
Y            c            c            c            c      sdmmc0ext-pins          
Y              c             c             c             c             c             c             c             c         sdmmc1     sdmmc1-clk          
Y            d      sdmmc1-cmd          
Y            e      sdmmc1-pwren            
Y            e      sdmmc1-wrprt            
Y            e      sdmmc1-dectn            
Y            e      sdmmc1-bus1         
Y            e      sdmmc1-bus4       @  
Y            e            e            e            e      sdmmc1-pins         
Y             c             c             c             c             c             c             c             c             c         emmc       emmc-clk            
Y            g        {   O      emmc-cmd            
Y            h        {   P      emmc-pwren          
Y            `      emmc-rstnout            
Y            `      emmc-bus1           
Y             h      emmc-bus4         @  
Y             h            h            h            h      emmc-bus8           
Y             h            h            h            h            h            h            h            h        {   Q         pwm0       pwm0-pin            
Y            `        {   1         pwm1       pwm1-pin            
Y            `        {   2         pwm2       pwm2-pin            
Y            `        {   3         pwmir      pwmir-pin           
Y            `        {   4         gmac-1     rgmiim1-pins         `  
Y            d            f            f            d            f            f            f      
      f            f            d      	      d            f            f            d            d             d             d             f             d             d             d             d        {   T      rmiim1-pins         
Y            i            g            i            i            i            i      
      i            i            g      	      g             `             `             `             `             `             `         gmac2phy       fephyled-speed10            
Y             `      fephyled-duplex         
Y             `      fephyled-rxm1           
Y            `        {   V      fephyled-txm1           
Y            `      fephyled-linkm1         
Y            `        {   W         tsadc_pin      tsadc-int           
Y            `      tsadc-pin           
Y             `         hdmi_pin       hdmi-cec            
Y             `        {   B      hdmi-hpd            
Y             j        {   D         cif-0      dvp-d2d9-m0         
Y            `            `            `            `            `      	      `      
      `            `            `             `            `            `         cif-1      dvp-d2d9-m1         
Y            `            `            `            `            `            `            `            `            `             `            `            `         pmic       pmic-int-l          
Y             b        {   )         usb3       usb30-host-drv          
Y               `        {   n         wifi       bt-dis          
Y             k        {   Z      bt-wake-host            
Y             b        {   [      chip-en         
Y             k        {   \      host-wake-bt            
Y             l        {   ]      wl-dis          
Y             k        {   ^      wl-wake-host            
Y             b        {   _            chosen          
gserial2:1500000n8         external-gmac-clock           fixed-clock         sY@        gmac_clkin                      {   R      regulator-usb3-current-switch             regulator-fixed          
s        
   m                default         *   n        vcc_host_5v         
   *      regulator-vcc-sys             regulator-fixed         vcc_sys          LK@         LK@        {   *      ir-receiver           gpio-ir-receiver            ?   (              
rc-beelink-gs1        spdif-dit             linux,spdif-dit                     {   p      spdif-sound           simple-audio-card           tSPDIF      simple-audio-card,cpu              o      simple-audio-card,codec            p            	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 mmc0 mmc1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method operating-points-v2 i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts interrupt-affinity ports #clock-cells clock-frequency clock-output-names clock-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply pmuio-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift i2c-scl-falling-time-ns i2c-scl-rising-time-ns system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity rockchip,efuse-size bits #io-channel-cells interrupt-names power-domains mali-supply #iommu-cells iommus remote-endpoint phys phy-names rockchip,grf mute-gpios nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vmmc-supply vqmmc-supply mmc-ddr-1_8v mmc-hs200-1_8v no-sd no-sdio non-removable tx-fifo-depth rx-fifo-depth snps,txpbl clock_in_out phy-handle phy-mode phy-supply snps,pbl tx_delay rx_delay reset-assert-us reset-deassert-us reset-gpios phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller ranges bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path enable-active-high gpio vin-supply linux,rc-map-name 