  p   8  k   (            ;  k`                             /    renesas,s4sk renesas,r8a779f4 renesas,r8a779f0                                   &            7R-Car S4 Starter Kit board     opp-table-0           operating-points-v2           =         H      opp-500000000            P    e          W m         e        opp-800000000            P    /          W m         e        opp-1000000000           P    ;          W m         e        opp-1200000000           P    G          W m         e            v         opp-table-1           operating-points-v2           =         H      opp-500000000            P    e          W m         e        opp-800000000            P    /          W m         e        opp-1000000000           P    ;          W m         e        opp-1200000000           P    G          W m         e            v         cpus                                cpu-map    cluster0       core0                     core1                        cluster1       core0                     core1                        cluster2       core0                     core1                        cluster3       core0                     core1               	            cpu@0             arm,cortex-a55                        cpu             
                         psci                                                        H         cpu@100           arm,cortex-a55                       cpu             
                        psci                                                        H         cpu@10000             arm,cortex-a55                       cpu             
                        psci                                                        H         cpu@10100             arm,cortex-a55                      cpu             
                        psci                                                        H         cpu@20000             arm,cortex-a55                       cpu             
                        psci                                                        H         cpu@20100             arm,cortex-a55                      cpu             
                        psci                                                        H         cpu@30000             arm,cortex-a55                       cpu             
                        psci                                                        H         cpu@30100             arm,cortex-a55                      cpu             
                        psci                                                        H   	      cache-controller-0            cache               
                                  H         cache-controller-1            cache               
                                  H         cache-controller-2            cache               
                                  H         cache-controller-3            cache               
                                  H         idle-states         psci       cpu-sleep-0           arm,idle-state                      ,        =          N          ^           H               extal             fixed-clock         o            |1-                   H         extalr            fixed-clock         o            |                     H         pcie0-clkref              fixed-clock         o            |             H         pcie1-clkref              fixed-clock         o            |             H          pmu_a55           arm,cortex-a55-pmu                         psci              arm,psci-1.0 arm,psci-0.2            smc       scif              fixed-clock         o            |n6          H         soc           simple-bus                                               watchdog@e6020000         +    renesas,r8a779f0-wdt renesas,rcar-gen4-wdt                                                                      
   @                     okay               <      watchdog@e6030000         +    renesas,r8a779f0-wdt renesas,rcar-gen4-wdt                                                            .            
   @             h      	  disabled          pinctrl@e6050000              renesas,pfc-r8a779f0          @               l           l           l           l                            default          H      hscif0          hscif0_data hscif0_ctrl         hscif0           H         hscif1          hscif1_data hscif1_ctrl         hscif1           H         i2c2            i2c2            i2c2             H         i2c4            i2c4            i2c4             H         i2c5            i2c5            i2c5             H         scif_clk          	  scif_clk          	  scif_clk             H         sd          mmc_data4 mmc_ctrl          mmc                    H   *      tsn0            tsn0_mdio_b tsn0_link_b         tsn0                                  H   #      tsn1            tsn1_mdio_b tsn1_link_b         tsn1                                  H   $         gpio@e6050180         -    renesas,gpio-r8a779f0 renesas,rcar-gen4-gpio                        T              6                                
   @                                         #                       /        D         gpio@e6050980         -    renesas,gpio-r8a779f0 renesas,rcar-gen4-gpio                 	       T              7                                
   @                                         #                       /        D            H   ,      gpio@e6051180         -    renesas,gpio-r8a779f0 renesas,rcar-gen4-gpio                        T              8                                
   @                                         #          @            /        D         gpio@e6051980         -    renesas,gpio-r8a779f0 renesas,rcar-gen4-gpio                        T              9                                
   @                                         #          `            /        D            H   '      fuse@e6078800             renesas,r8a779f0-efuse                                                    
   @                nvmem-layout              fixed-layout                               calib@144              D            H   "            timer@e60f0000        -    renesas,r8a779f0-cmt0 renesas,rcar-gen4-cmt0                                                                            Ufck             
   @                   	  disabled          timer@e6130000        -    renesas,r8a779f0-cmt1 renesas,rcar-gen4-cmt1                               `                                                                                                   Ufck             
   @                   	  disabled          timer@e6140000        -    renesas,r8a779f0-cmt1 renesas,rcar-gen4-cmt1                               `                                                                                                   Ufck             
   @                   	  disabled          timer@e6148000        -    renesas,r8a779f0-cmt1 renesas,rcar-gen4-cmt1                              `                                                                                                   Ufck             
   @                   	  disabled          clock-controller@e6150000             renesas,r8a779f0-cpg-mssr                        @                        Uextal extalr            o           a            u                     H         reset-controller@e6160000             renesas,r8a779f0-rst                         @                system-controller@e6180000            renesas,r8a779f0-sysc                        @         a            H   
      thermal@e6198000              renesas,r8a779f0-thermal          0                                                                     
   @                                 H   .      interrupt-controller@e61c0000         &    renesas,intc-ex-r8a779f0 renesas,irqc           D            /                            H                                                                                              
   @      timer@e61e0000        !    renesas,tmu-r8a779f0 renesas,tmu                          0      $                                     tuni0 tuni1 tuni2                            Ufck             
   @                   	  disabled          timer@e6fc0000        !    renesas,tmu-r8a779f0 renesas,tmu                          0      0                                              tuni0 tuni1 tuni2 ticpi2                             Ufck             
   @                   	  disabled          timer@e6fd0000        !    renesas,tmu-r8a779f0 renesas,tmu                          0      0                                              tuni0 tuni1 tuni2 ticpi2                             Ufck             
   @                   	  disabled          timer@e6fe0000        !    renesas,tmu-r8a779f0 renesas,tmu                          0      0                                              tuni0 tuni1 tuni2 ticpi2                             Ufck             
   @                   	  disabled          timer@ffc00000        !    renesas,tmu-r8a779f0 renesas,tmu                          0      0                                              tuni0 tuni1 tuni2 ticpi2                             Ufck             
   @                   	  disabled          phy@e6444000              renesas,r8a779f0-ether-serdes                D@       (                              
   @                                okay             H   %      i2c@e6500000          +    renesas,i2c-r8a779f0 renesas,rcar-gen4-i2c               P         @                                               
   @                                                      tx rx tx rx            n                               	  disabled          i2c@e6508000          +    renesas,i2c-r8a779f0 renesas,rcar-gen4-i2c               P        @                                               
   @                                                      tx rx tx rx            n                               	  disabled          i2c@e6510000          +    renesas,i2c-r8a779f0 renesas,rcar-gen4-i2c               Q         @                                               
   @                                                      tx rx tx rx            n                                 okay                       default         |       i2c@e66d0000          +    renesas,i2c-r8a779f0 renesas,rcar-gen4-i2c               m         @                                   	            
   @             	                                         tx rx tx rx            n                               	  disabled          i2c@e66d8000          +    renesas,i2c-r8a779f0 renesas,rcar-gen4-i2c               m        @                                   
            
   @             
                                         tx rx tx rx            n                                 okay                       default         |       i2c@e66e0000          +    renesas,i2c-r8a779f0 renesas,rcar-gen4-i2c               n         @                                               
   @                                                      tx rx tx rx            n                                 okay                       default         |    eeprom@50             st,24c16 atmel,24c16                P                    serial@e6540000       =    renesas,hscif-r8a779f0 renesas,rcar-gen4-hscif renesas,hscif                 T         `                                             )           Ufck brg_int scif_clk                   1      0      1      0        tx rx tx rx             
   @                     okay                       default                         serial@e6550000       =    renesas,hscif-r8a779f0 renesas,rcar-gen4-hscif renesas,hscif                 U         `                                             )           Ufck brg_int scif_clk                   3      2      3      2        tx rx tx rx             
   @                     okay                       default                serial@e6560000       =    renesas,hscif-r8a779f0 renesas,rcar-gen4-hscif renesas,hscif                 V         `                                             )           Ufck brg_int scif_clk                   5      4      5      4        tx rx tx rx             
   @                   	  disabled          serial@e66a0000       =    renesas,hscif-r8a779f0 renesas,rcar-gen4-hscif renesas,hscif                 j         `                                             )           Ufck brg_int scif_clk                   7      6      7      6        tx rx tx rx             
   @                   	  disabled          pcie@e65d0000         -    renesas,r8a779f0-pcie renesas,rcar-gen4-pcie          p       ]             ]             ]0             ]P            ]b            ]p                    @           dbi dbi2 atu dma app phy config       0                                              msi dma sft_ce app                   p         	  Ucore ref                
   @             p        pwr                                                       $                pci       8                         @         0       0                  .B                                  D           9                       L                                                                                                                     Z      	  disabled          pcie@e65d8000         -    renesas,r8a779f0-pcie renesas,rcar-gen4-pcie          p       ]            ]            ]             ]            ]            ]                   @           dbi dbi2 atu dma app phy config       0                                              msi dma sft_ce app                   q          	  Ucore ref                
   @             q        pwr                                                       $                pci       8                        @                                  .B                                  D           9                       L                                                                                                                     Z      	  disabled          pcie-ep@e65d0000          3    renesas,r8a779f0-pcie-ep renesas,rcar-gen4-pcie-ep        p       ]              ]             ]0             ]P            ]b            ]p                    @        $  dbi dbi2 atu dma app phy addr_space       $                                     dma sft_ce app                   p         	  Ucore ref                
   @             p        pwr                               p         	  disabled          pcie-ep@e65d8000          3    renesas,r8a779f0-pcie-ep renesas,rcar-gen4-pcie-ep        p       ]             ]            ]             ]            ]            ]                   @        $  dbi dbi2 atu dma app phy addr_space       $                                     dma sft_ce app                   q          	  Ucore ref                
   @             q        pwr                               p         	  disabled          ufs@e6860000              renesas,r8a779f0-ufs                                                                !        Ufck ref_clk         ~  I I             
   @                     okay               "        calibration       ethernet@e6880000             renesas,r8a779f0-ether-switch                                               base secure_base         4                                                                                 	         
                                                                                                                                                                                              !         "         #         $         %         &         '         (         )         *         +         ,         -         .         0         1         2        2  mfwd_error race_error coma_error gwca0_error gwca1_error etha0_error etha1_error etha2_error gptp0_status gptp1_status mfwd_status race_status coma_status gwca0_status gwca1_status etha0_status etha1_status etha2_status rmac0_status rmac1_status rmac2_status gwca0_rxtx0 gwca0_rxtx1 gwca0_rxtx2 gwca0_rxtx3 gwca0_rxtx4 gwca0_rxtx5 gwca0_rxtx6 gwca0_rxtx7 gwca1_rxtx0 gwca1_rxtx1 gwca1_rxtx2 gwca1_rxtx3 gwca1_rxtx4 gwca1_rxtx5 gwca1_rxtx6 gwca1_rxtx7 gwca0_rxts0 gwca0_rxts1 gwca1_rxts0 gwca1_rxts1 rmac0_mdio rmac1_mdio rmac2_mdio rmac0_phy rmac1_phy rmac2_phy                                
   @                     okay               #   $        default    ethernet-ports                              port@0                          %            okay               &        sgmii      mdio                                ethernet-phy@1                        ethernet-phy-ieee802.3-c45             '   
            H   &            port@1                         %           okay               (        sgmii      mdio                                ethernet-phy@2                        ethernet-phy-ieee802.3-c45             '               H   (            port@2                         %         	  disabled                serial@e6e60000       :    renesas,scif-r8a779f0 renesas,rcar-gen4-scif renesas,scif                         @                                             )           Ufck brg_int scif_clk                   Q      P      Q      P        tx rx tx rx             
   @                   	  disabled          serial@e6e68000       :    renesas,scif-r8a779f0 renesas,rcar-gen4-scif renesas,scif                        @                                             )           Ufck brg_int scif_clk                   S      R      S      R        tx rx tx rx             
   @                   	  disabled          serial@e6c50000       :    renesas,scif-r8a779f0 renesas,rcar-gen4-scif renesas,scif                         @                                             )           Ufck brg_int scif_clk                   W      V      W      V        tx rx tx rx             
   @                   	  disabled          serial@e6c40000       :    renesas,scif-r8a779f0 renesas,rcar-gen4-scif renesas,scif                         @                                             )           Ufck brg_int scif_clk                   Y      X      Y      X        tx rx tx rx             
   @                   	  disabled          spi@e6e90000          /    renesas,msiof-r8a779f0 renesas,rcar-gen4-msiof                        d                                   j               A      @      A      @        tx rx tx rx             
   @             j                               	  disabled          spi@e6ea0000          /    renesas,msiof-r8a779f0 renesas,rcar-gen4-msiof                        d                                   k               C      B      C      B        tx rx tx rx             
   @             k                               	  disabled          spi@e6c00000          /    renesas,msiof-r8a779f0 renesas,rcar-gen4-msiof                        d                                   l               E      D      E      D        tx rx tx rx             
   @             l                               	  disabled          spi@e6c10000          /    renesas,msiof-r8a779f0 renesas,rcar-gen4-msiof                        d                                   m               G      F      G      F        tx rx tx rx             
   @             m                               	  disabled          dma-controller@e7350000       -    renesas,dmac-r8a779f0 renesas,rcar-gen4-dmac                  5             0                        e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u         L  error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15                          Ufck             
   @                                              )       )      )      )      )      )      )      )      )      )   	   )   
   )      )      )      )      )            H         dma-controller@e7351000       -    renesas,dmac-r8a779f0 renesas,rcar-gen4-dmac                  5            1                        w          x          y          z          {          |          }          ~                                                                                                   L  error ch0 ch1 ch2 ch3 ch4 ch5 ch6 ch7 ch8 ch9 ch10 ch11 ch12 ch13 ch14 ch15                          Ufck             
   @                                              )      )      )      )      )      )      )      )      )      )      )      )      )      )      )      )            H         mmc@ee140000          -    renesas,sdhi-r8a779f0 renesas,rcar-gen4-sdhi                                                                        #      
  Ucore clkh               
   @                                 )            okay               *        default            +           ,                       iommu@ee480000        4    renesas,ipmmu-r8a779f0 renesas,rcar-gen4-ipmmu-vmsa              H                 "   -            
   @        5         iommu@ee4c0000        4    renesas,ipmmu-r8a779f0 renesas,rcar-gen4-ipmmu-vmsa              L                 "   -            
   @        5         iommu@eed00000        4    renesas,ipmmu-r8a779f0 renesas,rcar-gen4-ipmmu-vmsa                               "   -            
   @        5            H   )      iommu@eed40000        4    renesas,ipmmu-r8a779f0 renesas,rcar-gen4-ipmmu-vmsa                               "   -            
   @        5         iommu@eefc0000        4    renesas,ipmmu-r8a779f0 renesas,rcar-gen4-ipmmu-vmsa                                                               
   @        5            H   -      interrupt-controller@f1000000             arm,gic-v3          D                         /                                                   	            H         chipid@fff00044           renesas,prr               D                         thermal-zones      sensor1-thermal         B           X          f   .       trips      sensor1-crit            v                 	   critical                sensor2-thermal         B           X          f   .      trips      sensor2-crit            v                 	   critical                sensor3-thermal         B           X          f   .      trips      sensor3-crit            v                 	   critical                   timer             arm,armv8-timer       <                                   
                  %  sec-phys phys virt hyp-phys hyp-virt          ufs30-clk             fixed-clock         o            |I          H   !      aliases         /soc/i2c@e6500000           /soc/i2c@e6508000           /soc/i2c@e6510000           /soc/i2c@e66d0000           /soc/i2c@e66d8000           /soc/i2c@e66e0000           /soc/serial@e6540000            /soc/serial@e6550000          -  /soc/ethernet@e6880000/ethernet-ports/port@0          -  /soc/ethernet@e6880000/ethernet-ports/port@1          chosen        '  ignore_loglevel rw root=/dev/nfs ip=on          serial0:921600n8          memory@48000000          memory               H       X         memory@480000000             memory                              regulator-vcc-sdhi            regulator-fixed       	  SDHI Vcc             2Z         2Z        #   ,                (         H   +         	compatible #address-cells #size-cells interrupt-parent model opp-shared phandle opp-hz opp-microvolt clock-latency-ns opp-suspend cpu reg device_type power-domains next-level-cache enable-method cpu-idle-states clocks operating-points-v2 cache-unified cache-level entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us #clock-cells clock-frequency bootph-all interrupts ranges resets status timeout-sec pinctrl-0 pinctrl-names groups function power-source drive-strength gpio-controller #gpio-cells gpio-ranges interrupt-controller #interrupt-cells clock-names #power-domain-cells #reset-cells #thermal-sensor-cells interrupt-names #phy-cells dmas dma-names i2c-scl-internal-delay-ns pagesize uart-has-rtscts reg-names reset-names max-link-speed num-lanes bus-range dma-ranges interrupt-map-mask interrupt-map snps,enable-cdm-check max-functions freq-table-hz nvmem-cells nvmem-cell-names phys phy-handle phy-mode interrupts-extended #dma-cells dma-channels iommus max-frequency vmmc-supply cd-gpios bus-width renesas,ipmmu-main #iommu-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 ethernet0 ethernet1 bootargs stdout-path regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high 