    8 8   (            3                                                                        ,HP Omnibook X 14-fe1          "   2hp,omnibook-x14-fe1 qcom,x1p42100            =laptop     chosen        clocks     xo-board             2fixed-clock          J          Z             g        sleep-clk            2fixed-clock          J           Z             g   )      bi-tcxo-div2-clk             2fixed-factor-clock           Z             o                v                        g   (      bi-tcxo-ao-div2-clk          2fixed-factor-clock           Z             o               v                        g           cpus                                 cpu@0            cpu          2qcom,oryon                            psci                                         
   psci perf            g      l2-cache             2cache                                  g            cpu@100          cpu          2qcom,oryon                           psci                                         
   psci perf            g         cpu@200          cpu          2qcom,oryon                           psci                                         
   psci perf            g         cpu@300          cpu          2qcom,oryon                           psci                                         
   psci perf            g         cpu@10000            cpu          2qcom,oryon                           psci                	            
            
   psci perf            g      l2-cache             2cache                                  g   	         cpu@10100            cpu          2qcom,oryon                          psci                	                        
   psci perf            g         cpu@10200            cpu          2qcom,oryon                          psci                	                        
   psci perf            g         cpu@10300            cpu          2qcom,oryon                          psci                	                        
   psci perf            g         cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                     core2                     core3                           idle-states          psci       cpu-sleep-0          2arm,idle-state          ret                    -           >          N  X         g            domain-idle-states     cluster-sleep-0          2domain-idle-state             D        -  ^        >          N  	         g   !      cluster-sleep-1          2domain-idle-state             T        -          >          N  X         g   "            dummy-sink           2arm,coresight-dummy-sink       in-ports       port       endpoint            _            g  @               firmware       scm          2qcom,scm-x1e80100 qcom,scm          o                          }              g        scmi          	   2arm,scmi                                 tx rx                                              protocol@13                                 g               interconnect-0           2qcom,x1e80100-clk-virt                                 g   4      interconnect-1           2qcom,x1e80100-mc-virt                                  g         memory@80000000          memory                                pmu          2arm,armv8-pmuv3                        psci             2arm,psci-1.0             smc    power-domain-cpu0                                               g         power-domain-cpu1                                               g         power-domain-cpu2                                               g         power-domain-cpu3                                               g         power-domain-cpu4                                                g   
      power-domain-cpu5                                                g         power-domain-cpu6                                                g         power-domain-cpu7                                                g         power-domain-cpu-cluster0                          !   "            #         g         power-domain-cpu-cluster1                          !   "            #         g          power-domain-system                      g   #         reserved-memory                                      gunyah-hyp@80000000                                          g        hyp-elf-package@80800000                                             g        ncc@80a00000                        @                    g        cpucp-log@80e00000                                          g        cpucp@80e40000                      T                    g        reserved-region@81380000                 8                        tags-region@81400000                 @                           g        xbl-dtlog@81a00000                                          g        xbl-ramdump@81a40000                                            g        aop-image@81c00000                                          g        aop-cmd-db@81c60000          2qcom,cmd-db                                         g        aop-config@81c80000                                         g        tme-crash-dump@81ca0000                                         g        tme-log@81ce0000                         @                   g        uefi-log@81ce4000                @                          g        secdata-apss@81cff000                                          g        pdp-ns-shared@81e00000                                          g        gpu-prr@81f00000                                            g        tpm-control@81f10000                                            g        usb-ucsi-shared@81f20000                                            g        pld-pep@81f30000                         `                   g        pld-gmu@81f36000                 `                          g        pld-pdp@81f37000                 p                          g        tz-stat@82700000                 p                           g        xbl-tmp-buffer@82800000                                         g        adsp-rpc-remote-heap@84b00000                                           g        spu-secure-shared-memory@85300000                0                           g        adsp-boot-dtb@866c0000               l                           g        spss-region@86700000                 p       @                    g        adsp-boot@86b00000                                          g        video@87700000               p       p                    g         adspslpi@87e00000                                          g         q6-adsp-dtb@8b800000                                            g         cdsp@8b900000                                           g        q6-cdsp-dtb@8d900000                                            g        gpu-microcode@8d9fe000                                          g         cvp@8da00000                        p                    g        camera@8e100000                                         g        av1-encoder@8e900000                        p                    g        reserved-region@8f000000                                          wpss@8fa00000                                          g        q6-wpss-dtb@91300000                 0                           g        xbl-sc@d8000000                                          g        reserved-region@d8040000                        
                 qtee@d80e0000                       R                    g        ta@d8600000              `                          g        tags@e1000000                       j                    g        llcc-lpi@ff800000                       `                    g        smem@ffe00000         
   2qcom,smem                                  	   $                     g        linux,cma            2shared-dma-pool                                           opp-table-qup100mhz          2operating-points-v2          g   @   opp-75000000            1    xh        8   %      opp-100000000           1             8   &         opp-table-qup120mhz          2operating-points-v2          g   9   opp-75000000            1    xh        8   %      opp-120000000           1    '         8   &         smp2p-adsp           2qcom,smp2p          F   '                    '              Z            d            s      master-kernel           master-kernel                       g         slave-kernel            slave-kernel                                 g            smp2p-cdsp           2qcom,smp2p          F   '                    '              Z   ^          d            s      master-kernel           master-kernel                       g        slave-kernel            slave-kernel                                 g           soc@0            2simple-bus                                                                                                  g     clock-controller@100000       $   2qcom,x1p42100-gcc qcom,x1e80100-gcc                                  o   (   )   *   +   ,   -       .       /       0                                                                                                                            1             Z                                  g   3      mailbox@408000           2qcom,x1e80100-ipcc qcom,ipcc                  @                                                                  g   '      dma-controller@800000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                                                                                                                                    >                      2  6          	  $disabled             g   7      geniqup@8c0000           2qcom,geni-se-qup                                     o   3      3           +m-ahb s-ahb            2  #                                              $okay             g     i2c@880000           2qcom,geni-i2c                         @               (            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7              7                  Otx rx           Y   8        cdefault                                 	  $disabled             g        spi@880000           2qcom,geni-spi                         @               (            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   9         J   7              7                  Otx rx           Y   :   ;        cdefault                                 	  $disabled             g        i2c@884000           2qcom,geni-i2c                 @       @               )            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   <        cdefault                                 	  $disabled             g        spi@884000           2qcom,geni-spi                 @       @               )            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   9         J   7             7                 Otx rx           Y   =   >        cdefault                                 	  $disabled             g        i2c@888000           2qcom,geni-i2c                        @               *            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   ?        cdefault                                 	  $disabled             g        spi@888000           2qcom,geni-spi                        @               *            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   A   B        cdefault                                 	  $disabled             g        i2c@88c000           2qcom,geni-i2c                        @               +            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   C        cdefault                                 	  $disabled             g        spi@88c000           2qcom,geni-spi                        @               +            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   D   E        cdefault                                 	  $disabled             g        i2c@890000           2qcom,geni-i2c                         @               ,            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   F        cdefault                                 	  $disabled             g        spi@890000           2qcom,geni-spi                         @               ,            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   G   H        cdefault                                 	  $disabled             g        i2c@894000           2qcom,geni-i2c                 @       @               -            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   I        cdefault                                 	  $disabled             g        spi@894000           2qcom,geni-spi                 @       @               -            o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   J   K        cdefault                                 	  $disabled             g        serial@894000            2qcom,geni-uart                @       @               -            o   3           +se        0  o   4         4         5         6              7qup-core qup-config             1            q   @        Y   L        cdefault       	  $disabled             g        i2c@898000           2qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   M        cdefault                                 	  $disabled             g        spi@898000           2qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   N   O        cdefault                                 	  $disabled             g         i2c@89c000           2qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            8   %         J   7             7                 Otx rx           Y   P        cdefault                                 	  $disabled             g        spi@89c000           2qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                7qup-core qup-config qup-memory              1            q   @         J   7             7                 Otx rx           Y   Q   R        cdefault                                 	  $disabled             g           dma-controller@a00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                                 	         
                                                                                                          >                      2  6          	  $disabled             g   T      geniqup@ac0000           2qcom,geni-se-qup                                     o   3      3           +m-ahb s-ahb            2  #                                              $okay             g     i2c@a80000           2qcom,geni-i2c                         @                            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T              T                  Otx rx           Y   U        cdefault                                   $okay             J          g     touchscreen@10           2hid-over-i2c                                   F   V   3              W           X        Y   Y        cdefault          spi@a80000           2qcom,geni-spi                         @                            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   9         J   T              T                  Otx rx           Y   Z   [        cdefault                                 	  $disabled             g        i2c@a84000           2qcom,geni-i2c                 @       @               !            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   \        cdefault                                 	  $disabled             g        spi@a84000           2qcom,geni-spi                 @       @               !            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   9         J   T             T                 Otx rx           Y   ]   ^        cdefault                                 	  $disabled             g        i2c@a88000           2qcom,geni-i2c                        @               "            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   _        cdefault                                 	  $disabled             g        spi@a88000           2qcom,geni-spi                        @               "            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   `   a        cdefault                                 	  $disabled             g  	      i2c@a8c000           2qcom,geni-i2c                        @               #            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   b        cdefault                                 	  $disabled             g  
      spi@a8c000           2qcom,geni-spi                        @               #            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   c   d        cdefault                                 	  $disabled             g        i2c@a90000           2qcom,geni-i2c                         @               $            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   e        cdefault                                 	  $disabled             g        spi@a90000           2qcom,geni-spi                         @               $            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   f   g        cdefault                                 	  $disabled             g        i2c@a94000           2qcom,geni-i2c                 @       @               %            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   h        cdefault                                 	  $disabled             g        spi@a94000           2qcom,geni-spi                 @       @               %            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   i   j        cdefault                                 	  $disabled             g        i2c@a98000           2qcom,geni-i2c                        @               &            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   k        cdefault                                 	  $disabled             g        spi@a98000           2qcom,geni-spi                        @               &            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   l   m        cdefault                                 	  $disabled             g        serial@a98000            2qcom,geni-uart                       @               &            o   3           +se        0  o   4         4         5         6              7qup-core qup-config             1            q   @        Y   n        cdefault         $okay             g     bluetooth            2qcom,wcn6855-bt          0            o           p           q           r           s           t           u        $   v         i2c@a9c000           2qcom,geni-i2c                        @               '            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            8   %         J   T             T                 Otx rx           Y   w        cdefault                                 	  $disabled             g        spi@a9c000           2qcom,geni-spi                        @               '            o   3           +se        H  o   4         4         5         6         S                       7qup-core qup-config qup-memory              1            q   @         J   T             T                 Otx rx           Y   x   y        cdefault                                 	  $disabled             g           dma-controller@b00000         *   2qcom,x1e80100-gpi-dma qcom,sm6350-gpi-dma                                        L         M         N         O         P         Q         R         S         T         U         V         W                         >                      2  V          	  $disabled             g   z      geniqup@bc0000           2qcom,geni-se-qup                                     o   3      3           +m-ahb s-ahb            2  C                                              $okay             g     i2c@b80000           2qcom,geni-i2c                         @               u            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z              z                  Otx rx           Y   {        cdefault                                   $okay             J          g     keyboard@3a          2hid-over-i2c                :                   F   V   C              W           |        Y   }        cdefault          5      touchpad@15          2hid-over-i2c                                   F   V                 W           |        Y   ~        cdefault          5         spi@b80000           2qcom,geni-spi                         @               u            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   9         J   z              z                  Otx rx           Y              cdefault                                 	  $disabled             g        i2c@b84000           2qcom,geni-i2c                 @       @               G            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z             z                 Otx rx           Y           cdefault                                 	  $disabled             g        spi@b84000           2qcom,geni-spi                 @       @               G            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   9         J   z             z                 Otx rx           Y              cdefault                                 	  $disabled             g        i2c@b88000           2qcom,geni-i2c                        @               H            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z             z                 Otx rx           Y           cdefault                                 	  $disabled             g        serial@b88000            2qcom,geni-uart                       @               H            o   3           +se        0  o   4         4         5         6              7qup-core qup-config             1            q   @        Y           cdefault       	  $disabled             g        spi@b88000           2qcom,geni-spi                        @               H            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   z             z                 Otx rx           Y              cdefault                                 	  $disabled             g        i2c@b8c000           2qcom,geni-i2c                        @               I            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z             z                 Otx rx           Y           cdefault                                   $okay             J          g     typec-mux@8          2parade,ps8830                        o      
                   C           P           a           n           {                 
           Y           cdefault                      ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g            port@2                 endpoint            _            g                    spi@b8c000           2qcom,geni-spi                        @               I            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   z             z                 Otx rx           Y              cdefault                                 	  $disabled             g        i2c@b90000           2qcom,geni-i2c                         @               J            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z             z                 Otx rx           Y           cdefault                                 	  $disabled             g        spi@b90000           2qcom,geni-spi                         @               J            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   z             z                 Otx rx           Y              cdefault                                 	  $disabled             g         i2c@b94000           2qcom,geni-i2c                 @       @               K            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z             z                 Otx rx           Y           cdefault                                   $okay             J          g  !   redriver@47          2nxp,ptn3222             G                                             V              Y           cdefault          g            spi@b94000           2qcom,geni-spi                 @       @               K            o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   z             z                 Otx rx           Y              cdefault                                 	  $disabled             g  "      i2c@b98000           2qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z             z                 Otx rx           Y           cdefault                                 	  $disabled             g  #      spi@b98000           2qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   z             z                 Otx rx           Y              cdefault                                 	  $disabled             g  $      i2c@b9c000           2qcom,geni-i2c                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            8   %         J   z             z                 Otx rx           Y           cdefault                                 	  $disabled             g  %      spi@b9c000           2qcom,geni-spi                        @                           o   3           +se        H  o   4         4         5         6                                 7qup-core qup-config qup-memory              1            q   @         J   z             z                 Otx rx           Y              cdefault                                 	  $disabled             g  &         thermal-sensor@c271000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '            "                 F                             uplow critical                                 g        thermal-sensor@c272000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '             "0                F                             uplow critical                                 g        thermal-sensor@c273000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '0            "@                F                             uplow critical                                 g        thermal-sensor@c274000        "   2qcom,x1e80100-tsens qcom,tsens-v2                 '@            "P                F                             uplow critical                              	  $disabled             g  '      phy@fd3000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy               0       T                     o              +ref            3   6        $okay                                  &            g         phy@fd5000           2qcom,x1e80100-qmp-usb3-dp-phy                 P       @           o   3            3     3          +aux ref com_aux usb3_pipe               3              3   D   3   O        +phy common           Z                       7                 $okay            C           S            g   .   ports                                port@0                  endpoint            _            g            port@1                 endpoint            _            g            port@2                 endpoint            _            g                 phy@fd9000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o              +ref            3   7        $okay                                  &            g         phy@fda000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           o   3            3  "   3  #        +aux ref com_aux usb3_pipe               3              3   E   3   P        +phy common           Z                       7                 $okay            C           S            g   /   ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g            port@2                 endpoint            _            g                 phy@fde000        8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o              +ref            3   8      	  $disabled             g         phy@fdf000           2qcom,x1e80100-qmp-usb3-dp-phy                        @           o   3  $         3  &   3  '        +aux ref com_aux usb3_pipe               3              3   F   3   Q        +phy common           Z                       7               	  $disabled             g   0   ports                                port@0                  endpoint             g  (         port@1                 endpoint            _            g            port@2                 endpoint            _            g                 interconnect@1500000             2qcom,x1e80100-cnoc-main              P       D                                g         interconnect@1600000             2qcom,x1e80100-cnoc-cfg               `        f                                g   6      interconnect@1680000             2qcom,x1e80100-system-noc                 h                                      g  )      interconnect@16c0000             2qcom,x1e80100-pcie-south-anoc                l        Ѐ                               g         interconnect@16d0000             2qcom,x1e80100-pcie-center-anoc               m        p                                g  *      interconnect@16e0000             2qcom,x1e80100-aggre1-noc                 n       D                                g   S      interconnect@1700000             2qcom,x1e80100-aggre2-noc                 p                                       g         interconnect@1740000             2qcom,x1e80100-pcie-north-anoc                t                                       g         interconnect@1750000             2qcom,x1e80100-usb-center-anoc                u                                        g  +      interconnect@1760000             2qcom,x1e80100-usb-north-anoc                 v        p                               g         interconnect@1770000             2qcom,x1e80100-usb-south-anoc                 w                                       g         interconnect@1780000             2qcom,x1e80100-mmss-noc               x                                       g         pcie@1bd0000            (                     3      q               pci          2qcom,pcie-x1e80100        `               0     x              x @           x             x             0                cparf dbi elbi atu config mhi                                   T                 x                 x0      x0              @      @       @           m                w                            l                                     D                                                 y         /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                  8   o   3   T   3   V   3   W   3   ^   3   _   3      3   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   T        $       0  o                      5                       7pcie-mem cpu-pcie              3      3           +pci link_down               3           &   *        pciephy         UUUUUUUUUUUUUUUU        UUUUUUUU        q         	  $disabled             g  ,   opp-table            2operating-points-v2          g      opp-2500000-1           1     &%        8   %         А                    opp-5000000-1           1     LK@        8   %                              opp-10000000-1          1             8   %         B@                    opp-20000000-1          1    1-         8   %                             opp-5000000-2           1     LK@        8   %                              opp-10000000-2          1             8   %         B@                    opp-20000000-2          1    1-         8   %                             opp-40000000-2          1    bZ         8   %         =	                     opp-8000000-3           1     z         8   &                             opp-16000000-3          1     $         8   &         h                    opp-32000000-3          1    H         8   &         <                    opp-64000000-3          1    А         8   &         x-                    opp-16000000-4          1     $         8   &         h                    opp-32000000-4          1    H         8   &         <                    opp-64000000-4          1    А         8   &         x-                    opp-128000000-4         1              8   &         _(                       pcie@0           pci          2pciclass,0604                                        m                                                 g  -         pci@1bf8000         3      q               pci          2qcom,pcie-x1e80100        `              0     p              p @           p             p                             cparf dbi elbi atu config mhi                                   8                 p                 p0      p0                m                w                              (                   l                          E         F         G         H         I         J                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                            K                                   L                                   M                                            8   o   3   v   3   x   3   y   3      3      3      3   "      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   v        $       0  o                     5                       7pcie-mem cpu-pcie              3   "   3   #        +pci link_down               3   
        8           &   -        pciephy         UUUUUUUU        UUUU        $okay            0   V              <   V              G           Y           cdefault          g  .      phy@1bfc000       "   2qcom,x1p42100-qmp-gen4x4-pcie-phy                                             0   o   3   z   3   x      
   3   {   3   }   3         $  +aux cfg_ahb ref rchng pipe pipediv2            3   %   3   $        +phy phy_nocsr              3   {                     3   	        X                  Z            lpcie6a_pipe_clk                     $okay            C           S            g   -      pci@1c00000         (                     3      q               pci          2qcom,pcie-x1e80100        `               0     ~             ~ @           ~             ~             0                cparf dbi elbi atu config mhi                                   8                 ~                 ~0      ~0                m                w                            l         ^          _          `          Y          V          R          M          N                   /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                             F                                    G                                    H                                    I         8   o   3   k   3   m   3   n   3   t   3   u   3      3   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   k        $       0  o                     5                       7pcie-mem cpu-pcie              3      3           +pci link_down               3           8           &   ,        pciephy         UUUU      	  $disabled             g  /      phy@1c06000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                `               0   o   3   k   3   m         3   o   3   q   3   s      $  +aux cfg_ahb ref rchng pipe pipediv2            3       3           +phy phy_nocsr              3   o                     3            Z            lpcie5_pipe_clk                    	  $disabled             g   ,      pci@1c08000         3      q               pci          2qcom,pcie-x1e80100        `              0     |             | @           |             |                             cparf dbi elbi atu config mhi                                   8                 |                 |0      |0                m                w                              (                   l                                                                                                  /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                  8   o   3   `   3   b   3   c   3   i   3   j   3      3   !      <  +aux cfg bus_master bus_slave slave_q2a noc_aggr cnoc_sf_axi            3   `        $       0  o                     5                       7pcie-mem cpu-pcie              3      3           +pci link_down               3           8           &   +        pciephy         UUUU        $okay            0   V              <   V              Y           cdefault          g  0   pcie@0           pci                                      m                                                 g  1   wifi@0           2pci17cb,1107                                           p                                 t           u        $   v           o           q           r            phy@1c0e000       "   2qcom,x1e80100-qmp-gen3x2-pcie-phy                               0   o   3   `   3   b          3   d   3   f   3   h      $  +aux cfg_ahb ref rchng pipe pipediv2            3      3           +phy phy_nocsr              3   d                     3            Z            lpcie4_pipe_clk                      $okay            C           S            g   +      hwlock@1f40000           2qcom,tcsr-mutex                                           g   $      clock-controller@1fc0000             2qcom,x1e80100-tcsr syscon                                  o                Z                       g         gpu@3d00000       !   2qcom,adreno-43030c00 qcom,adreno          0                                              #  ckgsl_3d0_reg_memory cx_mem cx_dbgc                ,                                        q                                          
  speed_bin           o   5                         7gfx-mem         $okay             g     zap-shader        	  $disabled   1                 1  qcom/x1p42100/hp/omnibook-x14/qcdxkmsucpurwa.mbn             g  2      opp-table         /   2operating-points-v2-adreno operating-points-v2           g      opp-1250000000          1    J|                            *_                 opp-550000000           1     U                    \k        ._                 opp-1400000000          1    SrN                             )_                 opp-1107000000          1    Az                            *_                 opp-1014000000          1    <pi                   ۳        *_                 opp-940000000           1    8C           @         ۳        *_                 opp-825000000           1    1,@                            +_                 opp-720000000           1    *T                             ,_                 opp-666000000-0         1    'Z                    |c        -_                 opp-666000000-1         1    'Z                             -_                 opp-380000000           1    W            @         -        /_                 opp-280000000           1    v            8                  /_                       gmu@3d6a000       '   2qcom,adreno-gmu-x145.0 qcom,adreno-gmu        0       ֠      P                  (                 cgmu rscc gmu_pdc                  0         1           hfi gmu       8   o                      3   $   3   7                  !  +ahb gmu cxo axi memnoc hub demet                                   cx gx                             &           q            g      opp-table            2operating-points-v2          g      opp-550000000           1     U                 opp-220000000           1                @            clock-controller@3d90000             2qcom,x1p42100-gpucc                                o   (   3   5   3   6         Z                                  g         iommu@3da0000         B   2qcom,x1e80100-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                 /           <        8                                                                                                                                      >         ?         @         A                                                                                     o         3   7   3   8               +hlos bus iface ahb                           w         g         interconnect@26400000            2qcom,x1e80100-gem-noc                &@       1                                g   5      interconnect@320c0000            2qcom,x1e80100-nsp-noc                2                                       g        remoteproc@6800000           2qcom,x1e80100-adsp-pas                              <  F                                                    #  wdog fatal ready handover stop-ack           o               +xo              1      1            lcx lmx         o                                         &           O               `stop            $okay          Y  qcom/x1p42100/hp/omnibook-x14/qcadsp8380.mbn qcom/x1p42100/hp/omnibook-x14/adsp_dtbs.elf             g  3   glink-edge          F   '                     '               vlpass           s      fastrpc          2qcom,fastrpc            |fastrpcglink-apps-dsp           vadsp                                          compute-cb@3             2qcom,fastrpc-compute-cb                        2        2  c             w      compute-cb@4             2qcom,fastrpc-compute-cb                        2        2  d             w      compute-cb@5             2qcom,fastrpc-compute-cb                        2        2  e             w      compute-cb@6             2qcom,fastrpc-compute-cb                        2        2  f             w      compute-cb@7             2qcom,fastrpc-compute-cb                        2        2  g             w         gpr       	   2qcom,gpr          
  |adsp_apps                                                         service@1            2qcom,q6apm                                  avs/audio msm/adsp/audio_pd          g     bedais           2qcom,q6apm-lpass-dais                       g        dais             2qcom,q6apm-dais            2        2  a             g  4         service@2            2qcom,q6prm                      avs/audio msm/adsp/audio_pd          g  5   clock-controller             2qcom,q6prm-lpass-clocks          Z            g                     codec@6aa0000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   o      D         f         g              +mclk macro dcodec fsgen          Z          
  lwsa2-mclk                      WSA2             g         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                  o           +iface                             vWSA2            Y           cdefault                       +swr_audio_cgcr                     	   	           ?   ?                .             A           T           f           w                                                                                      	  $disabled             g  6      codec@6ac0000         8   2qcom,x1e80100-lpass-rx-macro qcom,sm8550-lpass-rx-macro                             (   o      @         f         g              +mclk macro dcodec fsgen          Z            lmclk                        g         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                  o           +iface                             vRX          Y           cdefault                        +swr_audio_cgcr                     	                                .           A            T         f        w                                                                         $okay             g     codec@0,4            2sdw20217010d00                                                  g           codec@6ae0000         8   2qcom,x1e80100-lpass-tx-macro qcom,sm8550-lpass-tx-macro                             (   o      9         f         g              +mclk macro dcodec fsgen          Z            lmclk                        g         codec@6b00000         :   2qcom,x1e80100-lpass-wsa-macro qcom,sm8550-lpass-wsa-macro                               (   o      B         f         g              +mclk macro dcodec fsgen          Z            lmclk                       WSA          g         soundwire@6b10000            2qcom,soundwire-v2.0.0                                  o           +iface                             vWSA         Y              cdefault                       +swr_audio_cgcr                     	   	           ?   ?                .             A           T           f           w                                                                                        $okay             g     speaker@0,0          2sdw20217020400                                                      	  SpkrLeft               X        	   |        	               
            g        speaker@0,1          2sdw20217020400                                                     
  SpkrRight              X        	   |        	                           g           clock-controller@6b6c000          6   2qcom,x1e80100-lpassaudiocc qcom,sc8280xp-lpassaudiocc                                 Z                       g         soundwire@6d30000            2qcom,soundwire-v2.0.0                                  o           +iface                                     core wakeup         vTX                         +swr_audio_cgcr          Y           cdefault                    	           	"             .              A               T           f           w                                                                                   $okay             g     codec@0,3            2sdw20217010d00                          	;                     g           codec@6d44000         8   2qcom,x1e80100-lpass-va-macro qcom,sm8550-lpass-va-macro              @              $   o      9         f         g           +mclk macro dcodec            Z            lfsgen                      Y              cdefault         	P           	` I>          g         pinctrl@6e80000       >   2qcom,x1e80100-lpass-lpi-pinctrl qcom,sm8550-lpass-lpi-pinctrl                              %                  o      f         g           +core audio           	v        	           	                       g      tx-swr-active-state          g      clk-pins            	gpio0           	swr_tx_clk          	           	            	      data-pins           	gpio1 gpio2         	swr_tx_data         	           	            	         rx-swr-active-state          g      clk-pins            	gpio3           	swr_rx_clk          	           	            	      data-pins           	gpio4 gpio5         	swr_rx_data         	           	            	         dmic01-default-state             g      clk-pins            	gpio6         
  	dmic1_clk           	            	      data-pins           	gpio7           	dmic1_data          	            	         dmic23-default-state             g      clk-pins            	gpio8         
  	dmic2_clk           	            	      data-pins           	gpio9           	dmic2_data          	            	         wsa-swr-active-state             g      clk-pins            	gpio10          	wsa_swr_clk         	           	            	      data-pins           	gpio11          	wsa_swr_data            	           	            	         wsa2-swr-active-state            g      clk-pins            	gpio15          	wsa2_swr_clk            	           	            	      data-pins           	gpio16          	wsa2_swr_data           	           	            	         spkr-01-sd-n-active-state           	gpio12          	gpio            	            	         	         g            clock-controller@6ea0000          ,   2qcom,x1e80100-lpasscc qcom,sc8280xp-lpasscc                                Z                       g         interconnect@7e40000             2qcom,x1e80100-lpass-ag-noc                                                      g  7      interconnect@7400000             2qcom,x1e80100-lpass-lpiaon-noc               @                                      g  8      interconnect@7430000             2qcom,x1e80100-lpass-lpicx-noc                C                                       g         mmc@8804000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                            hc_irq pwr_irq           o   3      3                  +iface core xo              2               
 d,        
h            1            q         0  o                     5         6              7sdhc-ddr cpu-sdhc           
$            w      	  $disabled             g  9   opp-table            2operating-points-v2          g      opp-19200000            1    $         8         opp-50000000            1            8   %      opp-100000000           1             8   &      opp-202000000           1    
F        8               mmc@8844000       &   2qcom,x1e80100-sdhci qcom,sdhci-msm-v5                @                                           hc_irq pwr_irq           o   3      3                  +iface core xo              2  `            
 d,        
h            1            q         0  o                     5         6              7sdhc-ddr cpu-sdhc           
$            w      	  $disabled             g  :   opp-table            2operating-points-v2          g      opp-19200000            1    $         8         opp-50000000            1            8   %      opp-100000000           1             8   &      opp-202000000           1    
F        8               phy@88e0000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o      	        +ref            3   9      	  $disabled             g         phy@88e1000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                     T                     o              +ref            3   4        $okay                                  &            g         phy@88e2000       8   2qcom,x1e80100-snps-eusb2-phy qcom,sm8550-snps-eusb2-phy                      T                     o              +ref            3   5      	  $disabled             g  ;      phy@88e3000          2qcom,x1e80100-qmp-usb3-uni-phy               0                   o   3            3     3          +aux ref com_aux pipe               3   G   3   L        +phy phy_phy             3            Z            lusb_mp_phy0_pipe_clk                        $okay            C           S            g         phy@88e5000          2qcom,x1e80100-qmp-usb3-uni-phy               P                   o   3            3     3          +aux ref com_aux pipe               3   H   3   M        +phy phy_phy             3            Z            lusb_mp_phy1_pipe_clk                      	  $disabled             g  <      usb@a0f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   o   3      3     3      3     3     3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3          $        4  F         r         :         9         
         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           8              3   A      0  o                     5         6   %           7usb-ddr apps-usb             5                                        	  $disabled             g  =   usb@a000000       
   2snps,dwc3                
                        a              2              &      0            usb2-phy usb3-phy            
.         
G         
_         
u         
         w         g  >   ports                                port@0                  endpoint             g  ?         port@1                 endpoint            _            g                     usb@a2f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
/                                                H   o   3      3      3      3      3      3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3      3           $        (  F                   2         1         &  pwr_event dp_hs_phy_irq dm_hs_phy_irq               3           8              3   =      0  o                      5         6   "           7usb-ddr apps-usb             
         5      	  $disabled             g  @   usb@a200000       
   2snps,dwc3                
                                       2              &         	  usb2-phy            
high-speed           
u         
         w         g  A   port       endpoint             g  B               usb@a4f8800           2qcom,x1e80100-dwc3-mp qcom,dwc3              
O              H   o   3      3      3      3     3     3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3           $          F         9            :            5            8         4         3         6         5         7         8         l  pwr_event_1 pwr_event_2 hs_phy_1 hs_phy_2 dp_hs_phy_1 dm_hs_phy_1 dp_hs_phy_2 dm_hs_phy_2 ss_phy_1 ss_phy_2             3           8              3   >      0  o                     5         6   &           7usb-ddr apps-usb             5                                          $okay             g  C   usb@a400000       
   2snps,dwc3                
@                       3              2               &              usb2-0 usb3-0           
host             
.         
G         
_         
u         
         w         g  D         usb@a6f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
o              H   o   3      3     3      3  
   3     3      3      3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3          $        4  F         s         =                           1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           8              3   ?         5                                          $okay             g  E   usb@a600000       
   2snps,dwc3                
`                       c              2               &      .            usb2-phy usb3-phy            
.         
G         
_         
u         
         w        
host             g  F   ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g                     usb@a8f8800          2qcom,x1e80100-dwc3 qcom,dwc3                 
              H   o   3      3     3      3     3     3      3       3      3         R  +cfg_noc core iface sleep mock_utmi noc_aggr noc_aggr_north noc_aggr_south noc_sys              3     3          $        4  F         t         <                  /         1  pwr_event dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                3           8              3   @      0  o                     5         6   $           7usb-ddr apps-usb             5                                          $okay             g  G   usb@a800000       
   2snps,dwc3                
                       e              2  `            &      /            usb2-phy usb3-phy            
.         
G         
_         
u         
         w        
host             g  H   ports                                port@0                  endpoint            _            g           port@1                 endpoint            _            g                     video-codec@aa00000       $   2qcom,x1e80100-iris qcom,sm8550-iris              
                                                     1   
   1            venus vcodec0 mxc mmcx          q            o   3  Y                     +iface core vcodec0_core       0  o   5         6   *                             7cpu-cfg video-mem                         3   X        +bus            2  @       2  G             w      	  $disabled             g  I   opp-table            2operating-points-v2          g      opp-192000000           1    q         8            opp-240000000           1    N         8   &   %      opp-338000000           1    %x        8   &   &      opp-366000000           1    з        8            opp-444000000           1    v         8            opp-481000000           1    z@        8                  clock-controller@aaf0000             2qcom,x1e80100-videocc                
                  o   (   3  X            1      1   
        8   %   %         Z                                  g         display-subsystem@ae00000            2qcom,x1e80100-mdss               
                 cmdss                   S            o         3   &      :                     H  o            5                            5         6              7mdp0-mem mdp1-mem cpu-cfg                              2                                                                    $okay             g      display-controller@ae01000           2qcom,x1e80100-dpu                 
           
               	  cmdp vbif            F             (   o   3   &            =      :      F        +nrt_bus iface lut core vsync            q               1            g  J   ports                                port@0                  endpoint            _            g            port@4                 endpoint            _            g           port@5                 endpoint            _            g           port@6                 endpoint            _            g              opp-table            2operating-points-v2          g      opp-200000000           1             8   %      opp-325000000           1    _@        8   &      opp-375000000           1    Z        8         opp-514000000           1            8         opp-575000000           1    "E        8               displayport-controller@ae90000           2qcom,x1e80100-dp          P       
             
            
            
            
                F            0   o                                          J  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                     
   .      .      .           q               1           &   .           dp                      $okay             g  K   ports                                port@0                  endpoint            _            g            port@1                 endpoint            
                     _           
    `=         Av    1          g               opp-table            2operating-points-v2          g      opp-160000000           1    	h         8   %      opp-270000000           1    ߀        8   &      opp-540000000           1     /         8         opp-810000000           1    0G        8               displayport-controller@ae98000           2qcom,x1e80100-dp          P       
            
            
            
            
                F            0   o                                          J  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                      
   /      /      /           q              1           &   /           dp                      $okay             g  L   ports                                port@0                  endpoint            _           g            port@1                 endpoint            
                     _           
    `=         Av    1          g               opp-table            2operating-points-v2          g     opp-160000000           1    	h         8   %      opp-270000000           1    ߀        8   &      opp-540000000           1     /         8         opp-810000000           1    0G        8               displayport-controller@ae9a000           2qcom,x1e80100-dp          P       
            
            
            
            
                F            0   o            "      $      '      (      *      J  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                 %      )      +        
   0      0      0           q              1           &   0           dp                    	  $disabled             g  M   ports                                port@0                  endpoint            _           g            port@1                 endpoint            
                     _           g               opp-table            2operating-points-v2          g     opp-160000000           1    	h         8   %      opp-270000000           1    ߀        8   &      opp-540000000           1     /         8         opp-810000000           1    0G        8               displayport-controller@aea0000           2qcom,x1e80100-dp          P       
             
            
            
            
                F            (   o            -      /      2      3      ;  +core_iface core_aux ctrl_link ctrl_link_iface stream_pixel                0      4        
                   q  	            1           &          dp          $okay            Y  
        cdefault          g  N   ports                                port@0                  endpoint            _           g            port@1                 endpoint            
                      
    `=         Av    1         _           g              opp-table            2operating-points-v2          g  	   opp-160000000           1    	h         8   %      opp-270000000           1    ߀        8   &      opp-540000000           1     /         8         opp-810000000           1    0G        8            aux-bus    panel         
   2edp-panel                          port       endpoint            _           g                       phy@aec2a00          2qcom,x1e80100-dp-phy          @       
*           
"            
&            
                 o      "                    +aux cfg_ahb ref             1            Z                     	  $disabled             g  O      phy@aec5a00          2qcom,x1e80100-dp-phy          @       
Z           
R            
V            
P                o      -                    +aux cfg_ahb ref             1            Z                       $okay            C           S            g        clock-controller@af00000             2qcom,x1e80100-dispcc                 
               d   o   (     3   %   )                   .      .      /      /      0      0                          1           8   %         Z                                  g         interrupt-controller@b220000             2qcom,x1e80100-pdc qcom,pdc                "             @        d      H  "         *   *         /  
   4   c  a                 0                                             g         power-management@c300000          %   2qcom,x1e80100-aoss-qmp qcom,aoss-qmp                 0                      '        F   '                      '                 Z             g         sram@c3f0000             2qcom,rpmh-stats              ?               arbiter@c400000          2qcom,x1e80100-spmi-pmic-arb       0       @        0     P       @      D                 ccore chnls obsrvr           2            :                                               g  P   spmi@c42d000                  B       @     L               
  ccnfg intr           periph_irq          F                                                                g  Q   pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                      g  R   pon@1300             2qcom,pmk8350-pon                         	  chlos pbs             g  S   pwrkey           2qcom,pmk8350-pwrkey                              G   t         g  T      resin            2qcom,pmk8350-resin                             	  $disabled             g  U         rtc@6100             2qcom,pmk8350-rtc               a   b       
  crtc alarm                  b               R         `         g  V      nvram@7100           2qcom,spmi-sdam             q                                        q             g  W   reboot-reason@48                H           s               g  X         nvram@7e00           2qcom,spmi-sdam             ~                                        ~             g  Y   charge-limit-en@73              s            g  Z      charge-limit-end@75             u            g  [      charge-limit-delta@76               v            g  \         gpio@8800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                         	v        	                     	                                g     edp-bl-pwm-state            	gpio5           	func3            g           pwm          2qcom,pmk8550-pwm            x           $okay             g           pmic@1           2qcom,pm8550 qcom,spmi-pmic                                                     g  ]   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            g        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                      	v        	                      	                                g      rtmr0-reset-n-active-state          	gpio10          	normal                      	                           g         usb0-3p3-reg-en-state           	gpio11          	normal                      	                           g           led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                     	  $disabled             g  ^      pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm            x         	  $disabled             g  _         pmic@2           2qcom,pm8550 qcom,spmi-pmic                                                     g  `   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            g        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	v        	                     	                                g           pmic@3           2qcom,pmc8380 qcom,spmi-pmic                                                    g  a   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                         	v        	             
        	                                g     edp-bl-en-state         	gpio4           	normal                                        g        edp-bl-reg-en-state         	gpio10          	normal           g              pmic@4           2qcom,pmc8380 qcom,spmi-pmic                                                    g  b   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                         	v        	             
        	                                g           pmic@5           2qcom,pmc8380 qcom,spmi-pmic                                                    g  c   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            g        gpio@8800         !   2qcom,pmc8380-gpio qcom,spmi-gpio                         	v        	             
        	                                g     usb0-pwr-1p15-reg-en-state          	gpio8           	normal                      	                           g              pmic@8           2qcom,pm8550 qcom,spmi-pmic                                                     g  d   temp-alarm@a00           2qcom,spmi-temp-alarm               
               
                            g        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	v        	                     	                                g     misc-3p3-reg-en-state           	gpio6           	normal           	                                                          g              pmic@9           2qcom,pm8550 qcom,spmi-pmic              	                                       g  e   temp-alarm@a00           2qcom,spmi-temp-alarm               
            	   
                            g        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	v        	                     	                                g     usb0-1p8-reg-en-state           	gpio8           	normal                      	                           g              pmic@c           2qcom,pm8010 qcom,spmi-pmic                                                  	  $disabled             g  f   temp-alarm@2400          2qcom,spmi-temp-alarm               $               $                            g              spmi@c432000                  C        @     M               
  ccnfg intr           periph_irq          F                                                                g  g   pmic@7           2qcom,smb2360 qcom,spmi-pmic                                                   $okay             g  h   phy@fd00             2qcom,smb2360-eusb2-repeater                                                      g            pmic@a           2qcom,smb2360 qcom,spmi-pmic             
                                      $okay             g  i   phy@fd00             2qcom,smb2360-eusb2-repeater                                                      g            pmic@b           2qcom,smb2360 qcom,spmi-pmic                                                 	  $disabled             g  j   phy@fd00             2qcom,smb2360-eusb2-repeater                                  g  k         pmic@c           2qcom,smb2360 qcom,spmi-pmic                                                 	  $disabled             g  l   phy@fd00             2qcom,smb2360-eusb2-repeater                                  g  m               pinctrl@f100000          2qcom,x1e80100-tlmm                                                   	v        	                               	   V                                  "      ,      H                  g   V   edp0-hpd-default-state          	gpio119       	  	edp0_hot             	         g  
      qup-i2c0-data-clk-state         	gpio0 gpio1       	  	qup0_se0            	                      g   {      qup-i2c1-data-clk-state         	gpio4 gpio5       	  	qup0_se1            	                      g         qup-i2c2-data-clk-state         	gpio8 gpio9       	  	qup0_se2            	                      g         qup-i2c3-data-clk-state         	gpio12 gpio13         	  	qup0_se3            	                      g         qup-i2c4-data-clk-state         	gpio16 gpio17         	  	qup0_se4            	                      g         qup-i2c5-data-clk-state         	gpio20 gpio21         	  	qup0_se5            	                      g         qup-i2c6-data-clk-state         	gpio24 gpio25         	  	qup0_se6            	                      g         qup-i2c7-data-clk-state         	gpio14 gpio15         	  	qup0_se7            	                      g         qup-i2c8-data-clk-state         	gpio32 gpio33         	  	qup1_se0            	                      g   U      qup-i2c9-data-clk-state         	gpio36 gpio37         	  	qup1_se1            	                      g   \      qup-i2c10-data-clk-state            	gpio40 gpio41         	  	qup1_se2            	                      g   _      qup-i2c11-data-clk-state            	gpio44 gpio45         	  	qup1_se3            	                      g   b      qup-i2c12-data-clk-state            	gpio48 gpio49         	  	qup1_se4            	                      g   e      qup-i2c13-data-clk-state            	gpio52 gpio53         	  	qup1_se5            	                      g   h      qup-i2c14-data-clk-state            	gpio56 gpio57         	  	qup1_se6            	                      g   k      qup-i2c15-data-clk-state            	gpio54 gpio55         	  	qup1_se7            	                      g   w      qup-i2c16-data-clk-state            	gpio64 gpio65         	  	qup2_se0            	                      g   8      qup-i2c17-data-clk-state            	gpio68 gpio69         	  	qup2_se1            	                      g   <      qup-i2c18-data-clk-state            	gpio72 gpio73         	  	qup2_se2            	                      g   ?      qup-i2c19-data-clk-state            	gpio76 gpio77         	  	qup2_se3            	                      g   C      qup-i2c20-data-clk-state            	gpio80 gpio81         	  	qup2_se4            	                      g   F      qup-i2c21-data-clk-state            	gpio84 gpio85         	  	qup2_se5            	                      g   I      qup-i2c22-data-clk-state            	gpio88 gpio89         	  	qup2_se6            	                      g   M      qup-i2c23-data-clk-state            	gpio86 gpio87         	  	qup2_se7            	                      g   P      qup-spi0-cs-state           	gpio3         	  	qup0_se0            	            	         g         qup-spi0-data-clk-state         	gpio0 gpio1 gpio2         	  	qup0_se0            	            	         g         qup-spi1-cs-state           	gpio7         	  	qup0_se1            	            	         g         qup-spi1-data-clk-state         	gpio4 gpio5 gpio6         	  	qup0_se1            	            	         g         qup-spi2-cs-state           	gpio11        	  	qup0_se2            	            	         g         qup-spi2-data-clk-state         	gpio8 gpio9 gpio10        	  	qup0_se2            	            	         g         qup-spi3-cs-state           	gpio15        	  	qup0_se3            	            	         g         qup-spi3-data-clk-state         	gpio12 gpio13 gpio14          	  	qup0_se3            	            	         g         qup-spi4-cs-state           	gpio19        	  	qup0_se4            	            	         g         qup-spi4-data-clk-state         	gpio16 gpio17 gpio18          	  	qup0_se4            	            	         g         qup-spi5-cs-state           	gpio23        	  	qup0_se5            	            	         g         qup-spi5-data-clk-state         	gpio20 gpio21 gpio22          	  	qup0_se5            	            	         g         qup-spi6-cs-state           	gpio27        	  	qup0_se6            	            	         g         qup-spi6-data-clk-state         	gpio24 gpio25 gpio26          	  	qup0_se6            	            	         g         qup-spi7-cs-state           	gpio13        	  	qup0_se7            	            	         g         qup-spi7-data-clk-state         	gpio14 gpio15 gpio12          	  	qup0_se7            	            	         g         qup-spi8-cs-state           	gpio35        	  	qup1_se0            	            	         g   [      qup-spi8-data-clk-state         	gpio32 gpio33 gpio34          	  	qup1_se0            	            	         g   Z      qup-spi9-cs-state           	gpio39        	  	qup1_se1            	            	         g   ^      qup-spi9-data-clk-state         	gpio36 gpio37 gpio38          	  	qup1_se1            	            	         g   ]      qup-spi10-cs-state          	gpio43        	  	qup1_se2            	            	         g   a      qup-spi10-data-clk-state            	gpio40 gpio41 gpio42          	  	qup1_se2            	            	         g   `      qup-spi11-cs-state          	gpio47        	  	qup1_se3            	            	         g   d      qup-spi11-data-clk-state            	gpio44 gpio45 gpio46          	  	qup1_se3            	            	         g   c      qup-spi12-cs-state          	gpio51        	  	qup1_se4            	            	         g   g      qup-spi12-data-clk-state            	gpio48 gpio49 gpio50          	  	qup1_se4            	            	         g   f      qup-spi13-cs-state          	gpio55        	  	qup1_se5            	            	         g   j      qup-spi13-data-clk-state            	gpio52 gpio53 gpio54          	  	qup1_se5            	            	         g   i      qup-spi14-cs-state          	gpio59        	  	qup1_se6            	            	         g   m      qup-spi14-data-clk-state            	gpio56 gpio57 gpio58          	  	qup1_se6            	            	         g   l      qup-spi15-cs-state          	gpio53        	  	qup1_se7            	            	         g   y      qup-spi15-data-clk-state            	gpio54 gpio55 gpio52          	  	qup1_se7            	            	         g   x      qup-spi16-cs-state          	gpio67        	  	qup2_se0            	            	         g   ;      qup-spi16-data-clk-state            	gpio64 gpio65 gpio66          	  	qup2_se0            	            	         g   :      qup-spi17-cs-state          	gpio71        	  	qup2_se1            	            	         g   >      qup-spi17-data-clk-state            	gpio68 gpio69 gpio70          	  	qup2_se1            	            	         g   =      qup-spi18-cs-state          	gpio75        	  	qup2_se2            	            	         g   B      qup-spi18-data-clk-state            	gpio72 gpio73 gpio74          	  	qup2_se2            	            	         g   A      qup-spi19-cs-state          	gpio79        	  	qup2_se3            	            	         g   E      qup-spi19-data-clk-state            	gpio76 gpio77 gpio78          	  	qup2_se3            	            	         g   D      qup-spi20-cs-state          	gpio83        	  	qup2_se4            	            	         g   H      qup-spi20-data-clk-state            	gpio80 gpio81 gpio82          	  	qup2_se4            	            	         g   G      qup-spi21-cs-state          	gpio87        	  	qup2_se5            	            	         g   K      qup-spi21-data-clk-state            	gpio84 gpio85 gpio86          	  	qup2_se5            	            	         g   J      qup-spi22-cs-state          	gpio91        	  	qup2_se6            	            	         g   O      qup-spi22-data-clk-state            	gpio88 gpio89 gpio90          	  	qup2_se6            	            	         g   N      qup-spi23-cs-state          	gpio85        	  	qup2_se7            	            	         g   R      qup-spi23-data-clk-state            	gpio86 gpio87 gpio84          	  	qup2_se7            	            	         g   Q      qup-uart2-default-state          g      cts-pins            	gpio8         	  	qup0_se2            	            	      rts-pins            	gpio9         	  	qup0_se2            	            	      tx-pins         	gpio10        	  	qup0_se2            	            	      rx-pins         	gpio11        	  	qup0_se2            	            	         qup-uart14-default-state             g   n   cts-pins            	gpio56        	  	qup1_se6             	      rts-pins            	gpio57        	  	qup1_se6            	            	      tx-pins         	gpio58        	  	qup1_se6            	            	      rx-pins         	gpio59        	  	qup1_se6                      qup-uart21-default-state             g   L   tx-pins         	gpio86        	  	qup2_se5            	            	      rx-pins         	gpio87        	  	qup2_se5            	            	         sdc2-default-state           g  n   clk-pins          	  	sdc2_clk            	            	      cmd-pins          	  	sdc2_cmd            	   
               data-pins         
  	sdc2_data           	   
                  sdc2-sleep-state             g  o   clk-pins          	  	sdc2_clk            	            	      cmd-pins          	  	sdc2_cmd            	                  data-pins         
  	sdc2_data           	                     edp-reg-en-state            	gpio70          	gpio            	            	         g        eusb3-reset-n-state         	gpio6           	gpio            	            	         	         g         hall-int-n-state            	gpio92          	gpio             	         g        kybd-default-state          	gpio67          	gpio                      g   }      nvme-reg-en-state           	gpio18          	gpio            	            	         g        pcie4-default-state          g      clkreq-n-pins           	gpio147       
  	pcie4_clk           	                  perst-n-pins            	gpio146         	gpio            	            	      wake-n-pins         	gpio148         	gpio            	                     pcie6a-default-state             g      clkreq-n-pins           	gpio153         	pcie6a_clk          	                  perst-n-pins            	gpio152         	gpio            	            	      wake-n-pins         	gpio154         	gpio            	                     tpad-default-state          	gpio3           	gpio                      g   ~      ts0-default-state            g   Y   int-n-pins          	gpio51          	gpio                   reset-n-pins            	gpio48          	gpio             	        	            usb-1-ss1-sbu-state          g     mode-pins           	gpio177         	gpio             	        	            	      oe-n-pins           	gpio179         	gpio             	        	         sel-pins            	gpio178         	gpio             	        	            wcd-reset-n-active-state            	gpio191         	gpio            	            	         	         g        wcn-sw-en-state         	gpio214         	gpio            	            	         g        wcn-wlan-bt-en-state            	gpio116 gpio117         	gpio            	            	         g           stm@10002000              2arm,coresight-stm arm,primecell                             (                 cstm-base stm-stimulus-base           o         	  +apb_pclk       out-ports      port       endpoint            _           g  "               tpdm@10003000         "   2qcom,coresight-tpdm arm,primecell                 0                 o         	  +apb_pclk                        /          	  $disabled       out-ports      port       endpoint            _           g                 tpda@10004000         "   2qcom,coresight-tpda arm,primecell                 @                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _           g           port@1                 endpoint            _           g               out-ports      port       endpoint            _           g  !               tpdm@1000f000         "   2qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk                        /       out-ports      port       endpoint            _            g                 funnel@10041000       +   2arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@6                 endpoint            _  !         g           port@7                 endpoint            _  "         g              out-ports      port       endpoint            _  #         g  (               funnel@10042000       +   2arm,coresight-dynamic-funnel arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@2                 endpoint            _  $         g  n         port@5                 endpoint            _  %         g  8         port@6                 endpoint            _  &         g  `            out-ports      port       endpoint            _  '         g  )               funnel@10045000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  (         g  #         port@1                 endpoint            _  )         g  '            out-ports      port       endpoint            _  *         g  ;               tpdm@10800000         "   2qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  +         g  d               tpdm@1082c000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            A            W       out-ports      port       endpoint            _  ,         g  Y               tpdm@10841000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  -         g  W               tpdm@10844000         "   2qcom,coresight-tpdm arm,primecell                @                 o         	  +apb_pclk            A            W       out-ports      port       endpoint            _  .         g  /               funnel@10846000       +   2arm,coresight-dynamic-funnel arm,primecell               `                 o         	  +apb_pclk       in-ports       port       endpoint            _  /         g  .            out-ports      port       endpoint            _  0         g  V               cti@1098b000              2arm,coresight-cti arm,primecell                               o         	  +apb_pclk          tpdm@109d0000         "   2qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            A            W          	  $disabled       out-ports      port       endpoint            _  1         g  X               tpdm@10ac0000         "   2qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            A            W          	  $disabled       out-ports      port       endpoint            _  2         g  4               tpdm@10ac1000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  3         g  5               tpda@10ac4000         "   2qcom,coresight-tpda arm,primecell                @                 o         	  +apb_pclk       in-ports                                 port@8                 endpoint            _  4         g  2         port@9              	   endpoint            _  5         g  3            out-ports      port       endpoint            _  6         g  7               funnel@10ac5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports       port       endpoint            _  7         g  6            out-ports      port       endpoint            _  8         g  %               funnel@10b04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk       in-ports                                 port@3                 endpoint            _  9         g  P         port@6                 endpoint            _  :         g  F         port@7                 endpoint            _  ;         g  *            out-ports      port       endpoint            _  <         g  =               tmc@10b05000              2arm,coresight-tmc arm,primecell              P                 o         	  +apb_pclk             g  p   in-ports       port       endpoint            _  =         g  <            out-ports      port       endpoint            _  >         g  ?               replicator@10b06000       /   2arm,coresight-dynamic-replicator arm,primecell               `                 o         	  +apb_pclk       in-ports       port       endpoint            _  ?         g  >            out-ports      port       endpoint            _  @         g                  tpda@10b08000         "   2qcom,coresight-tpda arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  A         g  G         port@1                 endpoint            _  B         g  H         port@2                 endpoint            _  C         g  I         port@3                 endpoint            _  D         g  J         port@4                 endpoint            _  E         g  K            out-ports      port       endpoint            _  F         g  :               tpdm@10b09000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  G         g  A               tpdm@10b0a000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  H         g  B               tpdm@10b0b000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  I         g  C               tpdm@10b0c000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  J         g  D               tpdm@10b0d000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            A            W       out-ports      port       endpoint            _  K         g  E               tpdm@10b20000         "   2qcom,coresight-tpdm arm,primecell                                  o         	  +apb_pclk            A            W          	  $disabled       out-ports      port       endpoint            _  L         g  M               tpda@10b23000         "   2qcom,coresight-tpda arm,primecell                0                 o         	  +apb_pclk          	  $disabled       in-ports       port       endpoint            _  M         g  L            out-ports      port       endpoint            _  N         g  O               funnel@10b24000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk          	  $disabled       in-ports       port       endpoint            _  O         g  N            out-ports      port       endpoint            _  P         g  9               tpdm@10c08000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            A            W       out-ports      port       endpoint            _  Q         g  R               funnel@10c0b000       +   2arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  R         g  Q            out-ports      port       endpoint            _  S         g  c               tpdm@10c28000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk            A            W       out-ports      port       endpoint            _  T         g  Z               tpdm@10c29000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  U         g  [               tpda@10c2b000         "   2qcom,coresight-tpda arm,primecell                °                 o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  V         g  0         port@13                endpoint            _  W         g  -         port@14                endpoint            _  X         g  1         port@15                endpoint            _  Y         g  ,         port@1a                endpoint            _  Z         g  T         port@1b                endpoint            _  [         g  U            out-ports      port       endpoint            _  \         g  ]               funnel@10c2c000       +   2arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  ]         g  \         port@4                 endpoint            _  ^         g  i         port@5                 endpoint            _  _         g  p            out-ports      port       endpoint            _  `         g  &               tpdm@10c38000         "   2qcom,coresight-tpdm arm,primecell                À                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  a         g  e               tpdm@10c39000         "   2qcom,coresight-tpdm arm,primecell                Ð                 o         	  +apb_pclk               @        /       out-ports      port       endpoint            _  b         g  f               tpda@10c3c000         "   2qcom,coresight-tpda arm,primecell                                 o         	  +apb_pclk       in-ports                                 port@4                 endpoint            _  c         g  S         port@f                 endpoint            _  d         g  +         port@10                endpoint            _  e         g  a         port@11                endpoint            _  f         g  b            out-ports      port       endpoint            _  g         g  h               funnel@10c3d000       +   2arm,coresight-dynamic-funnel arm,primecell                                o         	  +apb_pclk       in-ports       port       endpoint            _  h         g  g            out-ports      port       endpoint            _  i         g  ^               tpdm@10cc1000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk               @        /            A            W          	  $disabled       out-ports      port       endpoint            _  j         g  k               tpda@10cc4000         "   2qcom,coresight-tpda arm,primecell                @                 o         	  +apb_pclk       in-ports                                 port@2                 endpoint            _  k         g  j            out-ports      port       endpoint            _  l         g  m               funnel@10cc5000       +   2arm,coresight-dynamic-funnel arm,primecell               P                 o         	  +apb_pclk       in-ports       port       endpoint            _  m         g  l            out-ports      port       endpoint            _  n         g  $               funnel@10d04000       +   2arm,coresight-dynamic-funnel arm,primecell               @                 o         	  +apb_pclk       in-ports                                 port@6                 endpoint            _  o         g              out-ports      port       endpoint            _  p         g  _               tpdm@10d08000         "   2qcom,coresight-tpdm arm,primecell                Ѐ                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  q         g  y               tpdm@10d09000         "   2qcom,coresight-tpdm arm,primecell                А                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  r         g  z               tpdm@10d0a000         "   2qcom,coresight-tpdm arm,primecell                Р                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  s         g  {               tpdm@10d0b000         "   2qcom,coresight-tpdm arm,primecell                а                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  t         g  |               tpdm@10d0c000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  u         g  }               tpdm@10d0d000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  v         g  ~               tpdm@10d0e000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  w         g                 tpdm@10d0f000         "   2qcom,coresight-tpdm arm,primecell                                 o         	  +apb_pclk                        /       out-ports      port       endpoint            _  x         g                 tpda@10d12000         "   2qcom,coresight-tpda arm,primecell                                  o         	  +apb_pclk       in-ports                                 port@0                  endpoint            _  y         g  q         port@1                 endpoint            _  z         g  r         port@2                 endpoint            _  {         g  s         port@3                 endpoint            _  |         g  t         port@4                 endpoint            _  }         g  u         port@5                 endpoint            _  ~         g  v         port@6                 endpoint            _           g  w         port@7                 endpoint            _           g  x            out-ports      port       endpoint            _           g                 funnel@10d13000       +   2arm,coresight-dynamic-funnel arm,primecell               0                 o         	  +apb_pclk       in-ports       port       endpoint            _           g              out-ports      port       endpoint            _           g  o               iommu@15000000        1   2qcom,x1e80100-smmu-500 qcom,smmu-500 arm,mmu-500                                         A          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                  /           <            w         g   2      iommu@15400000           2arm,smmu-v3              @                 /         $                                        eventq gerror cmdq-sync          w        $okay ved         g  q      interrupt-controller@17000000            2arm,gic-v3                                     0                	                               i                                                             g      msi-controller@17040000          2arm,gic-v3-its                                                     g            mailbox@17430000             2qcom,x1e80100-cpucp-mbox                  C                                                            g         rsc@17500000             2qcom,rpmh-rsc         0       P             Q             R                 cdrv-0 drv-1 drv-2         $                                                                                               	  vapps_rsc                #         g  r   bcm-voter            2qcom,bcm-voter           g         clock-controller             2qcom,x1e80100-rpmh-clk           o          +xo           Z            g         power-controller             2qcom,x1e80100-rpmhpd            q                      g   1   opp-table            2operating-points-v2          g     opp-16                      g  s      opp-48             0         g         opp-52             4         g  t      opp-56             8         g         opp-60             <         g  u      opp-64             @         g   %      opp-80             P         g  v      opp-128                     g   &      opp-144                     g  w      opp-192                     g         opp-256                     g         opp-320           @         g         opp-336           P         g  x      opp-384                    g         opp-416                    g  y            regulators-0             2qcom,pm8550-rpmh-regulators         b                                                   3          E          V          g          v               bob1          
  vreg_bob1            -          <l                    g        bob2          
  vreg_bob2            &5@         -                     g        ldo1            vreg_l1b_1p8             w@         w@                    g         ldo2            vreg_l2b_3p0             .          /M`                    g        ldo4            vreg_l4b_1p8             w@         w@                    g         ldo5            vreg_l5b_3p0             -         -                    g  z      ldo6            vreg_l6b_1p8             w@         -*                    g  {      ldo7            vreg_l7b_2p8             *         *                    g  |      ldo8            vreg_l8b_3p0             .          .                     g  }      ldo9            vreg_l9b_2p9             -*         -*                    g  ~      ldo10           vreg_l10b_1p8            w@         w@                    g        ldo12           vreg_l12b_1p2            O         O                             g   |      ldo13           vreg_l13b_3p0            .          /M`                    g         ldo14           vreg_l14b_3p0            .          .                     g        ldo15           vreg_l15b_1p8            w@         w@                             g   X      ldo16           vreg_l16b_2p9            ,o          ,o                     g        ldo17           vreg_l17b_2p5            &5@         &5@                    g           regulators-1             2qcom,pm8550ve-rpmh-regulators           c                                         (     smps4           vreg_s4c_1p8             R                              g        ldo1            vreg_l1c_1p2             O         O                    g        ldo2            vreg_l2c_0p8             m         	                    g        ldo3            vreg_l3c_0p8             m         	                    g            regulators-2             2qcom,pmc8380-rpmh-regulators            d                                         6     ldo1            vreg_l1d_0p8             m         	                    g         ldo2            vreg_l2d_0p9                      	                    g         ldo3            vreg_l3d_1p8             w@         w@                    g           regulators-3             2qcom,pmc8380-rpmh-regulators            e                          ldo2            vreg_l2e_0p8             m         	                    g         ldo3            vreg_l3e_1p2             O         O                    g            regulators-4             2qcom,pmc8380-rpmh-regulators            f                                         6     smps1           vreg_s1f_0p7             
`                             g        ldo1            vreg_l1f_1p0                                            g        ldo2            vreg_l2f_1p0                                            g        ldo3            vreg_l3f_1p0                                            g           regulators-6             2qcom,pm8550ve-rpmh-regulators           i                                         6          D     smps1           vreg_s1i_0p9                      	                    g        smps2           vreg_s2i_1p0             B@                             g        ldo1            vreg_l1i_1p8             w@         w@                    g        ldo2            vreg_l2i_1p2             O         O                    g        ldo3            vreg_l3i_0p8             m         	                    g            regulators-7             2qcom,pm8550ve-rpmh-regulators           j                                         R     smps5           vreg_s5j_1p2             *@                             g        ldo1            vreg_l1j_0p8             m         	                    g         ldo2            vreg_l2j_1p2             *@         *@                    g         ldo3            vreg_l3j_0p8             m         	                    g               timer@17800000           2arm,armv7-timer-mem                                                                               frame@17801000                                                                `          frame@17803000               0                   	           `         	  $disabled          frame@17805000               P                   
           `         	  $disabled          frame@17807000               p                              `         	  $disabled          frame@17809000                                             `         	  $disabled          frame@1780b000                                             `         	  $disabled          frame@1780d000                                             `         	  $disabled             sram@18b4e000         
   2mmio-sram                                                                              g     scp-sram-section@0           2arm,scmi-shmem                           g         scp-sram-section@200             2arm,scmi-shmem                          g            watchdog@1c840000         	  $disabled gwd         2arm,sbsa-gwdt                                                                   g        efuse@221c8000        !   2qcom,x1e80100-qfprom qcom,qfprom                 "                                          g     gpu-speed-bin@119                         s      	         g            pmu@24091000          0   2qcom,x1e80100-llcc-bwmon qcom,sc7280-llcc-bwmon              $	                       Q           o                           q     opp-table            2operating-points-v2          g     opp-0            5       opp-1            !b      opp-2            .       opp-3            ^       opp-4            hL       opp-5                   opp-6                   opp-7                   opp-8                    opp-9                        pmu@240b5400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $T                      E           o   5         5              q           g     opp-table            2operating-points-v2          g     opp-0            I>       opp-1            q@      opp-2            |       opp-3                   opp-4            Ȁ      opp-5           `@            pmu@240b6400          *   2qcom,x1e80100-cpu-bwmon qcom,sdm845-bwmon                $d                      E           o   5         5              q        system-cache-controller@25000000             2qcom,x1e80100-llcc               %               %               %@              %`              %              %              %              %              &               &                   cllcc0_base llcc1_base llcc2_base llcc3_base llcc4_base llcc5_base llcc6_base llcc7_base llcc_broadcast_base llcc_broadcast_and_base               
         remoteproc@32300000          2qcom,x1e80100-cdsp-pas               20               @  F         B                                          #  wdog fatal ready handover stop-ack           o               +xo              1       1   
   1            cx mxc nsp          o                                      &           O              `stop            $okay          Y  qcom/x1p42100/hp/omnibook-x14/qccdsp8380.mbn qcom/x1p42100/hp/omnibook-x14/cdsp_dtbs.elf             g     glink-edge          F   '                     '               vcdsp            s      fastrpc          2qcom,fastrpc            |fastrpcglink-apps-dsp           vcdsp                                          compute-cb@1             2qcom,fastrpc-compute-cb                        2               w      compute-cb@2             2qcom,fastrpc-compute-cb                        2               w      compute-cb@3             2qcom,fastrpc-compute-cb                        2               w      compute-cb@4             2qcom,fastrpc-compute-cb                        2               w      compute-cb@5             2qcom,fastrpc-compute-cb                        2               w      compute-cb@6             2qcom,fastrpc-compute-cb                        2               w      compute-cb@7             2qcom,fastrpc-compute-cb                        2               w      compute-cb@8             2qcom,fastrpc-compute-cb                        2               w      compute-cb@10            2qcom,fastrpc-compute-cb             
           2               w      compute-cb@11            2qcom,fastrpc-compute-cb                        2               w      compute-cb@12            2qcom,fastrpc-compute-cb                        2               w      compute-cb@13            2qcom,fastrpc-compute-cb                        2               w               phy@1bd4000       "   2qcom,x1p42100-qmp-gen4x4-pcie-phy                 @             `               0   o   3   X   3   V         3   Y   3   [   3   ]      $  +aux cfg_ahb ref rchng pipe pipediv2            3      3           +phy phy_nocsr              3   Y                     3            Z            lpcie3_pipe_clk                    	  $disabled             g   *         timer            2arm,armv8-timer       0                                   
         thermal-zones            g     aoss0-thermal           m         trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                cpu0-0-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu0-0-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu0-1-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu0-1-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu0-2-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu0-2-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu0-3-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu0-3-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpuss0-top-thermal          m     	   trips      trip-point0         } 8                	   Ecritical                cpuss0-btm-thermal          m     
   trips      trip-point0         } 8                	   Ecritical                mem-thermal         m        trips      trip-point0         } _                   Ehot       trip-point1         } 8                  	   Ecritical                video-thermal           m        trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                aoss1-thermal           m         trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                cpu1-0-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu1-0-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu1-1-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu1-1-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu1-2-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu1-2-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu1-3-top-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpu1-3-btm-thermal          m        trips      trip-point0         } 8                	   Ecritical                cpuss1-top-thermal          m     	   trips      trip-point0         } 8                	   Ecritical                cpuss1-btm-thermal          m     
   trips      trip-point0         } 8                	   Ecritical                aoss2-thermal           m         trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                nsp0-thermal            m        trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                nsp1-thermal            m        trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                nsp2-thermal            m        trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                nsp3-thermal            m        trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                gpuss-0-thermal                    m        cooling-maps       map0                                 trips      trip-point0         } s                   Epassive          g        trip-point1         } 8                	   Ecritical                gpuss-1-thermal                    m        cooling-maps       map0                                 trips      trip-point0         } s                   Epassive          g        trip-point1         } 8                	   Ecritical                gpuss-2-thermal                    m        cooling-maps       map0                                 trips      trip-point0         } s                   Epassive          g        trip-point1         } 8                	   Ecritical                gpuss-3-thermal                    m        cooling-maps       map0                                 trips      trip-point0         } s                   Epassive          g        trip-point1         } 8                	   Ecritical                camera0-thermal         m     	   trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                camera1-thermal         m     
   trips      trip-point0         } _                   Ehot       trip-point1         } 8                	   Ecritical                pm8550-thermal             d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot             pm8550ve-2-thermal             d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot             pmc8380-3-thermal              d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot             pmc8380-4-thermal              d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot             pmc8380-5-thermal              d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot             pm8550ve-8-thermal             d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot             pm8550ve-9-thermal             d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot             pm8010-thermal             d        m     trips      trip0           } s                     Epassive       trip1           } 8                     Ehot                aliases       $  /soc@0/geniqup@8c0000/serial@894000       $  /soc@0/geniqup@ac0000/serial@a98000       audio-codec          2qcom,wcd9385-codec          cdefault         Y           w@         w@         w@         w@         . $ I                   U         |  P                               V                 X           X        	   X                              g        backlight            2pwm-backlight                  LK@                        @                      %   P        >                           Y            cdefault          g        gpio-keys         
   2gpio-keys           Y          cdefault    switch-lid             V   \           K           G             5        \            pmic-glink        @   2qcom,x1e80100-pmic-glink qcom,sm8550-pmic-glink qcom,pmic-glink         p   V   y       V   {                                 connector@0          2usb-c-connector                      dual            dual       ports                                port@0                  endpoint            _           g            port@1                 endpoint            _           g            port@2                 endpoint            _           g                  connector@1          2usb-c-connector                     dual            dual       ports                                port@0                  endpoint            _           g            port@1                 endpoint            _           g            port@2                 endpoint            _           g                    sound            2qcom,x1e80100-sndcard            ,X1E80100-HP-OMNIBOOK-X14         -  SpkrLeft IN WSA WSA_SPK1 OUT SpkrRight IN WSA WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC2 MIC BIAS2 VA DMIC0 MIC BIAS3 VA DMIC1 MIC BIAS3 VA DMIC2 MIC BIAS1 VA DMIC3 MIC BIAS1 VA DMIC0 VA MIC BIAS3 VA DMIC1 VA MIC BIAS3 VA DMIC2 VA MIC BIAS1 VA DMIC3 VA MIC BIAS1 TX SWR_INPUT1 ADC2_OUTPUT             g     wcd-playback-dai-link           WCD Playback       cpu              q      codec                                    platform                       wcd-capture-dai-link            WCD Capture    cpu              x      codec                                  platform                       wsa-dai-link            WSA Playback       cpu              i      codec                                  platform                       va-dai-link         VA Capture     cpu              n      codec                        platform                          regulator-edp-3p3            2regulator-fixed         VREG_EDP_3P3             2Z         2Z           V   F                     Y          cdefault                   g        regulator-edp-bl             2regulator-fixed         VBL9             6         6             
                     cdefault         Y                    g        regulator-misc-3p3           2regulator-fixed         VREG_MISC_3P3            2Z         2Z                                  cdefault         Y                             g   W      regulator-nvme           2regulator-fixed         VREG_NVME_3P3            2Z         2Z           V                        Y          cdefault                   g         regulator-rtmr0-1p15             2regulator-fixed         VREG_RTMR0_1P15          0         0                                  Y          cdefault                   g         regulator-rtmr0-1p8          2regulator-fixed         VREG_RTMR0_1P8           w@         w@                                  Y          cdefault                   g         regulator-rtmr0-3p3          2regulator-fixed         VREG_RTMR0_3P3           2Z         2Z                                   Y          cdefault                   g         regulator-vph-pwr            2regulator-fixed         vreg_vph_pwr             8u          8u                            g        regulator-wcn-3p3            2regulator-fixed         VREG_WCN_3P3             2Z         2Z           V                        Y          cdefault                   g        regulator-wcn-0p95           2regulator-fixed         VREG_WCN_0P95            ~         ~                   g        regulator-wcn-1p9            2regulator-fixed         VREG_WCN_1P9                                         g        wcn6855-pmu          2qcom,wcn6855-pmu                      {                                                    0          @          R          c          t   V   u               V   t            Y          cdefault    regulators     ldo0            vreg_pmu_rfa_cmn_0p8             g   o      ldo1            vreg_pmu_aon_0p8             g   p      ldo2            vreg_pmu_wlcx_0p8            g   q      ldo3            vreg_pmu_wlmx_0p8            g   r      ldo4            vreg_pmu_btcmx_0p8           g   s      ldo5            vreg_pmu_pcie_1p8            g         ldo6            vreg_pmu_pcie_0p9            g         ldo7            vreg_pmu_rfa_0p8             g   t      ldo8            vreg_pmu_rfa_1p2             g   u      ldo9            vreg_pmu_rfa_1p7             g   v            usb-1-ss1-sbu-mux            2onnn,fsusb42 gpio-sbu-mux           >   V                 V               Y          cdefault          7            port       endpoint            _           g              __symbols__         /clocks/xo-board            /clocks/sleep-clk           /clocks/bi-tcxo-div2-clk            /clocks/bi-tcxo-ao-div2-clk         /cpus/cpu@0         /cpus/cpu@0/l2-cache            /cpus/cpu@100           /cpus/cpu@200           /cpus/cpu@300           /cpus/cpu@10000         /cpus/cpu@10000/l2-cache            /cpus/cpu@10100         /cpus/cpu@10200          /cpus/cpu@10300         /cpus/idle-states/cpu-sleep-0         )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1          #  (/dummy-sink/in-ports/port/endpoint          //firmware/scm           3/firmware/scmi/protocol@13          =/interconnect-0         F/interconnect-1         N/psci/power-domain-cpu0         V/psci/power-domain-cpu1         ^/psci/power-domain-cpu2         f/psci/power-domain-cpu3         n/psci/power-domain-cpu4         v/psci/power-domain-cpu5         ~/psci/power-domain-cpu6         /psci/power-domain-cpu7          /psci/power-domain-cpu-cluster0          /psci/power-domain-cpu-cluster1         /psci/power-domain-system         %  /reserved-memory/gunyah-hyp@80000000          *  /reserved-memory/hyp-elf-package@80800000           /reserved-memory/ncc@80a00000         $  /reserved-memory/cpucp-log@80e00000          /reserved-memory/cpucp@80e40000       &  /reserved-memory/tags-region@81400000         $  /reserved-memory/xbl-dtlog@81a00000       &  
/reserved-memory/xbl-ramdump@81a40000         $  /reserved-memory/aop-image@81c00000       %  (/reserved-memory/aop-cmd-db@81c60000          %  7/reserved-memory/aop-config@81c80000          )  F/reserved-memory/tme-crash-dump@81ca0000          "  Y/reserved-memory/tme-log@81ce0000         #  e/reserved-memory/uefi-log@81ce4000        '  r/reserved-memory/secdata-apss@81cff000        (  /reserved-memory/pdp-ns-shared@81e00000       "  /reserved-memory/gpu-prr@81f00000         &  /reserved-memory/tpm-control@81f10000         *  /reserved-memory/usb-ucsi-shared@81f20000         "  /reserved-memory/pld-pep@81f30000         "  /reserved-memory/pld-gmu@81f36000         "  /reserved-memory/pld-pdp@81f37000         "  /reserved-memory/tz-stat@82700000         )  /reserved-memory/xbl-tmp-buffer@82800000          /  /reserved-memory/adsp-rpc-remote-heap@84b00000        3  !/reserved-memory/spu-secure-shared-memory@85300000        (  >/reserved-memory/adsp-boot-dtb@866c0000       &  P/reserved-memory/spss-region@86700000         $  `/reserved-memory/adsp-boot@86b00000          n/reserved-memory/video@87700000       #  x/reserved-memory/adspslpi@87e00000        &  /reserved-memory/q6-adsp-dtb@8b800000           /reserved-memory/cdsp@8b900000        &  /reserved-memory/q6-cdsp-dtb@8d900000         (  /reserved-memory/gpu-microcode@8d9fe000         /reserved-memory/cvp@8da00000         !  /reserved-memory/camera@8e100000          &  /reserved-memory/av1-encoder@8e900000           /reserved-memory/wpss@8fa00000        &  /reserved-memory/q6-wpss-dtb@91300000         !  /reserved-memory/xbl-sc@d8000000            /reserved-memory/qtee@d80e0000          /reserved-memory/ta@d8600000            /reserved-memory/tags@e1000000        #  !/reserved-memory/llcc-lpi@ff800000          ./reserved-memory/smem@ffe00000          7/opp-table-qup100mhz            L/opp-table-qup120mhz            a/smp2p-adsp/master-kernel           p/smp2p-adsp/slave-kernel            ~/smp2p-cdsp/master-kernel           /smp2p-cdsp/slave-kernel            /soc@0          /soc@0/clock-controller@100000          /soc@0/mailbox@408000           /soc@0/dma-controller@800000            /soc@0/geniqup@8c0000         !  /soc@0/geniqup@8c0000/i2c@880000          !  /soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  /soc@0/geniqup@8c0000/spi@884000          !  /soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  /soc@0/geniqup@8c0000/i2c@890000          !  /soc@0/geniqup@8c0000/spi@890000          !  /soc@0/geniqup@8c0000/i2c@894000          !  /soc@0/geniqup@8c0000/spi@894000          $  /soc@0/geniqup@8c0000/serial@894000       !  /soc@0/geniqup@8c0000/i2c@898000          !  /soc@0/geniqup@8c0000/spi@898000          !  /soc@0/geniqup@8c0000/i2c@89c000          !  /soc@0/geniqup@8c0000/spi@89c000             /soc@0/dma-controller@a00000            )/soc@0/geniqup@ac0000         !  1/soc@0/geniqup@ac0000/i2c@a80000          !  6/soc@0/geniqup@ac0000/spi@a80000          !  ;/soc@0/geniqup@ac0000/i2c@a84000          !  @/soc@0/geniqup@ac0000/spi@a84000          !  E/soc@0/geniqup@ac0000/i2c@a88000          !  K/soc@0/geniqup@ac0000/spi@a88000          !  Q/soc@0/geniqup@ac0000/i2c@a8c000          !  W/soc@0/geniqup@ac0000/spi@a8c000          !  ]/soc@0/geniqup@ac0000/i2c@a90000          !  c/soc@0/geniqup@ac0000/spi@a90000          !  i/soc@0/geniqup@ac0000/i2c@a94000          !  o/soc@0/geniqup@ac0000/spi@a94000          !  u/soc@0/geniqup@ac0000/i2c@a98000          !  {/soc@0/geniqup@ac0000/spi@a98000          $  /soc@0/geniqup@ac0000/serial@a98000       !  /soc@0/geniqup@ac0000/i2c@a9c000          !  /soc@0/geniqup@ac0000/spi@a9c000            /soc@0/dma-controller@b00000            /soc@0/geniqup@bc0000         !  /soc@0/geniqup@bc0000/i2c@b80000          !  /soc@0/geniqup@bc0000/spi@b80000          !  /soc@0/geniqup@bc0000/i2c@b84000          !  /soc@0/geniqup@bc0000/spi@b84000          !  /soc@0/geniqup@bc0000/i2c@b88000          $  /soc@0/geniqup@bc0000/serial@b88000       !  /soc@0/geniqup@bc0000/spi@b88000          !  /soc@0/geniqup@bc0000/i2c@b8c000          C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@0/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@1/endpoint        C  /soc@0/geniqup@bc0000/i2c@b8c000/typec-mux@8/ports/port@2/endpoint        !  /soc@0/geniqup@bc0000/spi@b8c000          !  /soc@0/geniqup@bc0000/i2c@b90000          !  /soc@0/geniqup@bc0000/spi@b90000          !  /soc@0/geniqup@bc0000/i2c@b94000          -  /soc@0/geniqup@bc0000/i2c@b94000/redriver@47          !  ./soc@0/geniqup@bc0000/spi@b94000          !  3/soc@0/geniqup@bc0000/i2c@b98000          !  8/soc@0/geniqup@bc0000/spi@b98000          !  =/soc@0/geniqup@bc0000/i2c@b9c000          !  B/soc@0/geniqup@bc0000/spi@b9c000            G/soc@0/thermal-sensor@c271000           N/soc@0/thermal-sensor@c272000           U/soc@0/thermal-sensor@c273000           \/soc@0/thermal-sensor@c274000           c/soc@0/phy@fd3000           s/soc@0/phy@fd5000         (  /soc@0/phy@fd5000/ports/port@0/endpoint       (  /soc@0/phy@fd5000/ports/port@1/endpoint       (  /soc@0/phy@fd5000/ports/port@2/endpoint         /soc@0/phy@fd9000           /soc@0/phy@fda000         (  /soc@0/phy@fda000/ports/port@0/endpoint       (  /soc@0/phy@fda000/ports/port@1/endpoint       (  /soc@0/phy@fda000/ports/port@2/endpoint         3/soc@0/phy@fde000           C/soc@0/phy@fdf000         (  T/soc@0/phy@fdf000/ports/port@0/endpoint       (  i/soc@0/phy@fdf000/ports/port@1/endpoint       (  /soc@0/phy@fdf000/ports/port@2/endpoint         /soc@0/interconnect@1500000         /soc@0/interconnect@1600000         /soc@0/interconnect@1680000         /soc@0/interconnect@16c0000         /soc@0/interconnect@16d0000         /soc@0/interconnect@16e0000         /soc@0/interconnect@1700000         /soc@0/interconnect@1740000         /soc@0/interconnect@1750000         /soc@0/interconnect@1760000         !/soc@0/interconnect@1770000         0/soc@0/interconnect@1780000         9/soc@0/pcie@1bd0000         ?/soc@0/pcie@1bd0000/opp-table           O/soc@0/pcie@1bd0000/pcie@0          Z/soc@0/pci@1bf8000          a/soc@0/phy@1bfc000          l/soc@0/pci@1c00000          r/soc@0/phy@1c06000          |/soc@0/pci@1c08000          /soc@0/pci@1c08000/pcie@0           /soc@0/phy@1c0e000          /soc@0/hwlock@1f40000            /soc@0/clock-controller@1fc0000         /soc@0/gpu@3d00000          /soc@0/gpu@3d00000/zap-shader           /soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          /soc@0/gmu@3d6a000/opp-table             /soc@0/clock-controller@3d90000         /soc@0/iommu@3da0000            /soc@0/interconnect@26400000            /soc@0/interconnect@320c0000            /soc@0/remoteproc@6800000         3  	/soc@0/remoteproc@6800000/glink-edge/gpr/service@1        :  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         8  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       3  #/soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  )/soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         1/soc@0/codec@6aa0000            A/soc@0/soundwire@6ab0000            F/soc@0/codec@6ac0000            T/soc@0/soundwire@6ad0000          #  Y/soc@0/soundwire@6ad0000/codec@0,4          `/soc@0/codec@6ae0000            n/soc@0/codec@6b00000            }/soc@0/soundwire@6b10000          %  /soc@0/soundwire@6b10000/speaker@0,0          %  /soc@0/soundwire@6b10000/speaker@0,1             /soc@0/clock-controller@6b6c000         /soc@0/soundwire@6d30000          #  /soc@0/soundwire@6d30000/codec@0,3          /soc@0/codec@6d44000            /soc@0/pinctrl@6e80000        +  /soc@0/pinctrl@6e80000/tx-swr-active-state        +  /soc@0/pinctrl@6e80000/rx-swr-active-state        ,  /soc@0/pinctrl@6e80000/dmic01-default-state       ,  /soc@0/pinctrl@6e80000/dmic23-default-state       ,  /soc@0/pinctrl@6e80000/wsa-swr-active-state       -  /soc@0/pinctrl@6e80000/wsa2-swr-active-state          1  #/soc@0/pinctrl@6e80000/spkr-01-sd-n-active-state             7/soc@0/clock-controller@6ea0000         ?/soc@0/interconnect@7e40000         L/soc@0/interconnect@7400000         ]/soc@0/interconnect@7430000         m/soc@0/mmc@8804000          t/soc@0/mmc@8804000/opp-table            /soc@0/mmc@8844000          /soc@0/mmc@8844000/opp-table            /soc@0/phy@88e0000          /soc@0/phy@88e1000          /soc@0/phy@88e2000          /soc@0/phy@88e3000          /soc@0/phy@88e5000          /soc@0/usb@a0f8800          /soc@0/usb@a0f8800/usb@a000000        5  /soc@0/usb@a0f8800/usb@a000000/ports/port@0/endpoint          5  /soc@0/usb@a0f8800/usb@a000000/ports/port@1/endpoint            /soc@0/usb@a2f8800          $/soc@0/usb@a2f8800/usb@a200000        -  //soc@0/usb@a2f8800/usb@a200000/port/endpoint            =/soc@0/usb@a4f8800          D/soc@0/usb@a4f8800/usb@a400000          P/soc@0/usb@a6f8800          Z/soc@0/usb@a6f8800/usb@a600000        5  i/soc@0/usb@a6f8800/usb@a600000/ports/port@0/endpoint          5  {/soc@0/usb@a6f8800/usb@a600000/ports/port@1/endpoint            /soc@0/usb@a8f8800          /soc@0/usb@a8f8800/usb@a800000        5  /soc@0/usb@a8f8800/usb@a800000/ports/port@0/endpoint          5  /soc@0/usb@a8f8800/usb@a800000/ports/port@1/endpoint            /soc@0/video-codec@aa00000        %  /soc@0/video-codec@aa00000/opp-table             /soc@0/clock-controller@aaf0000       !  /soc@0/display-subsystem@ae00000          <  /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@4/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@5/endpoint         R  !/soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@6/endpoint         F  0/soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  >/soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  G/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  S/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  `/soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         @  s/soc@0/display-subsystem@ae00000/displayport-controller@ae98000       V  |/soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae98000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae9a000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000       V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/opp-table         \  /soc@0/display-subsystem@ae00000/displayport-controller@aea0000/aux-bus/panel/port/endpoint         /soc@0/phy@aec2a00          ,/soc@0/phy@aec5a00           9/soc@0/clock-controller@af00000       $  @/soc@0/interrupt-controller@b220000          D/soc@0/power-management@c300000         M/soc@0/arbiter@c400000        $  R/soc@0/arbiter@c400000/spmi@c42d000       +  \/soc@0/arbiter@c400000/spmi@c42d000/pmic@0        4  d/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300       ;  p/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/pwrkey        :  {/soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pon@1300/resin         4  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/rtc@6100       6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100         G  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7100/reboot-reason@48        6  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00         I  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-en@73          J  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-end@75         L  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/nvram@7e00/charge-limit-delta@76       5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800          F   /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/gpio@8800/edp-bl-pwm-state         /  /soc@0/arbiter@c400000/spmi@c42d000/pmic@0/pwm        +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@1/temp-alarm@a00         5  0/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800          P  =/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/rtmr0-reset-n-active-state       K  K/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/gpio@8800/usb0-3p3-reg-en-state        ?  [/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/led-controller@ee00        /  h/soc@0/arbiter@c400000/spmi@c42d000/pmic@1/pwm        +  s/soc@0/arbiter@c400000/spmi@c42d000/pmic@2        :  ~/soc@0/arbiter@c400000/spmi@c42d000/pmic@2/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@2/gpio@8800          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/temp-alarm@a00         5  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800          E  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800/edp-bl-en-state          I  /soc@0/arbiter@c400000/spmi@c42d000/pmic@3/gpio@8800/edp-bl-reg-en-state          +  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4        :  /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@4/gpio@8800          +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@5        :   %/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/temp-alarm@a00         5   :/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800          P   J/soc@0/arbiter@c400000/spmi@c42d000/pmic@5/gpio@8800/usb0-pwr-1p15-reg-en-state       +   _/soc@0/arbiter@c400000/spmi@c42d000/pmic@8        :   j/soc@0/arbiter@c400000/spmi@c42d000/pmic@8/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800          K   /soc@0/arbiter@c400000/spmi@c42d000/pmic@8/gpio@8800/misc-3p3-reg-en-state        +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9        :   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/temp-alarm@a00         5   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800          K   /soc@0/arbiter@c400000/spmi@c42d000/pmic@9/gpio@8800/usb0-1p8-reg-en-state        +   /soc@0/arbiter@c400000/spmi@c42d000/pmic@c        ;   /soc@0/arbiter@c400000/spmi@c42d000/pmic@c/temp-alarm@2400        $   /soc@0/arbiter@c400000/spmi@c432000       +  !/soc@0/arbiter@c400000/spmi@c432000/pmic@7        4  !/soc@0/arbiter@c400000/spmi@c432000/pmic@7/phy@fd00       +  !)/soc@0/arbiter@c400000/spmi@c432000/pmic@a        4  !3/soc@0/arbiter@c400000/spmi@c432000/pmic@a/phy@fd00       +  !L/soc@0/arbiter@c400000/spmi@c432000/pmic@b        4  !V/soc@0/arbiter@c400000/spmi@c432000/pmic@b/phy@fd00       +  !o/soc@0/arbiter@c400000/spmi@c432000/pmic@c        4  !y/soc@0/arbiter@c400000/spmi@c432000/pmic@c/phy@fd00         /soc@0/pinctrl@f100000        .  !/soc@0/pinctrl@f100000/edp0-hpd-default-state         /  !/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  "!/soc@0/pinctrl@f100000/qup-i2c7-data-clk-state        /  "3/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  "E/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  "W/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  "j/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  "}/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c14-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c16-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c17-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c18-data-clk-state       0  #/soc@0/pinctrl@f100000/qup-i2c19-data-clk-state       0  #/soc@0/pinctrl@f100000/qup-i2c20-data-clk-state       0  #(/soc@0/pinctrl@f100000/qup-i2c21-data-clk-state       0  #;/soc@0/pinctrl@f100000/qup-i2c22-data-clk-state       0  #N/soc@0/pinctrl@f100000/qup-i2c23-data-clk-state       )  #a/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  #m/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  $/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  $/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  $!/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  $3/soc@0/pinctrl@f100000/qup-spi7-cs-state          /  $?/soc@0/pinctrl@f100000/qup-spi7-data-clk-state        )  $Q/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  $]/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  $o/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  ${/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  $/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi14-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi14-data-clk-state       *  %-/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  %:/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       *  %M/soc@0/pinctrl@f100000/qup-spi16-cs-state         0  %Z/soc@0/pinctrl@f100000/qup-spi16-data-clk-state       *  %m/soc@0/pinctrl@f100000/qup-spi17-cs-state         0  %z/soc@0/pinctrl@f100000/qup-spi17-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi18-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi18-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi19-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi19-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi20-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi20-data-clk-state       *  %/soc@0/pinctrl@f100000/qup-spi21-cs-state         0  %/soc@0/pinctrl@f100000/qup-spi21-data-clk-state       *  &/soc@0/pinctrl@f100000/qup-spi22-cs-state         0  &/soc@0/pinctrl@f100000/qup-spi22-data-clk-state       *  &-/soc@0/pinctrl@f100000/qup-spi23-cs-state         0  &:/soc@0/pinctrl@f100000/qup-spi23-data-clk-state       /  &M/soc@0/pinctrl@f100000/qup-uart2-default-state        0  &_/soc@0/pinctrl@f100000/qup-uart14-default-state       0  &r/soc@0/pinctrl@f100000/qup-uart21-default-state       *  &/soc@0/pinctrl@f100000/sdc2-default-state         (  &/soc@0/pinctrl@f100000/sdc2-sleep-state       (  &/soc@0/pinctrl@f100000/edp-reg-en-state       +  &/soc@0/pinctrl@f100000/eusb3-reset-n-state        (  &/soc@0/pinctrl@f100000/hall-int-n-state       *  &/soc@0/pinctrl@f100000/kybd-default-state         )  &/soc@0/pinctrl@f100000/nvme-reg-en-state          +  &/soc@0/pinctrl@f100000/pcie4-default-state        ,  &/soc@0/pinctrl@f100000/pcie6a-default-state       *  &/soc@0/pinctrl@f100000/tpad-default-state         )  '/soc@0/pinctrl@f100000/ts0-default-state          +  '/soc@0/pinctrl@f100000/usb-1-ss1-sbu-state        0  './soc@0/pinctrl@f100000/wcd-reset-n-active-state       '  ':/soc@0/pinctrl@f100000/wcn-sw-en-state        ,  'D/soc@0/pinctrl@f100000/wcn-wlan-bt-en-state       ,  'S/soc@0/stm@10002000/out-ports/port/endpoint       -  '[/soc@0/tpdm@10003000/out-ports/port/endpoint          .  'h/soc@0/tpda@10004000/in-ports/port@0/endpoint         .  'v/soc@0/tpda@10004000/in-ports/port@1/endpoint         -  '/soc@0/tpda@10004000/out-ports/port/endpoint          -  '/soc@0/tpdm@1000f000/out-ports/port/endpoint          0  '/soc@0/funnel@10041000/in-ports/port@6/endpoint       0  '/soc@0/funnel@10041000/in-ports/port@7/endpoint       /  '/soc@0/funnel@10041000/out-ports/port/endpoint        0  '/soc@0/funnel@10042000/in-ports/port@2/endpoint       0  '/soc@0/funnel@10042000/in-ports/port@5/endpoint       0  '/soc@0/funnel@10042000/in-ports/port@6/endpoint       /  '/soc@0/funnel@10042000/out-ports/port/endpoint        0  '/soc@0/funnel@10045000/in-ports/port@0/endpoint       0  (/soc@0/funnel@10045000/in-ports/port@1/endpoint       /  (/soc@0/funnel@10045000/out-ports/port/endpoint        -  ($/soc@0/tpdm@10800000/out-ports/port/endpoint          -  (1/soc@0/tpdm@1082c000/out-ports/port/endpoint          -  (>/soc@0/tpdm@10841000/out-ports/port/endpoint          -  (L/soc@0/tpdm@10844000/out-ports/port/endpoint          .  (^/soc@0/funnel@10846000/in-ports/port/endpoint         /  (r/soc@0/funnel@10846000/out-ports/port/endpoint        -  (/soc@0/tpdm@109d0000/out-ports/port/endpoint          -  (/soc@0/tpdm@10ac0000/out-ports/port/endpoint          -  (/soc@0/tpdm@10ac1000/out-ports/port/endpoint          .  (/soc@0/tpda@10ac4000/in-ports/port@8/endpoint         .  (/soc@0/tpda@10ac4000/in-ports/port@9/endpoint         -  (/soc@0/tpda@10ac4000/out-ports/port/endpoint          .  (/soc@0/funnel@10ac5000/in-ports/port/endpoint         /  (/soc@0/funnel@10ac5000/out-ports/port/endpoint        0  (/soc@0/funnel@10b04000/in-ports/port@3/endpoint       0  )
/soc@0/funnel@10b04000/in-ports/port@6/endpoint       0  )/soc@0/funnel@10b04000/in-ports/port@7/endpoint       /  )*/soc@0/funnel@10b04000/out-ports/port/endpoint          ):/soc@0/tmc@10b05000       +  )?/soc@0/tmc@10b05000/in-ports/port/endpoint        ,  )G/soc@0/tmc@10b05000/out-ports/port/endpoint       2  )P/soc@0/replicator@10b06000/in-ports/port/endpoint         3  )\/soc@0/replicator@10b06000/out-ports/port/endpoint        .  )j/soc@0/tpda@10b08000/in-ports/port@0/endpoint         .  )x/soc@0/tpda@10b08000/in-ports/port@1/endpoint         .  )/soc@0/tpda@10b08000/in-ports/port@2/endpoint         .  )/soc@0/tpda@10b08000/in-ports/port@3/endpoint         .  )/soc@0/tpda@10b08000/in-ports/port@4/endpoint         -  )/soc@0/tpda@10b08000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b09000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0a000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0b000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0c000/out-ports/port/endpoint          -  )/soc@0/tpdm@10b0d000/out-ports/port/endpoint          -  *	/soc@0/tpdm@10b20000/out-ports/port/endpoint          ,  */soc@0/tpda@10b23000/in-ports/port/endpoint       -  *(/soc@0/tpda@10b23000/out-ports/port/endpoint          .  *9/soc@0/funnel@10b24000/in-ports/port/endpoint         /  *L/soc@0/funnel@10b24000/out-ports/port/endpoint        -  *_/soc@0/tpdm@10c08000/out-ports/port/endpoint          0  *k/soc@0/funnel@10c0b000/in-ports/port@4/endpoint       /  *y/soc@0/funnel@10c0b000/out-ports/port/endpoint        -  */soc@0/tpdm@10c28000/out-ports/port/endpoint          -  */soc@0/tpdm@10c29000/out-ports/port/endpoint          .  */soc@0/tpda@10c2b000/in-ports/port@4/endpoint         /  */soc@0/tpda@10c2b000/in-ports/port@13/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@14/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@15/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@1a/endpoint        /  */soc@0/tpda@10c2b000/in-ports/port@1b/endpoint        -  +/soc@0/tpda@10c2b000/out-ports/port/endpoint          0  +/soc@0/funnel@10c2c000/in-ports/port@0/endpoint       0  +#/soc@0/funnel@10c2c000/in-ports/port@4/endpoint       0  +4/soc@0/funnel@10c2c000/in-ports/port@5/endpoint       /  +E/soc@0/funnel@10c2c000/out-ports/port/endpoint        -  +V/soc@0/tpdm@10c38000/out-ports/port/endpoint          -  +f/soc@0/tpdm@10c39000/out-ports/port/endpoint          .  +v/soc@0/tpda@10c3c000/in-ports/port@4/endpoint         .  +/soc@0/tpda@10c3c000/in-ports/port@f/endpoint         /  +/soc@0/tpda@10c3c000/in-ports/port@10/endpoint        /  +/soc@0/tpda@10c3c000/in-ports/port@11/endpoint        -  +/soc@0/tpda@10c3c000/out-ports/port/endpoint          .  +/soc@0/funnel@10c3d000/in-ports/port/endpoint         /  +/soc@0/funnel@10c3d000/out-ports/port/endpoint        -  +/soc@0/tpdm@10cc1000/out-ports/port/endpoint          .  +/soc@0/tpda@10cc4000/in-ports/port@2/endpoint         -  ,/soc@0/tpda@10cc4000/out-ports/port/endpoint          .  ,/soc@0/funnel@10cc5000/in-ports/port/endpoint         /  ,%/soc@0/funnel@10cc5000/out-ports/port/endpoint        0  ,6/soc@0/funnel@10d04000/in-ports/port@6/endpoint       /  ,F/soc@0/funnel@10d04000/out-ports/port/endpoint        -  ,V/soc@0/tpdm@10d08000/out-ports/port/endpoint          -  ,e/soc@0/tpdm@10d09000/out-ports/port/endpoint          -  ,t/soc@0/tpdm@10d0a000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0b000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0c000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0d000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0e000/out-ports/port/endpoint          -  ,/soc@0/tpdm@10d0f000/out-ports/port/endpoint          .  ,/soc@0/tpda@10d12000/in-ports/port@0/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@1/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@2/endpoint         .  ,/soc@0/tpda@10d12000/in-ports/port@3/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@4/endpoint         .  -/soc@0/tpda@10d12000/in-ports/port@5/endpoint         .  -"/soc@0/tpda@10d12000/in-ports/port@6/endpoint         .  -0/soc@0/tpda@10d12000/in-ports/port@7/endpoint         -  ->/soc@0/tpda@10d12000/out-ports/port/endpoint          .  -L/soc@0/funnel@10d13000/in-ports/port/endpoint         /  -\/soc@0/funnel@10d13000/out-ports/port/endpoint          -l/soc@0/iommu@15000000           -v/soc@0/iommu@15400000         %  -/soc@0/interrupt-controller@17000000          =  -/soc@0/interrupt-controller@17000000/msi-controller@17040000            -/soc@0/mailbox@17430000         -/soc@0/rsc@17500000         -/soc@0/rsc@17500000/bcm-voter         %  -/soc@0/rsc@17500000/clock-controller          %  -/soc@0/rsc@17500000/power-controller          /  -/soc@0/rsc@17500000/power-controller/opp-table        6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-16         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-48         6  -/soc@0/rsc@17500000/power-controller/opp-table/opp-52         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-56         6  ./soc@0/rsc@17500000/power-controller/opp-table/opp-60         6  .3/soc@0/rsc@17500000/power-controller/opp-table/opp-64         6  .F/soc@0/rsc@17500000/power-controller/opp-table/opp-80         7  .\/soc@0/rsc@17500000/power-controller/opp-table/opp-128        7  .k/soc@0/rsc@17500000/power-controller/opp-table/opp-144        7  .}/soc@0/rsc@17500000/power-controller/opp-table/opp-192        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-256        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-320        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-336        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-384        7  ./soc@0/rsc@17500000/power-controller/opp-table/opp-416        &  ./soc@0/rsc@17500000/regulators-0/bob1         &  ./soc@0/rsc@17500000/regulators-0/bob2         &  ./soc@0/rsc@17500000/regulators-0/ldo1         &  //soc@0/rsc@17500000/regulators-0/ldo2         &  //soc@0/rsc@17500000/regulators-0/ldo4         &  /"/soc@0/rsc@17500000/regulators-0/ldo5         &  ///soc@0/rsc@17500000/regulators-0/ldo6         &  /</soc@0/rsc@17500000/regulators-0/ldo7         &  /I/soc@0/rsc@17500000/regulators-0/ldo8         &  /V/soc@0/rsc@17500000/regulators-0/ldo9         '  /c/soc@0/rsc@17500000/regulators-0/ldo10        '  /q/soc@0/rsc@17500000/regulators-0/ldo12        '  //soc@0/rsc@17500000/regulators-0/ldo13        '  //soc@0/rsc@17500000/regulators-0/ldo14        '  //soc@0/rsc@17500000/regulators-0/ldo15        '  //soc@0/rsc@17500000/regulators-0/ldo16        '  //soc@0/rsc@17500000/regulators-0/ldo17        '  //soc@0/rsc@17500000/regulators-1/smps4        &  //soc@0/rsc@17500000/regulators-1/ldo1         &  //soc@0/rsc@17500000/regulators-1/ldo2         &  //soc@0/rsc@17500000/regulators-1/ldo3         &  //soc@0/rsc@17500000/regulators-2/ldo1         &  0/soc@0/rsc@17500000/regulators-2/ldo2         &  0/soc@0/rsc@17500000/regulators-2/ldo3         &  0 /soc@0/rsc@17500000/regulators-3/ldo2         &  0-/soc@0/rsc@17500000/regulators-3/ldo3         '  0:/soc@0/rsc@17500000/regulators-4/smps1        &  0G/soc@0/rsc@17500000/regulators-4/ldo1         &  0T/soc@0/rsc@17500000/regulators-4/ldo2         &  0a/soc@0/rsc@17500000/regulators-4/ldo3         '  0n/soc@0/rsc@17500000/regulators-6/smps1        '  0{/soc@0/rsc@17500000/regulators-6/smps2        &  0/soc@0/rsc@17500000/regulators-6/ldo1         &  0/soc@0/rsc@17500000/regulators-6/ldo2         &  0/soc@0/rsc@17500000/regulators-6/ldo3         '  0/soc@0/rsc@17500000/regulators-7/smps5        &  0/soc@0/rsc@17500000/regulators-7/ldo1         &  0/soc@0/rsc@17500000/regulators-7/ldo2         &  0/soc@0/rsc@17500000/regulators-7/ldo3           0/soc@0/sram@18b4e000          (  0/soc@0/sram@18b4e000/scp-sram-section@0       *  0/soc@0/sram@18b4e000/scp-sram-section@200           1/soc@0/watchdog@1c840000            1/soc@0/efuse@221c8000         (  1/soc@0/efuse@221c8000/gpu-speed-bin@119         1'/soc@0/pmu@24091000/opp-table           1</soc@0/pmu@240b5400         1K/soc@0/pmu@240b5400/opp-table           1_/soc@0/remoteproc@32300000          1o/soc@0/phy@1bd4000        1  1y/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  1/thermal-zones/gpuss-3-thermal/trips/trip-point0            1/audio-codec            /backlight        .  1/pmic-glink/connector@0/ports/port@0/endpoint         .  1/pmic-glink/connector@0/ports/port@1/endpoint         .  1/pmic-glink/connector@0/ports/port@2/endpoint         .  1/pmic-glink/connector@1/ports/port@0/endpoint         .  2/pmic-glink/connector@1/ports/port@1/endpoint         .  2'/pmic-glink/connector@1/ports/port@2/endpoint           2:/sound          2@/regulator-edp-3p3          2M/regulator-edp-bl           2Y/regulator-misc-3p3         2g/regulator-nvme         2q/regulator-rtmr0-1p15           2/regulator-rtmr0-1p8            2/regulator-rtmr0-3p3            2/regulator-vph-pwr          2/regulator-wcn-3p3          2/regulator-wcn-0p95         2/regulator-wcn-1p9          2/wcn6855-pmu/regulators/ldo0            2/wcn6855-pmu/regulators/ldo1            2/wcn6855-pmu/regulators/ldo2            3/wcn6855-pmu/regulators/ldo3            3/wcn6855-pmu/regulators/ldo4            31/wcn6855-pmu/regulators/ldo5            3C/wcn6855-pmu/regulators/ldo6            3U/wcn6855-pmu/regulators/ldo7            3f/wcn6855-pmu/regulators/ldo8            3w/wcn6855-pmu/regulators/ldo9          !  3/usb-1-ss1-sbu-mux/port/endpoint             	interrupt-parent #address-cells #size-cells model compatible chassis-type clock-frequency #clock-cells phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us remote-endpoint interconnects qcom,dload-mode mboxes mbox-names shmem #power-domain-cells #interconnect-cells qcom,bcm-voters interrupts domain-idle-states ranges no-map hwlocks size reusable linux,cma-default opp-hz required-opps interrupts-extended qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells dma-channels dma-channel-mask #dma-cells iommus status clock-names interconnect-names dmas dma-names pinctrl-0 pinctrl-names operating-points-v2 hid-descr-addr vdd-supply vddl-supply max-speed vddrfacmn-supply vddaon-supply vddwlcx-supply vddwlmx-supply vddbtcmx-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply wakeup-source vdd33-supply vdd33-cap-supply vddar-supply vddat-supply vddio-supply reset-gpios orientation-switch retimer-switch #phy-cells vdd3v3-supply vdd1v8-supply interrupt-names #qcom,sensors #thermal-sensor-cells resets vdda12-supply phys reset-names mode-switch vdda-phy-supply vdda-pll-supply reg-names bus-range dma-coherent linux,pci-domain num-lanes interrupt-map-mask interrupt-map assigned-clocks assigned-clock-rates phy-names eq-presets-8gts eq-presets-16gts opp-peak-kBps opp-level msi-map perst-gpios wake-gpios vddpe-3v3-supply qcom,4ln-config-sel clock-output-names vddpcie0p9-supply vddpcie1p8-supply #hwlock-cells qcom,gmu #cooling-cells nvmem-cells nvmem-cell-names memory-region firmware-name qcom,opp-acd-level opp-supported-hw qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain sound-name-prefix qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping vdd-1p8-supply vdd-io-supply qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping vdd-micb-supply qcom,dmic-sample-rate gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,usb3_lpm_capable snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk qcom,select-utmi-as-pipe-clk maximum-speed dr_mode assigned-clock-parents data-lanes link-frequencies power-supply backlight qcom,pdc-ranges qcom,ee qcom,channel linux,code qcom,no-alarm qcom,uefi-rtc-info bits #pwm-cells power-source input-disable output-enable drive-push-pull qcom,drive-strength vdd18-supply vdd3-supply wakeup-parent gpio-reserved-ranges bias-pull-up qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num #redistributor-regions redistributor-stride msi-controller #msi-cells qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-always-on vdd-l1-supply vdd-l2-supply vdd-l3-supply vdd-s4-supply vdd-s1-supply vdd-s2-supply vdd-s5-supply frame-number thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device serial0 serial1 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply pwms brightness-levels num-interpolated-steps default-brightness-level enable-gpios linux,input-type wakeup-event-action orientation-gpios power-role data-role audio-routing link-name sound-dai gpio enable-active-high regulator-boot-on vin-supply vddpcie1p3-supply vddpcie1p9-supply vddpmu-supply vddpmumx-supply vddpmucx-supply vddrfa0p95-supply vddrfa1p3-supply vddrfa1p9-supply wlan-enable-gpios bt-enable-gpios select-gpios xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 cpu1 cpu2 cpu3 cpu4 l2_1 cpu5 cpu6 cpu7 cluster_c4 cluster_cl4 cluster_cl5 eud_in scm scmi_dvfs clk_virt mc_virt cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cluster_pd0 cluster_pd1 system_pd gunyah_hyp_mem hyp_elf_package_mem ncc_mem cpucp_log_mem cpucp_mem tags_mem xbl_dtlog_mem xbl_ramdump_mem aop_image_mem aop_cmd_db_mem aop_config_mem tme_crash_dump_mem tme_log_mem uefi_log_mem secdata_apss_mem pdp_ns_shared_mem gpu_prr_mem tpm_control_mem usb_ucsi_shared_mem pld_pep_mem pld_gmu_mem pld_pdp_mem tz_stat_mem xbl_tmp_buffer_mem adsp_rpc_remote_heap_mem spu_secure_shared_memory_mem adsp_boot_dtb_mem spss_region_mem adsp_boot_mem video_mem adspslpi_mem q6_adsp_dtb_mem cdsp_mem q6_cdsp_dtb_mem gpu_microcode_mem cvp_mem camera_mem av1_encoder_mem wpss_mem q6_wpss_dtb_mem xbl_sc_mem qtee_mem ta_mem tags_mem1 llcc_lpi_mem smem_mem qup_opp_table_100mhz qup_opp_table_120mhz smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in soc gcc ipcc gpi_dma2 qupv3_2 i2c16 spi16 i2c17 spi17 i2c18 spi18 i2c19 spi19 i2c20 spi20 i2c21 spi21 uart21 i2c22 spi22 i2c23 spi23 gpi_dma1 qupv3_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 i2c14 spi14 uart14 i2c15 spi15 gpi_dma0 qupv3_0 i2c0 spi0 i2c1 spi1 i2c2 uart2 spi2 i2c3 retimer_ss0_ss_out retimer_ss0_ss_in retimer_ss0_con_sbu_out spi3 i2c4 spi4 i2c5 eusb3_repeater spi5 i2c6 spi6 i2c7 spi7 tsens0 tsens1 tsens2 tsens3 usb_1_ss0_hsphy usb_1_ss0_qmpphy usb_1_ss0_qmpphy_out usb_1_ss0_qmpphy_usb_ss_in usb_1_ss0_qmpphy_dp_in usb_1_ss1_hsphy usb_1_ss1_qmpphy usb_1_ss1_qmpphy_out usb_1_ss1_qmpphy_usb_ss_in usb_1_ss1_qmpphy_dp_in usb_1_ss2_hsphy usb_1_ss2_qmpphy usb_1_ss2_qmpphy_out usb_1_ss2_qmpphy_usb_ss_in usb_1_ss2_qmpphy_dp_in cnoc_main config_noc system_noc pcie_south_anoc pcie_center_anoc aggre1_noc aggre2_noc pcie_north_anoc usb_center_anoc usb_north_anoc usb_south_anoc mmss_noc pcie3 pcie3_opp_table pcie3_port pcie6a pcie6a_phy pcie5 pcie5_phy pcie4 pcie4_port0 pcie4_phy tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu gem_noc nsp_noc remoteproc_adsp q6apm q6apmbedai q6apmdai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 left_spkr right_spkr lpass_audiocc swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_01_sd_n_active lpasscc lpass_ag_noc lpass_lpiaon_noc lpass_lpicx_noc sdhc_2 sdhc2_opp_table sdhc_4 sdhc4_opp_table usb_2_hsphy usb_mp_hsphy0 usb_mp_hsphy1 usb_mp_qmpphy0 usb_mp_qmpphy1 usb_1_ss2 usb_1_ss2_dwc3 usb_1_ss2_dwc3_hs usb_1_ss2_dwc3_ss usb_2 usb_2_dwc3 usb_2_dwc3_hs usb_mp usb_mp_dwc3 usb_1_ss0 usb_1_ss0_dwc3 usb_1_ss0_dwc3_hs usb_1_ss0_dwc3_ss usb_1_ss1 usb_1_ss1_dwc3 usb_1_ss1_dwc3_hs usb_1_ss1_dwc3_ss iris iris_opp_table videocc mdss mdss_mdp mdss_intf0_out mdss_intf4_out mdss_intf5_out mdss_intf6_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dp0_opp_table mdss_dp1 mdss_dp1_in mdss_dp1_out mdss_dp1_opp_table mdss_dp2 mdss_dp2_in mdss_dp2_out mdss_dp2_opp_table mdss_dp3 mdss_dp3_in mdss_dp3_out mdss_dp3_opp_table edp_panel_in mdss_dp2_phy mdss_dp3_phy dispcc pdc aoss_qmp spmi spmi_bus0 pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_sdam_15 charge_limit_en charge_limit_end charge_limit_delta pmk8550_gpios edp_bl_pwm pmk8550_pwm pm8550 pm8550_temp_alarm pm8550_gpios rtmr0_default usb0_3p3_reg_en pm8550_flash pm8550_pwm pm8550ve_2 pm8550ve_2_temp_alarm pm8550ve_2_gpios pmc8380_3 pmc8380_3_temp_alarm pmc8380_3_gpios edp_bl_en edp_bl_reg_en pmc8380_4 pmc8380_4_temp_alarm pmc8380_4_gpios pmc8380_5 pmc8380_5_temp_alarm pmc8380_5_gpios usb0_pwr_1p15_reg_en pm8550ve_8 pm8550ve_8_temp_alarm pm8550ve_8_gpios misc_3p3_reg_en pm8550ve_9 pm8550ve_9_temp_alarm pm8550ve_9_gpios usb0_1p8_reg_en pm8010 pm8010_temp_alarm spmi_bus1 smb2360_0 smb2360_0_eusb2_repeater smb2360_1 smb2360_1_eusb2_repeater smb2360_2 smb2360_2_eusb2_repeater smb2360_3 smb2360_3_eusb2_repeater edp0_hpd_default qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c7_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c14_data_clk qup_i2c15_data_clk qup_i2c16_data_clk qup_i2c17_data_clk qup_i2c18_data_clk qup_i2c19_data_clk qup_i2c20_data_clk qup_i2c21_data_clk qup_i2c22_data_clk qup_i2c23_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi7_cs qup_spi7_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi14_cs qup_spi14_data_clk qup_spi15_cs qup_spi15_data_clk qup_spi16_cs qup_spi16_data_clk qup_spi17_cs qup_spi17_data_clk qup_spi18_cs qup_spi18_data_clk qup_spi19_cs qup_spi19_data_clk qup_spi20_cs qup_spi20_data_clk qup_spi21_cs qup_spi21_data_clk qup_spi22_cs qup_spi22_data_clk qup_spi23_cs qup_spi23_data_clk qup_uart2_default qup_uart14_default qup_uart21_default sdc2_default sdc2_sleep edp_reg_en eusb3_reset_n hall_int_n_default kybd_default nvme_reg_en pcie4_default pcie6a_default tpad_default ts0_default usb_1_ss1_sbu_default wcd_default wcn_sw_en wcn_wlan_bt_en stm_out dcc_tpdm_out qdss_tpda_in0 qdss_tpda_in1 qdss_tpda_out qdss_tpdm_out funnel0_in6 funnel0_in7 funnel0_out funnel1_in2 funnel1_in5 funnel1_in6 funnel1_out qdss_funnel_in0 qdss_funnel_in1 qdss_funnel_out mxa_tpdm_out gcc_tpdm_out prng_tpdm_out lpass_cx_tpdm_out lpass_cx_funnel_in0 lpass_cx_funnel_out qm_tpdm_out dlst_tpdm0_out dlst_tpdm1_out dlst_tpda_in8 dlst_tpda_in9 dlst_tpda_out dlst_funnel_in0 dlst_funnel_out aoss_funnel_in3 aoss_funnel_in6 aoss_funnel_in7 aoss_funnel_out etf0 etf0_in etf0_out swao_rep_in swao_rep_out1 aoss_tpda_in0 aoss_tpda_in1 aoss_tpda_in2 aoss_tpda_in3 aoss_tpda_in4 aoss_tpda_out aoss_tpdm0_out aoss_tpdm1_out aoss_tpdm2_out aoss_tpdm3_out aoss_tpdm4_out lpicc_tpdm_out ddr_lpi_tpda_in ddr_lpi_tpda_out ddr_lpi_funnel_in0 ddr_lpi_funnel_out mm_tpdm_out mm_funnel_in4 mm_funnel_out dlct1_tpdm_out ipcc_tpdm_out dlct1_tpda_in4 dlct1_tpda_in19 dlct1_tpda_in20 dlct1_tpda_in21 dlct1_tpda_in26 dlct1_tpda_in27 dlct1_tpda_out dlct1_funnel_in0 dlct1_funnel_in4 dlct1_funnel_in5 dlct1_funnel_out dlct2_tpdm0_out dlct2_tpdm1_out dlct2_tpda_in4 dlct2_tpda_in15 dlct2_tpda_in16 dlct2_tpda_in17 dlct2_tpda_out dlct2_funnel_in0 dlct2_funnel_out tmess_tpdm1_out tmess_tpda_in2 tmess_tpda_out tmess_funnel_in0 tmess_funnel_out ddr_funnel0_in6 ddr_funnel0_out llcc0_tpdm_out llcc1_tpdm_out llcc2_tpdm_out llcc3_tpdm_out llcc4_tpdm_out llcc5_tpdm_out llcc6_tpdm_out llcc7_tpdm_out llcc_tpda_in0 llcc_tpda_in1 llcc_tpda_in2 llcc_tpda_in3 llcc_tpda_in4 llcc_tpda_in5 llcc_tpda_in6 llcc_tpda_in7 llcc_tpda_out ddr_funnel1_in0 ddr_funnel1_out apps_smmu pcie_smmu intc gic_its cpucp_mbox apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b_1p8 vreg_l2b_3p0 vreg_l4b_1p8 vreg_l5b_3p0 vreg_l6b_1p8 vreg_l7b_2p8 vreg_l8b_3p0 vreg_l9b_2p9 vreg_l10b_1p8 vreg_l12b_1p2 vreg_l13b_3p0 vreg_l14b_3p0 vreg_l15b_1p8 vreg_l16b_2p9 vreg_l17b_2p5 vreg_s4c_1p8 vreg_l1c_1p2 vreg_l2c_0p8 vreg_l3c_0p8 vreg_l1d_0p8 vreg_l2d_0p9 vreg_l3d_1p8 vreg_l2e_0p8 vreg_l3e_1p2 vreg_s1f_0p7 vreg_l1f_1p0 vreg_l2f_1p0 vreg_l3f_1p0 vreg_s1i_0p9 vreg_s2i_1p0 vreg_l1i_1p8 vreg_l2i_1p2 vreg_l3i_0p8 vreg_s5j_1p2 vreg_l1j_0p8 vreg_l2j_1p2 vreg_l3j_0p8 sram cpu_scp_lpri0 cpu_scp_lpri1 sbsa_watchdog qfprom gpu_speed_bin llcc_bwmon_opp_table bwmon_cluster2 cpu_bwmon_opp_table remoteproc_cdsp pcie3_phy gpuss0_alert0 gpuss1_alert0 gpuss2_alert0 gpuss3_alert0 wcd938x pmic_glink_ss0_hs_in pmic_glink_ss0_ss_in pmic_glink_ss0_con_sbu_in pmic_glink_ss1_hs_in pmic_glink_ss1_ss_in pmic_glink_ss1_sbu sound vreg_edp_3p3 vreg_edp_bl vreg_misc_3p3 vreg_nvme vreg_rtmr0_1p15 vreg_rtmr0_1p8 vreg_rtmr0_3p3 vreg_vph_pwr vreg_wcn_3p3 vreg_wcn_0p95 vreg_wcn_1p9 vreg_pmu_rfa_cmn_0p8 vreg_pmu_aon_0p8 vreg_pmu_wlcx_0p8 vreg_pmu_wlmx_0p8 vreg_pmu_btcmx_0p8 vreg_pmu_pcie_1p8 vreg_pmu_pcie_0p9 vreg_pmu_rfa_0p8 vreg_pmu_rfa_1p2 vreg_pmu_rfa_1p7 usb_1_ss1_sbu_mux iommu-map 