    8 g    (            / f                                                                   '   ,Qualcomm Technologies, Inc. SM8550 HDK           2qcom,sm8550-hdk qcom,sm8550       	   =embedded       chosen           Jserial0:115200n8          clocks     xo-board             2fixed-clock          V             c          s         sleep-clk            2fixed-clock          V             c           s   0      bi-tcxo-div2-clk             V             2fixed-factor-clock           {                                        s   /      bi-tcxo-ao-div2-clk          V             2fixed-factor-clock           {                                       s            cpus                                 cpu@0            cpu          2arm,cortex-a510                           {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s      l3-cache             2cache           4            @         s               cpu@100          cpu          2arm,cortex-a510                          {                psci                                     psci                                           d        %            s      l2-cache             2cache           4            @                     s            cpu@200          cpu          2arm,cortex-a510                          {                psci                	            
         psci                                           d        %            s      l2-cache             2cache           4            @                     s   	         cpu@300          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@400          cpu          2arm,cortex-a715                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@500          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@600          cpu          2arm,cortex-a710                          {               psci                                     psci                                                 %            s      l2-cache             2cache           4            @                     s            cpu@700          cpu          2arm,cortex-x3                            {               psci                                     psci                              f          L        %            s      l2-cache             2cache           4            @                     s            cpu-map    cluster0       core0           N         core1           N         core2           N         core3           N         core4           N         core5           N         core6           N         core7           N               idle-states         Rpsci       cpu-sleep-0-0            2arm,idle-state          _silver-rail-power-collapse          o@            &                    ,                  s   (      cpu-sleep-1-0            2arm,idle-state          _gold-rail-power-collapse            o@            X                                      s   )      cpu-sleep-2-0            2arm,idle-state          _goldplus-rail-power-collapse            o@                      F          8                  s   *         domain-idle-states     cluster-sleep-0          2domain-idle-state           oA  D                    	.          #         s   +      cluster-sleep-1          2domain-idle-state           oA D          
          0          '         s   ,            firmware       scm          2qcom,scm-sm8550 qcom,scm                                                    s  6         interconnect-0           2qcom,sm8550-clk-virt                                    s   8      interconnect-1           2qcom,sm8550-mc-virt                                 s         opp-table-qup100mhz          2operating-points-v2          s   Z   opp-75000000                xh           !      opp-100000000                           "         opp-table-qup120mhz          2operating-points-v2          s   =   opp-75000000                xh           !      opp-120000000               '            "         opp-table-qup125mhz          2operating-points-v2          s   Q   opp-75000000                xh           !      opp-125000000               sY@           "         memory@a0000000          memory                                pmu-a510             2arm,cortex-a510-pmu                      #      pmu-a710             2arm,cortex-a710-pmu                      $      pmu-a715             2arm,cortex-a715-pmu                      %      pmu-x3           2arm,cortex-x3-pmu                        &      psci             2arm,psci-1.0             smc    power-domain-cpu0           +                '        ?   (         s         power-domain-cpu1           +                '        ?   (         s         power-domain-cpu2           +                '        ?   (         s   
      power-domain-cpu3           +                '        ?   )         s         power-domain-cpu4           +                '        ?   )         s         power-domain-cpu5           +                '        ?   )         s         power-domain-cpu6           +                '        ?   )         s         power-domain-cpu7           +                '        ?   *         s         power-domain-cluster            +            ?   +   ,         s   '         reserved-memory                                   R         s  7   hyp-region@80000000                                 Y         s  8      cpusys-vm-region@80a00000                       @           Y         s  9      hyp-tags-region@80e00000                        =           Y         s  :      xbl-sc-region@d8100000                                 Y         s  ;      hyp-tags-reserved-region@811d0000                                  Y         s  <      xbl-dt-log-merged-region@81a00000                       &           Y         s  =      aop-cmd-db-region@81c60000           2qcom,cmd-db                                Y         s  >      aop-config-merged-region@81c80000                       @          Y         s  ?      smem@81d00000         
   2qcom,smem                                  `   -            Y         s  @      adsp-mhi-region@81f00000                                   Y         s  A      global-sync-region@82600000              `                  Y         s  B      tz-stat-region@82700000              p                  Y         s  C      cdsp-secure-heap-region@82800000                       `           Y         s  D      mpss-region@8a800000                                  Y         s         q6-mpss-dtb-region@9b000000                                 Y         s         ipa-fw-region@9b080000                                 Y         s         ipa-gsi-region@9b090000              	                  Y         s  E      gpu-micro-code-region@9b09a000               	                  Y         s         spss-region@9b100000                                   Y         s  F      spu-tz-shared-region@9b280000                (                  Y         s  G      spu-modem-shared-region@9b2e0000                 .                  Y         s  H      camera-region@9b300000               0                  Y         s  I      video-region@9bb00000                       p           Y         s         cvp-region@9c200000                      p           Y         s  J      cdsp-region@9c900000                                   Y         s        q6-cdsp-dtb-region@9e900000                                Y         s        q6-adsp-dtb-region@9e980000                                Y         s         adspslpi-region@9ea00000                                  Y         s         rmtfs-region@d4a80000            2qcom,rmtfs-mem               Ԩ       (           Y        h           w            s  K      mpss-dsm-region@d4d00000                       0           Y         s         tz-reserved-region@d8000000                                 Y         s  L      cpucp-fw-region@d8140000                                   Y         s  M      qtee-region@d8300000                 0       P           Y         s  N      ta-region@d8800000               ؀                 Y         s  O      tz-tags-region@e1200000                     t           Y         s  P      hwfence-shbuf-region@e6440000                D       '          Y         s  Q      trust-ui-vm-region@f3600000              `                Y         s  R      trust-ui-vm-dump-region@f80ee000                                  Y         s  S      trust-ui-vm-qrt-region@f80ef000                               Y         s  T      trust-ui-vm-vblk0-ring-region@f80f8000                      @          Y         s  U      trust-ui-vm-vblk1-ring-region@f80fc000                      @          Y         s  V      trust-ui-vm-swiotlb-region@f8100000                                Y         s  W      oem-vm-region@f8400000               @                 Y         s  X      oem-vm-vblk0-ring-region@fcc00000                        @          Y         s  Y      oem-vm-swiotlb-region@fcc04000               @                 Y         s  Z      hyp-ext-tags-region@fce00000                                  Y         s  [      hyp-ext-reserved-region@ff700000                 p                  Y         s  \         smp2p-adsp           2qcom,smp2p                         .                    .                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s            smp2p-cdsp           2qcom,smp2p             ^             .                    .                                master-kernel           master-kernel                       s        slave-kernel            slave-kernel                                 s           smp2p-modem          2qcom,smp2p                         .                    .                                master-kernel           master-kernel                       s         slave-kernel            slave-kernel                                 s         ipa-ap-to-modem         ipa                     s         ipa-modem-to-ap         ipa                              s            soc@0            2simple-bus          R                                                                                        s  ]   clock-controller@100000          2qcom,sm8550-gcc                      B          V                      +         <   {   /   0   1   2       2      3       3      3      4             s   6      mailbox@408000           2qcom,sm8550-ipcc qcom,ipcc                @                                                           *            s   .      dma-controller@800000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         6                                         L             M             N             O             P             Q             R             S             T             U             V             W               A           N   >        _   5  6             f      	  sdisabled             s   ;      geniqup@8c0000           2qcom,geni-se-qup                                     R        zm-ahb s-ahb          {   6      6           _   5  #             f                                 sokay             s  ^   i2c@880000           2qcom,geni-i2c                         @         zse           {   6   o        default            7               u                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;              ;                  tx rx               <               =      	  sdisabled             s  _      spi@880000           2qcom,geni-spi                         @         zse           {   6   o               u               default            >   ?      H     8         8         9         :                                qup-core qup-config qup-memory              ;              ;                  tx rx               <               =                                	  sdisabled             s  `      i2c@884000           2qcom,geni-i2c                 @       @         zse           {   6   q        default            @               G                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled             s  a      spi@884000           2qcom,geni-spi                 @       @         zse           {   6   q               G               default            A   B      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled             s  b      i2c@888000           2qcom,geni-i2c                        @         zse           {   6   s        default            C               H                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled             s  c      spi@888000           2qcom,geni-spi                        @         zse           {   6   s               H               default            D   E      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled             s  d      i2c@88c000           2qcom,geni-i2c                        @         zse           {   6   u        default            F               I                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled             s  e      spi@88c000           2qcom,geni-spi                        @         zse           {   6   u               I               default            G   H      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled             s  f      i2c@890000           2qcom,geni-i2c                         @         zse           {   6   w        default            I               J                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled             s  g      spi@890000           2qcom,geni-spi                         @         zse           {   6   w               J               default            J   K      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled             s  h      i2c@894000           2qcom,geni-i2c                 @       @         zse           {   6   y        default            L               K                                       H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =      	  sdisabled             s  i      spi@894000           2qcom,geni-spi                 @       @         zse           {   6   y               K               default            M   N      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               =                                	  sdisabled             s  j      serial@898000            2qcom,geni-uart                       @         zse           {   6   {        default            O   P                            0     8         8         9         :              qup-core qup-config             <               Q        sokay             s  k   bluetooth            2qcom,wcn7850-bt            R           S           T           U           V        "   W        3   X        D 0          i2c@89c000           2qcom,geni-i2c                        @         zse           {   6   }        default            Y                                                      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               Z      	  sdisabled             s  l      spi@89c000           2qcom,geni-spi                        @         zse           {   6   }                              default            [   \      H     8         8         9         :                                qup-core qup-config qup-memory              ;             ;                 tx rx               <               Z                                	  sdisabled             s  m         geniqup@9c0000           2qcom,geni-se-i2c-master-hub                                 zs-ahb            {   6   Z                                  R        sokay             s  n   i2c@980000           2qcom,geni-i2c-master-hub                          @         zse core          {   6   F   6   E        default            ]                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  o      i2c@984000           2qcom,geni-i2c-master-hub                  @       @         zse core          {   6   H   6   E        default            ^                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  p      i2c@988000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   J   6   E        default            _                                                      0     8          8         9         :              qup-core qup-config             <               !        sokay             s  q   typec-mux@42             2fcs,fsa4480             B        N   `         Y         e   port       endpoint            x   a         s  '               i2c@98c000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   L   6   E        default            b                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  r      i2c@990000           2qcom,geni-i2c-master-hub                          @         zse core          {   6   N   6   E        default            c                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  s      i2c@994000           2qcom,geni-i2c-master-hub                  @       @         zse core          {   6   P   6   E        default            d                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  t      i2c@998000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   R   6   E        default            e                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  u      i2c@99c000           2qcom,geni-i2c-master-hub                         @         zse core          {   6   T   6   E        default            f                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  v      i2c@9a0000           2qcom,geni-i2c-master-hub                          @         zse core          {   6   V   6   E        default            g                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  w      i2c@9a4000           2qcom,geni-i2c-master-hub                  @       @         zse core          {   6   X   6   E        default            h                                                      0     8          8         9         :              qup-core qup-config             <               !      	  sdisabled             s  x         dma-controller@a00000         (   2qcom,sm8550-gpi-dma qcom,sm6350-gpi-dma         6                                                                                                                       %             &             '             (             )             *               A           N           _   5                f        sokay             s   k      geniqup@ac0000           2qcom,geni-se-qup                                     R        zm-ahb s-ahb          {   6      6           _   5                  8         8            	  qup-core             f                                 sokay             s  y   i2c@a80000           2qcom,geni-i2c                         @         zse           {   6   ]        default            i               a                                       H     8         8         9         :         j                       qup-core qup-config qup-memory              k              k                  tx rx               <               =        sokay             c          s  z   hdmi-bridge@2b           2lontium,lt9611uxc               +           l                 l                  m        N   n           o   p        default          s  {   ports                                port@0                  endpoint            x   q         s            port@2                 endpoint            x   r         s  #                  spi@a80000           2qcom,geni-spi                         @         zse           {   6   ]               a               default            s   t      H     8         8         9         :         j                       qup-core qup-config qup-memory              k              k                  tx rx               <               =                                	  sdisabled             s  |      i2c@a84000           2qcom,geni-i2c                 @       @         zse           {   6   _        default            u               b                                       H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               =      	  sdisabled             s  }      spi@a84000           2qcom,geni-spi                 @       @         zse           {   6   _               b               default            v   w      H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               =                                	  sdisabled             s  ~      i2c@a88000           2qcom,geni-i2c                        @         zse           {   6   a        default            x               c                                       H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z      	  sdisabled             s        spi@a88000           2qcom,geni-spi                        @         zse           {   6   a               c               default            y   z      H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z                                	  sdisabled             s        i2c@a8c000           2qcom,geni-i2c                        @         zse           {   6   c        default            {               d                                       H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z      	  sdisabled             s        spi@a8c000           2qcom,geni-spi                        @         zse           {   6   c               d               default            |   }      H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z                                	  sdisabled             s        i2c@a90000           2qcom,geni-i2c                         @         zse           {   6   e        default            ~               e                                       H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z      	  sdisabled             s        spi@a90000           2qcom,geni-spi                         @         zse           {   6   e               e               default                     H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z                                	  sdisabled             s        i2c@a94000           2qcom,geni-i2c                 @       @         zse           {   6   g        default                           f             H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z                                	  sdisabled             s        spi@a94000           2qcom,geni-spi                 @       @         zse           {   6   g               f               default                     H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z                                	  sdisabled             s        i2c@a98000           2qcom,geni-i2c                        @         zse           {   6   i        default                           k             H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z                                	  sdisabled             s        spi@a98000           2qcom,geni-spi                        @         zse           {   6   i               k               default                     H     8         8         9         :         j                       qup-core qup-config qup-memory              k             k                 tx rx               <               Z                                	  sdisabled             s        serial@a9c000            2qcom,geni-debug-uart                         @         zse           {   6   k        default                           C               qup-core qup-config       0     8         8         9         :                  <               Z        sokay             s           interconnect@1500000             2qcom,sm8550-cnoc-main                P       0                                s         interconnect@1600000             2qcom,sm8550-config-noc               `        b                                 s   :      interconnect@1680000             2qcom,sm8550-system-noc               h       Ѐ                                s        interconnect@16c0000             2qcom,sm8550-pcie-anoc                l       "                     {   6       6   
                     s         interconnect@16e0000             2qcom,sm8550-aggre1-noc               n       D                     {   6      6                        s   j      interconnect@1700000             2qcom,sm8550-aggre2-noc               p                            {                           s         interconnect@1780000             2qcom,sm8550-mmss-noc                 x                                        s         rng@10c3000          2qcom,sm8550-trng qcom,trng               0                 s        pcie@1c00000             pci          2qcom,pcie-sm8550          P               0     `             `             `             `                 parf dbi elbi atu config                                   8  R               `                 `0      `0                                f                                                                                                                                                                    /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                                  8   {   6   "   6   $   6   %   6   *   6   +   6      6          =  zaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr          0                       9                       pcie-mem cpu-pcie                                                    5            5                6           pci             6            $   1        )pciephy                    sokay            3   l   `            >   l   ^                      default          s     opp-table            2operating-points-v2          s      opp-2500000-1                &%           !        J А           X         opp-5000000-1                LK@           !        J             X         opp-5000000-2                LK@           !        J             X         opp-10000000-2                          !        J B@           X         opp-8000000-3                z                    J            X         opp-16000000-3               $                    J h           X            pcie@0           pci                                                                              R         s     wifi@0           2pci17cb,1107                                           R           S           T           U           V        "   W        3   X        b           t               phy@1c06000           2qcom,sm8550-qmp-gen3x2-pcie-phy              `               (   {   6   "   6   $          6   &   6   (        zaux cfg_ahb ref rchng pipe             6           phy            6   &                     6            V            pcie0_pipe_clk                      sokay                                   s   1      pcie@1c08000             pci          2qcom,pcie-sm8550          P              0     @             @             @             @                 parf dbi elbi atu config                                   8  R               @                 @0      @0                                f                                     3             4             5             8             9             :             v             w             2             /  msi0 msi1 msi2 msi3 msi4 msi5 msi6 msi7 global                                                                                                                                                                                                              @   {   6   ,   6   .   6   /   6   6   6   7   6      6       6         I  zaux cfg bus_master bus_slave slave_q2a ddrss_sf_tbu noc_aggr cnoc_sf_axi               6   ,        $       0                       9            	           pcie-mem cpu-pcie                                                   5           5                6      6   	        pci link_down               6           $   2        )pciephy                    sokay            3   l   c            >   l   a                      default          s     opp-table            2operating-points-v2          s      opp-2500000-1                &%           !        J А           X         opp-5000000-1                LK@           !        J             X         opp-5000000-2                LK@           !        J             X         opp-10000000-2                          !        J B@           X         opp-8000000-3                z                    J            X         opp-16000000-3               $                    J h           X         opp-16000000-4               $                    J h           X         opp-32000000-4              H                    J <           X            pcie@0           pci                                                                              R         phy@1c0e000           2qcom,sm8550-qmp-gen4x2-pcie-phy                             (   {   6   0   6   .         6   2   6   4        zaux cfg_ahb ref rchng pipe             6      6   
        phy phy_nocsr              6   2                     6            V           pcie1_pipe_clk                      sokay                                              s   2      dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0              @                                     6                                                      _   5         5               s         crypto@1dfa000        )   2qcom,sm8550-qce qcom,sm8150-qce qcom,qce                 ߠ       `                             rx tx           _   5         5                                        memory           s        phy@1d80000          2qcom,sm8550-qmp-ufs-phy                                 {          6                 zref ref_aux qref                6                          ufsphy           V                       sokay                                   s   3      ufshc@1d84000         +   2qcom,sm8550-ufshc qcom,ufshc jedec,ufs-2.0               @       0                	               $   3        )ufsphy          5                         6           rst             6                      _   5   `             f                 0     j                  9         :   #           ufs-ddr cpu-ufs       n  zcore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @   {   6      6      6      6            6      6      6           I           sokay               l              N           R          c           o O                    s      opp-table            2operating-points-v2          s      opp-75000000          @      xh                    xh                                           !      opp-150000000         @      р                    р                                           "      opp-300000000         @                                                                                   crypto@1d88000        ;   2qcom,sm8550-inline-crypto-engine qcom,inline-crypto-engine               ؀                {   6            s         hwlock@1f40000           2qcom,tcsr-mutex                                           s   -      clock-controller@1fc0000             2qcom,sm8550-tcsr syscon                                {                V                       s         gpu@3d00000       !   2qcom,adreno-43050a01 qcom,adreno          0                                              #  kgsl_3d0_reg_memory cx_mem cx_dbgc                 ,               _                                                   %              9                       gfx-mem         sokay             s     zap-shader                     qcom/sm8550/a740_zap.mbn             s        opp-table            2operating-points-v2          s      opp-680000000               (         X           J        opp-615000000               $'        X           J       opp-550000000                U        X           J       opp-475000000               O        X   P        J \j      opp-401000000               @        X   @        J \j      opp-348000000                        X   <        J \j      opp-295000000               W        X   8        J \j      opp-220000000                        X   4        J              gmu@3d6a000       &   2qcom,adreno-gmu-740.1 qcom,adreno-gmu         0       ֠      P                  (                 gmu rscc gmu_pdc                    0             1               hfi gmu       8   {                      6      6                      !  zahb gmu cxo axi memnoc hub demet                                   cx gx           _                                         s      opp-table            2operating-points-v2          s      opp-500000000               e         X         opp-200000000                        X   @            clock-controller@3d90000             2qcom,sm8550-gpucc                                  {   /   6      6            V                      +            s         iommu@3da0000         @   2qcom,sm8550-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500                                                                                                                                                                                                                                                 >             ?             @             A                                                                                                                         {         6       6   !               zhlos bus iface ahb                           f         s         ipa@3f40000          2qcom,sm8550-ipa         _   5         5            0                            P     @               ipa-reg ipa-shared gsi        @                                                           (  ipa gsi ipa-clock-query ipa-setup-ready          {              zcore          0                       9         :              memory config                                         *  ipa-clock-enabled-valid ipa-clock-enabled           sokay            self                       qcom/sm8550/ipa_fws.mbn          s        remoteproc@4080000           2qcom,sm8550-mpss-pas                                P                                                                      0  wdog fatal ready handover stop-ack shutdown-ack          {               zxo              <       <            cx mss                                                                                stop            sokay          0  qcom/sm8550/modem.mbn qcom/sm8550/modem_dtb.mbn          s     glink-edge             .                     .               #mpss                        remoteproc@6800000           2qcom,sm8550-adsp-pas                                <                                                      #  wdog fatal ready handover stop-ack           {               zxo              <      <            lcx lmx                                                                            stop            sokay          .  qcom/sm8550/adsp.mbn qcom/sm8550/adsp_dtb.mbn            s     glink-edge             .                     .               #lpass                       s     fastrpc          2qcom,fastrpc            )fastrpcglink-apps-dsp           #adsp             =                             compute-cb@3             2qcom,fastrpc-compute-cb                     _   5        5  c             f      compute-cb@4             2qcom,fastrpc-compute-cb                     _   5        5  d             f      compute-cb@5             2qcom,fastrpc-compute-cb                     _   5        5  e             f      compute-cb@6             2qcom,fastrpc-compute-cb                     _   5        5  f             f      compute-cb@7             2qcom,fastrpc-compute-cb                     _   5        5  g             f         gpr       	   2qcom,gpr          
  )adsp_apps           T           `                                   service@1            2qcom,q6apm                      m            ~avs/audio msm/adsp/audio_pd          s  ,   dais             2qcom,q6apm-dais         _   5        5  a             s        bedais           2qcom,q6apm-lpass-dais           m            s  )         service@2            2qcom,q6prm                      ~avs/audio msm/adsp/audio_pd          s     clock-controller             2qcom,q6prm-lpass-clocks          V            s                     codec@6aa0000            2qcom,sm8550-lpass-wsa-macro                             (   {      D         f         g              zmclk macro dcodec fsgen          V          
  wsa2-mclk           m            s         soundwire@6ab0000            2qcom,soundwire-v2.0.0                                                         {           ziface           #WSA2                       default                       	           ?   ?                                                                        )                  D           a                                     m         	  sdisabled             s        codec@6ac0000            2qcom,sm8550-lpass-rx-macro                              (   {      @         f         g              zmclk macro dcodec fsgen          V            mclk            m            s         soundwire@6ad0000            2qcom,soundwire-v2.0.0                                                         {           ziface           #RX                     default                                 ?                                                                   )          D          a                                       m           sokay             s  +   codec@0,4            2sdw20217010d00                          y                        s  !         codec@6ae0000            2qcom,sm8550-lpass-tx-macro                              (   {      9         f         g              zmclk macro dcodec fsgen          V            mclk            m            s         codec@6b00000            2qcom,sm8550-lpass-wsa-macro                             (   {      B         f         g              zmclk macro dcodec fsgen          V            mclk            m            s         soundwire@6b10000            2qcom,soundwire-v2.0.0                                                         {           ziface           #WSA                    default                       	           ?   ?                                                                        )                  D           a                                     m           sokay             s  0   speaker@0,0          2sdw20217020400                                      default                                                m          	  SpkrLeft                           
            s  .      speaker@0,1          2sdw20217020400                                     default                                                m          
  SpkrRight                                      s  /         soundwire@6d30000            2qcom,soundwire-v2.0.0                                                                     core wakeup          {           ziface           #TX                     default                                                                                      )        D        a                                    m           sokay             s  -   codec@0,3            2sdw20217010d00                                               s  "         codec@6d44000            2qcom,sm8550-lpass-va-macro               @              $   {      9         f         g           zmclk macro dcodec            V            fsgen           m            s         pinctrl@6e80000          2qcom,sm8550-lpass-lpi-pinctrl                              %                  	        	           	)                       {      f         g           zcore audio           s      tx-swr-active-state          s      clk-pins            	5gpio0           	:swr_tx_clk          	C           	R            	\      data-pins           	5gpio1 gpio2 gpio14          	:swr_tx_data         	C           	R            	i         rx-swr-active-state          s      clk-pins            	5gpio3           	:swr_rx_clk          	C           	R            	\      data-pins           	5gpio4 gpio5         	:swr_rx_data         	C           	R            	i         dmic01-default-state             s     clk-pins            	5gpio6         
  	:dmic1_clk           	C            	w      data-pins           	5gpio7           	:dmic1_data          	C            	         dmic23-default-state             s     clk-pins            	5gpio8         
  	:dmic2_clk           	C            	w      data-pins           	5gpio9           	:dmic2_data          	C            	         wsa-swr-active-state             s      clk-pins            	5gpio10          	:wsa_swr_clk         	C           	R            	\      data-pins           	5gpio11          	:wsa_swr_data            	C           	R            	i         wsa2-swr-active-state            s      clk-pins            	5gpio15          	:wsa2_swr_clk            	C           	R            	\      data-pins           	5gpio16          	:wsa2_swr_data           	C           	R            	i         spkr-1-sd-n-active-state            	5gpio17          	:gpio            	C            	\         	         s         spkr-2-sd-n-active-state            	5gpio18          	:gpio            	C            	\         	         s            interconnect@7400000             2qcom,sm8550-lpass-lpiaon-noc                 @                                       s        interconnect@7430000             2qcom,sm8550-lpass-lpicx-noc              C                                        s         interconnect@7e40000             2qcom,sm8550-lpass-ag-noc                                                         s        mmc@8804000       $   2qcom,sm8550-sdhci qcom,sdhci-msm-v5              @                                                      hc_irq pwr_irq           {   6      6                  ziface core xo           _   5  @            	 d,        	h            <                     0                       9         :              sdhc-ddr cpu-sdhc           	           	<4`         f        	               sokay            	                                	              default sleep           	           
            
         
         s     opp-table            2operating-points-v2          s      opp-19200000                $                  opp-50000000                           !      opp-100000000                           "      opp-202000000               
F                       video-codec@aa00000          2qcom,sm8550-iris                 
                                                          <   
   <            venus vcodec0 mxc mmcx                      {   6                        ziface core vcodec0_core       0     9         :   %                             cpu-cfg video-mem                         6   !        bus         _   5  @       5  G             f        sokay             s     opp-table            2operating-points-v2          s      opp-240000000               N            "   !      opp-338000000               %x           "   "      opp-366000000               з                    opp-444000000               v                     opp-533333334               V                          clock-controller@aaf0000             2qcom,sm8550-videocc              
                  {   /   6               <      <   
           !   !         V                      +            s         cci@ac15000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
P                                                      {                          zcamnoc_axi cpas_ahb cci                       	              default sleep         	  sdisabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           cci@ac16000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
`                                                      {                  
        zcamnoc_axi cpas_ahb cci                    	           default sleep           sokay led                                   s     i2c-bus@0                         c B@                                   s     sensor@10           .          .          .u          .h          default                      l   w           n6               e         {      e                     2samsung,s5k3m5     port       endpoint             s  0        x  1        
4                     .    #k                  cci@ac17000       !   2qcom,sm8550-cci qcom,msm8996-cci                 
p                                                      {                          zcamnoc_axi cpas_ahb cci                       	              default sleep         	  sdisabled                                       s     i2c-bus@0                         c B@                                   s        i2c-bus@1                        c B@                                   s           isp@acb7000                                2qcom,sm8550-camss        0       
p            
ː            
˰            
̠       
     
       
     
`            
@             
`             
΀             
Π             
             
             
              
              
             
            
             
̰            
                csid0 csid1 csid2 csid_lite0 csid_lite1 csid_wrapper csiphy0 csiphy1 csiphy2 csiphy3 csiphy4 csiphy5 csiphy6 csiphy7 vfe0 vfe1 vfe2 vfe_lite0 vfe_lite1          {                                                /      2            3      !      4      #      5      %      6      '      7      )      8      +      9      -      1   6         A      E      F      J      K      O      Q      P      S      T       zcamnoc_axi cpas_ahb cpas_fast_ahb_clk cpas_ife_lite cpas_vfe0 cpas_vfe1 cpas_vfe2 csid csiphy0 csiphy0_timer csiphy1 csiphy1_timer csiphy2 csiphy2_timer csiphy3 csiphy3_timer csiphy4 csiphy4_timer csiphy5 csiphy5_timer csiphy6 csiphy6_timer csiphy7 csiphy7_timer csiphy_rx gcc_axi_hf vfe0 vfe0_fast_ahb vfe1 vfe1_fast_ahb vfe2 vfe2_fast_ahb vfe_lite vfe_lite_ahb vfe_lite_cphy_rx vfe_lite_csid                  Y             [                          ]             x                                                                  z              Y                                       Z             \                          ^             y               csid0 csid1 csid2 csid_lite0 csid_lite1 csiphy0 csiphy1 csiphy2 csiphy3 csiphy4 csiphy5 csiphy6 csiphy7 vfe0 vfe1 vfe2 vfe_lite0 vfe_lite1        0     9         :                                 ahb hf_0_mnoc           _   5                                                  ife0 ife1 ife2 top          sokay led         s     ports                                port@0                     port@1                    port@2                    port@3                 endpoint             s  1        x  0        
4                     .\            port@4                    port@5                    port@6                    port@7                          clock-controller@ade0000             2qcom,sm8550-camcc                
                  {   6      /      0            <      <   
           !   !         V                      +            s         display-subsystem@ae00000            2qcom,sm8550-mdss                 
                 mdss                    S                                     {         6      6         =                                     0                       9         :              mdp0-mem cpu-cfg            _   5                                        R        sokay             s      display-controller@ae01000           2qcom,sm8550-dpu               
           
        0       	  mdp vbif                                    0   {   6      6               @      =      I      !  zbus nrt_bus iface lut core vsync                <                 I        $                     s     ports                                port@0                  endpoint            x            s            port@1                 endpoint            x            s            port@2                 endpoint            x            s               opp-table            2operating-points-v2          s      opp-200000000                           !      opp-325000000               _@           "      opp-375000000               Z                 opp-514000000                                      displayport-controller@ae90000           2qcom,sm8550-dp qcom,sm8350-dp         P       
             
            
            
            
                                       0   {                                          J  zcore_iface core_aux ctrl_link ctrl_link_iface stream_pixel stream_1_pixel                                     
   4      4      4           $   4           )dp          m                           <           sokay             s     ports                                port@0                  endpoint            x            s            port@1                 endpoint            
4                     x            s               opp-table            2operating-points-v2          s      opp-162000000               	                 opp-270000000               ߀           !      opp-540000000                /                  opp-810000000               0G                       dsi@ae94000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
@              	  dsi_ctrl                                   0   {                  B      8         6         $  zbyte byte_intf pixel core iface bus             <                       C        
                                $           )dsi                                   sokay            
?            s     ports                                port@0                  endpoint            x            s            port@1                 endpoint            x           
4                      s   q            opp-table            2operating-points-v2          s      opp-187500000               -           !      opp-300000000                           "      opp-358000000               V                       phy@ae95000          2qcom,sm8550-dsi-phy-4nm       0       
P            
R           
U                dsi_phy dsi_phy_lane dsi_pll             {                   
  ziface ref            V                       sokay            
K            s         dsi@ae96000       (   2qcom,sm8550-dsi-ctrl qcom,mdss-dsi-ctrl              
`              	  dsi_ctrl                                   0   {                  D      :         6         $  zbyte byte_intf pixel core iface bus             <                 	      E        
                                $           )dsi                                 	  sdisabled             s     ports                                port@0                  endpoint            x            s            port@1                 endpoint             s                 phy@ae97000          2qcom,sm8550-dsi-phy-4nm       0       
p            
r           
u                dsi_phy dsi_phy_lane dsi_pll             {                   
  ziface ref            V                     	  sdisabled             s            clock-controller@af00000             2qcom,sm8550-dispcc               
               \   {   /      6      0                             4      4                                       <              !         V                      +            s         phy@88e3000          2qcom,sm8550-snps-eusb2-phy               0       T                     {              zref            6           sokay                       
W           $            s         phy@88e8000          2qcom,sm8550-qmp-usb3-dp-phy                     0           {   6             6      6           zaux ref com_aux usb3_pipe               6              6      6           phy common           V                       Y         e        sokay                                   s   4   ports                                port@0                  endpoint            x            s  &         port@1                 endpoint            x            s            port@2                 endpoint            x            s                  usb@a600000           2qcom,sm8550-dwc3 qcom,snps-dwc3              
`              0   {   6      6      6      6      6               &  zcfg_noc core iface sleep mock_utmi xo              6      6           $        `                                                                                      E  dwc_usb3 pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                6                         6         0     j                  9         :   $           usb-ddr apps-usb            _   5   @            $      4            )usb2-phy usb3-phy           
e             
y         
         
         
         
         
                  %         ;         P         f         _        sokay             s     ports                                port@0                  endpoint            x            s  %         port@1                 endpoint            x            s                  interrupt-controller@b220000             2qcom,sm8550-pdc qcom,pdc                  "             @        d      <  o         ^   ^  a      }   ?      ~                                                        s         thermal-sensor@c271000            2qcom,sm8550-tsens qcom,tsens-v2               '            "                                                                uplow critical                      s  	      thermal-sensor@c272000            2qcom,sm8550-tsens qcom,tsens-v2               '             "0                                                               uplow critical                      s  
      thermal-sensor@c273000            2qcom,sm8550-tsens qcom,tsens-v2               '0            "@                                                               uplow critical                      s        power-management@c300000          #   2qcom,sm8550-aoss-qmp qcom,aoss-qmp               0                      .           .                      .                 V             s         sram@c3f0000             2qcom,rpmh-stats              ?                          spmi@c400000             2qcom,spmi-pmic-arb        P       @        0     P       @      D             L             B       @         core chnls obsrvr intr cnfg         periph_irq                                                                                                              s     pmic@c           2qcom,pm8010 qcom,spmi-pmic                                                     s     temp-alarm@2400          2qcom,spmi-temp-alarm               $                $                            s           pmic@d           2qcom,pm8010 qcom,spmi-pmic                                                     s     temp-alarm@2400          2qcom,spmi-temp-alarm               $                $                            s           pmic@1           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
                
                            s        gpio@8800             2qcom,pm8550-gpio qcom,spmi-gpio                      	        	)                      	                                s      sdc2-card-det-state         	5gpio12          	:normal           	                                      s         volume-up-n-state           	5gpio6           	:normal                               	         s  $         led-controller@ee00       *   2qcom,pm8550-flash-led qcom,spmi-flash-led                       sokay led         s     led-1           .           .          .         .          .                          	:flash        led-0           .            .          .         .          .                         	:flash           pwm       !   2qcom,pm8550-pwm qcom,pm8350c-pwm                       sokay                                       s     led@1                       	:status                     off       led@2                       	:status                     off       led@3                       	:status                     off             pmic@7           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
                
                            s        gpio@8800         !   2qcom,pm8550b-gpio qcom,spmi-gpio                         	        	)                      	                                s         phy@fd00             2qcom,pm8550b-eusb2-repeater                                                        s            pmic@5           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
                
                            s        gpio@8800         "   2qcom,pm8550ve-gpio qcom,spmi-gpio                        	        	)                      	                                s            pmic@2           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
                
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	)                      	                                s            pmic@3           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
                
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	)                      	                                s            pmic@4           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
                
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	)                      	                                s            pmic@6           2qcom,pm8550 qcom,spmi-pmic                                                     s     temp-alarm@a00           2qcom,spmi-temp-alarm               
                
                            s        gpio@8800         "   2qcom,pm8550vs-gpio qcom,spmi-gpio                        	        	)                      	                                s            pmic@0           2qcom,pm8550 qcom,spmi-pmic                                                      s     pon@1300             2qcom,pmk8350-pon                         	  hlos pbs             s     pwrkey           2qcom,pmk8350-pwrkey                                  t        sokay             s        resin            2qcom,pmk8350-resin                                sokay               r         s           rtc@6100             2qcom,pmk8350-rtc               a   b       
  rtc alarm                   b               s        nvram@7100           2qcom,spmi-sdam             q                                  R      q             s     reboot-reason@48                H           (               s           gpio@b800         !   2qcom,pmk8550-gpio qcom,spmi-gpio                         	        	)                      	                                s      sleep-clk-state         	5gpio3           	:func1            -         ;         	\                     s  3            pmic@a           2qcom,pmr735d qcom,spmi-pmic             
                                       s     temp-alarm@a00           2qcom,spmi-temp-alarm               
             
   
                            s        gpio@8800         !   2qcom,pmr735d-gpio qcom,spmi-gpio                         	        	)                      	                                s               pinctrl@f100000          2qcom,sm8550-tlmm                        0                                  	        	                               	)   l                   I           W                s   l   cam0-default-state           s     mclk-pins           	5gpio100       	  	:cam_mclk            	C            	\         cam0-sleep-state             s     mclk-pins           	5gpio100       	  	:cam_mclk            	C            l         cam1-default-state           s     mclk-pins           	5gpio101       	  	:cam_mclk            	C            	\         cam1-sleep-state             s     mclk-pins           	5gpio101       	  	:cam_mclk            	C            l         cam2-default-state           s     mclk-pins           	5gpio102       	  	:cam_mclk            	C            	\         cam2-sleep-state             s     mclk-pins           	5gpio102       	  	:cam_mclk            	C            l         cam3-default-state           s     mclk-pins           	5gpio103       	  	:cam_mclk            	C            	\         cam3-sleep-state             s     mclk-pins           	5gpio103       	  	:cam_mclk            	C            l         cam4-default-state           s     mclk-pins           	5gpio104         	:cam_aon_mclk4           	C            	\         cam4-sleep-state             s     mclk-pins           	5gpio104         	:cam_aon_mclk4           	C            l         cam5-default-state           s     mclk-pins           	5gpio105       	  	:cam_mclk            	C            	\         cam5-sleep-state             s     mclk-pins           	5gpio105       	  	:cam_mclk            	C            l         cam6-default-state           s     mclk-pins           	5gpio106       	  	:cam_mclk            	C            	\         cam6-sleep-state             s     mclk-pins           	5gpio106       	  	:cam_mclk            	C            l         cam7-default-state           s     mclk-pins           	5gpio107       	  	:cam_mclk            	C            	\         cam7-sleep-state             s     mclk-pins           	5gpio107       	  	:cam_mclk            	C            l         cci0-0-default-state             s      sda-pins            	5gpio110         	:cci_i2c_sda         	C                   scl-pins            	5gpio111         	:cci_i2c_scl         	C                      cci0-0-sleep-state           s      sda-pins            	5gpio110         	:cci_i2c_sda         	C            l      scl-pins            	5gpio111         	:cci_i2c_scl         	C            l         cci0-1-default-state             s      sda-pins            	5gpio112         	:cci_i2c_sda         	C                   scl-pins            	5gpio113         	:cci_i2c_scl         	C                      cci0-1-sleep-state           s      sda-pins            	5gpio112         	:cci_i2c_sda         	C            l      scl-pins            	5gpio113         	:cci_i2c_scl         	C            l         cci1-0-default-state             s      sda-pins            	5gpio114         	:cci_i2c_sda         	C                   scl-pins            	5gpio115         	:cci_i2c_scl         	C                      cci1-0-sleep-state           s      sda-pins            	5gpio114         	:cci_i2c_sda         	C            l      scl-pins            	5gpio115         	:cci_i2c_scl         	C            l         cci2-0-default-state             s      sda-pins            	5gpio74          	:cci_i2c_sda         	C                   scl-pins            	5gpio75          	:cci_i2c_scl         	C                      cci2-0-sleep-state           s      sda-pins            	5gpio74          	:cci_i2c_sda         	C            l      scl-pins            	5gpio75          	:cci_i2c_scl         	C            l         cci2-1-default-state             s      sda-pins            	5gpio0           	:cci_i2c_sda         	C                   scl-pins            	5gpio1           	:cci_i2c_scl         	C                      cci2-1-sleep-state           s      sda-pins            	5gpio0           	:cci_i2c_sda         	C            l      scl-pins            	5gpio1           	:cci_i2c_scl         	C            l         hub-i2c0-data-clk-state         	5gpio16 gpio17           	:i2chub0_se0         	C                     s   ]      hub-i2c1-data-clk-state         	5gpio18 gpio19           	:i2chub0_se1         	C                     s   ^      hub-i2c2-data-clk-state         	5gpio20 gpio21           	:i2chub0_se2         	C                     s   _      hub-i2c3-data-clk-state         	5gpio22 gpio23           	:i2chub0_se3         	C                     s   b      hub-i2c4-data-clk-state         	5gpio4 gpio5         	:i2chub0_se4         	C                     s   c      hub-i2c5-data-clk-state         	5gpio6 gpio7         	:i2chub0_se5         	C                     s   d      hub-i2c6-data-clk-state         	5gpio8 gpio9         	:i2chub0_se6         	C                     s   e      hub-i2c7-data-clk-state         	5gpio10 gpio11           	:i2chub0_se7         	C                     s   f      hub-i2c8-data-clk-state         	5gpio206 gpio207         	:i2chub0_se8         	C                     s   g      hub-i2c9-data-clk-state         	5gpio84 gpio85           	:i2chub0_se9         	C                     s   h      pcie0-default-state          s      perst-pins          	5gpio94          	:gpio            	C            l      clkreq-pins         	5gpio95          	:pcie0_clk_req_n         	C                  wake-pins           	5gpio96          	:gpio            	C                     pcie1-default-state          s      perst-pins          	5gpio97          	:gpio            	C            l      clkreq-pins         	5gpio98          	:pcie1_clk_req_n         	C                  wake-pins           	5gpio99          	:gpio            	C                     qup-i2c0-data-clk-state         	5gpio28 gpio29         	  	:qup1_se0            	C                      s   i      qup-i2c1-data-clk-state         	5gpio32 gpio33         	  	:qup1_se1            	C                      s   u      qup-i2c2-data-clk-state         	5gpio36 gpio37         	  	:qup1_se2            	C                      s   x      qup-i2c3-data-clk-state         	5gpio40 gpio41         	  	:qup1_se3            	C                      s   {      qup-i2c4-data-clk-state         	5gpio44 gpio45         	  	:qup1_se4            	C                      s   ~      qup-i2c5-data-clk-state         	5gpio52 gpio53         	  	:qup1_se5            	C                      s         qup-i2c6-data-clk-state         	5gpio48 gpio49         	  	:qup1_se6            	C                      s         qup-i2c8-data-clk-state          s   7   scl-pins            	5gpio57          	:qup2_se0_l1_mira            	C                   sda-pins            	5gpio56          	:qup2_se0_l0_mira            	C                      qup-i2c9-data-clk-state         	5gpio60 gpio61         	  	:qup2_se1            	C                      s   @      qup-i2c10-data-clk-state            	5gpio64 gpio65         	  	:qup2_se2            	C                      s   C      qup-i2c11-data-clk-state            	5gpio68 gpio69         	  	:qup2_se3            	C                      s   F      qup-i2c12-data-clk-state            	5gpio2 gpio3       	  	:qup2_se4            	C                      s   I      qup-i2c13-data-clk-state            	5gpio80 gpio81         	  	:qup2_se5            	C                      s   L      qup-i2c15-data-clk-state            	5gpio72 gpio106        	  	:qup2_se7            	C                      s   Y      qup-spi0-cs-state           	5gpio31        	  	:qup1_se0            	C            	\         s   t      qup-spi0-data-clk-state         	5gpio28 gpio29 gpio30          	  	:qup1_se0            	C            	\         s   s      qup-spi1-cs-state           	5gpio35        	  	:qup1_se1            	C            	\         s   w      qup-spi1-data-clk-state         	5gpio32 gpio33 gpio34          	  	:qup1_se1            	C            	\         s   v      qup-spi2-cs-state           	5gpio39        	  	:qup1_se2            	C            	\         s   z      qup-spi2-data-clk-state         	5gpio36 gpio37 gpio38          	  	:qup1_se2            	C            	\         s   y      qup-spi3-cs-state           	5gpio43        	  	:qup1_se3            	C            	\         s   }      qup-spi3-data-clk-state         	5gpio40 gpio41 gpio42          	  	:qup1_se3            	C            	\         s   |      qup-spi4-cs-state           	5gpio47        	  	:qup1_se4            	C            	\         s         qup-spi4-data-clk-state         	5gpio44 gpio45 gpio46          	  	:qup1_se4            	C            	\         s         qup-spi5-cs-state           	5gpio55        	  	:qup1_se5            	C            	\         s         qup-spi5-data-clk-state         	5gpio52 gpio53 gpio54          	  	:qup1_se5            	C            	\         s         qup-spi6-cs-state           	5gpio51        	  	:qup1_se6            	C            	\         s         qup-spi6-data-clk-state         	5gpio48 gpio49 gpio50          	  	:qup1_se6            	C            	\         s         qup-spi8-cs-state           	5gpio59          	:qup2_se0_l3_mira            	C            	\         s   ?      qup-spi8-data-clk-state         	5gpio56 gpio57 gpio58            	:qup2_se0_l2_mira            	C            	\         s   >      qup-spi9-cs-state           	5gpio63        	  	:qup2_se1            	C            	\         s   B      qup-spi9-data-clk-state         	5gpio60 gpio61 gpio62          	  	:qup2_se1            	C            	\         s   A      qup-spi10-cs-state          	5gpio67        	  	:qup2_se2            	C            	\         s   E      qup-spi10-data-clk-state            	5gpio64 gpio65 gpio66          	  	:qup2_se2            	C            	\         s   D      qup-spi11-cs-state          	5gpio71        	  	:qup2_se3            	C            	\         s   H      qup-spi11-data-clk-state            	5gpio68 gpio69 gpio70          	  	:qup2_se3            	C            	\         s   G      qup-spi12-cs-state          	5gpio119       	  	:qup2_se4            	C            	\         s   K      qup-spi12-data-clk-state            	5gpio2 gpio3 gpio118       	  	:qup2_se4            	C            	\         s   J      qup-spi13-cs-state          	5gpio83        	  	:qup2_se5            	C            	\         s   N      qup-spi13-data-clk-state            	5gpio80 gpio81 gpio82          	  	:qup2_se5            	C            	\         s   M      qup-spi15-cs-state          	5gpio75        	  	:qup2_se7            	C            	\         s   \      qup-spi15-data-clk-state            	5gpio72 gpio106 gpio74         	  	:qup2_se7            	C            	\         s   [      qup-uart7-default-state         	5gpio26 gpio27         	  	:qup1_se7            	C            	\         s         qup-uart14-default-state            	5gpio78 gpio79         	  	:qup2_se6            	C                     s   O      qup-uart14-cts-rts-state            	5gpio76 gpio77         	  	:qup2_se6            	C            l         s   P      sdc2-sleep-state             s      clk-pins          	  	5sdc2_clk             	\        	C         cmd-pins          	  	5sdc2_cmd                     	C         data-pins         
  	5sdc2_data                    	C            sdc2-default-state           s      clk-pins          	  	5sdc2_clk             	\        	C         cmd-pins          	  	5sdc2_cmd                     	C   
      data-pins         
  	5sdc2_data                    	C   
         bt-default-state             s  2   bt-en-pins          	5gpio81          	:gpio            	C            	\      sw-ctrl-pins            	5gpio82          	:gpio             l         lt9611-irq-state            	5gpio8           	:gpio             	\         s   o      lt9611-rst-state            	5gpio7           	:gpio             	w         s   p      wcd-reset-n-active-state            	5gpio108         	:gpio            	C            	\         	         s         wlan-en-state           	5gpio80          	:gpio            	C            l         s  1         iommu@15000000        /   2qcom,sm8550-smmu-500 qcom,smmu-500 arm,mmu-500                                                              A              a              b              c              d              e              f              g              h              i              j              k              l              m              n              o              p              q              r              s              t              u              v                                                                                                                                                                                     ;             <             =             >             ?             @             A             B             C             D             E             F             G             H             I             J             K             L             M             N             O             P             Q             R             S             T             U             V             W             X             Y                                                                                                                                                                                                                                                                                                                                                                                                                                   f         s   5      interrupt-controller@17100000            2arm,gic-v3                                                R                            {                                 	                                         s      ppi-partitions     interrupt-partition-0                             s   #      interrupt-partition-1                          s   $      interrupt-partition-2                          s   %      interrupt-partition-3                       s   &         msi-controller@17140000          2arm,gic-v3-its                                                     s            timer@17420000           2arm,armv7-timer-mem              B                 R                                            frame@17421000           B    B                                                             frame@17423000           B0                               	             	  sdisabled          frame@17425000           BP                               
             	  sdisabled          frame@17427000           Bp                                            	  sdisabled          frame@17429000           B                                            	  sdisabled          frame@1742b000           B                                            	  sdisabled          frame@1742d000           B                                            	  sdisabled             rsc@17a00000          	  #apps_rsc             2qcom,rpmh-rsc         @                                                               drv-0 drv-1 drv-2 drv-3       0                                                                                                                  '         s     bcm-voter            2qcom,bcm-voter           s          clock-controller             2qcom,sm8550-rpmh-clk             V           zxo           {            s         power-controller             2qcom,sm8550-rpmhpd          +                       s   <   opp-table            2operating-points-v2          s      opp-16          X            s        opp-48          X   0         s         opp-52          X   4         s        opp-56          X   8         s         opp-60          X   <         s        opp-64          X   @         s   !      opp-80          X   P         s        opp-128         X            s   "      opp-144         X            s        opp-192         X            s         opp-256         X            s         opp-320         X  @         s        opp-336         X  P         s        opp-384         X           s         opp-416         X           s              regulators-0             2qcom,pm8550-rpmh-regulators                               #           8   `        N           \   `        n   `           `                                                    b      bob1          
  vreg_bob1            2K           <l                    s   `      bob2          
  vreg_bob2            )           <l                    s         ldo1            vreg_l1b_1p8             w@          w@                    /        H               s        ldo2            vreg_l2b_3p0             -           -                     /        H               s        ldo5            vreg_l5b_3p1             /]           /]                     /        H               s         ldo6            vreg_l6b_1p8             w@          -                     /        H               s        ldo7            vreg_l7b_1p8             w@          -                     /        H               s        ldo8            vreg_l8b_1p8             w@          -                     /        H               s         ldo9            vreg_l9b_2p9             -*          -                     /        H               s         ldo11           vreg_l11b_1p2            O                               /        H               s        ldo12           vreg_l12b_1p8            w@          w@                    /        H               s        ldo13           vreg_l13b_3p0            -          -                    /        H               s        ldo14           vreg_l14b_3p2            0           0                     /        H               s        ldo15           vreg_l15b_1p8            w@          w@                    /        H               s         ldo16           vreg_l16b_2p8            *          *                    /        H               s        ldo17           vreg_l17b_2p5            &5@          &5@                    /        H               s            regulators-1             2qcom,pm8550vs-rpmh-regulators           `           n          N          c      ldo3            vreg_l3c_0p9             m                              /        H               s            regulators-2             2qcom,pm8550vs-rpmh-regulators           `          n          N          d      ldo1            vreg_l1d_0p88            m          	                    /        H               s            regulators-3             2qcom,pm8550vs-rpmh-regulators           `          n          N           |                      e      smps4           vreg_s4e_0p95            @                              s        smps5           vreg_s5e_1p08            z                               s        ldo1            vreg_l1e_0p88            m          m                    /        H               s         ldo2            vreg_l2e_0p9             @                              /        H               s        ldo3            vreg_l3e_1p2             O          O                    /        H               s            regulators-4             2qcom,pm8550ve-rpmh-regulators           `          n          N          |           f      smps4           vreg_s4f_0p5                        
`                    s        ldo1            vreg_l1f_0p9                                           /        H               s        ldo2            vreg_l2f_0p88            m                              /        H               s        ldo3            vreg_l3f_0p88            m                              /        H               s            regulators-5             2qcom,pm8550vs-rpmh-regulators           `           n           N                                            |                                 g      smps1           vreg_s1g_1p25            O                               s        smps2           vreg_s2g_0p85            5           B@                    s  5      smps3           vreg_s3g_0p8                       Q                    s        smps4           vreg_s4g_1p25            O          @                    s         smps5           vreg_s5g_0p85                       Q                    s  4      smps6           vreg_s6g_1p86            w@                              s         ldo1            vreg_l1g_1p2             O          O                    /        H               s         ldo3            vreg_l3g_1p2             O          O                    /        H               s            regulators-6             2qcom,pm8010-rpmh-regulators                                                         `        m      ldo1            vreg_l1m_1p056                                           /        H               s        ldo2            vreg_l2m_1p056                                           /        H               s        ldo3            vreg_l3m_2p8             *          *                    s        ldo4            vreg_l4m_2p8             *          *                    s        ldo5            vreg_l5m_1p8             w@          w@                    s        ldo6            vreg_l6m_1p8             w@          w@                    s        ldo7            vreg_l7m_2p9             *          ,O                    s           regulators-7             2qcom,pm8010-rpmh-regulators                                              `           `        n      ldo1            vreg_l1n_1p1             ؀          O                    /        H               s        ldo2            vreg_l2n_1p1             ؀          O                    /        H               s        ldo3            vreg_l3n_2p8             *          -                    s        ldo4            vreg_l4n_2p8             *          2Z                    s        ldo5            vreg_l5n_1p8             w@          w@                    s        ldo6            vreg_l6n_3p3             0           0                     s        ldo7            vreg_l7n_2p96            *          -*                    s              cpufreq@17d91000          +   2qcom,sm8550-cpufreq-epss qcom,cpufreq-epss        0                                0              '  freq-domain0 freq-domain1 freq-domain2           {   /   6           zxo alternate          0                                                   $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2                     V            s         pmu@24091000          .   2qcom,sm8550-llcc-bwmon qcom,sc7280-llcc-bwmon                $	                        Q                                               opp-table            2operating-points-v2          s     opp-0           J p      opp-1           J ,h      opp-2           J Z      opp-3           J ci8      opp-4           J y      opp-5           J A      opp-6           J H      opp-7           J ։      opp-8           J h            pmu@240b6400          (   2qcom,sm8550-cpu-bwmon qcom,sdm845-bwmon              $d                       E                  9         9                   opp-table            2operating-points-v2          s     opp-0           J E      opp-1           J l}p      opp-2           J       opp-3           J       opp-4           J 9`      opp-5           J /(            interconnect@24100000            2qcom,sm8550-gem-noc              $                                        s   9      system-cache-controller@25000000             2qcom,sm8550-llcc          `       %               %               %@              %`              %              %                X  llcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base llcc_broadcast_and_base                
             interconnect@320c0000            2qcom,sm8550-nsp-noc              2                                        s        remoteproc@32300000          2qcom,sm8550-cdsp-pas                 20               D           B                                              #  wdog fatal ready handover stop-ack           {               zxo              <       <   
   <            cx mxc nsp                                                                         stop            sokay          .  qcom/sm8550/cdsp.mbn qcom/sm8550/cdsp_dtb.mbn            s     glink-edge             .                     .               #cdsp                  fastrpc          2qcom,fastrpc            )fastrpcglink-apps-dsp           #cdsp             =                             compute-cb@1             2qcom,fastrpc-compute-cb                   $  _   5  a       5         5              f      compute-cb@2             2qcom,fastrpc-compute-cb                   $  _   5  b       5         5              f      compute-cb@3             2qcom,fastrpc-compute-cb                   $  _   5  c       5         5              f      compute-cb@4             2qcom,fastrpc-compute-cb                   $  _   5  d       5         5              f      compute-cb@5             2qcom,fastrpc-compute-cb                   $  _   5  e       5         5              f      compute-cb@6             2qcom,fastrpc-compute-cb                   $  _   5  f       5         5              f      compute-cb@7             2qcom,fastrpc-compute-cb                   $  _   5  g       5         5              f      compute-cb@8             2qcom,fastrpc-compute-cb                   $  _   5  h       5         5              f                  thermal-zones      aoss0-thermal           /  	       trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             cpuss0-thermal          /  	      trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             cpuss1-thermal          /  	      trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             cpuss2-thermal          /  	      trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             cpuss3-thermal          /  	      trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             cpu3-top-thermal            /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu3-bottom-thermal         /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu4-top-thermal            /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s               cpu4-bottom-thermal         /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu5-top-thermal            /  	   	   trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu5-bottom-thermal         /  	   
   trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s  	            cpu6-top-thermal            /  	      trips      trip-point0         ? _        K           Epassive          s  
      trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu6-bottom-thermal         /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu7-top-thermal            /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu7-middle-thermal         /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu7-bottom-thermal         /  	      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              aoss1-thermal           /  
       trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             cpu0-thermal            /  
      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu1-thermal            /  
      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s        cpu-critical            ?         K        	   Ecritical             s              cpu2-thermal            /  
      trips      trip-point0         ? _        K           Epassive          s        trip-point1         ? s        K           Epassive          s         cpu-critical            ?         K        	   Ecritical             s  !            cdsp0-thermal           V   
        /        trips      thermal-engine-config           ? H        K           Epassive       thermal-hal-config          ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive       junction-config         ? s        K           Epassive          s  "            cdsp1-thermal           V   
        /        trips      thermal-engine-config           ? H        K           Epassive       thermal-hal-config          ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive       junction-config         ? s        K           Epassive          s  #            cdsp2-thermal           V   
        /        trips      thermal-engine-config           ? H        K           Epassive       thermal-hal-config          ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive       junction-config         ? s        K           Epassive          s  $            cdsp3-thermal           V   
        /        trips      thermal-engine-config           ? H        K           Epassive       thermal-hal-config          ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive       junction-config         ? s        K           Epassive          s  %            video-thermal           /  
      trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             mem-thermal         V   
        /  
   	   trips      thermal-engine-config           ? H        K           Epassive       ddr0-config         ? _        K           Epassive          s  &      reset-mon-config            ? 8        K           Epassive             modem0-thermal          /  
   
   trips      thermal-engine-config           ? H        K           Epassive       mdmss0-config0          ? p        K           Epassive          s  '      mdmss0-config1          ? (        K           Epassive          s  (      reset-mon-config            ? 8        K           Epassive             modem1-thermal          /  
      trips      thermal-engine-config           ? H        K           Epassive       mdmss1-config0          ? p        K           Epassive          s  )      mdmss1-config1          ? (        K           Epassive          s  *      reset-mon-config            ? 8        K           Epassive             modem2-thermal          /  
      trips      thermal-engine-config           ? H        K           Epassive       mdmss2-config0          ? p        K           Epassive          s  +      mdmss2-config1          ? (        K           Epassive          s  ,      reset-mon-config            ? 8        K           Epassive             modem3-thermal          /  
      trips      thermal-engine-config           ? H        K           Epassive       mdmss3-config0          ? p        K           Epassive          s  -      mdmss3-config1          ? (        K           Epassive          s  .      reset-mon-config            ? 8        K           Epassive             camera0-thermal         /  
      trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             camera1-thermal         /  
      trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             aoss2-thermal           /         trips      thermal-engine-config           ? H        K           Epassive       reset-mon-config            ? 8        K           Epassive             gpuss-0-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                gpuss-1-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                gpuss-2-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                gpuss-3-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                gpuss-4-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                gpuss-5-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                gpuss-6-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                gpuss-7-thermal         V   
        /        cooling-maps       map0            l          q           trips      trip-point0         ? L        K           Epassive          s        trip-point1         ? _        K           Ehot       trip-point2         ?         K        	   Ecritical                pm8010-m-thermal            V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8010-n-thermal            V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8550-thermal          V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8550b-thermal         V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8550ve-thermal            V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8550vs-c-thermal          V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8550vs-d-thermal          V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8550vs-e-thermal          V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pm8550vs-g-thermal          V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot             pmr735d-k-thermal           V   d        /     trips      trip0           ? s        K             Epassive       trip1           ? 8        K             Ehot                timer            2arm,armv8-timer       @                                             
            reboot-mode          2nvmem-reboot-mode                     reboot-mode                             aliases       $  /soc@0/geniqup@ac0000/serial@a9c000       $  /soc@0/geniqup@8c0000/serial@898000       audio-codec          2qcom,wcd9385-codec          default                     w@         w@         w@         w@         + $ I                   R         y  P          !          "           l   l                                               `        m            s  *      hdmi-out             2hdmi-connector           Ea      port       endpoint            x  #         s   r            gpio-keys         
   2gpio-keys             $        default    key-volume-up         
  #Volume Up              s                                                       leds          
   2gpio-leds      led-0         
  	:bluetooth                         l               &bluetooth-power         off       led-1         
  	:indicator                         l               off          <      led-2           	:wlan                          l               &phy0tx          off          pmic-glink        '   2qcom,sm8550-pmic-glink qcom,pmic-glink                                    L   l          connector@0          2usb-c-connector                      ^dual            idual       ports                                port@0                  endpoint            x  %         s            port@1                 endpoint            x  &         s            port@2                 endpoint            x  '         s   a                  regulator-lt9611-1v2             2regulator-fixed         LT9611_1V2           O          O        s           ~   l                         s   m      regulator-lt9611-3v3             2regulator-fixed         LT9611_3V3           2Z          2Z        s  (        ~   l                         s   n      regulator-vph-pwr            2regulator-fixed         vph_pwr          8u           8u                            s         regulator-vreg-bob-3v3           2regulator-fixed         VREG_BOB_3P3             2Z          2Z        s            s  (      sound         (   2qcom,sm8550-sndcard qcom,sm8450-sndcard          ,SM8550-HDK          SpkrLeft IN WSA_SPK1 OUT SpkrRight IN WSA_SPK2 OUT IN1_HPHL HPHL_OUT IN2_HPHR HPHR_OUT AMIC1 MIC BIAS1 AMIC2 MIC BIAS2 AMIC5 MIC BIAS4 TX SWR_INPUT0 ADC1_OUTPUT TX SWR_INPUT1 ADC2_OUTPUT TX SWR_INPUT1 ADC4_OUTPUT       wcd-playback-dai-link           WCD Playback       cpu           )   q      codec             *      +                 platform              ,         wcd-capture-dai-link            WCD Capture    cpu           )   x      codec             *     -                 platform              ,         wsa-dai-link            WSA Playback       cpu           )   i      codec             .  /  0                 platform              ,         va-dai-link         VA Capture     cpu           )   x      codec                        platform              ,            wcn7850-pmu          2qcom,wcn7850-pmu            default           1  2  3           l   P               l   Q              4                      5                  "           3      regulators     ldo0            vreg_pmu_rfa_cmn             s   R      ldo1            vreg_pmu_aon_0p59            s   S      ldo2            vreg_pmu_wlcx_0p8            s   T      ldo3            vreg_pmu_wlmx_0p85           s   U      ldo4            vreg_pmu_btcmx_0p85          s  /      ldo5            vreg_pmu_rfa_0p8             s   V      ldo6            vreg_pmu_rfa_1p2             s   W      ldo7            vreg_pmu_rfa_1p8             s   X      ldo8            vreg_pmu_pcie_0p9            s         ldo9            vreg_pmu_pcie_1p8            s               __symbols__         /clocks/xo-board            $/clocks/sleep-clk           ./clocks/bi-tcxo-div2-clk            ;/clocks/bi-tcxo-ao-div2-clk         K/cpus/cpu@0         P/cpus/cpu@0/l2-cache            U/cpus/cpu@0/l2-cache/l3-cache           Z/cpus/cpu@100           _/cpus/cpu@100/l2-cache          f/cpus/cpu@200           k/cpus/cpu@200/l2-cache          r/cpus/cpu@300           w/cpus/cpu@300/l2-cache          ~/cpus/cpu@400           /cpus/cpu@400/l2-cache          /cpus/cpu@500           /cpus/cpu@500/l2-cache          /cpus/cpu@600           /cpus/cpu@600/l2-cache          /cpus/cpu@700           /cpus/cpu@700/l2-cache           /cpus/idle-states/cpu-sleep-0-0          /cpus/idle-states/cpu-sleep-1-0          /cpus/idle-states/cpu-sleep-2-0       )  /cpus/domain-idle-states/cluster-sleep-0          )  /cpus/domain-idle-states/cluster-sleep-1            /firmware/scm           /interconnect-0         /interconnect-1         /opp-table-qup100mhz            -/opp-table-qup120mhz            B/opp-table-qup125mhz            W/psci/power-domain-cpu0         _/psci/power-domain-cpu1         g/psci/power-domain-cpu2         o/psci/power-domain-cpu3         w/psci/power-domain-cpu4         /psci/power-domain-cpu5         /psci/power-domain-cpu6         /psci/power-domain-cpu7         /psci/power-domain-cluster          /reserved-memory          %  /reserved-memory/hyp-region@80000000          +  /reserved-memory/cpusys-vm-region@80a00000        *  /reserved-memory/hyp-tags-region@80e00000         (  /reserved-memory/xbl-sc-region@d8100000       3  /reserved-memory/hyp-tags-reserved-region@811d0000        3  /reserved-memory/xbl-dt-log-merged-region@81a00000        ,  /reserved-memory/aop-cmd-db-region@81c60000       3  /reserved-memory/aop-config-merged-region@81c80000          /reserved-memory/smem@81d00000        *  1/reserved-memory/adsp-mhi-region@81f00000         -  >/reserved-memory/global-sync-region@82600000          )  N/reserved-memory/tz-stat-region@82700000          2  Z/reserved-memory/cdsp-secure-heap-region@82800000         &  o/reserved-memory/mpss-region@8a800000         -  x/reserved-memory/q6-mpss-dtb-region@9b000000          (  /reserved-memory/ipa-fw-region@9b080000       )  /reserved-memory/ipa-gsi-region@9b090000          0  /reserved-memory/gpu-micro-code-region@9b09a000       &  /reserved-memory/spss-region@9b100000         /  /reserved-memory/spu-tz-shared-region@9b280000        2  /reserved-memory/spu-modem-shared-region@9b2e0000         (  /reserved-memory/camera-region@9b300000       '  /reserved-memory/video-region@9bb00000        %  /reserved-memory/cvp-region@9c200000          &  /reserved-memory/cdsp-region@9c900000         -  /reserved-memory/q6-cdsp-dtb-region@9e900000          -  /reserved-memory/q6-adsp-dtb-region@9e980000          *  //reserved-memory/adspslpi-region@9ea00000         '  </reserved-memory/rmtfs-region@d4a80000        *  F/reserved-memory/mpss-dsm-region@d4d00000         -  S/reserved-memory/tz-reserved-region@d8000000          *  c/reserved-memory/cpucp-fw-region@d8140000         &  p/reserved-memory/qtee-region@d8300000         $  y/reserved-memory/ta-region@d8800000       )  /reserved-memory/tz-tags-region@e1200000          /  /reserved-memory/hwfence-shbuf-region@e6440000        -  /reserved-memory/trust-ui-vm-region@f3600000          2  /reserved-memory/trust-ui-vm-dump-region@f80ee000         1  /reserved-memory/trust-ui-vm-qrt-region@f80ef000          8  /reserved-memory/trust-ui-vm-vblk0-ring-region@f80f8000       8  /reserved-memory/trust-ui-vm-vblk1-ring-region@f80fc000       5  /reserved-memory/trust-ui-vm-swiotlb-region@f8100000          (  /reserved-memory/oem-vm-region@f8400000       3  /reserved-memory/oem-vm-vblk0-ring-region@fcc00000        0  +/reserved-memory/oem-vm-swiotlb-region@fcc04000       .  :/reserved-memory/hyp-ext-tags-region@fce00000         2  K/reserved-memory/hyp-ext-reserved-region@ff700000           `/smp2p-adsp/master-kernel           o/smp2p-adsp/slave-kernel            }/smp2p-cdsp/master-kernel           /smp2p-cdsp/slave-kernel            /smp2p-modem/master-kernel          /smp2p-modem/slave-kernel           /smp2p-modem/ipa-ap-to-modem            /smp2p-modem/ipa-modem-to-ap            /soc@0          /soc@0/clock-controller@100000          /soc@0/mailbox@408000           /soc@0/dma-controller@800000            /soc@0/geniqup@8c0000         !  /soc@0/geniqup@8c0000/i2c@880000          !  /soc@0/geniqup@8c0000/spi@880000          !  /soc@0/geniqup@8c0000/i2c@884000          !  /soc@0/geniqup@8c0000/spi@884000          !  	/soc@0/geniqup@8c0000/i2c@888000          !  /soc@0/geniqup@8c0000/spi@888000          !  /soc@0/geniqup@8c0000/i2c@88c000          !  /soc@0/geniqup@8c0000/spi@88c000          !  !/soc@0/geniqup@8c0000/i2c@890000          !  '/soc@0/geniqup@8c0000/spi@890000          !  -/soc@0/geniqup@8c0000/i2c@894000          !  3/soc@0/geniqup@8c0000/spi@894000          $  9/soc@0/geniqup@8c0000/serial@898000       !  @/soc@0/geniqup@8c0000/i2c@89c000          !  F/soc@0/geniqup@8c0000/spi@89c000            L/soc@0/geniqup@9c0000         !  ]/soc@0/geniqup@9c0000/i2c@980000          !  g/soc@0/geniqup@9c0000/i2c@984000          !  q/soc@0/geniqup@9c0000/i2c@988000          <  {/soc@0/geniqup@9c0000/i2c@988000/typec-mux@42/port/endpoint       !  /soc@0/geniqup@9c0000/i2c@98c000          !  /soc@0/geniqup@9c0000/i2c@990000          !  /soc@0/geniqup@9c0000/i2c@994000          !  /soc@0/geniqup@9c0000/i2c@998000          !  /soc@0/geniqup@9c0000/i2c@99c000          !  /soc@0/geniqup@9c0000/i2c@9a0000          !  /soc@0/geniqup@9c0000/i2c@9a4000            /soc@0/dma-controller@a00000            /soc@0/geniqup@ac0000         !  /soc@0/geniqup@ac0000/i2c@a80000          0  /soc@0/geniqup@ac0000/i2c@a80000/hdmi-bridge@2b       F  /soc@0/geniqup@ac0000/i2c@a80000/hdmi-bridge@2b/ports/port@0/endpoint         F   /soc@0/geniqup@ac0000/i2c@a80000/hdmi-bridge@2b/ports/port@2/endpoint         !  /soc@0/geniqup@ac0000/spi@a80000          !  /soc@0/geniqup@ac0000/i2c@a84000          !  /soc@0/geniqup@ac0000/spi@a84000          !  /soc@0/geniqup@ac0000/i2c@a88000          !  /soc@0/geniqup@ac0000/spi@a88000          !  $/soc@0/geniqup@ac0000/i2c@a8c000          !  )/soc@0/geniqup@ac0000/spi@a8c000          !  ./soc@0/geniqup@ac0000/i2c@a90000          !  3/soc@0/geniqup@ac0000/spi@a90000          !  8/soc@0/geniqup@ac0000/i2c@a94000          !  =/soc@0/geniqup@ac0000/spi@a94000          !  B/soc@0/geniqup@ac0000/i2c@a98000          !  G/soc@0/geniqup@ac0000/spi@a98000          $  L/soc@0/geniqup@ac0000/serial@a9c000         R/soc@0/interconnect@1500000         \/soc@0/interconnect@1600000         g/soc@0/interconnect@1680000         r/soc@0/interconnect@16c0000         {/soc@0/interconnect@16e0000         /soc@0/interconnect@1700000         /soc@0/interconnect@1780000         /soc@0/rng@10c3000          /soc@0/pcie@1c00000         /soc@0/pcie@1c00000/opp-table           /soc@0/pcie@1c00000/pcie@0          /soc@0/phy@1c06000          /soc@0/pcie@1c08000         /soc@0/pcie@1c08000/opp-table           /soc@0/phy@1c0e000          /soc@0/dma-controller@1dc4000           /soc@0/crypto@1dfa000           /soc@0/phy@1d80000          /soc@0/ufshc@1d84000            /soc@0/ufshc@1d84000/opp-table          N/soc@0/crypto@1d88000           /soc@0/hwlock@1f40000            )/soc@0/clock-controller@1fc0000         ./soc@0/gpu@3d00000          2/soc@0/gpu@3d00000/zap-shader           A/soc@0/gpu@3d00000/opp-table            /soc@0/gmu@3d6a000          O/soc@0/gmu@3d6a000/opp-table             ]/soc@0/clock-controller@3d90000         c/soc@0/iommu@3da0000            o/soc@0/ipa@3f40000          s/soc@0/remoteproc@4080000           /soc@0/remoteproc@6800000         %  /soc@0/remoteproc@6800000/glink-edge          3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1        8  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/dais       :  /soc@0/remoteproc@6800000/glink-edge/gpr/service@1/bedais         3  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2        D  /soc@0/remoteproc@6800000/glink-edge/gpr/service@2/clock-controller         /soc@0/codec@6aa0000            /soc@0/soundwire@6ab0000            /soc@0/codec@6ac0000            /soc@0/soundwire@6ad0000          #  /soc@0/soundwire@6ad0000/codec@0,4           /soc@0/codec@6ae0000            /soc@0/codec@6b00000            /soc@0/soundwire@6b10000          %  "/soc@0/soundwire@6b10000/speaker@0,0          %  -/soc@0/soundwire@6b10000/speaker@0,1            8/soc@0/soundwire@6d30000          #  =/soc@0/soundwire@6d30000/codec@0,3          D/soc@0/codec@6d44000            R/soc@0/pinctrl@6e80000        +  ]/soc@0/pinctrl@6e80000/tx-swr-active-state        +  k/soc@0/pinctrl@6e80000/rx-swr-active-state        ,  y/soc@0/pinctrl@6e80000/dmic01-default-state       ,  /soc@0/pinctrl@6e80000/dmic23-default-state       ,  /soc@0/pinctrl@6e80000/wsa-swr-active-state       -  /soc@0/pinctrl@6e80000/wsa2-swr-active-state          0  /soc@0/pinctrl@6e80000/spkr-1-sd-n-active-state       0  /soc@0/pinctrl@6e80000/spkr-2-sd-n-active-state         /soc@0/interconnect@7400000         /soc@0/interconnect@7430000         /soc@0/interconnect@7e40000         
/soc@0/mmc@8804000          /soc@0/mmc@8804000/opp-table            !/soc@0/video-codec@aa00000        %  &/soc@0/video-codec@aa00000/opp-table             5/soc@0/clock-controller@aaf0000         =/soc@0/cci@ac15000          B/soc@0/cci@ac15000/i2c-bus@0            L/soc@0/cci@ac15000/i2c-bus@1            V/soc@0/cci@ac16000          [/soc@0/cci@ac16000/i2c-bus@0            e/soc@0/cci@ac17000          j/soc@0/cci@ac17000/i2c-bus@0            t/soc@0/cci@ac17000/i2c-bus@1            ~/soc@0/isp@acb7000           /soc@0/clock-controller@ade0000       !  /soc@0/display-subsystem@ae00000          <  /soc@0/display-subsystem@ae00000/display-controller@ae01000       R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@0/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@1/endpoint         R  /soc@0/display-subsystem@ae00000/display-controller@ae01000/ports/port@2/endpoint         F  /soc@0/display-subsystem@ae00000/display-controller@ae01000/opp-table         @  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000       V  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@0/endpoint         V  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/ports/port@1/endpoint         J  /soc@0/display-subsystem@ae00000/displayport-controller@ae90000/opp-table         -  /soc@0/display-subsystem@ae00000/dsi@ae94000          C  /soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@0/endpoint        C  	/soc@0/display-subsystem@ae00000/dsi@ae94000/ports/port@1/endpoint        7  /soc@0/display-subsystem@ae00000/dsi@ae94000/opp-table        -  */soc@0/display-subsystem@ae00000/phy@ae95000          -  8/soc@0/display-subsystem@ae00000/dsi@ae96000          C  B/soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@0/endpoint        C  O/soc@0/display-subsystem@ae00000/dsi@ae96000/ports/port@1/endpoint        -  ]/soc@0/display-subsystem@ae00000/phy@ae97000             k/soc@0/clock-controller@af00000         r/soc@0/phy@88e3000          ~/soc@0/phy@88e8000        )  /soc@0/phy@88e8000/ports/port@0/endpoint          )  /soc@0/phy@88e8000/ports/port@1/endpoint          )  /soc@0/phy@88e8000/ports/port@2/endpoint            /soc@0/usb@a600000        )  /soc@0/usb@a600000/ports/port@0/endpoint          )  /soc@0/usb@a600000/ports/port@1/endpoint          $  /soc@0/interrupt-controller@b220000         /soc@0/thermal-sensor@c271000           /soc@0/thermal-sensor@c272000           /soc@0/thermal-sensor@c273000            /soc@0/power-management@c300000         /soc@0/spmi@c400000         /soc@0/spmi@c400000/pmic@c        +   /soc@0/spmi@c400000/pmic@c/temp-alarm@2400          4/soc@0/spmi@c400000/pmic@d        +  =/soc@0/spmi@c400000/pmic@d/temp-alarm@2400          Q/soc@0/spmi@c400000/pmic@1        *  X/soc@0/spmi@c400000/pmic@1/temp-alarm@a00         %  j/soc@0/spmi@c400000/pmic@1/gpio@8800          9  w/soc@0/spmi@c400000/pmic@1/gpio@8800/sdc2-card-det-state          7  /soc@0/spmi@c400000/pmic@1/gpio@8800/volume-up-n-state        /  /soc@0/spmi@c400000/pmic@1/led-controller@ee00          /soc@0/spmi@c400000/pmic@1/pwm          /soc@0/spmi@c400000/pmic@7        *  /soc@0/spmi@c400000/pmic@7/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@7/gpio@8800          $  /soc@0/spmi@c400000/pmic@7/phy@fd00         /soc@0/spmi@c400000/pmic@5        *  /soc@0/spmi@c400000/pmic@5/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@5/gpio@8800            /soc@0/spmi@c400000/pmic@2        *  "/soc@0/spmi@c400000/pmic@2/temp-alarm@a00         %  8/soc@0/spmi@c400000/pmic@2/gpio@8800            I/soc@0/spmi@c400000/pmic@3        *  T/soc@0/spmi@c400000/pmic@3/temp-alarm@a00         %  j/soc@0/spmi@c400000/pmic@3/gpio@8800            {/soc@0/spmi@c400000/pmic@4        *  /soc@0/spmi@c400000/pmic@4/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@4/gpio@8800            /soc@0/spmi@c400000/pmic@6        *  /soc@0/spmi@c400000/pmic@6/temp-alarm@a00         %  /soc@0/spmi@c400000/pmic@6/gpio@8800            /soc@0/spmi@c400000/pmic@0        $  /soc@0/spmi@c400000/pmic@0/pon@1300       +  /soc@0/spmi@c400000/pmic@0/pon@1300/pwrkey        *  /soc@0/spmi@c400000/pmic@0/pon@1300/resin         $  /soc@0/spmi@c400000/pmic@0/rtc@6100       &  /soc@0/spmi@c400000/pmic@0/nvram@7100         7  #/soc@0/spmi@c400000/pmic@0/nvram@7100/reboot-reason@48        %  1/soc@0/spmi@c400000/pmic@0/gpio@b800          5  ?/soc@0/spmi@c400000/pmic@0/gpio@b800/sleep-clk-state            Q/soc@0/spmi@c400000/pmic@a        *  [/soc@0/spmi@c400000/pmic@a/temp-alarm@a00         %  p/soc@0/spmi@c400000/pmic@a/gpio@8800            X/soc@0/pinctrl@f100000        *  /soc@0/pinctrl@f100000/cam0-default-state         (  /soc@0/pinctrl@f100000/cam0-sleep-state       *  /soc@0/pinctrl@f100000/cam1-default-state         (  /soc@0/pinctrl@f100000/cam1-sleep-state       *  /soc@0/pinctrl@f100000/cam2-default-state         (  /soc@0/pinctrl@f100000/cam2-sleep-state       *  /soc@0/pinctrl@f100000/cam3-default-state         (  /soc@0/pinctrl@f100000/cam3-sleep-state       *  /soc@0/pinctrl@f100000/cam4-default-state         (  /soc@0/pinctrl@f100000/cam4-sleep-state       *  /soc@0/pinctrl@f100000/cam5-default-state         (   /soc@0/pinctrl@f100000/cam5-sleep-state       *   /soc@0/pinctrl@f100000/cam6-default-state         (   /soc@0/pinctrl@f100000/cam6-sleep-state       *   (/soc@0/pinctrl@f100000/cam7-default-state         (   5/soc@0/pinctrl@f100000/cam7-sleep-state       ,   @/soc@0/pinctrl@f100000/cci0-0-default-state       *   O/soc@0/pinctrl@f100000/cci0-0-sleep-state         ,   \/soc@0/pinctrl@f100000/cci0-1-default-state       *   k/soc@0/pinctrl@f100000/cci0-1-sleep-state         ,   x/soc@0/pinctrl@f100000/cci1-0-default-state       *   /soc@0/pinctrl@f100000/cci1-0-sleep-state         ,   /soc@0/pinctrl@f100000/cci2-0-default-state       *   /soc@0/pinctrl@f100000/cci2-0-sleep-state         ,   /soc@0/pinctrl@f100000/cci2-1-default-state       *   /soc@0/pinctrl@f100000/cci2-1-sleep-state         /   /soc@0/pinctrl@f100000/hub-i2c0-data-clk-state        /   /soc@0/pinctrl@f100000/hub-i2c1-data-clk-state        /   /soc@0/pinctrl@f100000/hub-i2c2-data-clk-state        /  !/soc@0/pinctrl@f100000/hub-i2c3-data-clk-state        /  !/soc@0/pinctrl@f100000/hub-i2c4-data-clk-state        /  !&/soc@0/pinctrl@f100000/hub-i2c5-data-clk-state        /  !8/soc@0/pinctrl@f100000/hub-i2c6-data-clk-state        /  !J/soc@0/pinctrl@f100000/hub-i2c7-data-clk-state        /  !\/soc@0/pinctrl@f100000/hub-i2c8-data-clk-state        /  !n/soc@0/pinctrl@f100000/hub-i2c9-data-clk-state        +  !/soc@0/pinctrl@f100000/pcie0-default-state        +  !/soc@0/pinctrl@f100000/pcie1-default-state        /  !/soc@0/pinctrl@f100000/qup-i2c0-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c1-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c2-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c3-data-clk-state        /  !/soc@0/pinctrl@f100000/qup-i2c4-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c5-data-clk-state        /  "/soc@0/pinctrl@f100000/qup-i2c6-data-clk-state        /  "&/soc@0/pinctrl@f100000/qup-i2c8-data-clk-state        /  "8/soc@0/pinctrl@f100000/qup-i2c9-data-clk-state        0  "J/soc@0/pinctrl@f100000/qup-i2c10-data-clk-state       0  "]/soc@0/pinctrl@f100000/qup-i2c11-data-clk-state       0  "p/soc@0/pinctrl@f100000/qup-i2c12-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c13-data-clk-state       0  "/soc@0/pinctrl@f100000/qup-i2c15-data-clk-state       )  "/soc@0/pinctrl@f100000/qup-spi0-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi0-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi1-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi1-data-clk-state        )  "/soc@0/pinctrl@f100000/qup-spi2-cs-state          /  "/soc@0/pinctrl@f100000/qup-spi2-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi3-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi3-data-clk-state        )  #!/soc@0/pinctrl@f100000/qup-spi4-cs-state          /  #-/soc@0/pinctrl@f100000/qup-spi4-data-clk-state        )  #?/soc@0/pinctrl@f100000/qup-spi5-cs-state          /  #K/soc@0/pinctrl@f100000/qup-spi5-data-clk-state        )  #]/soc@0/pinctrl@f100000/qup-spi6-cs-state          /  #i/soc@0/pinctrl@f100000/qup-spi6-data-clk-state        )  #{/soc@0/pinctrl@f100000/qup-spi8-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi8-data-clk-state        )  #/soc@0/pinctrl@f100000/qup-spi9-cs-state          /  #/soc@0/pinctrl@f100000/qup-spi9-data-clk-state        *  #/soc@0/pinctrl@f100000/qup-spi10-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi10-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi11-cs-state         0  #/soc@0/pinctrl@f100000/qup-spi11-data-clk-state       *  #/soc@0/pinctrl@f100000/qup-spi12-cs-state         0  $/soc@0/pinctrl@f100000/qup-spi12-data-clk-state       *  $/soc@0/pinctrl@f100000/qup-spi13-cs-state         0  $$/soc@0/pinctrl@f100000/qup-spi13-data-clk-state       *  $7/soc@0/pinctrl@f100000/qup-spi15-cs-state         0  $D/soc@0/pinctrl@f100000/qup-spi15-data-clk-state       /  $W/soc@0/pinctrl@f100000/qup-uart7-default-state        0  $i/soc@0/pinctrl@f100000/qup-uart14-default-state       0  $|/soc@0/pinctrl@f100000/qup-uart14-cts-rts-state       (  $/soc@0/pinctrl@f100000/sdc2-sleep-state       *  $/soc@0/pinctrl@f100000/sdc2-default-state         (  $/soc@0/pinctrl@f100000/bt-default-state       (  $/soc@0/pinctrl@f100000/lt9611-irq-state       (  $/soc@0/pinctrl@f100000/lt9611-rst-state       0  $/soc@0/pinctrl@f100000/wcd-reset-n-active-state       %  $/soc@0/pinctrl@f100000/wlan-en-state            $/soc@0/iommu@15000000         %  $/soc@0/interrupt-controller@17100000          J  $/soc@0/interrupt-controller@17100000/ppi-partitions/interrupt-partition-0         J  % /soc@0/interrupt-controller@17100000/ppi-partitions/interrupt-partition-1         J  %/soc@0/interrupt-controller@17100000/ppi-partitions/interrupt-partition-2         J  %/soc@0/interrupt-controller@17100000/ppi-partitions/interrupt-partition-3         =  %'/soc@0/interrupt-controller@17100000/msi-controller@17140000            %//soc@0/rsc@17a00000         %8/soc@0/rsc@17a00000/bcm-voter         %  %G/soc@0/rsc@17a00000/clock-controller          %  %N/soc@0/rsc@17a00000/power-controller          /  %U/soc@0/rsc@17a00000/power-controller/opp-table        6  %f/soc@0/rsc@17a00000/power-controller/opp-table/opp-16         6  %u/soc@0/rsc@17a00000/power-controller/opp-table/opp-48         6  %/soc@0/rsc@17a00000/power-controller/opp-table/opp-52         6  %/soc@0/rsc@17a00000/power-controller/opp-table/opp-56         6  %/soc@0/rsc@17a00000/power-controller/opp-table/opp-60         6  %/soc@0/rsc@17a00000/power-controller/opp-table/opp-64         6  %/soc@0/rsc@17a00000/power-controller/opp-table/opp-80         7  %/soc@0/rsc@17a00000/power-controller/opp-table/opp-128        7  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-144        7  &/soc@0/rsc@17a00000/power-controller/opp-table/opp-192        7  &&/soc@0/rsc@17a00000/power-controller/opp-table/opp-256        7  &5/soc@0/rsc@17a00000/power-controller/opp-table/opp-320        7  &G/soc@0/rsc@17a00000/power-controller/opp-table/opp-336        7  &Y/soc@0/rsc@17a00000/power-controller/opp-table/opp-384        7  &j/soc@0/rsc@17a00000/power-controller/opp-table/opp-416        &  &~/soc@0/rsc@17a00000/regulators-0/bob1         &  &/soc@0/rsc@17a00000/regulators-0/bob2         &  &/soc@0/rsc@17a00000/regulators-0/ldo1         &  &/soc@0/rsc@17a00000/regulators-0/ldo2         &  &/soc@0/rsc@17a00000/regulators-0/ldo5         &  &/soc@0/rsc@17a00000/regulators-0/ldo6         &  &/soc@0/rsc@17a00000/regulators-0/ldo7         &  &/soc@0/rsc@17a00000/regulators-0/ldo8         &  &/soc@0/rsc@17a00000/regulators-0/ldo9         '  &/soc@0/rsc@17a00000/regulators-0/ldo11        '  &/soc@0/rsc@17a00000/regulators-0/ldo12        '  '	/soc@0/rsc@17a00000/regulators-0/ldo13        '  '/soc@0/rsc@17a00000/regulators-0/ldo14        '  '%/soc@0/rsc@17a00000/regulators-0/ldo15        '  '3/soc@0/rsc@17a00000/regulators-0/ldo16        '  'A/soc@0/rsc@17a00000/regulators-0/ldo17        &  'O/soc@0/rsc@17a00000/regulators-1/ldo3         &  '\/soc@0/rsc@17a00000/regulators-2/ldo1         '  'j/soc@0/rsc@17a00000/regulators-3/smps4        '  'x/soc@0/rsc@17a00000/regulators-3/smps5        &  '/soc@0/rsc@17a00000/regulators-3/ldo1         &  '/soc@0/rsc@17a00000/regulators-3/ldo2         &  '/soc@0/rsc@17a00000/regulators-3/ldo3         '  '/soc@0/rsc@17a00000/regulators-4/smps4        &  '/soc@0/rsc@17a00000/regulators-4/ldo1         &  '/soc@0/rsc@17a00000/regulators-4/ldo2         &  '/soc@0/rsc@17a00000/regulators-4/ldo3         '  '/soc@0/rsc@17a00000/regulators-5/smps1        '  '/soc@0/rsc@17a00000/regulators-5/smps2        '  ( /soc@0/rsc@17a00000/regulators-5/smps3        '  (/soc@0/rsc@17a00000/regulators-5/smps4        '  (/soc@0/rsc@17a00000/regulators-5/smps5        '  ()/soc@0/rsc@17a00000/regulators-5/smps6        &  (7/soc@0/rsc@17a00000/regulators-5/ldo1         &  (D/soc@0/rsc@17a00000/regulators-5/ldo3         &  (Q/soc@0/rsc@17a00000/regulators-6/ldo1         &  (`/soc@0/rsc@17a00000/regulators-6/ldo2         &  (o/soc@0/rsc@17a00000/regulators-6/ldo3         &  (|/soc@0/rsc@17a00000/regulators-6/ldo4         &  (/soc@0/rsc@17a00000/regulators-6/ldo5         &  (/soc@0/rsc@17a00000/regulators-6/ldo6         &  (/soc@0/rsc@17a00000/regulators-6/ldo7         &  (/soc@0/rsc@17a00000/regulators-7/ldo1         &  (/soc@0/rsc@17a00000/regulators-7/ldo2         &  (/soc@0/rsc@17a00000/regulators-7/ldo3         &  (/soc@0/rsc@17a00000/regulators-7/ldo4         &  (/soc@0/rsc@17a00000/regulators-7/ldo5         &  (/soc@0/rsc@17a00000/regulators-7/ldo6         &  (/soc@0/rsc@17a00000/regulators-7/ldo7           )/soc@0/cpufreq@17d91000         )/soc@0/pmu@24091000/opp-table           ),/soc@0/pmu@240b6400/opp-table           )@/soc@0/interconnect@24100000            )H/soc@0/interconnect@320c0000            )P/soc@0/remoteproc@32300000        2  )`/thermal-zones/cpu3-top-thermal/trips/trip-point0         2  )p/thermal-zones/cpu3-top-thermal/trips/trip-point1         3  )/thermal-zones/cpu3-top-thermal/trips/cpu-critical        5  )/thermal-zones/cpu3-bottom-thermal/trips/trip-point0          5  )/thermal-zones/cpu3-bottom-thermal/trips/trip-point1          6  )/thermal-zones/cpu3-bottom-thermal/trips/cpu-critical         2  )/thermal-zones/cpu4-top-thermal/trips/trip-point0         2  )/thermal-zones/cpu4-top-thermal/trips/trip-point1         3  )/thermal-zones/cpu4-top-thermal/trips/cpu-critical        5  )/thermal-zones/cpu4-bottom-thermal/trips/trip-point0          5  */thermal-zones/cpu4-bottom-thermal/trips/trip-point1          6  */thermal-zones/cpu4-bottom-thermal/trips/cpu-critical         2  **/thermal-zones/cpu5-top-thermal/trips/trip-point0         2  *:/thermal-zones/cpu5-top-thermal/trips/trip-point1         3  *J/thermal-zones/cpu5-top-thermal/trips/cpu-critical        5  *X/thermal-zones/cpu5-bottom-thermal/trips/trip-point0          5  *k/thermal-zones/cpu5-bottom-thermal/trips/trip-point1          6  *~/thermal-zones/cpu5-bottom-thermal/trips/cpu-critical         2  */thermal-zones/cpu6-top-thermal/trips/trip-point0         2  */thermal-zones/cpu6-top-thermal/trips/trip-point1         3  */thermal-zones/cpu6-top-thermal/trips/cpu-critical        5  */thermal-zones/cpu6-bottom-thermal/trips/trip-point0          5  */thermal-zones/cpu6-bottom-thermal/trips/trip-point1          6  */thermal-zones/cpu6-bottom-thermal/trips/cpu-critical         2  */thermal-zones/cpu7-top-thermal/trips/trip-point0         2  +/thermal-zones/cpu7-top-thermal/trips/trip-point1         3  +/thermal-zones/cpu7-top-thermal/trips/cpu-critical        5  +"/thermal-zones/cpu7-middle-thermal/trips/trip-point0          5  +5/thermal-zones/cpu7-middle-thermal/trips/trip-point1          6  +H/thermal-zones/cpu7-middle-thermal/trips/cpu-critical         5  +Y/thermal-zones/cpu7-bottom-thermal/trips/trip-point0          5  +l/thermal-zones/cpu7-bottom-thermal/trips/trip-point1          6  +/thermal-zones/cpu7-bottom-thermal/trips/cpu-critical         .  +/thermal-zones/cpu0-thermal/trips/trip-point0         .  +/thermal-zones/cpu0-thermal/trips/trip-point1         /  +/thermal-zones/cpu0-thermal/trips/cpu-critical        .  +/thermal-zones/cpu1-thermal/trips/trip-point0         .  +/thermal-zones/cpu1-thermal/trips/trip-point1         /  +/thermal-zones/cpu1-thermal/trips/cpu-critical        .  +/thermal-zones/cpu2-thermal/trips/trip-point0         .  +/thermal-zones/cpu2-thermal/trips/trip-point1         /  +/thermal-zones/cpu2-thermal/trips/cpu-critical        3  +/thermal-zones/cdsp0-thermal/trips/junction-config        3  ,/thermal-zones/cdsp1-thermal/trips/junction-config        3  ,"/thermal-zones/cdsp2-thermal/trips/junction-config        3  ,8/thermal-zones/cdsp3-thermal/trips/junction-config        -  ,N/thermal-zones/mem-thermal/trips/ddr0-config          3  ,Z/thermal-zones/modem0-thermal/trips/mdmss0-config0        3  ,i/thermal-zones/modem0-thermal/trips/mdmss0-config1        3  ,x/thermal-zones/modem1-thermal/trips/mdmss1-config0        3  ,/thermal-zones/modem1-thermal/trips/mdmss1-config1        3  ,/thermal-zones/modem2-thermal/trips/mdmss2-config0        3  ,/thermal-zones/modem2-thermal/trips/mdmss2-config1        3  ,/thermal-zones/modem3-thermal/trips/mdmss3-config0        3  ,/thermal-zones/modem3-thermal/trips/mdmss3-config1        1  ,/thermal-zones/gpuss-0-thermal/trips/trip-point0          1  ,/thermal-zones/gpuss-1-thermal/trips/trip-point0          1  ,/thermal-zones/gpuss-2-thermal/trips/trip-point0          1  ,/thermal-zones/gpuss-3-thermal/trips/trip-point0          1  -/thermal-zones/gpuss-4-thermal/trips/trip-point0          1  -/thermal-zones/gpuss-5-thermal/trips/trip-point0          1  -/thermal-zones/gpuss-6-thermal/trips/trip-point0          1  -&/thermal-zones/gpuss-7-thermal/trips/trip-point0            -2/audio-codec            -:/hdmi-out/port/endpoint       .  -M/pmic-glink/connector@0/ports/port@0/endpoint         .  -^/pmic-glink/connector@0/ports/port@1/endpoint         .  -o/pmic-glink/connector@0/ports/port@2/endpoint           -~/regulator-lt9611-1v2           -/regulator-lt9611-3v3           -/regulator-vph-pwr          -/regulator-vreg-bob-3v3         -/wcn7850-pmu/regulators/ldo0            -/wcn7850-pmu/regulators/ldo1            -/wcn7850-pmu/regulators/ldo2            -/wcn7850-pmu/regulators/ldo3            -/wcn7850-pmu/regulators/ldo4            ./wcn7850-pmu/regulators/ldo5            ./wcn7850-pmu/regulators/ldo6            .'/wcn7850-pmu/regulators/ldo7            .8/wcn7850-pmu/regulators/ldo8            .J/wcn7850-pmu/regulators/ldo9             	interrupt-parent #address-cells #size-cells model compatible chassis-type stdout-path #clock-cells clock-frequency phandle clocks clock-mult clock-div device_type reg enable-method next-level-cache power-domains power-domain-names qcom,freq-domain capacity-dmips-mhz dynamic-power-coefficient #cooling-cells cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop qcom,dload-mode interconnects #interconnect-cells qcom,bcm-voters opp-hz required-opps interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks qcom,client-id qcom,vmid qcom,smem interrupts-extended mboxes qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells dma-ranges #reset-cells #mbox-cells #dma-cells dma-channels dma-channel-mask iommus dma-coherent status clock-names pinctrl-names pinctrl-0 interconnect-names dmas dma-names operating-points-v2 vddrfacmn-supply vddaon-supply vddwlcx-supply vddwlmx-supply vddrfa0p8-supply vddrfa1p2-supply vddrfa1p8-supply max-speed vcc-supply mode-switch orientation-switch remote-endpoint reset-gpios vdd-supply reg-names bus-range linux,pci-domain num-lanes interrupt-names interrupt-map-mask interrupt-map msi-map iommu-map resets reset-names phys phy-names wake-gpios perst-gpios opp-peak-kBps opp-level vddpcie0p9-supply vddpcie1p8-supply assigned-clocks assigned-clock-rates clock-output-names #phy-cells vdda-phy-supply vdda-pll-supply vdda-qref-supply qcom,ee qcom,num-ees num-channels qcom,controlled-remotely lanes-per-direction qcom,ice vcc-max-microamp vccq-supply vccq-max-microamp vdd-hba-supply #hwlock-cells qcom,gmu memory-region firmware-name qcom,qmp #iommu-cells #global-interrupts qcom,smem-states qcom,smem-state-names qcom,gsi-loader label qcom,glink-channels qcom,non-secure-domain qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain qcom,din-ports qcom,dout-ports qcom,ports-sinterval qcom,ports-offset1 qcom,ports-offset2 qcom,ports-hstart qcom,ports-hstop qcom,ports-word-length qcom,ports-block-pack-mode qcom,ports-block-group-count qcom,ports-lane-control qcom,rx-port-mapping powerdown-gpios vdd-1p8-supply vdd-io-supply sound-name-prefix qcom,port-mapping qcom,ports-sinterval-low qcom,tx-port-mapping gpio-controller #gpio-cells gpio-ranges pins function drive-strength slew-rate bias-disable bias-bus-hold output-high input-enable output-low qcom,dll-config qcom,ddr-config bus-width max-sd-hs-hz sdhci-caps-mask cd-gpios pinctrl-1 vmmc-supply vqmmc-supply no-sdio no-mmc assigned-clock-parents data-lanes vdda-supply vdds-supply vdda12-supply snps,hird-threshold snps,usb2-gadget-lpm-disable snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,is-utmi-l1-suspend snps,usb3_lpm_capable snps,usb2-lpm-disable snps,has-lpm-erratum tx-fifo-resize usb-role-switch qcom,pdc-ranges #qcom,sensors #thermal-sensor-cells qcom,channel qcom,bus-id output-disable bias-pull-up power-source #pwm-cells color default-state vdd18-supply vdd3-supply linux,code bits input-disable output-enable wakeup-parent gpio-reserved-ranges bias-pull-down #redistributor-regions redistributor-stride affinity msi-controller #msi-cells frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config vdd-bob1-supply vdd-bob2-supply vdd-l1-l4-l10-supply vdd-l2-l13-l14-supply vdd-l3-supply vdd-l5-l16-supply vdd-l6-l7-supply vdd-l8-l9-supply vdd-l11-supply vdd-l12-supply vdd-l15-supply vdd-l17-supply qcom,pmic-id regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes vdd-l1-supply vdd-l2-supply vdd-s4-supply vdd-s5-supply vdd-s1-supply vdd-s2-supply vdd-s3-supply vdd-s6-supply vdd-l1-l2-supply vdd-l3-l4-supply vdd-l5-supply vdd-l6-supply vdd-l7-supply #freq-domain-cells thermal-sensors temperature hysteresis polling-delay-passive trip cooling-device nvmem-cells nvmem-cell-names mode-recovery mode-bootloader serial0 serial1 qcom,micbias1-microvolt qcom,micbias2-microvolt qcom,micbias3-microvolt qcom,micbias4-microvolt qcom,mbhc-buttons-vthreshold-microvolt qcom,mbhc-headset-vthreshold-microvolt qcom,mbhc-headphone-vthreshold-microvolt qcom,rx-device qcom,tx-device vdd-buck-supply vdd-rxtx-supply vdd-mic-bias-supply debounce-interval linux,can-disable wakeup-source linux,default-trigger panic-indicator orientation-gpios power-role data-role vin-supply gpio enable-active-high regulator-always-on regulator-boot-on audio-routing link-name sound-dai wlan-enable-gpios bt-enable-gpios vddio-supply vdddig-supply xo_board sleep_clk bi_tcxo_div2 bi_tcxo_ao_div2 cpu0 l2_0 l3_0 cpu1 l2_100 cpu2 l2_200 cpu3 l2_300 cpu4 l2_400 cpu5 l2_500 cpu6 l2_600 cpu7 l2_700 little_cpu_sleep_0 big_cpu_sleep_0 prime_cpu_sleep_0 cluster_sleep_0 cluster_sleep_1 scm clk_virt mc_virt qup_opp_table_100mhz qup_opp_table_120mhz qup_opp_table_125mhz cpu_pd0 cpu_pd1 cpu_pd2 cpu_pd3 cpu_pd4 cpu_pd5 cpu_pd6 cpu_pd7 cluster_pd reserved_memory hyp_mem cpusys_vm_mem hyp_tags_mem xbl_sc_mem hyp_tags_reserved_mem xbl_dt_log_merged_mem aop_cmd_db_mem aop_config_merged_mem adsp_mhi_mem global_sync_mem tz_stat_mem cdsp_secure_heap_mem mpss_mem q6_mpss_dtb_mem ipa_fw_mem ipa_gsi_mem gpu_micro_code_mem spss_region_mem spu_tz_shared_mem spu_modem_shared_mem camera_mem video_mem cvp_mem cdsp_mem q6_cdsp_dtb_mem q6_adsp_dtb_mem adspslpi_mem rmtfs_mem mpss_dsm_mem tz_reserved_mem cpucp_fw_mem qtee_mem ta_mem tz_tags_mem hwfence_shbuf trust_ui_vm_mem trust_ui_vm_dump trust_ui_vm_qrtr trust_ui_vm_vblk0_ring trust_ui_vm_vblk1_ring trust_ui_vm_swiotlb oem_vm_mem oem_vm_vblk0_ring oem_vm_swiotlb hyp_ext_tags_mem hyp_ext_reserved_mem smp2p_adsp_out smp2p_adsp_in smp2p_cdsp_out smp2p_cdsp_in smp2p_modem_out smp2p_modem_in ipa_smp2p_out ipa_smp2p_in soc gcc ipcc gpi_dma2 qupv3_id_1 i2c8 spi8 i2c9 spi9 i2c10 spi10 i2c11 spi11 i2c12 spi12 i2c13 spi13 uart14 i2c15 spi15 i2c_master_hub_0 i2c_hub_0 i2c_hub_1 i2c_hub_2 fsa4480_sbu_mux i2c_hub_3 i2c_hub_4 i2c_hub_5 i2c_hub_6 i2c_hub_7 i2c_hub_8 i2c_hub_9 gpi_dma1 qupv3_id_0 i2c0 lt9611_codec lt9611_a lt9611_out spi0 i2c1 spi1 i2c2 spi2 i2c3 spi3 i2c4 spi4 i2c5 spi5 i2c6 spi6 uart7 cnoc_main config_noc system_noc pcie_noc aggre1_noc aggre2_noc mmss_noc rng pcie0 pcie0_opp_table pcieport0 pcie0_phy pcie1 pcie1_opp_table pcie1_phy cryptobam crypto ufs_mem_phy ufs_mem_hc ufs_opp_table tcsr_mutex tcsr gpu gpu_zap_shader gpu_opp_table gmu_opp_table gpucc adreno_smmu ipa remoteproc_mpss remoteproc_adsp remoteproc_adsp_glink q6apm q6apmdai q6apmbedai q6prm q6prmcc lpass_wsa2macro swr3 lpass_rxmacro swr1 wcd_rx lpass_txmacro lpass_wsamacro swr0 north_spkr south_spkr swr2 wcd_tx lpass_vamacro lpass_tlmm tx_swr_active rx_swr_active dmic01_default dmic23_default wsa_swr_active wsa2_swr_active spkr_1_sd_n_active spkr_2_sd_n_active lpass_lpiaon_noc lpass_lpicx_noc lpass_ag_noc sdhc_2 sdhc2_opp_table iris iris_opp_table videocc cci0 cci0_i2c0 cci0_i2c1 cci1 cci1_i2c0 cci2 cci2_i2c0 cci2_i2c1 camss camcc mdss mdss_mdp dpu_intf1_out dpu_intf2_out dpu_intf0_out mdp_opp_table mdss_dp0 mdss_dp0_in mdss_dp0_out mdss_dsi0 mdss_dsi0_in mdss_dsi0_out mdss_dsi_opp_table mdss_dsi0_phy mdss_dsi1 mdss_dsi1_in mdss_dsi1_out mdss_dsi1_phy dispcc usb_1_hsphy usb_dp_qmpphy usb_dp_qmpphy_out usb_dp_qmpphy_usb_ss_in usb_dp_qmpphy_dp_in usb_1 usb_1_dwc3_hs usb_1_dwc3_ss pdc tsens0 tsens1 tsens2 aoss_qmp spmi_bus pm8010_m pm8010_m_temp_alarm pm8010_n pm8010_n_temp_alarm pm8550 pm8550_temp_alarm pm8550_gpios sdc2_card_det_n volume_up_n pm8550_flash pm8550_pwm pm8550b pm8550b_temp_alarm pm8550b_gpios pm8550b_eusb2_repeater pm8550ve pm8550ve_temp_alarm pm8550ve_gpios pm8550vs_c pm8550vs_c_temp_alarm pm8550vs_c_gpios pm8550vs_d pm8550vs_d_temp_alarm pm8550vs_d_gpios pm8550vs_e pm8550vs_e_temp_alarm pm8550vs_e_gpios pm8550vs_g pm8550vs_g_temp_alarm pm8550vs_g_gpios pmk8550 pmk8550_pon pon_pwrkey pon_resin pmk8550_rtc pmk8550_sdam_2 reboot_reason pmk8550_gpios pmk8550_sleep_clk pmr735d_k pmr735d_k_temp_alarm pmr735d_k_gpios cam0_default cam0_sleep cam1_default cam1_sleep cam2_default cam2_sleep cam3_default cam3_sleep cam4_default cam4_sleep cam5_default cam5_sleep cam6_default cam6_sleep cam7_default cam7_sleep cci0_0_default cci0_0_sleep cci0_1_default cci0_1_sleep cci1_0_default cci1_0_sleep cci2_0_default cci2_0_sleep cci2_1_default cci2_1_sleep hub_i2c0_data_clk hub_i2c1_data_clk hub_i2c2_data_clk hub_i2c3_data_clk hub_i2c4_data_clk hub_i2c5_data_clk hub_i2c6_data_clk hub_i2c7_data_clk hub_i2c8_data_clk hub_i2c9_data_clk pcie0_default_state pcie1_default_state qup_i2c0_data_clk qup_i2c1_data_clk qup_i2c2_data_clk qup_i2c3_data_clk qup_i2c4_data_clk qup_i2c5_data_clk qup_i2c6_data_clk qup_i2c8_data_clk qup_i2c9_data_clk qup_i2c10_data_clk qup_i2c11_data_clk qup_i2c12_data_clk qup_i2c13_data_clk qup_i2c15_data_clk qup_spi0_cs qup_spi0_data_clk qup_spi1_cs qup_spi1_data_clk qup_spi2_cs qup_spi2_data_clk qup_spi3_cs qup_spi3_data_clk qup_spi4_cs qup_spi4_data_clk qup_spi5_cs qup_spi5_data_clk qup_spi6_cs qup_spi6_data_clk qup_spi8_cs qup_spi8_data_clk qup_spi9_cs qup_spi9_data_clk qup_spi10_cs qup_spi10_data_clk qup_spi11_cs qup_spi11_data_clk qup_spi12_cs qup_spi12_data_clk qup_spi13_cs qup_spi13_data_clk qup_spi15_cs qup_spi15_data_clk qup_uart7_default qup_uart14_default qup_uart14_cts_rts sdc2_sleep sdc2_default bt_default lt9611_irq_pin lt9611_rst_pin wcd_default wlan_en apps_smmu intc ppi_cluster0 ppi_cluster1 ppi_cluster2 ppi_cluster3 gic_its apps_rsc apps_bcm_voter rpmhcc rpmhpd rpmhpd_opp_table rpmhpd_opp_ret rpmhpd_opp_min_svs rpmhpd_opp_low_svs_d2 rpmhpd_opp_low_svs_d1 rpmhpd_opp_low_svs_d0 rpmhpd_opp_low_svs rpmhpd_opp_low_svs_l1 rpmhpd_opp_svs rpmhpd_opp_svs_l0 rpmhpd_opp_svs_l1 rpmhpd_opp_nom rpmhpd_opp_nom_l1 rpmhpd_opp_nom_l2 rpmhpd_opp_turbo rpmhpd_opp_turbo_l1 vreg_bob1 vreg_bob2 vreg_l1b_1p8 vreg_l2b_3p0 vreg_l5b_3p1 vreg_l6b_1p8 vreg_l7b_1p8 vreg_l8b_1p8 vreg_l9b_2p9 vreg_l11b_1p2 vreg_l12b_1p8 vreg_l13b_3p0 vreg_l14b_3p2 vreg_l15b_1p8 vreg_l16b_2p8 vreg_l17b_2p5 vreg_l3c_0p9 vreg_l1d_0p88 vreg_s4e_0p95 vreg_s5e_1p08 vreg_l1e_0p88 vreg_l2e_0p9 vreg_l3e_1p2 vreg_s4f_0p5 vreg_l1f_0p9 vreg_l2f_0p88 vreg_l3f_0p88 vreg_s1g_1p25 vreg_s2g_0p85 vreg_s3g_0p8 vreg_s4g_1p25 vreg_s5g_0p85 vreg_s6g_1p86 vreg_l1g_1p2 vreg_l3g_1p2 vreg_l1m_1p056 vreg_l2m_1p056 vreg_l3m_2p8 vreg_l4m_2p8 vreg_l5m_1p8 vreg_l6m_1p8 vreg_l7m_2p9 vreg_l1n_1p1 vreg_l2n_1p1 vreg_l3n_2p8 vreg_l4n_2p8 vreg_l5n_1p8 vreg_l6n_3p3 vreg_l7n_2p96 cpufreq_hw llcc_bwmon_opp_table cpu_bwmon_opp_table gem_noc nsp_noc remoteproc_cdsp cpu3_top_alert0 cpu3_top_alert1 cpu3_top_crit cpu3_bottom_alert0 cpu3_bottom_alert1 cpu3_bottom_crit cpu4_top_alert0 cpu4_top_alert1 cpu4_top_crit cpu4_bottom_alert0 cpu4_bottom_alert1 cpu4_bottom_crit cpu5_top_alert0 cpu5_top_alert1 cpu5_top_crit cpu5_bottom_alert0 cpu5_bottom_alert1 cpu5_bottom_crit cpu6_top_alert0 cpu6_top_alert1 cpu6_top_crit cpu6_bottom_alert0 cpu6_bottom_alert1 cpu6_bottom_crit cpu7_top_alert0 cpu7_top_alert1 cpu7_top_crit cpu7_middle_alert0 cpu7_middle_alert1 cpu7_middle_crit cpu7_bottom_alert0 cpu7_bottom_alert1 cpu7_bottom_crit cpu0_alert0 cpu0_alert1 cpu0_crit cpu1_alert0 cpu1_alert1 cpu1_crit cpu2_alert0 cpu2_alert1 cpu2_crit cdsp0_junction_config cdsp1_junction_config cdsp2_junction_config cdsp3_junction_config ddr_config0 mdmss0_config0 mdmss0_config1 mdmss1_config0 mdmss1_config1 mdmss2_config0 mdmss2_config1 mdmss3_config0 mdmss3_config1 gpu0_alert0 gpu1_alert0 gpu2_alert0 gpu3_alert0 gpu4_alert0 gpu5_alert0 gpu6_alert0 gpu7_alert0 wcd938x hdmi_connector_out pmic_glink_hs_in pmic_glink_ss_in pmic_glink_sbu lt9611_1v2 lt9611_3v3 vph_pwr vreg_bob_3v3 vreg_pmu_rfa_cmn vreg_pmu_aon_0p59 vreg_pmu_wlcx_0p8 vreg_pmu_wlmx_0p85 vreg_pmu_btcmx_0p85 vreg_pmu_rfa_0p8 vreg_pmu_rfa_1p2 vreg_pmu_rfa_1p8 vreg_pmu_pcie_0p9 vreg_pmu_pcie_1p8 clock-lanes afvdd-supply avdd-supply dovdd-supply dvdd-supply link-frequencies led-sources led-max-microamp flash-max-microamp flash-max-timeout-us function-enumerator 