    8 |   (             {                                                                   )   ,Qualcomm Technologies, Inc. QCS8300 Ride             2qcom,qcs8300-ride qcom,qcs8300        	   =embedded       clocks     xo-board-clk             2fixed-clock          J             WI          g  R      sleep-clk            2fixed-clock          J             W  }          g   5         cpus                                 cpu@0            ocpu          2arm,cortex-a78c          {                 psci                                     psci                                                            (                                          g      l2-cache             2cache                       +            	         g            cpu@100          ocpu          2arm,cortex-a78c          {                psci                
                     psci                                                            (                                          g      l2-cache             2cache                       +            	         g   
         cpu@200          ocpu          2arm,cortex-a78c          {                psci                                     psci                                                           (                                          g      l2-cache             2cache                       +            	         g            cpu@300          ocpu          2arm,cortex-a78c          {                psci                                     psci                                                           (                                          g      l2-cache             2cache                       +            	         g            cpu@10000            ocpu          2arm,cortex-a55           {                psci                                     psci                            d                                 (                                          g       l2-cache             2cache                       +                     g            cpu@10100            ocpu          2arm,cortex-a55           {               psci                                     psci                            d                                 (                                          g   !   l2-cache             2cache                       +                     g            cpu@10200            ocpu          2arm,cortex-a55           {               psci                                     psci                            d                                 (                                          g   "   l2-cache             2cache                       +                     g            cpu@10300            ocpu          2arm,cortex-a55           {               psci                                     psci                            d                                 (                                          g   #   l2-cache             2cache                       +                     g            cpu-map    cluster0       core0           9         core1           9         core2           9         core3           9            cluster1       core0           9          core1           9   !      core2           9   "      core3           9   #            l3-cache-0           2cache                       +         g   	      l3-cache-1           2cache                       +         g         idle-states         =psci       cpu-sleep-0-0            2arm,idle-state          Jsilver-power-collapse           Z@          q            !          &                  g   ,      cpu-sleep-0-1            2arm,idle-state          Jsilver-rail-power-collapse          Z@          q  Z                                      g   -      cpu-sleep-1-0            2arm,idle-state          Jgold-power-collapse         Z@          q  %                                      g   )      cpu-sleep-1-1            2arm,idle-state          Jgold-rail-power-collapse            Z@          q            %                            g   *         domain-idle-states     cluster-sleep-0          2domain-idle-state           ZA  D        q  	                              g   0      cluster-sleep-1          2domain-idle-state           ZA  D        q  
                             g   /      domain-sleep             2domain-idle-state           ZB D        q                      '         g   1            opp-table-cpu0           2operating-points-v2                   g      opp-902400000               5Ɉ          )         opp-1017600000              <X          >         opp-1190400000              F          hL         opp-1267200000              K                  opp-1344000000              P                   opp-1420800000              T           2       opp-1497600000              YC           X        opp-1574400000              ]p                  opp-1670400000              cH           `       opp-1747200000              h$(           `       opp-1824000000              l                  opp-1900800000              qK                  opp-1977600000              u           `       opp-2054400000              zs           `       opp-2112000000              }                     opp-table-cpu2           2operating-points-v2                   g      opp-940800000               8x          )         opp-1094400000              A;8          >         opp-1267200000              K          hL         opp-1344000000              P                  opp-1420800000              T                  opp-1497600000              YC                   opp-1574400000              ]p           2       opp-1632000000              aFX           X        opp-1708800000              e8                  opp-1804800000              k                  opp-1900800000              qK                  opp-1977600000              u           `       opp-2054400000              zs                  opp-2131200000                         `       opp-2208000000              h           `       opp-2284800000              /H                  opp-2361600000              (                     opp-table-cpu4           2operating-points-v2                   g      opp-844800000               2Z          )         opp-1113600000              B`0          hL         opp-1209600000              H                  opp-1305600000              M                   opp-1382400000              Re           2       opp-1459200000              V           X        opp-1497600000              YC                  opp-1574400000              ]p                  opp-1651200000              bkP                  opp-1728000000              f0           `       opp-1804800000              k                  opp-1881600000              p&           `       opp-1958400000              t                     dummy-sink           2arm,coresight-dummy-sink       in-ports       port       endpoint               $         g                  firmware       scm          2qcom,scm-qcs8300 qcom,scm              % 0          memory@80000000          omemory           {                     interconnect-0           2qcom,qcs8300-clk-virt                         &         g   9      interconnect-1           2qcom,qcs8300-mc-virt                          &         g         opp-table-qup            2operating-points-v2          g   A   opp-120000000               '            '         pmu-a55          2arm,cortex-a55-pmu          &               pmu-a78          2arm,cortex-a78-pmu          &               psci             2arm,psci-1.0             smc    power-domain-cpu0           1                (        E   )   *         g         power-domain-cpu1           1                (        E   )   *         g         power-domain-cpu2           1                (        E   )   *         g         power-domain-cpu3           1                (        E   )   *         g         power-domain-cpu4           1                +        E   ,   -         g         power-domain-cpu5           1                +        E   ,   -         g         power-domain-cpu6           1                +        E   ,   -         g         power-domain-cpu7           1                +        E   ,   -         g         power-domain-cluster0           1                .        E   /         g   (      power-domain-cluster1           1                .        E   0         g   +      power-domain-system         1            E   1         g   .         reserved-memory                                   X   aop-image-region@90800000            {                      _      aop-cmd-db-region@90860000           2qcom,cmd-db          {                      _      smem@90900000         
   2qcom,smem            {                       _        f   2         lpass-machine-learning-region@93b00000           {                      _      adsp-rpc-remote-heap-region@94a00000             {                      _         g         camera-region@95200000           {            P           _      adsp-region@95c00000             _         {                     g         q6-adsp-dtb-region@97a00000          {                      _      q6-gpdsp-dtb-region@97a80000             {                      _      gpdsp-region@97b00000            {                     _         g  V      q6-cdsp-dtb-region@99900000          {                      _      cdsp-region@99980000             {                     _         g  _      gpu-microcode-region@9b780000            {    x                   _         g  B      cvp-region@9b782000          {    x       p           _      video-region@9be82000            {           p           _         g  M         smp2p-adsp           2qcom,smp2p          n   3                    3                                            slave-kernel            slave-kernel                                 g         master-kernel           master-kernel                       g            smp2p-cdsp           2qcom,smp2p          n   3                    3                 ^                            slave-kernel            slave-kernel                                 g  ]      master-kernel           master-kernel                       g  `         smp2p-gpdsp          2qcom,smp2p          n   3                    3                i  h                          slave-kernel            slave-kernel                                 g  T      master-kernel           master-kernel                       g  W         soc@0            2simple-bus          X                                                   clock-controller@100000          2qcom,qcs8300-gcc             {            p         J                      1         ,     4       5                                         g   7      mailbox@408000           2qcom,qcs8300-ipcc qcom,ipcc          {     @                &                                                  g   3      efuse@784000              2qcom,qcs8300-qfprom qcom,qfprom          {     x@       $                            gpu_speed_bin@240c           {  $                           g  A         dma-controller@900000         )   2qcom,qcs8300-gpi-dma qcom,sm6350-gpi-dma             {                      $           &                                                                                                                                /   6              6           C           T      	  adisabled             g   >      geniqup@9c0000           2qcom,geni-se-qup             {                        X           7      7           hm-ahb s-ahb                                  /   6               T        aokay       i2c@980000           2qcom,geni-i2c            {             @            7   _        hse          t   8        ~default         &      &                                   H     9          9                  :   -      ;                       qup-core qup-config qup-memory              <               =            >              >                  tx rx         	  adisabled          spi@980000           2qcom,geni-spi            {             @            7   _        hse          t   ?   @        ~default         &      &                                   0     9          9                  :   -           qup-core qup-config             <                A            >              >                  tx rx         	  adisabled          serial@980000            2qcom,geni-uart           {             @            7   _        hse          t   B   C   D   E        ~default         &      &         0     9          9                  :   -           qup-core qup-config             <                A      	  adisabled          i2c@984000           2qcom,geni-i2c            {     @       @            7   a        hse          t   F        ~default         &      '                                   H     9          9                  :   -      ;                       qup-core qup-config qup-memory              <               =            >             >                 tx rx         	  adisabled          spi@984000           2qcom,geni-spi            {     @       @            7   a        hse          t   G   H        ~default         &      '                                   0     9          9                  :   -           qup-core qup-config             <                A            >             >                 tx rx         	  adisabled          serial@984000            2qcom,geni-uart           {     @       @            7   a        hse          t   I   J   K   L        ~default         &      '         0     9          9                  :   -           qup-core qup-config             <                A      	  adisabled          i2c@988000           2qcom,geni-i2c            {            @            7   c        hse          t   M        ~default         &                                         H     9          9                  :   -      ;                       qup-core qup-config qup-memory              <               =            >             >                 tx rx         	  adisabled          spi@988000           2qcom,geni-spi            {            @            7   c        hse          t   N   O        ~default         &                                         0     9          9                  :   -           qup-core qup-config             <                A            >             >                 tx rx         	  adisabled          serial@988000            2qcom,geni-uart           {            @            7   c        hse          t   P   Q   R   S        ~default         &               0     9          9                  :   -           qup-core qup-config             <                A      	  adisabled          i2c@98c000           2qcom,geni-i2c            {            @            7   e        hse          t   T        ~default         &                                         H     9          9                  :   -      ;                       qup-core qup-config qup-memory              <               =            >             >                 tx rx         	  adisabled          spi@98c000           2qcom,geni-spi            {            @            7   e        hse          t   U   V        ~default         &                                         0     9          9                  :   -           qup-core qup-config             <                A            >             >                 tx rx         	  adisabled          serial@98c000            2qcom,geni-uart           {            @            7   e        hse          t   W   X   Y   Z        ~default         &               0     9          9                  :   -           qup-core qup-config             <                A      	  adisabled          i2c@990000           2qcom,geni-i2c            {             @            7   g        hse          t   [        ~default         &                                         H     9          9                  :   -      ;                       qup-core qup-config qup-memory              <               =            >             >                 tx rx         	  adisabled          spi@990000           2qcom,geni-spi            {             @            7   g        hse          t   \   ]        ~default         &                                         0     9          9                  :   -           qup-core qup-config             <                A            >             >                 tx rx         	  adisabled          serial@990000            2qcom,geni-uart           {             @            7   g        hse          t   ^   _   `   a        ~default         &               0     9          9                  :   -           qup-core qup-config             <                A      	  adisabled          i2c@994000           2qcom,geni-i2c            {     @       @            7   i        hse          t   b        ~default         &                                         H     9          9                  :   -      ;                       qup-core qup-config qup-memory              <               =            >             >                 tx rx         	  adisabled          spi@994000           2qcom,geni-spi            {     @       @            7   i        hse          t   c   d        ~default         &                                         0     9          9                  :   -           qup-core qup-config             <                A            >             >                 tx rx         	  adisabled          serial@994000            2qcom,geni-uart           {     @       @            7   i        hse          t   e   f   g   h        ~default         &               0     9          9                  :   -           qup-core qup-config             <                A      	  adisabled          i2c@998000           2qcom,geni-i2c            {            @            7   k        hse          t   i        ~default         &                                         H     9          9                  :   -      ;                       qup-core qup-config qup-memory              <               =            >             >                 tx rx         	  adisabled          spi@998000           2qcom,geni-spi            {            @            7   k        hse          t   j   k        ~default         &                                         0     9          9                  :   -           qup-core qup-config             <                A            >             >                 tx rx         	  adisabled          serial@998000            2qcom,geni-uart           {            @            7   k        hse          t   l   m   n   o        ~default         &               0     9          9                  :   -           qup-core qup-config             <                A      	  adisabled          serial@99c000            2qcom,geni-debug-uart             {            @            7   m        hse          t   p   q        ~default         &       ~         0     9          9                  :   -           qup-core qup-config             <                A        aokay             dma-controller@a00000         )   2qcom,qcs8300-gpi-dma qcom,sm6350-gpi-dma             {                      $           &                                                            %         &         '         (         )         *           /   6  V            6           C           T      	  adisabled             g   s      geniqup@ac0000           2qcom,geni-se-qup             {                        X           7      7           hm-ahb s-ahb                                  /   6  C             T      	  adisabled       i2c@a80000           2qcom,geni-i2c            {             @            7   q        hse          t   r        ~default         &      a                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s              s                  tx rx         	  adisabled          spi@a80000           2qcom,geni-spi            {             @            7   q        hse          t   t   u        ~default         &      a                                   0     9         9                  :   .           qup-core qup-config             <                A            s              s                  tx rx         	  adisabled          serial@a80000            2qcom,geni-uart           {             @            7   q        hse          t   v   w   x   y        ~default         &      a         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled          i2c@a84000           2qcom,geni-i2c            {     @       @            7   s        hse          t   z        ~default         &      b                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s             s                 tx rx         	  adisabled          spi@a84000           2qcom,geni-spi            {     @       @            7   s        hse          t   {   |        ~default         &      b                                   0     9         9                  :   .           qup-core qup-config             <                A            s             s                 tx rx         	  adisabled          serial@a84000            2qcom,geni-uart           {     @       @            7   s        hse          t   }   ~              ~default         &      b         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled          i2c@a88000           2qcom,geni-i2c            {            @            7   u        hse          t           ~default         &      c                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s             s                 tx rx         	  adisabled          spi@a88000           2qcom,geni-spi            {            @            7   u        hse          t              ~default         &      c                                   0     9         9                  :   .           qup-core qup-config             <                A            s             s                 tx rx         	  adisabled          serial@a88000            2qcom,geni-uart           {            @            7   u        hse          t                    ~default         &      c         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled          i2c@a8c000           2qcom,geni-i2c            {            @            7   w        hse          t           ~default         &      d                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s             s                 tx rx         	  adisabled          serial@a8c000            2qcom,geni-uart           {            @            7   w        hse          t              ~default         &      d         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled          i2c@a90000           2qcom,geni-i2c            {             @            7   y        hse          t           ~default         &      e                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s             s                 tx rx         	  adisabled          spi@a90000           2qcom,geni-spi            {             @            7   y        hse          t              ~default         &      e                                   0     9         9                  :   .           qup-core qup-config             <                A            s             s                 tx rx         	  adisabled          serial@a90000            2qcom,geni-uart           {             @            7   y        hse          t                    ~default         &      e         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled          i2c@a94000           2qcom,geni-i2c            {     @       @            7   {        hse          t           ~default         &      f                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s             s                 tx rx         	  adisabled          spi@a94000           2qcom,geni-spi            {     @       @            7   {        hse          t              ~default         &      f                                   0     9         9                  :   .           qup-core qup-config             <                A            s             s                 tx rx         	  adisabled          serial@a94000            2qcom,geni-uart           {     @       @            7   {        hse          t                    ~default         &      f         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled          i2c@a98000           2qcom,geni-i2c            {            @            7   }        hse          t           ~default         &      C                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s             s                 tx rx         	  adisabled          spi@a98000           2qcom,geni-spi            {            @            7   }        hse          t              ~default         &      C                                   0     9         9                  :   .           qup-core qup-config             <                A            s             s                 tx rx         	  adisabled          serial@a98000            2qcom,geni-uart           {            @            7   }        hse          t                    ~default         &      C         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled          i2c@a9c000           2qcom,geni-i2c            {            @            7           hse          t           ~default         &       }                                   H     9         9                  :   .      ;                       qup-core qup-config qup-memory              <               =            s             s                 tx rx         	  adisabled          spi@a9c000           2qcom,geni-spi            {            @            7           hse          t              ~default         &       }                                   0     9         9                  :   .           qup-core qup-config             <                A            s             s                 tx rx         	  adisabled          serial@a9c000            2qcom,geni-uart           {            @            7           hse          t                    ~default         &       }         0     9         9                  :   .           qup-core qup-config             <                A      	  adisabled             dma-controller@b00000         )   2qcom,qcs8300-gpi-dma qcom,sm6350-gpi-dma             {                      $         0  &      p         q                             /   6   V            6           C            T      	  adisabled             g         geniqup@bc0000           2qcom,geni-se-qup             {                        X           7      7           hm-ahb s-ahb                                  /   6   C             T      	  adisabled       i2c@b80000           2qcom,geni-i2c            {             @            7           hse          t           ~default         &      >                                   H     9         9                  :   /      ;                        qup-core qup-config qup-memory              <               =                                            tx rx         	  adisabled          spi@b80000           2qcom,geni-spi            {             @            7           hse          t              ~default         &      >                                   0     9         9                  :   /           qup-core qup-config             <                A                                            tx rx         	  adisabled          serial@b80000            2qcom,geni-uart           {             @            7           hse          t                    ~default         &      >         0     9         9                  :   /           qup-core qup-config             <                A      	  adisabled             rng@10d2000          2qcom,qcs8300-trng qcom,trng          {                   interconnect@14c0000             2qcom,qcs8300-config-noc          {    L       0                      &         g   :      interconnect@1680000             2qcom,qcs8300-system-noc          {    h       P                      &      interconnect@16c0000             2qcom,qcs8300-aggre1-noc          {    l       p                      &         g         interconnect@1700000             2qcom,qcs8300-aggre2-noc          {    p                             &         g   ;      interconnect@1760000             2qcom,qcs8300-pcie-anoc           {    v                              &      interconnect@1780000             2qcom,qcs8300-gpdsp-anoc          {    x        Ѐ                      &         g  U      interconnect@17a0000             2qcom,qcs8300-mmss-noc            {    z                               &         g  L      ufs@1d84000       ,   2qcom,qcs8300-ufshc qcom,ufshc jedec,ufs-2.0          {    @       0         &      	                      ufsphy                                   7           rst             7                      /   6                T      0                                :   7           ufs-ddr cpu-ufs       @     7      7      7      7      4       7      7      7         n  hcore_clk bus_aggr_clk iface_clk core_clk_unipro ref_clk tx_lane0_sync_clk rx_lane0_sync_clk rx_lane1_sync_clk         @  xh                 xh                                                    aokay                                                 #           / O         g         phy@1d87000       2   2qcom,qcs8300-qmp-ufs-phy qcom,sa8775p-qmp-ufs-phy            {    p                  4       7      7           href ref_aux qref                7                          ufsphy          A            aokay            L           \            g         dma-controller@1dc4000            2qcom,bam-v1.7.4 qcom,bam-v1.7.0          {    @               &                 $           l             t                              /   6         6            crypto@1d88000        <   2qcom,qcs8300-inline-crypto-engine qcom,inline-crypto-engine          {    ؀                  7            g         hwlock@1f40000           2qcom,tcsr-mutex          {                                 g   2      syscon@1fc0000           2qcom,qcs8300-tcsr syscon             {                      g   %      remoteproc@3000000        ,   2qcom,qcs8300-adsp-pas qcom,sa8775p-adsp-pas          {                    <  n                                                    #  wdog fatal ready handover stop-ack             4            hxo              <      <            lcx lmx                                              stop            aokay            qcom/qcs8300/adsp.mbn      glink-edge          n   3                     3               lpass                 fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           adsp                       +      %                             compute-cb@3             2qcom,fastrpc-compute-cb          {           /   6                T      compute-cb@4             2qcom,fastrpc-compute-cb          {           /   6                T      compute-cb@5             2qcom,fastrpc-compute-cb          {           /   6                T         gpr       	   2qcom,gpr          
  adsp_apps           6           B                                   service@1            2qcom,q6apm           {           O            `avs/audio msm/adsp/audio_pd    bedais           2qcom,q6apm-lpass-dais           O         dais             2qcom,q6apm-dais         /   6                service@2            2qcom,q6prm           {           `avs/audio msm/adsp/audio_pd    clock-controller             2qcom,q6prm-lpass-clocks          J                     interconnect@3c40000             2qcom,qcs8300-lpass-ag-noc            {           r                       &      stm@4002000           2arm,coresight-stm arm,primecell           {                  (                 wstm-base stm-stimulus-base                   	  hapb_pclk       out-ports      port       endpoint                        g                  tpda@4004000          "   2qcom,coresight-tpda arm,primecell            {     @                         	  hapb_pclk       in-ports                                 port@1           {      endpoint                        g               out-ports      port       endpoint                        g                  tpdm@400f000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                        g                  funnel@4041000        +   2arm,coresight-dynamic-funnel arm,primecell           {                             	  hapb_pclk       in-ports                                 port@6           {      endpoint                        g            port@7           {      endpoint                        g               out-ports      port       endpoint                        g                  funnel@4042000        +   2arm,coresight-dynamic-funnel arm,primecell           {                              	  hapb_pclk       in-ports                                 port@4           {      endpoint                        g  *         port@5           {      endpoint                        g            port@6           {      endpoint                        g            port@7           {      endpoint                        g               out-ports      port       endpoint                        g                  funnel@4045000        +   2arm,coresight-dynamic-funnel arm,primecell           {    P                         	  hapb_pclk       in-ports                                 port@0           {       endpoint                        g            port@1           {      endpoint                        g               out-ports      port       endpoint                        g                  tpdm@4841000          "   2qcom,coresight-tpdm arm,primecell            {                             	  hapb_pclk                               out-ports      port       endpoint                        g                  tpdm@4850000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk               @                                       out-ports      port       endpoint                        g                  tpdm@4860000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                        g                  tpda@4864000          "   2qcom,coresight-tpda arm,primecell            {    @                         	  hapb_pclk       in-ports                                 port@8           {      endpoint                        g               out-ports      port       endpoint                        g                  funnel@4865000        +   2arm,coresight-dynamic-funnel arm,primecell           {    P                         	  hapb_pclk       in-ports                                 port@0           {       endpoint                        g            port@4           {      endpoint                        g  	         port@6           {      endpoint                        g              out-ports      port       endpoint                        g                  tpdm@4980000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                        g                  funnel@4983000        +   2arm,coresight-dynamic-funnel arm,primecell           {    0                         	  hapb_pclk       in-ports       port       endpoint                        g               out-ports      port       endpoint                        g                  tpdm@4ac0000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                        g                  tpda@4ac4000          "   2qcom,coresight-tpda arm,primecell            {    @                         	  hapb_pclk       in-ports                                 port@1b          {      endpoint                        g               out-ports      port       endpoint                        g                  funnel@4ac5000        +   2arm,coresight-dynamic-funnel arm,primecell           {    P                         	  hapb_pclk       in-ports       port       endpoint                        g               out-ports      port       endpoint                        g                  tpdm@4ad0000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                        g                  tpda@4ad3000          "   2qcom,coresight-tpda arm,primecell            {    0                         	  hapb_pclk       in-ports                                 port@13          {      endpoint                        g            port@19          {      endpoint                        g            port@1a          {      endpoint                        g               out-ports      port       endpoint                        g                  funnel@4ad4000        +   2arm,coresight-dynamic-funnel arm,primecell           {    @                         	  hapb_pclk       in-ports                                 port@0           {       endpoint                        g            port@4           {      endpoint                        g              out-ports      port       endpoint                        g                  funnel@4b04000        +   2arm,coresight-dynamic-funnel arm,primecell           {    @                         	  hapb_pclk       in-ports                                 port@6           {      endpoint                        g            port@7           {      endpoint                        g               out-ports      port       endpoint                        g                  tmc@4b05000           2arm,coresight-tmc arm,primecell          {    P                         	  hapb_pclk       in-ports       port       endpoint                        g               out-ports      port       endpoint                        g                  replicator@4b06000        /   2arm,coresight-dynamic-replicator arm,primecell           {    `                         	  hapb_pclk       in-ports       port       endpoint                        g               out-ports                                port@1           {      endpoint                        g   $               tpda@4b08000          "   2qcom,coresight-tpda arm,primecell            {                             	  hapb_pclk       in-ports                                 port@0           {       endpoint                        g            port@1           {      endpoint                        g            port@2           {      endpoint                        g            port@3           {      endpoint                        g            port@4           {      endpoint                        g               out-ports      port       endpoint                        g                  tpdm@4b09000          "   2qcom,coresight-tpdm arm,primecell            {                             	  hapb_pclk               @               out-ports      port       endpoint                        g                  tpdm@4b0a000          "   2qcom,coresight-tpdm arm,primecell            {                             	  hapb_pclk               @               out-ports      port       endpoint                        g                  tpdm@4b0b000          "   2qcom,coresight-tpdm arm,primecell            {                             	  hapb_pclk               @               out-ports      port       endpoint                        g                  tpdm@4b0c000          "   2qcom,coresight-tpdm arm,primecell            {                             	  hapb_pclk               @               out-ports      port       endpoint                        g                  tpdm@4b0d000          "   2qcom,coresight-tpdm arm,primecell            {                             	  hapb_pclk                               out-ports      port       endpoint                        g                  cti@4b13000           2arm,coresight-cti arm,primecell          {    0                         	  hapb_pclk          tpdm@4b80000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                        g                  tpda@4b86000          "   2qcom,coresight-tpda arm,primecell            {    `                         	  hapb_pclk       in-ports       port       endpoint                        g               out-ports      port       endpoint                        g                  funnel@4b87000        +   2arm,coresight-dynamic-funnel arm,primecell           {    p                         	  hapb_pclk       in-ports       port       endpoint                        g               out-ports      port       endpoint                        g                 cti@4b8b000           2arm,coresight-cti arm,primecell          {                             	  hapb_pclk          tpdm@4c40000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                        g                  tpda@4c44000          "   2qcom,coresight-tpda arm,primecell            {    @                         	  hapb_pclk       in-ports                                 port@5           {      endpoint                        g            port@8           {      endpoint                        g               out-ports      port       endpoint                       g                 funnel@4c45000        +   2arm,coresight-dynamic-funnel arm,primecell           {    P                         	  hapb_pclk       in-ports                                 port@0           {       endpoint                       g           port@4           {      endpoint                       g               out-ports      port       endpoint                       g                  tpdm@4c50000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                       g                 tpda@4c54000          "   2qcom,coresight-tpda arm,primecell            {    @                         	  hapb_pclk       in-ports                                 port@8           {      endpoint                       g              out-ports      port       endpoint                       g                 funnel@4c55000        +   2arm,coresight-dynamic-funnel arm,primecell           {    P                         	  hapb_pclk       in-ports       port       endpoint                       g              out-ports      port       endpoint              	         g                  tpdm@4e00000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                                                       out-ports      port       endpoint              
         g                 tpda@4e03000          "   2qcom,coresight-tpda arm,primecell            {    0                         	  hapb_pclk       in-ports                                 port@0           {       endpoint                       g           port@1           {      endpoint                       g           port@4           {      endpoint                       g  
            out-ports      port       endpoint                       g                 funnel@4e04000        +   2arm,coresight-dynamic-funnel arm,primecell           {    @                         	  hapb_pclk       in-ports       port       endpoint                       g              out-ports      port       endpoint                       g                  tpdm@4e10000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                       g                 funnel@4e12000        +   2arm,coresight-dynamic-funnel arm,primecell           {                              	  hapb_pclk       in-ports       port       endpoint                       g              out-ports      port       endpoint                       g                 tpdm@4e20000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint                       g                 funnel@4e22000        +   2arm,coresight-dynamic-funnel arm,primecell           {                              	  hapb_pclk       in-ports       port       endpoint                       g              out-ports      port       endpoint                       g                 etm@6040000          2arm,primecell            {                     9                    	  hapb_pclk                         out-ports      port       endpoint                       g                 etm@6140000          2arm,primecell            {                     9                    	  hapb_pclk                         out-ports      port       endpoint                       g                  etm@6240000          2arm,primecell            {    $                 9                    	  hapb_pclk                         out-ports      port       endpoint                       g  !               etm@6340000          2arm,primecell            {    4                 9                    	  hapb_pclk                         out-ports      port       endpoint                       g  "               etm@6440000          2arm,primecell            {    D                 9                     	  hapb_pclk                         out-ports      port       endpoint                       g  #               etm@6540000          2arm,primecell            {    T                 9   !                 	  hapb_pclk                         out-ports      port       endpoint                       g  $               etm@6640000          2arm,primecell            {    d                 9   "                 	  hapb_pclk                         out-ports      port       endpoint                       g  %               etm@6740000          2arm,primecell            {    t                 9   #                 	  hapb_pclk                         out-ports      port       endpoint                       g  &               funnel@6800000        +   2arm,coresight-dynamic-funnel arm,primecell           {                              	  hapb_pclk       in-ports                                 port@0           {       endpoint                       g           port@1           {      endpoint                        g           port@2           {      endpoint              !         g           port@3           {      endpoint              "         g           port@4           {      endpoint              #         g           port@5           {      endpoint              $         g           port@6           {      endpoint              %         g           port@7           {      endpoint              &         g              out-ports      port       endpoint              '         g  (               funnel@6810000        +   2arm,coresight-dynamic-funnel arm,primecell           {                              	  hapb_pclk       in-ports                                 port@0           {       endpoint              (         g  '         port@3           {      endpoint              )         g  2            out-ports      port       endpoint              *         g                  cti@682b000           2arm,coresight-cti arm,primecell          {                             	  hapb_pclk          tpdm@6860000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk               @               out-ports      port       endpoint              +         g  0               tpdm@6861000          "   2qcom,coresight-tpdm arm,primecell            {                             	  hapb_pclk                               out-ports      port       endpoint              ,         g  1               tpda@6863000          "   2qcom,coresight-tpda arm,primecell            {    0                         	  hapb_pclk       in-ports                                 port@0           {       endpoint              -         g  4         port@1           {      endpoint              .         g  3         port@2           {      endpoint              /         g  5         port@3           {      endpoint              0         g  +         port@4           {      endpoint              1         g  ,            out-ports      port       endpoint              2         g  )               tpdm@68a0000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint              3         g  .               tpdm@68b0000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint              4         g  -               tpdm@68c0000          "   2qcom,coresight-tpdm arm,primecell            {                              	  hapb_pclk                               out-ports      port       endpoint              5         g  /               cti@68e0000           2arm,coresight-cti arm,primecell          {                              	  hapb_pclk          cti@68f0000           2arm,coresight-cti arm,primecell          {                              	  hapb_pclk          cti@6900000           2arm,coresight-cti arm,primecell          {                              	  hapb_pclk          mmc@87c4000       %   2qcom,qcs8300-sdhci qcom,sdhci-msm-v5              {    |@            |P              	  whc cqhci            &               	           hc_irq pwr_irq             7      7      4            hiface core xo              7               <               6        /   6              0                                :   1           sdhc-ddr cpu-sdhc           	 d        h         )         T        aokay            t  7        6  8        ~default sleep           @            J         W         f         u                     9                              opp-table            2operating-points-v2          g  6   opp-50000000                           =      opp-100000000                          :      opp-200000000                           '      opp-384000000               `                        phy@8904000       1   2qcom,qcs8300-usb-hs-phy qcom,usb-snps-hs-7nm-phy             {    @                   4            href            7           A            aokay            \  ;          <          =         g  G      phy@8906000       1   2qcom,qcs8300-usb-hs-phy qcom,usb-snps-hs-7nm-phy             {    `                   4            href            7           A            aokay            \  ;          <          =         g  I      phy@8907000          2qcom,qcs8300-qmp-usb3-uni-phy            {    p                     7      7      7      7           haux ref com_aux pipe               7      7           phy phy_phy             7            J            usb3_prim_phy_pipe_clk_src          A            aokay            L  ;        \            g  H      phy@8909000       :   2qcom,qcs8300-dwmac-sgmii-phy qcom,sa8775p-dwmac-sgmii-phy            {                      7         	  hsgmi_ref            A            aokay            Q            g  X      regulator@891c000         ;   2qcom,qcs8300-refgen-regulator qcom,sm8250-refgen-regulator           {                  gpu@3d00000          2qcom,adreno-623.0 qcom,adreno         0   {                                           #  wkgsl_3d0_reg_memory cx_mem cx_dbgc          &      ,           /  >         >                 ?          @                                  gfx-mem                      A      
  speed_bin           aokay       zap-shader            B        qcom/qcs8300/a623_zap.mbn         opp-table            2operating-points-v2          g  ?   opp-877000000               4E@        (                   2         opp-780000000               .}         (                   2         opp-599000000               #        (            |c        2         opp-479000000                       (            P$        2               gmu@3d6a000       &   2qcom,adreno-gmu-623.0 qcom,adreno-gmu         0   {    ֠      @                  )                 wgmu rscc gmu_pdc            &      0         1           hfi gmu       0    C     C   	   7      7   0  C     C           hgmu cxo axi memnoc ahb hub             C      C            cx gx           /  >                 D         g  @   opp-table            2operating-points-v2          g  D   opp-500000000               e         (               clock-controller@3d90000             2qcom,qcs8300-gpucc           {                        4       7   -   7   .      8  hbi_tcxo gcc_gpu_gpll0_clk_src gcc_gpu_gpll0_div_clk_src          J                      1            g  C      iommu@3da0000         A   2qcom,qcs8300-smmu-500 qcom,adreno-smmu qcom,smmu-500 arm,mmu-500             {                     C           P           &                                                                                                                  8     7   0   7   1  C     C     C     C     C           hgcc_gpu_memnoc_gfx_clk gcc_gpu_snoc_dvm_gfx_clk gpu_cc_ahb_clk gpu_cc_hlos1_vote_gpu_smmu_clk gpu_cc_cx_gmu_clk gpu_cc_hub_cx_int_clk gpu_cc_hub_aon_clk               C             T         g  >      pmu@9091000       /   2qcom,qcs8300-llcc-bwmon qcom,sc7280-llcc-bwmon           {    		                &      l                                         E   opp-table            2operating-points-v2          g  E   opp-0                  opp-1            >      opp-2            p      opp-3            '(      opp-4            ,h      opp-5            Z      opp-6            ci8      opp-7            yӀ      opp-8            A      opp-9                        pmu@90b5400       )   2qcom,qcs8300-cpu-bwmon qcom,sdm845-bwmon             {    	T                &      E                                        F   opp-table            2operating-points-v2          g  F   opp-0                  opp-1                  opp-2            9`      opp-3            /(            pmu@90b6400       )   2qcom,qcs8300-cpu-bwmon qcom,sdm845-bwmon             {    	d                &      E                                        F      interconnect@90e0000             2qcom,qcs8300-dc-noc          {    	        P                      &      interconnect@9100000             2qcom,qcs8300-gem-noc             {    	       p                      &         g         system-cache-controller@9200000          2qcom,qcs8300-llcc         P   {    	              	0             	@             	P             	               @  wllcc0_base llcc1_base llcc2_base llcc3_base llcc_broadcast_base         &      F         usb@a600000       !   2qcom,qcs8300-dwc3 qcom,snps-dwc3             {    
`              (     7      7      7   	   7      7         #  hcfg_noc core iface sleep mock_utmi          c   7      7           s$        T  n         $                                                            E  dwc_usb3 pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq ss_phy_irq                7                         7         0                                :   9           usb-ddr apps-usb            /   6                 G  H        usb2-phy usb3-phy                                                                 aokay            peripheral        usb@a400000       !   2qcom,qcs8300-dwc3 qcom,snps-dwc3             {    
@              (     7      7      7      7      7         #  hcfg_noc core iface sleep mock_utmi          c   7      7           s$ '       H  n                                          
         	         :  dwc_usb3 pwr_event hs_phy_irq dp_hs_phy_irq dm_hs_phy_irq               7                         7         0                                :   8           usb-ddr apps-usb            /   6                  I      	  usb2-phy            high-speed                                                        &                 aokay            host          video-codec@aa00000          2qcom,qcs8300-iris            {    
                 &                      J      J      <      <            venus vcodec0 mxc mmcx             K           7     J     J           hiface core vcodec0_core       0              :   :     L                       cpu-cfg video-mem             M           7           bus         /   6        6              T        aokay       opp-table            2operating-points-v2          g  K   opp-366000000               з           '   '      opp-444000000               v                     opp-533000000               @          N  N      opp-560000000               !`           O  O            clock-controller@abf0000             2qcom,qcs8300-videocc             {    
                    7      4       4      5            <            J                      1            g  J      clock-controller@ade0000             2qcom,qcs8300-camcc           {    
                    7      4       4      5            <            J                      1         clock-controller@af00000             2qcom,sa8775p-dispcc0             {    
               <     7      4       4      5                                            <            J                      1         interrupt-controller@b220000             2qcom,qcs8300-pdc qcom,pdc             {    "                     d                                        C         (   (         6        7  2      ;  8      >  v      @        B        F        I        v  8      |  a        ~                                         Y                                C                                 z                                                                                        d                    g         power-management@c300000          $   2qcom,qcs8300-aoss-qmp qcom,aoss-qmp          {    0                 n   3                      3                 J             g         sram@c3f0000             2qcom,rpmh-stats          {    ?               spmi@c440000             2qcom,spmi-pmic-arb        P   {    D             `             `             p       
      @      `         wcore chnls obsrvr intr cnfg         S            l            n                 periph_irq                                                   pmic@0           2qcom,pmm8654au qcom,spmi-pmic            {                                     rtc@6100             2qcom,pmk8350-rtc             {  a   b       
  wrtc alarm           &       b            gpio@8800         #   2qcom,pmm8654au-gpio qcom,spmi-gpio           {            `        p  P                   |                                g  P         pmic@2           2qcom,pmm8654au qcom,spmi-pmic            {                                    gpio@8800         #   2qcom,pmm8654au-gpio qcom,spmi-gpio           {            `        p  Q                   |                                g  Q   usb2-en-state           gpio7           normal                                g  a               pinctrl@f100000          2qcom,qcs8300-tlmm            {           0          &                   `        |           p                                                      g      hs0-mi2s-active-state            gpio106 gpio107 gpio108 gpio109       	  hs0_mi2s                              mi2s1-active-state     data0-pins          gpio100         mi2s1_data0                           data1-pins          gpio101         mi2s1_data1                           sclk-pins           gpio98        
  mi2s1_sck                             ws-pins         gpio99        	  mi2s1_ws                                 qup-i2c0-data-clk-state         gpio17 gpio18         	  qup0_se0             g   8      qup-i2c1-data-clk-state         gpio19 gpio20         	  qup0_se1             g   F      qup-i2c2-data-clk-state         gpio33 gpio34         	  qup0_se2             g   M      qup-i2c3-data-clk-state         gpio25 gpio26         	  qup0_se3             g   T      qup-i2c4-data-clk-state         gpio29 gpio30         	  qup0_se4             g   [      qup-i2c5-data-clk-state         gpio21 gpio22         	  qup0_se5             g   b      qup-i2c6-data-clk-state         gpio80 gpio81         	  qup0_se6             g   i      qup-i2c8-data-clk-state         gpio37 gpio38         	  qup1_se0             g   r      qup-i2c9-data-clk-state         gpio39 gpio40         	  qup1_se1             g   z      qup-i2c10-data-clk-state            gpio84 gpio85         	  qup1_se2             g         qup-i2c11-data-clk-state            gpio41 gpio42         	  qup1_se3             g         qup-i2c12-data-clk-state            gpio45 gpio46         	  qup1_se4             g         qup-i2c13-data-clk-state            gpio49 gpio50         	  qup1_se5             g         qup-i2c14-data-clk-state            gpio89 gpio90         	  qup1_se6             g         qup-i2c15-data-clk-state            gpio91 gpio92         	  qup1_se7             g         qup-i2c16-data-clk-state            gpio10 gpio11         	  qup2_se0             g         qup-spi0-data-clk-state         gpio17 gpio18 gpio19          	  qup0_se0             g   ?      qup-spi0-cs-state           gpio20        	  qup0_se0             g   @      qup-spi0-cs-gpio-state          gpio20          gpio          qup-spi1-data-clk-state         gpio19 gpio20 gpio17          	  qup0_se1             g   G      qup-spi1-cs-state           gpio18        	  qup0_se1             g   H      qup-spi1-cs-gpio-state          gpio18          gpio          qup-spi2-data-clk-state         gpio33 gpio34 gpio35          	  qup0_se2             g   N      qup-spi2-cs-state           gpio36        	  qup0_se2             g   O      qup-spi2-cs-gpio-state          gpio36          gpio          qup-spi3-data-clk-state         gpio25 gpio26 gpio27          	  qup0_se3             g   U      qup-spi3-cs-state           gpio28        	  qup0_se3             g   V      qup-spi3-cs-gpio-state          gpio28          gpio          qup-spi4-data-clk-state         gpio29 gpio30 gpio31          	  qup0_se4             g   \      qup-spi4-cs-state           gpio32        	  qup0_se4             g   ]      qup-spi4-cs-gpio-state          gpio32          gpio          qup-spi5-data-clk-state         gpio21 gpio22 gpio23          	  qup0_se5             g   c      qup-spi5-cs-state           gpio24        	  qup0_se5             g   d      qup-spi5-cs-gpio-state          gpio24          gpio          qup-spi6-data-clk-state         gpio80 gpio81 gpio82          	  qup0_se6             g   j      qup-spi6-cs-state           gpio83        	  qup0_se6             g   k      qup-spi6-cs-gpio-state          gpio83          gpio          qup-spi8-data-clk-state         gpio37 gpio38 gpio39          	  qup1_se0             g   t      qup-spi8-cs-state           gpio40        	  qup1_se0             g   u      qup-spi8-cs-gpio-state          gpio40          gpio          qup-spi9-data-clk-state         gpio39 gpio40 gpio37          	  qup1_se1             g   {      qup-spi9-cs-state           gpio38        	  qup1_se1             g   |      qup-spi9-cs-gpio-state          gpio38          gpio          qup-spi10-data-clk-state            gpio84 gpio85 gpio86          	  qup1_se2             g         qup-spi10-cs-state          gpio87        	  qup1_se2             g         qup-spi10-cs-gpio-state         gpio87          gpio          qup-spi12-data-clk-state            gpio45 gpio46 gpio47          	  qup1_se4             g         qup-spi12-cs-state          gpio48        	  qup1_se4             g         qup-spi12-cs-gpio-state         gpio48          gpio          qup-spi13-data-clk-state            gpio49 gpio50 gpio51          	  qup1_se5             g         qup-spi13-cs-state          gpio52        	  qup1_se5             g         qup-spi13-cs-gpio-state         gpio52          gpio          qup-spi14-data-clk-state            gpio89 gpio90 gpio91          	  qup1_se6             g         qup-spi14-cs-state          gpio92        	  qup1_se6             g         qup-spi14-cs-gpio-state         gpio92          gpio          qup-spi15-data-clk-state            gpio91 gpio92 gpio89          	  qup1_se7             g         qup-spi15-cs-state          gpio90        	  qup1_se7             g         qup-spi15-cs-gpio-state         gpio90          gpio          qup-spi16-data-clk-state            gpio10 gpio11 gpio12          	  qup2_se0             g         qup-spi16-cs-state          gpio13        	  qup2_se0             g         qup-spi16-cs-gpio-state         gpio13          gpio          qup-uart0-cts-state         gpio17        	  qup0_se0             g   B      qup-uart0-rts-state         gpio18        	  qup0_se0             g   C      qup-uart0-tx-state          gpio19        	  qup0_se0             g   D      qup-uart0-rx-state          gpio20        	  qup0_se0             g   E      qup-uart1-cts-state         gpio19        	  qup0_se1             g   I      qup-uart1-rts-state         gpio20        	  qup0_se1             g   J      qup-uart1-tx-state          gpio17        	  qup0_se1             g   K      qup-uart1-rx-state          gpio18        	  qup0_se1             g   L      qup-uart2-cts-state         gpio33        	  qup0_se2             g   P      qup-uart2-rts-state         gpio34        	  qup0_se2             g   Q      qup-uart2-tx-state          gpio35        	  qup0_se2             g   R      qup-uart2-rx-state          gpio36        	  qup0_se2             g   S      qup-uart3-cts-state         gpio25        	  qup0_se3             g   W      qup-uart3-rts-state         gpio26        	  qup0_se3             g   X      qup-uart3-tx-state          gpio27        	  qup0_se3             g   Y      qup-uart3-rx-state          gpio28        	  qup0_se3             g   Z      qup-uart4-cts-state         gpio29        	  qup0_se4             g   ^      qup-uart4-rts-state         gpio30        	  qup0_se4             g   _      qup-uart4-tx-state          gpio31        	  qup0_se4             g   `      qup-uart4-rx-state          gpio32        	  qup0_se4             g   a      qup-uart5-cts-state         gpio21        	  qup0_se5             g   e      qup-uart5-rts-state         gpio22        	  qup0_se5             g   f      qup-uart5-tx-state          gpio23        	  qup0_se5             g   g      qup-uart5-rx-state          gpio23        	  qup0_se5             g   h      qup-uart6-cts-state         gpio80        	  qup0_se6             g   l      qup-uart6-rts-state         gpio81        	  qup0_se6             g   m      qup-uart6-tx-state          gpio82        	  qup0_se6             g   n      qup-uart6-rx-state          gpio83        	  qup0_se6             g   o      qup-uart7-tx-state          gpio43        	  qup0_se7             g   p      qup-uart7-rx-state          gpio44        	  qup0_se7             g   q      qup-uart8-cts-state         gpio37        	  qup1_se0             g   v      qup-uart8-rts-state         gpio38        	  qup1_se0             g   w      qup-uart8-tx-state          gpio39        	  qup1_se0             g   x      qup-uart8-rx-state          gpio40        	  qup1_se0             g   y      qup-uart9-cts-state         gpio39        	  qup1_se1             g   }      qup-uart9-rts-state         gpio40        	  qup1_se1             g   ~      qup-uart9-tx-state          gpio37        	  qup1_se1             g         qup-uart9-rx-state          gpio38        	  qup1_se1             g         qup-uart10-cts-state            gpio84        	  qup1_se2             g         qup-uart10-rts-state            gpio84        	  qup1_se2             g         qup-uart10-tx-state         gpio85        	  qup1_se2             g         qup-uart10-rx-state         gpio87        	  qup1_se2             g         qup-uart11-tx-state         gpio41        	  qup1_se3             g         qup-uart11-rx-state         gpio42        	  qup1_se3             g         qup-uart12-cts-state            gpio45        	  qup1_se4             g         qup-uart12-rts-state            gpio46        	  qup1_se4             g         qup-uart12-tx-state         gpio47        	  qup1_se4             g         qup-uart12-rx-state         gpio48        	  qup1_se4             g         qup-uart13-cts-state            gpio49        	  qup1_se5             g         qup-uart13-rts-state            gpio50        	  qup1_se5             g         qup-uart13-tx-state         gpio51        	  qup1_se5             g         qup-uart13-rx-state         gpio52        	  qup1_se5             g         qup-uart14-cts-state            gpio89        	  qup1_se6             g         qup-uart14-rts-state            gpio90        	  qup1_se6             g         qup-uart14-tx-state         gpio91        	  qup1_se6             g         qup-uart14-rx-state         gpio92        	  qup1_se6             g         qup-uart15-cts-state            gpio91        	  qup1_se7             g         qup-uart15-rts-state            gpio92        	  qup1_se7             g         qup-uart15-tx-state         gpio89        	  qup1_se7             g         qup-uart15-rx-state         gpio90        	  qup1_se7             g         qup-uart16-cts-state            gpio10        	  qup2_se0             g         qup-uart16-rts-state            gpio11        	  qup2_se0             g         qup-uart16-tx-state         gpio12        	  qup2_se0             g         qup-uart16-rx-state         gpio13        	  qup2_se0             g         sdc1-on-state            g  7   clk-pins          	  sdc1_clk                              cmd-pins          	  sdc1_cmd               
               data-pins         
  sdc1_data              
               rclk-pins         
  sdc1_rclk                     sdc1-off-state           g  8   clk-pins          	  sdc1_clk                              cmd-pins          	  sdc1_cmd                              data-pins         
  sdc1_data                             rclk-pins         
  sdc1_rclk                     ethernet0-default-state          g  Z   ethernet0-mdc-pins          gpio5         
  emac0_mdc                             ethernet0-mdio-pins         gpio6           emac0_mdio                                  sram@146d8000         $   2qcom,qcs8300-imem syscon simple-mfd          {    m                X        m                                pil-reloc@94c            2qcom,pil-reloc-info          {  	L            iommu@15000000        0   2qcom,qcs8300-smmu-500 qcom,smmu-500 arm,mmu-500          {                      C           P            T       &       w          x          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v                                                                                                                                 ;         <         =         >         ?         @         A         B         C         D         E         F         G         H         I         J         K         L         M         N         O         P         Q         R         S         T         U         V         W         X         Y                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                            g   6      iommu@15200000        0   2qcom,qcs8300-smmu-500 qcom,smmu-500 arm,mmu-500          {                      C           P            T       &                                                                                                                                             u         v         w         x         4         6         7         6                                    H         I         J         K         L         M         N         O         P         Q         "         #         $         %         &         '         (         )         *         +         ,         -         .         D         E         F         G         V         W         X                                                                                  O                  interrupt-controller@17a00000            2arm,gic-v3            {                                  &      	                               	           	                g         watchdog@17c10000         $   2qcom,apss-wdt-qcs8300 qcom,kpss-wdt          {                        5        &                 timer@17c20000           2arm,armv7-timer-mem          {                     X                                            frame@17c21000           {                 	1            &                          frame@17c23000           {0            	1           &       	         	  adisabled          frame@17c25000           {P            	1           &       
         	  adisabled          frame@17c27000           {p            	1           &                	  adisabled          frame@17c29000           {            	1           &                	  adisabled          frame@17c2b000           {°            	1           &                	  adisabled          frame@17c2d000           {            	1           &                	  adisabled             rsc@18200000             2qcom,rpmh-rsc         0   {                  !             "                 wdrv-0 drv-1 drv-2         $  &                                          .      	  apps_rsc            	>           	N            	Z                             bcm-voter            2qcom,bcm-voter           g   &      clock-controller             2qcom,sa8775p-rpmh-clk            J             R        hxo           g   4      power-controller             2qcom,qcs8300-rpmhpd         1              S         g   <   opp-table            2operating-points-v2          g  S   opp-0           (         opp-1           (   0      opp-2           (   @         g   =      opp-3           (            g  :      opp-4           (            g   '      opp-5           (            g         opp-6           (  @      opp-7           (  P      opp-8           (           g  N      opp-9           (           g  O            regulators-0             2qcom,pmm8654au-rpmh-regulators          	ja      smps4         	  	wvreg_s4a            	 w@        	 w@        	            g  9      smps9         	  	wvreg_s9a            	 @        	 @        	         ldo3          	  	wvreg_l3a            	 O        	 O        	            	        	            ldo4          	  	wvreg_l4a            	 m        	         	            	        	               g         ldo5          	  	wvreg_l5a            	 O        	 O        	            	        	               g         ldo6          	  	wvreg_l6a            	 m        	         	            	        	            ldo7          	  	wvreg_l7a            	 m        	         	            	        	               g  ;      ldo8          	  	wvreg_l8a            	 &5@        	 -*        	            	        	               g         ldo9          	  	wvreg_l9a            	 -Q        	 .         	            	        	               g  =         regulators-1             2qcom,pmm8654au-rpmh-regulators          	jc      smps5         	  	wvreg_s5c            	 ؀        	 ؀        	         ldo1          	  	wvreg_l1c            	         	          	            	        	            ldo2          	  	wvreg_l2c            	         	 @        	            	        	            ldo4          	  	wvreg_l4c            	 O        	 O        	            	        	               g         ldo6          	  	wvreg_l6c            	 w@        	 w@        	            	        	            ldo7          	  	wvreg_l7c            	 w@        	 w@        	            	        	               g  <      ldo8          	  	wvreg_l8c            	 w@        	 w@        	            	        	            ldo9          	  	wvreg_l9c            	 w@        	 w@        	            	        	                  interconnect@18590000         7   2qcom,qcs8300-epss-l3 qcom,sa8775p-epss-l3 qcom,epss-l3           {    Y                    4       7            hxo alternate                        g         cpufreq@18591000          ,   2qcom,qcs8300-cpufreq-epss qcom,cpufreq-epss       0   {    Y            Y0            Y@              '  wfreq-domain0 freq-domain1 freq-domain2        $  &                            V         $  dcvsh-irq-0 dcvsh-irq-1 dcvsh-irq-2            4       7            hxo alternate            	            g         interconnect@18592000         7   2qcom,qcs8300-epss-l3 qcom,sa8775p-epss-l3 qcom,epss-l3           {    Y                    4       7            hxo alternate                        g         remoteproc@20c00000       /   2qcom,qcs8300-gpdsp-pas qcom,sa8775p-gpdsp0-pas           {                    @  n               T          T         T         T             #  wdog fatal ready handover stop-ack             4            hxo              <       <   
         cx mxc            U         :                V                     W            stop            aokay            qcom/qcs8300/gpdsp0.mbn    glink-edge          n   3                     3               gpdsp                       ethernet@23040000         (   2qcom,qcs8300-ethqos qcom,sa8775p-ethqos           {    #             #`                wstmmaceth rgmii         &                          macirq sfty             7      7   !   7      7           hstmmaceth pclk ptp_ref phyaux               7              X        serdes          /   6               T         
        
            
#  @         
1  P         aokay            
?2500base-x          
H  Y        t  Z        ~default         
S  [        
f  \        
y     mdio             2snps,dwmac-mdio                              phy@8            2ethernet-phy-id31c3.1c33             {            oethernet-phy            n                                  
  *        
 p         g  Y         rx-queues-config            
            
         g  [   queue0           
        
             
        	         queue1           
        
                  queue2           &        
            9      queue3           &        
           	            tx-queues-config            I            g  \   queue0           
      queue1           
      queue2           &        _           o                            queue3           &        _           o                                  interconnect@260c0000            2qcom,qcs8300-nspa-noc            {    &       `                      &         g  ^      remoteproc@26300000       -   2qcom,qcs8300-cdsp-pas qcom,sa8775p-cdsp0-pas             {    &0               @  n         B     ]         ]        ]        ]            #  wdog fatal ready handover stop-ack             4            hxo              <       <   
   <            cx mxc nsp            ^                         _                     `            stop            aokay            qcom/qcs8300/cdsp0.mbn     glink-edge          n   3                     3               cdsp                  fastrpc          2qcom,fastrpc            fastrpcglink-apps-dsp           cdsp                                 compute-cb@1             2qcom,fastrpc-compute-cb          {           /   6    @   6  a            T      compute-cb@2             2qcom,fastrpc-compute-cb          {           /   6    @   6  b            T      compute-cb@3             2qcom,fastrpc-compute-cb          {           /   6    @   6  c            T      compute-cb@4             2qcom,fastrpc-compute-cb          {           /   6    @   6  d            T                  timer            2arm,armv8-timer       0  &                              
        aliases       $  /soc@0/geniqup@9c0000/serial@99c000         /soc@0/mmc@87c4000        chosen          serial0:115200n8          regulator-usb2-vbus          2regulator-fixed       
  	wUSB2_VBUS             Q               t  a        ~default                            	interrupt-parent #address-cells #size-cells model compatible chassis-type #clock-cells clock-frequency phandle device_type reg enable-method next-level-cache power-domains power-domain-names capacity-dmips-mhz dynamic-power-coefficient qcom,freq-domain operating-points-v2 interconnects cache-level cache-unified cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us local-timer-stop opp-shared opp-hz opp-peak-kBps remote-endpoint qcom,dload-mode #interconnect-cells qcom,bcm-voters required-opps interrupts #power-domain-cells domain-idle-states ranges no-map hwlocks interrupts-extended mboxes qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name interrupt-controller #interrupt-cells #qcom,smem-state-cells #reset-cells clocks #mbox-cells bits #dma-cells iommus dma-channels dma-channel-mask dma-coherent status clock-names pinctrl-0 pinctrl-names interconnect-names dmas dma-names phys phy-names lanes-per-direction resets reset-names freq-table-hz qcom,ice reset-gpios vcc-supply vcc-max-microamp vccq-supply vccq-max-microamp #phy-cells vdda-phy-supply vdda-pll-supply qcom,ee qcom,controlled-remotely num-channels qcom,num-ees #hwlock-cells interrupt-names memory-region qcom,qmp qcom,smem-states qcom,smem-state-names firmware-name label qcom,glink-channels qcom,vmids qcom,domain qcom,intents #sound-dai-cells qcom,protection-domain reg-names qcom,cmb-element-bits qcom,cmb-msrs-num qcom,dsb-element-bits qcom,dsb-msrs-num arm,coresight-loses-context-with-cpu qcom,skip-power-up qcom,dll-config qcom,ddr-config supports-cqe pinctrl-1 bus-width mmc-ddr-1_8v mmc-hs200-1_8v mmc-hs400-1_8v mmc-hs400-enhanced-strobe vmmc-supply vqmmc-supply non-removable no-sd no-sdio vdda18-supply vdda33-supply clock-output-names qcom,gmu #cooling-cells nvmem-cells nvmem-cell-names opp-level opp-supported-hw #iommu-cells #global-interrupts assigned-clocks assigned-clock-rates snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk wakeup-source dr_mode maximum-speed qcom,select-utmi-as-pipe-clk qcom,pdc-ranges qcom,channel gpio-controller gpio-ranges #gpio-cells pins function output-enable power-source wakeup-parent drive-strength bias-disable bias-pull-up bias-pull-down bias-bus-hold #redistributor-regions redistributor-stride frame-number qcom,tcs-offset qcom,drv-id qcom,tcs-config qcom,pmic-id regulator-name regulator-min-microvolt regulator-max-microvolt regulator-initial-mode regulator-allow-set-load regulator-allowed-modes #freq-domain-cells snps,tso snps,pbl rx-fifo-depth tx-fifo-depth phy-mode phy-handle snps,mtl-rx-config snps,mtl-tx-config snps,ps-speed reset-assert-us reset-deassert-us snps,rx-queues-to-use snps,rx-sched-sp snps,dcb-algorithm snps,map-to-dma-channel snps,route-up snps,priority snps,route-ptp snps,avb-algorithm snps,route-avcp snps,tx-queues-to-use snps,send_slope snps,idle_slope snps,high_credit snps,low_credit serial0 mmc0 stdout-path gpio enable-active-high regulator-always-on 