     8     (            :  |                             $    mediatek,mt8365-evk mediatek,mt8365                                  +         "   7MediaTek MT8365 Open Platform EVK      aliases          =/soc/aal@14011000            B/soc/ccorr@14010000          I/soc/color@1400f000          P/soc/dither@14013000             X/soc/dpi@14018000            ]/soc/dsi@14014000            b/soc/gamma@14012000          i/soc/ovl@1400b000            n/soc/rdma@1400d000           t/soc/rdma@14016000           z/soc/serial@11002000             /soc/ethernet@112a0000        cpus                         +       opp-table-0           operating-points-v2                          opp-850000000                2          	      opp-918000000                6          
4N      opp-987000000                :l          
}      opp-1056000000               >H           
      opp-1125000000               C#@                opp-1216000000               Hz           q      opp-1308000000               M           X      opp-1400000000               SrN           5       opp-1466000000               Wab                opp-1533000000               [_@          P      opp-1633000000               aU@                opp-1700000000               eS           t      opp-1767000000               iRG          N      opp-1834000000               mP                opp-1917000000               rC@          )      opp-2001000000               wD@                   cpu-map    cluster0       core0                     core1                     core2                     core3                           cpu@0            cpu           arm,cortex-a53                                    psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate            p                                           cpu@1            cpu           arm,cortex-a53                                   psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p                                           cpu@2            cpu           arm,cortex-a53                                   psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p                                           cpu@3            cpu           arm,cortex-a53                                   psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p                                           idle-states         psci       cpu-mcdi              arm,idle-state                               ,                                       cluster-mcdi              arm,idle-state                              ^                                       cluster-dpidle            arm,idle-state                              ,                                          l2-cache              cache                                     @                                	         oscillator            fixed-clock                     *        :clk26m                    opp-table-gpu             operating-points-v2                          opp-450000000                t          	      opp-560000000                !`           
`      opp-800000000                /           5          psci              arm,psci-1.0             smc       soc                      +             simple-bus           M   interrupt-controller@c000000              arm,gic-v3          T                        e      P                                  @              A             B                  z      	                     syscon@13000000           mediatek,mt8365-mfgcfg syscon                                                       gpu@13040000          &    mediatek,mt8365-mali arm,mali-bifrost                        @         ]             0  z                                                job mmu gpu event           p                         okay                     syscon@10000000            mediatek,mt8365-topckgen syscon                                                     syscon@10001000            mediatek,mt8365-infracfg syscon                                                    syscon@10003000           mediatek,mt8365-pericfg syscon                0                         syscfg-pctl@10005000              mediatek,mt8365-syscfg syscon                 P                          syscon@10006000       )    mediatek,mt8365-scpsys syscon simple-mfd                  `           power-controller          !    mediatek,mt8365-power-controller                         +                              power-domain@0                     (  ]      ?                                dmm mm-0 mm-1 mm-2 mm-3                                                         +       power-domain@4                    0  ]                                           $  dcam-0 cam-1 cam-2 cam-3 cam-4 cam-5                                         power-domain@6                                           power-domain@7                                           power-domain@8                    8  ]      :                                           (  dapu apu-0 apu-1 apu-2 apu-3 apu-4 apu-5                                            power-domain@1                      ]                    dconn conn1                               power-domain@2                      ]      A        dmfg                                         power-domain@3                      ]      M      !      $        daudio audio1 audio2                              power-domain@5                      ]      _            	  ddsp dsp1                                       watchdog@10007000         (    mediatek,mt8365-wdt mediatek,mt6589-wdt               p                         pinctrl@1000b000              mediatek,mt8365-pinctrl                                           /        ?            e        T           z       s                  audiodefault-pins               d   clk-dat-pins            K  H  I  J  K         audiodmic-pins              e   clk-dat-pins            K  u  v  w         misooff-pins                f   clk-dat-pins            K  5   6   7   8          R         _        n            misoon-pins             g   clk-dat-pins            K  5  6  7  8        n            mosioff-pins                h   clk-dat-pins            K  1   2   3   4          R         _        n            mosion-pins             i   clk-dat-pins            K  1  2  3  4        n            dpi-default-pins                Z   pins          @  K                     	  
                  n            dpi-idle-pins               [   pins          @  K                              	   
                         ethernet-pins               ?   phy_reset_pins          K         rmii_pins         @  K                     	  
                   gpio-keys-pins              b   pins            K           }         R         i2c0-pins               (   pins            K  9  :         }         i2c1-pins               )   pins            K  ;  <         }         ite-pins                *   irq_ite_pins            K  D          R         }      pwr_pins            K  F   G                rst_ite_pins            K  E                   mmc0-default-pins               7   clk-pins            K  c         _      cmd-dat-pins          $  K  g  f  e  d  `  _  ^  ]  b         R         }      rst-pins            K  a         }         mmc0-uhs-pins               8   clk-pins            K  c        n   
        _   f      cmd-dat-pins          $  K  g  f  e  d  `  _  ^  ]  b         R        n   
        }   e      ds-pins         K  h        n   
        _   f      rst-pins            K  a        n   
         }         mmc1-default-pins               ;   cd-pins         K  L          }      clk-pins            K  X        _   f      cmd-dat-pins            K  Y  Z  [  \  W         R        }   e         mmc1-uhs-pins               <   clk-pins            K  X        n           _   f      cmd-dat-pins            K  Y  Z  [  \  W         R        n           }   e         touch-pins              0   ctp-int1-pins           K  N          R               rst-pins            K  O                   uart0-pins              $   pins            K  #  $         uart1-pins              %   pins            K  %  &         uart2-pins              &   pins            K  '  (         usb-pins                4   id-pins         K            R         }      usb0-vbus-pins          K                 usb1-vbus-pins          K                     pwm-pins                '   pins            K    t            syscon@1000c000       "    mediatek,mt8365-apmixedsys syscon                                                      pwrap@1000d000            mediatek,mt8365-pwrap                                 pwrap           z       {            ]      /            0      .        dspi wrap sys tmr       pmic              mediatek,mt6357                           e        T                        adc           mediatek,mt6357-auxadc                   regulators     buck-vproc          vproc           % ^        =         U  j        j                              buck-vcore          vcore           % ^        =         U  j        j                              buck-vmodem         vmodem          %          = 7        U  j        j         buck-vs1            vs1         % O        = !        U  0        j                  buck-vpa            vpa         %          = 7        U  P        j         ldo-vfe28           vfe28           % *        = *        j        ldo-vxo22           vxo22           % !        = $         j   n      ldo-vrf18           vrf18           % w@        = w@        j   n      ldo-vrf12           vrf12           % O        = O        j   n            -      ldo-vefuse          vefuse          % O        = 2Z        j        ldo-vcn33-bt          	  vcn33-bt            % 2Z        = 5g        j        ldo-vcn33-wifi          vcn33-wifi          % 2Z        = 5g        j        ldo-vcn28           vcn28           % *        = *        j        ldo-vcn18           vcn18           % w@        = w@        j        ldo-vcama           vcama           % &%        = *        j        ldo-vcamd           vcamd           % B@        = w@        j        ldo-vcamio18            vcamio          % w@        = w@        j        ldo-vldo28          vldo28          % *        = -        j        ldo-vsram-others            vsram-others            % ^        =         U  j        j   n                           ldo-vsram-proc          vsram-proc          % ^        =         U  j        j   n                           ldo-vaux18          vaux18          % w@        = w@        j        ldo-vaud28          vaud28          % *        = *        j        ldo-vio28           vio28           % *        = *        j        ldo-vio18           vio18           % w@        = w@        j                       :      ldo-vdram           vdram           %         = O        j        ldo-vmc         vmc         % w@        = 2Z        j   ,            >      ldo-vmch            vmch            % ,@         = 2Z        j   ,            =      ldo-vemc            vemc            % ,@         = 2Z        j   ,                     9      ldo-vsim1           vsim1           % w@        = w@        j              S      ldo-vsim2           vsim2           %         = /M`        j              +      ldo-vibr            vibr            % O        = 2Z        j   ,            ,      ldo-vusb33          vusb33          % -        = /M`        j              5         rtc           mediatek,mt6357-rtc       keys              mediatek,mt6357-keys       key-power              t               key-home               f                        keypad@10010000       .    mediatek,mt8365-keypad mediatek,mt6779-keypad                                          z       |           ]           dkpd       	  disabled          syscon@10200000           mediatek,mt8365-mcucfg syscon                                                  
      interrupt-controller@10200a80         .    mediatek,mt8365-sysirq mediatek,mt6577-sysirq            e        T                             
                          iommu@10205000            mediatek,mt8365-m4u               P                z       f                     !   "                       C      infracfg@1020e000              mediatek,mt8365-infracfg syscon                                                    rng@1020f000          (    mediatek,mt8365-rng mediatek,mt7623-rng                               ]              drng       dma-controller@11000280       2    mediatek,mt8365-uart-dma mediatek,mt6577-uart-dma         `                                                                                    H  z       -          .          /          0          3          4                      ]              dapdma                          #      serial@11002000       *    mediatek,mt8365-uart mediatek,mt6577-uart                                  z       #           ]               	  dbaud bus               #       #           tx rx           okay               $        default       serial@11003000       *    mediatek,mt8365-uart mediatek,mt6577-uart                 0                z       $           ]               	  dbaud bus               #      #           tx rx           okay               %        default       serial@11004000       *    mediatek,mt8365-uart mediatek,mt6577-uart                 @                z       %           ]               	  dbaud bus               #      #           tx rx           okay               &        default       pwm@11006000              mediatek,mt8365-pwm               `                           z       L         (  ]                        	      
        dtop main pwm1 pwm2 pwm3            '        default         okay          i2c@11007000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                p                             z                             ]      4            	  dmain dma                         +            okay            *            (        default       i2c@11008000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                                             z                             ]      5            	  dmain dma                         +            okay            *            )        default    hdmi@4c           ite,it66121             L        '                        z   D              *        default         8      E           D   +        Q   ,        ^   -   ports                        +       port@0                       +                    endpoint@0                       k           u   .            ]         port@1                       +                   endpoint@0                       u   /            a               touchscreen@5d            goodix,gt9271               ]              N           default            0              N            8      O              1           -         i2c@11009000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                                            z                             ]      6            	  dmain dma                         +          	  disabled          spi@1100a000          (    mediatek,mt8365-spi mediatek,mt7622-spi                                            +            z       >           ]            F              dparent-clk sel-clk spi-clk        	  disabled          pwm@1100e000          2    mediatek,mt8365-disp-pwm mediatek,mt8183-disp-pwm                                 dmain mm         ]      S      #                                i2c@1100f000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                                             z                             ]      7            	  dmain dma                         +          	  disabled          usb@11201000          #    mediatek,mt8365-mtu3 mediatek,mtu3                        .      >              	  mac ippc            z                     2      3            ]            E      D              dsys_ck ref_ck mcu_ck dma_ck                      +            M        okay            otg         high-speed             4        default                     5   usb@11200000          '    mediatek,mt8365-xhci mediatek,mtk-xhci                                 mac         z       C         (  ]            E      D            F      $  dsys_ck ref_ck mcu_ck dma_ck xhci_ck         okay               5      connector         %    gpio-usb-b-connector usb-b-connector                               micro              6         mmc@11230000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc               #                              z                  ]      I            +        dsource hclk source_cg           okay                  5              I        k                     1        B          Q          _         n         }                             7           8        default state_uhs              9           :      mmc@11240000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc               $                              z                  ]      K            ,        dsource hclk source_cg           okay            k                          L           Q            ;           <        default state_uhs                                =           >      mmc@11250000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc               %                              z       D         (  ]      J            -      A      )      %  dsource hclk source_cg bus_clk sys_cg          	  disabled          ethernet@112a0000             mediatek,mt8365-eth              *                            z                  ]      c      8      9        dcore reg trans        	  disabled               ?        default            @        rmii       mdio                         +       ethernet-phy@0                           @            dsi-phy@11c00000          0    mediatek,mt8365-mipi-tx mediatek,mt8183-mipi-tx                               :mipi_tx0_pll            ]                                       R      t-phy@11cc0000        .    mediatek,mt8365-tphy mediatek,generic-tphy-v2                        +           M                usb-phy@0                           ]                    dref da_ref                         2      usb-phy@1000                           ]                    dref da_ref                         3         syscon@14000000           mediatek,mt8365-mmsys syscon                                                     port                         +       endpoint@0                       u   A            D      endpoint@1                      u   B            X            mutex@14001000            mediatek,mt8365-disp-mutex                                z                               smi@14002000              mediatek,mt8365-smi-common                                  ]                                dapb smi gals0 gals1                                  larb@14003000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                 0                           ]                    dapb smi                        !                      ovl@1400b000          2    mediatek,mt8365-disp-ovl mediatek,mt8192-disp-ovl                                 ]              z                  2   C                      ports                        +       port@0                       +                    endpoint@0                       u   D            A         port@1                       +                   endpoint@0                       u   E            F               rdma@1400d000         4    mediatek,mt8365-disp-rdma mediatek,mt8183-disp-rdma                               ]      
        z                  2   C           9                     ports                        +       port@0                       +                    endpoint@0                       u   F            E         port@1                       +                   endpoint@0                       u   G            H               color@1400f000        6    mediatek,mt8365-disp-color mediatek,mt8173-disp-color                                 ]              z                            ports                        +       port@0                       +                    endpoint@0                       u   H            G         port@1                       +                   endpoint@0                       u   I            J               ccorr@14010000        6    mediatek,mt8365-disp-ccorr mediatek,mt8183-disp-ccorr                                 ]              z                            ports                        +       port@0                       +                    endpoint@0                       u   J            I         port@1                       +                   endpoint@0                       u   K            L               aal@14011000          2    mediatek,mt8365-disp-aal mediatek,mt8183-disp-aal                                ]              z                            ports                        +       port@0                       +                    endpoint@0                       u   L            K         port@1                       +                   endpoint@0                       u   M            N               gamma@14012000        6    mediatek,mt8365-disp-gamma mediatek,mt8183-disp-gamma                                 ]              z                            ports                        +       port@0                       +                    endpoint@0                       u   N            M         port@1                       +                   endpoint@0                       u   O            P               dither@14013000       8    mediatek,mt8365-disp-dither mediatek,mt8183-disp-dither              0                ]              z                            ports                        +       port@0                       +                    endpoint@0                       u   P            O         port@1                       +                   endpoint@0                       u   Q            V               dsi@14014000          (    mediatek,mt8365-dsi mediatek,mt8183-dsi              @                dengine digital hs           ]               R        z                  Qdphy               R                                    +            okay       panel@0           startek,kd070fhfid015                        [      C            8                  h   S        u   T   port                         +       endpoint@0                       u   U            W            ports                        +       port@0                       +                    endpoint@0                       u   V            Q         port@1                       +                   endpoint@0                       u   W            U               rdma@14016000         4    mediatek,mt8365-disp-rdma mediatek,mt8183-disp-rdma              `                ]              z                  2   C           9                     ports                        +       port@0                       +                    endpoint@1                      u   X            B         port@1                       +                   endpoint@1                      u   Y            \               dpi@14018000          (    mediatek,mt8365-dpi mediatek,mt8192-dpi                              ]            !              dpixel engine pll            z                               	  disabled               Z           [        default sleep      ports                        +       port@0                       +                    endpoint@1                      u   \            Y         port@1                       +                   endpoint@1                      u   ]            .               syscon@15000000           mediatek,mt8365-imgsys syscon                                                       larb@15001000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                                            ]                     dapb smi                       !               !      syscon@16000000           mediatek,mt8365-vdecsys syscon                                                ^      larb@16010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                                            ]   ^      ^           dapb smi                       !               "      syscon@17000000           mediatek,mt8365-vencsys syscon                                                _      larb@17010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                                            ]   _       _            dapb smi                       !                      syscon@19020000           mediatek,mt8365-apu syscon                                                     audio-controller@11220000             mediatek,mt8365-afe-pcm              "                 '          l  ]         L      y      z      {      |      P      Q      N      O      i      j      k      l        dtop_clk26m_clk top_audio_sel audio_i2s0_m audio_i2s1_m audio_i2s2_m audio_i2s3_m engen1 engen2 aud1 aud2 i2s0_m_sel i2s1_m_sel i2s2_m_sel i2s3_m_sel            z       a                         okay                           j         timer             arm,armv8-timer                   0  z                                 
         dummy13m              fixed-clock         * ]@                        `      timer@10017000        /    mediatek,mt8365-systimer mediatek,mt6765-timer               p                z                  ]   `        dclk13m        chosen          serial0:921600n8          connector             hdmi-connector          hdmi             d      port                         +       endpoint@0                       u   a            /            firmware       optee             linaro,optee-tz          smc          gpio-keys         
    gpio-keys           default            b   key-volume-up           >               
  volume_up              s                             memory@40000000          memory               @                regulator-0           regulator-fixed       	  otg_vbus            % LK@        = LK@                                       6      regulator-vsys            regulator-fixed         vsys                                  c      regulator-vio33tp             regulator-fixed       	  vio33_tp            % 2Z        = 2Z           c            1      reserved-memory                      +            M   secmon@43000000                       C                optee@43200000                        C                   sound             mediatek,mt8365-mt6357        /  default dmic miso_off miso_on mosi_off mosi_on             d           e            f        
   g           h           i        (   j      regulator-vsys-lcm            regulator-fixed                                    = LK@        % LK@      	  vsys_lcm                T         	compatible interrupt-parent #address-cells #size-cells model aal0 ccorr0 color0 dither0 dpi0 dsi0 gamma0 ovl0 rdma0 rdma1 serial0 ethernet opp-shared phandle opp-hz opp-microvolt cpu device_type reg #cooling-cells enable-method cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks clock-names operating-points-v2 proc-supply sram-supply entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-frequency clock-output-names ranges #interrupt-cells interrupt-controller interrupts interrupt-names power-domains status mali-supply #power-domain-cells mediatek,infracfg mediatek,infracfg-nao mediatek,smi domain-supply #reset-cells mediatek,pctl-regmap gpio-controller #gpio-cells pinmux input-enable bias-pull-down drive-strength bias-pull-up output-high bias-disable output-low reg-names interrupts-extended mediatek,micbias0-microvolt mediatek,micbias1-microvolt #io-channel-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-always-on linux,keycodes wakeup-source mediatek,larbs #iommu-cells dma-requests #dma-cells dmas dma-names pinctrl-0 pinctrl-names #pwm-cells clock-div #sound-dai-cells reset-gpios vcn18-supply vcn33-supply vrf12-supply bus-width remote-endpoint irq-gpios AVDD28-supply VDDIO-supply phys dr_mode maximum-speed usb-role-switch vusb33-supply id-gpios vbus-supply assigned-clock-parents assigned-clocks cap-mmc-highspeed cap-mmc-hw-reset hs400-ds-delay max-frequency mmc-hs200-1_8v mmc-hs400-1_8v no-sd no-sdio non-removable pinctrl-1 vmmc-supply vqmmc-supply cap-sd-highspeed cd-gpios sd-uhs-sdr104 sd-uhs-sdr50 mediatek,pericfg phy-handle phy-mode #phy-cells mediatek,larb-id iommus mediatek,rdma-fifo-size phy-names enable-gpios iovcc-supply power-supply mediatek,dmic-mode stdout-path label linux,code debounce-interval gpio enable-active-high regulator-boot-on vin-supply no-map pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 mediatek,platform 