     8  |   (              |                             $    mediatek,mt8365-evk mediatek,mt8365                                  +         "   7MediaTek MT8365 Open Platform EVK      aliases          =/soc/aal@14011000            B/soc/ccorr@14010000          I/soc/color@1400f000          P/soc/dither@14013000             X/soc/dpi@14018000            ]/soc/dsi@14014000            b/soc/gamma@14012000          i/soc/ovl@1400b000            n/soc/rdma@1400d000           t/soc/rdma@14016000           z/soc/serial@11002000             /soc/ethernet@112a0000        cpus                         +       opp-table-0           operating-points-v2                          opp-850000000                2          	      opp-918000000                6          
4N      opp-987000000                :l          
}      opp-1056000000               >H           
      opp-1125000000               C#@                opp-1216000000               Hz           q      opp-1308000000               M           X      opp-1400000000               SrN           5       opp-1466000000               Wab                opp-1533000000               [_@          P      opp-1633000000               aU@                opp-1700000000               eS           t      opp-1767000000               iRG          N      opp-1834000000               mP                opp-1917000000               rC@          )      opp-2001000000               wD@                   cpu-map    cluster0       core0                     core1                     core2                     core3                           cpu@0            cpu           arm,cortex-a53                                    psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate            p                                           cpu@1            cpu           arm,cortex-a53                                   psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p                                           cpu@2            cpu           arm,cortex-a53                                   psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p                                           cpu@3            cpu           arm,cortex-a53                                   psci                                             @                               -   @        ?           L   	        ]   
                  dcpu intermediate armpll         p                                           idle-states         psci       cpu-mcdi              arm,idle-state                               ,                                       cluster-mcdi              arm,idle-state                              ^                                       cluster-dpidle            arm,idle-state                              ,                                          l2-cache              cache                                     @                                	         oscillator            fixed-clock                     *        :clk26m                    psci              arm,psci-1.0             smc       soc                      +             simple-bus           M   interrupt-controller@c000000              arm,gic-v3          T                        e      P                                  @              A             B                  z      	                     syscon@10000000            mediatek,mt8365-topckgen syscon                                                     syscon@10001000            mediatek,mt8365-infracfg syscon                                                    syscon@10003000           mediatek,mt8365-pericfg syscon                0                         syscfg-pctl@10005000              mediatek,mt8365-syscfg syscon                 P                          syscon@10006000       )    mediatek,mt8365-scpsys syscon simple-mfd                  `           power-controller          !    mediatek,mt8365-power-controller                         +                           -   power-domain@0                     (  ]      ?                                dmm mm-0 mm-1 mm-2 mm-3                                                         +       power-domain@4                    0  ]                                           $  dcam-0 cam-1 cam-2 cam-3 cam-4 cam-5                                         power-domain@6                                           power-domain@7                                           power-domain@8                    8  ]      :                                           (  dapu apu-0 apu-1 apu-2 apu-3 apu-4 apu-5                                            power-domain@1                      ]                    dconn conn1                               power-domain@2                      ]      A        dmfg                              power-domain@3                      ]      M      !      $        daudio audio1 audio2                              power-domain@5                      ]      _            	  ddsp dsp1                                       watchdog@10007000         (    mediatek,mt8365-wdt mediatek,mt6589-wdt               p                         pinctrl@1000b000              mediatek,mt8365-pinctrl                                                                e        T           z       s                  audiodefault-pins               `   clk-dat-pins              H  I  J  K         audiodmic-pins              a   clk-dat-pins              u  v  w         misooff-pins                b   clk-dat-pins              5   6   7   8                            /            misoon-pins             c   clk-dat-pins              5  6  7  8        /            mosioff-pins                d   clk-dat-pins              1   2   3   4                            /            mosion-pins             e   clk-dat-pins              1  2  3  4        /            dpi-default-pins                V   pins          @                       	  
                  /            dpi-idle-pins               W   pins          @                                	   
                         ethernet-pins               ;   phy_reset_pins                   rmii_pins         @                       	  
                   gpio-keys-pins              ^   pins                       >                  i2c0-pins               #   pins              9  :         >         i2c1-pins               $   pins              ;  <         >         ite-pins                %   irq_ite_pins              D                   >      pwr_pins              F   G          K      rst_ite_pins              E          K         mmc0-default-pins               3   clk-pins              c                cmd-dat-pins          $    g  f  e  d  `  _  ^  ]  b                  >      rst-pins              a         >         mmc0-uhs-pins               4   clk-pins              c        /   
            f      cmd-dat-pins          $    g  f  e  d  `  _  ^  ]  b                 /   
        >   e      ds-pins           h        /   
            f      rst-pins              a        /   
         >         mmc1-default-pins               7   cd-pins           L          >      clk-pins              X            f      cmd-dat-pins              Y  Z  [  \  W                 >   e         mmc1-uhs-pins               8   clk-pins              X        /               f      cmd-dat-pins              Y  Z  [  \  W                 /           >   e         touch-pins              +   ctp-int1-pins             N                   W      rst-pins              O          d         uart0-pins                 pins              #  $         uart1-pins                  pins              %  &         uart2-pins              !   pins              '  (         usb-pins                0   id-pins                              >      usb0-vbus-pins                     K      usb1-vbus-pins                      K         pwm-pins                "   pins                t            syscon@1000c000       "    mediatek,mt8365-apmixedsys syscon                                                      pwrap@1000d000            mediatek,mt8365-pwrap                                 opwrap           z       {            ]      /            0      .        dspi wrap sys tmr       pmic              mediatek,mt6357         y                  e        T                        adc           mediatek,mt6357-auxadc                   regulators     buck-vproc          vproc            ^                   j        +            G                  buck-vcore          vcore            ^                   j        +            G      buck-vmodem         vmodem                     7          j        +         buck-vs1            vs1          O         !          0        +            G      buck-vpa            vpa                    7          P        +         ldo-vfe28           vfe28            *         *        +        ldo-vxo22           vxo22            !         $         +   n      ldo-vrf18           vrf18            w@         w@        +   n      ldo-vrf12           vrf12            O         O        +   n            (      ldo-vefuse          vefuse           O         2Z        +        ldo-vcn33-bt          	  vcn33-bt             2Z         5g        +        ldo-vcn33-wifi          vcn33-wifi           2Z         5g        +        ldo-vcn28           vcn28            *         *        +        ldo-vcn18           vcn18            w@         w@        +        ldo-vcama           vcama            &%         *        +        ldo-vcamd           vcamd            B@         w@        +        ldo-vcamio18            vcamio           w@         w@        +        ldo-vldo28          vldo28           *         -        +        ldo-vsram-others            vsram-others             ^                   j        +   n         G      ldo-vsram-proc          vsram-proc           ^                   j        +   n         G                  ldo-vaux18          vaux18           w@         w@        +        ldo-vaud28          vaud28           *         *        +        ldo-vio28           vio28            *         *        +        ldo-vio18           vio18            w@         w@        +           G            6      ldo-vdram           vdram                     O        +        ldo-vmc         vmc          w@         2Z        +   ,            :      ldo-vmch            vmch             ,@          2Z        +   ,            9      ldo-vemc            vemc             ,@          2Z        +   ,         G            5      ldo-vsim1           vsim1            w@         w@        +              O      ldo-vsim2           vsim2                     /M`        +              &      ldo-vibr            vibr             O         2Z        +   ,            '      ldo-vusb33          vusb33           -         /M`        +              1         rtc           mediatek,mt6357-rtc       keys              mediatek,mt6357-keys       key-power           [   t         j      key-home            [   f         j               keypad@10010000       .    mediatek,mt8365-keypad mediatek,mt6779-keypad                                  j        z       |           ]           dkpd       	  xdisabled          syscon@10200000           mediatek,mt8365-mcucfg syscon                                                  
      interrupt-controller@10200a80         .    mediatek,mt8365-sysirq mediatek,mt6577-sysirq            e        T                             
                          iommu@10205000            mediatek,mt8365-m4u               P                z       f                                              ?      infracfg@1020e000              mediatek,mt8365-infracfg syscon                                                    rng@1020f000          (    mediatek,mt8365-rng mediatek,mt7623-rng                               ]              drng       dma-controller@11000280       2    mediatek,mt8365-uart-dma mediatek,mt6577-uart-dma         `                                                                                    H  z       -          .          /          0          3          4                      ]              dapdma                                serial@11002000       *    mediatek,mt8365-uart mediatek,mt6577-uart                                  z       #           ]               	  dbaud bus                                 tx rx           xokay                       default       serial@11003000       *    mediatek,mt8365-uart mediatek,mt6577-uart                 0                z       $           ]               	  dbaud bus                                tx rx           xokay                        default       serial@11004000       *    mediatek,mt8365-uart mediatek,mt6577-uart                 @                z       %           ]               	  dbaud bus                                tx rx           xokay               !        default       pwm@11006000              mediatek,mt8365-pwm               `                           z       L         (  ]                        	      
        dtop main pwm1 pwm2 pwm3            "        default         xokay          i2c@11007000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                p                             z                             ]      4            	  dmain dma                         +            xokay            *            #        default       i2c@11008000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                                             z                             ]      5            	  dmain dma                         +            xokay            *            $        default    hdmi@4c           ite,it66121             L                                z   D              %        default                E              &           '        &   (   ports                        +       port@0                       +                    endpoint@0                       3           =   )            Y         port@1                       +                   endpoint@0                       =   *            ]               touchscreen@5d            goodix,gt9271               ]        y      N           default            +        M      N                   O           W   ,        e   (         i2c@11009000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                                            z                             ]      6            	  dmain dma                         +          	  xdisabled          spi@1100a000          (    mediatek,mt8365-spi mediatek,mt7622-spi                                            +            z       >           ]            F              dparent-clk sel-clk spi-clk        	  xdisabled          pwm@1100e000          2    mediatek,mt8365-disp-pwm mediatek,mt8183-disp-pwm                                 dmain mm         ]      S      #        r   -                     i2c@1100f000          (    mediatek,mt8365-i2c mediatek,mt8168-i2c                                             z                             ]      7            	  dmain dma                         +          	  xdisabled          usb@11201000          #    mediatek,mt8365-mtu3 mediatek,mtu3                        .      >              	  omac ippc            z                     .      /            ]            E      D              dsys_ck ref_ck mcu_ck dma_ck                      +            M        xokay            otg         high-speed             0        default                     1   usb@11200000          '    mediatek,mt8365-xhci mediatek,mtk-xhci                                 omac         z       C         (  ]            E      D            F      $  dsys_ck ref_ck mcu_ck dma_ck xhci_ck         xokay               1      connector         %    gpio-usb-b-connector usb-b-connector                               micro              2         mmc@11230000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc               #                              z                  ]      I            +        dsource hclk source_cg           xokay                  5              I        3                                       '          5         D         S         Y         a           3        o   4        default state_uhs           y   5           6      mmc@11240000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc               $                              z                  ]      K            ,        dsource hclk source_cg           xokay            3                          L           '            7        o   8        default state_uhs                             y   9           :      mmc@11250000          (    mediatek,mt8365-mmc mediatek,mt8183-mmc               %                              z       D         (  ]      J            -      A      )      %  dsource hclk source_cg bus_clk sys_cg          	  xdisabled          ethernet@112a0000             mediatek,mt8365-eth              *                            z                  ]      c      8      9        dcore reg trans        	  xdisabled               ;        default            <        rmii       mdio                         +       ethernet-phy@0                           <            dsi-phy@11c00000          0    mediatek,mt8365-mipi-tx mediatek,mt8183-mipi-tx                               :mipi_tx0_pll            ]                                       N      t-phy@11cc0000        .    mediatek,mt8365-tphy mediatek,generic-tphy-v2                        +           M                usb-phy@0                           ]                    dref da_ref                         .      usb-phy@1000                           ]                    dref da_ref                         /         syscon@14000000           mediatek,mt8365-mmsys syscon                                                     port                         +       endpoint@0                       =   =            @      endpoint@1                      =   >            T            mutex@14001000            mediatek,mt8365-disp-mutex                                z                  r   -          smi@14002000              mediatek,mt8365-smi-common                                  ]                                dapb smi gals0 gals1         r   -                      larb@14003000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                 0                           ]                    dapb smi         r   -                                  ovl@1400b000          2    mediatek,mt8365-disp-ovl mediatek,mt8192-disp-ovl                                 ]              z                     ?            r   -       ports                        +       port@0                       +                    endpoint@0                       =   @            =         port@1                       +                   endpoint@0                       =   A            B               rdma@1400d000         4    mediatek,mt8365-disp-rdma mediatek,mt8183-disp-rdma                               ]      
        z                     ?                      r   -       ports                        +       port@0                       +                    endpoint@0                       =   B            A         port@1                       +                   endpoint@0                       =   C            D               color@1400f000        6    mediatek,mt8365-disp-color mediatek,mt8173-disp-color                                 ]              z                  r   -       ports                        +       port@0                       +                    endpoint@0                       =   D            C         port@1                       +                   endpoint@0                       =   E            F               ccorr@14010000        6    mediatek,mt8365-disp-ccorr mediatek,mt8183-disp-ccorr                                 ]              z                  r   -       ports                        +       port@0                       +                    endpoint@0                       =   F            E         port@1                       +                   endpoint@0                       =   G            H               aal@14011000          2    mediatek,mt8365-disp-aal mediatek,mt8183-disp-aal                                ]              z                  r   -       ports                        +       port@0                       +                    endpoint@0                       =   H            G         port@1                       +                   endpoint@0                       =   I            J               gamma@14012000        6    mediatek,mt8365-disp-gamma mediatek,mt8183-disp-gamma                                 ]              z                  r   -       ports                        +       port@0                       +                    endpoint@0                       =   J            I         port@1                       +                   endpoint@0                       =   K            L               dither@14013000       8    mediatek,mt8365-disp-dither mediatek,mt8183-disp-dither              0                ]              z                  r   -       ports                        +       port@0                       +                    endpoint@0                       =   L            K         port@1                       +                   endpoint@0                       =   M            R               dsi@14014000          (    mediatek,mt8365-dsi mediatek,mt8183-dsi              @                dengine digital hs           ]               N        z                  'dphy               N        r   -                         +            xokay       panel@0           startek,kd070fhfid015                        1      C                               >   O        K   P   port                         +       endpoint@0                       =   Q            S            ports                        +       port@0                       +                    endpoint@0                       =   R            M         port@1                       +                   endpoint@0                       =   S            Q               rdma@14016000         4    mediatek,mt8365-disp-rdma mediatek,mt8183-disp-rdma              `                ]              z                     ?                      r   -       ports                        +       port@0                       +                    endpoint@1                      =   T            >         port@1                       +                   endpoint@1                      =   U            X               dpi@14018000          (    mediatek,mt8365-dpi mediatek,mt8192-dpi                              ]            !              dpixel engine pll            z                  r   -          	  xdisabled               V        o   W        default sleep      ports                        +       port@0                       +                    endpoint@1                      =   X            U         port@1                       +                   endpoint@1                      =   Y            )               syscon@15000000           mediatek,mt8365-imgsys syscon                                                       larb@15001000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                                            ]                     dapb smi         r   -                                syscon@16000000           mediatek,mt8365-vdecsys syscon                                                Z      larb@16010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                                            ]   Z      Z           dapb smi         r   -                                syscon@17000000           mediatek,mt8365-vencsys syscon                                                [      larb@17010000         2    mediatek,mt8365-smi-larb mediatek,mt8186-smi-larb                                            ]   [       [            dapb smi         r   -                                syscon@19020000           mediatek,mt8365-apu syscon                                                     audio-controller@11220000             mediatek,mt8365-afe-pcm              "                           l  ]         L      y      z      {      |      P      Q      N      O      i      j      k      l        dtop_clk26m_clk top_audio_sel audio_i2s0_m audio_i2s1_m audio_i2s2_m audio_i2s3_m engen1 engen2 aud1 aud2 i2s0_m_sel i2s1_m_sel i2s2_m_sel i2s3_m_sel            z       a           r   -           xokay            X               f         timer             arm,armv8-timer                   0  z                                 
         dummy13m              fixed-clock         * ]@                        \      timer@10017000        /    mediatek,mt8365-systimer mediatek,mt6765-timer               p                z                  ]   \        dclk13m        chosen          kserial0:921600n8          connector             hdmi-connector          whdmi             d      port                         +       endpoint@0                       =   ]            *            firmware       optee             linaro,optee-tz          smc          gpio-keys         
    gpio-keys           default            ^   key-volume-up                          
  wvolume_up           }   s         j                    memory@40000000          memory               @                regulator-0           regulator-fixed       	  otg_vbus             LK@         LK@                                       2      regulator-vsys            regulator-fixed         vsys             G                     _      regulator-vio33tp             regulator-fixed       	  vio33_tp             2Z         2Z           _            ,      reserved-memory                      +            M   secmon@43000000                       C                optee@43200000                        C                   sound             mediatek,mt8365-mt6357        /  default dmic miso_off miso_on mosi_off mosi_on             `        o   a           b           c           d           e           f      regulator-vsys-lcm            regulator-fixed                                     LK@         LK@      	  vsys_lcm                P         	compatible interrupt-parent #address-cells #size-cells model aal0 ccorr0 color0 dither0 dpi0 dsi0 gamma0 ovl0 rdma0 rdma1 serial0 ethernet opp-shared phandle opp-hz opp-microvolt cpu device_type reg #cooling-cells enable-method cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks clock-names operating-points-v2 proc-supply sram-supply entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified #clock-cells clock-frequency clock-output-names ranges #interrupt-cells interrupt-controller interrupts #power-domain-cells mediatek,infracfg mediatek,infracfg-nao mediatek,smi #reset-cells mediatek,pctl-regmap gpio-controller #gpio-cells pinmux input-enable bias-pull-down drive-strength bias-pull-up output-high bias-disable output-low reg-names interrupts-extended mediatek,micbias0-microvolt mediatek,micbias1-microvolt #io-channel-cells regulator-name regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-enable-ramp-delay regulator-always-on linux,keycodes wakeup-source status mediatek,larbs #iommu-cells dma-requests #dma-cells dmas dma-names pinctrl-0 pinctrl-names #pwm-cells clock-div #sound-dai-cells reset-gpios vcn18-supply vcn33-supply vrf12-supply bus-width remote-endpoint irq-gpios AVDD28-supply VDDIO-supply power-domains phys dr_mode maximum-speed usb-role-switch vusb33-supply id-gpios vbus-supply assigned-clock-parents assigned-clocks cap-mmc-highspeed cap-mmc-hw-reset hs400-ds-delay max-frequency mmc-hs200-1_8v mmc-hs400-1_8v no-sd no-sdio non-removable pinctrl-1 vmmc-supply vqmmc-supply cap-sd-highspeed cd-gpios sd-uhs-sdr104 sd-uhs-sdr50 mediatek,pericfg phy-handle phy-mode #phy-cells mediatek,larb-id iommus mediatek,rdma-fifo-size phy-names enable-gpios iovcc-supply power-supply mediatek,dmic-mode stdout-path label linux,code debounce-interval gpio enable-active-high regulator-boot-on vin-supply no-map pinctrl-2 pinctrl-3 pinctrl-4 pinctrl-5 mediatek,platform 