  u   8  k`   (            	  k(                             5    bananapi,bpi-r4-2g5 bananapi,bpi-r4 mediatek,mt7988a                                     +         &   7Banana Pi BPI-R4 (1x SFP+, 1x 2.5GbE)         	   =embedded       cci       (    mediatek,mt7988-cci mediatek,mt8183-cci          J                       Qcci intermediate             ]            q            }         opp-table-cci             operating-points-v2                    }      opp-480000000                8           P      opp-660000000                'V           P      opp-900000000                5           P      opp-1080000000               @_~                    cpus                         +       cpu@0             arm,cortex-a73                        cpu          psci             J                      Qcpu intermediate             ]                        q            }   ;      cpu@1             arm,cortex-a73                       cpu          psci             J                      Qcpu intermediate             ]                        q            }   <      cpu@2             arm,cortex-a73                       cpu          psci             J                      Qcpu intermediate             ]                        q            }   =      cpu@3             arm,cortex-a73                       cpu          psci             J                      Qcpu intermediate             ]                        q            }   >      opp-table-0           operating-points-v2                    }      opp-800000000                /           P      opp-1100000000               A           P      opp-1500000000               Yh/           P      opp-1800000000               kI                       oscillator-40m            fixed-clock          bZ                       clkxtal       pmu           arm,cortex-a73-pmu                                      psci              arm,psci-0.2             smc       reserved-memory                      +               secmon@43000000              C                            soc           simple-bus                                +      interrupt-controller@c000000              arm,gic-v3        P                                   @              A             B                                     	                    .            }         clock-controller@10001000              mediatek,mt7988-infracfg syscon                                           ?            }   	      clock-controller@1001b000              mediatek,mt7988-topckgen syscon                                           }         watchdog@1001c000             mediatek,mt7988-wdt                                      n           ?           Lokay             }          clock-controller@1001e000             mediatek,mt7988-apmixedsys                                            }         pinctrl@1001f000              mediatek,mt7988-pinctrl       p                                                                                                   7  Sgpio iocfg_tr iocfg_br iocfg_rb iocfg_lb iocfg_tl eint           ]        m           y              T                                                .            }      pcie0-pins           }      mux         pcie          3  pcie_2l_0_pereset pcie_clk_req_n0_0 pcie_wake_n0_0           pcie1-pins           }      mux         pcie          1  pcie_2l_1_pereset pcie_clk_req_n1 pcie_wake_n1_0             pcie2-pins           }      mux         pcie          3  pcie_1l_0_pereset pcie_clk_req_n2_0 pcie_wake_n2_0           pcie3-pins           }      mux         pcie          1  pcie_1l_1_pereset pcie_clk_req_n3 pcie_wake_n3_0             spi1-pins            }      mux         spi         spi1             uart0-pins           }   
   mux         uart            uart0            i2c0-g0-pins             }      mux         i2c         i2c0_1           i2c1-g0-pins             }   ?   mux         i2c         i2c1_0           i2c2-g1-pins             }      mux         i2c         i2c2_1           gbe0-led0-pins           }   (   mux         led       
  gbe0_led0            gbe1-led0-pins           }   *   mux         led       
  gbe1_led0            gbe2-led0-pins           }   ,   mux         led       
  gbe2_led0            gbe3-led0-pins           }   .   mux         led       
  gbe3_led0            2p5gbe-led0-pins             }   3   mux         led         2p5gbe_led0          mmc0-emmc-45-pins            }   @   mux         flash           emmc_45          mmc0-emmc-51-pins            }   A   mux         flash           emmc_51          mmc0-sdcard-pins             }   B   mux         flash           sdcard           spi0-flash-pins          }      mux         spi         spi0 spi0_wp_hold               pwm@10048000              mediatek,mt7988-pwm                            P   J   	      	      	      	      	      	      	      	      	       	   !      1   Qtop main pwm1 pwm2 pwm3 pwm4 pwm5 pwm6 pwm7 pwm8                       Lokay             }   9      mcusys@100e0000           mediatek,mt7988-mcusys syscon                                              }         serial@11000000       *    mediatek,mt7988-uart mediatek,mt6577-uart                                          {           uart wakeup          J      '   	   /      	   Qbaud bus            default            
        Lokay             }   C      serial@11000100       *    mediatek,mt7988-uart mediatek,mt6577-uart                                         |           uart wakeup          J      '   	   0      	   Qbaud bus          	  Ldisabled          serial@11000200       *    mediatek,mt7988-uart mediatek,mt6577-uart                                         }           uart wakeup          J      '   	   1      	   Qbaud bus          	  Ldisabled          i2c@11003000              mediatek,mt7981-i2c                0            !p                                              J   	   .   	   *      	   Qmain dma                         +            Lokay            default                     }   D   rt5190a@64            richtek,rt5190a             d                                          }   E   regulators     buck1           rt5190a-buck1            M         M        5                M         _         }         buck2           vcore            	'         \         M         _      buck3           vproc            	'         \         M         }         buck4           rt5190a-buck4            w@         w@        5                M         _      ldo         rt5190a-ldo          w@         w@         M         _               i2c@11004000              mediatek,mt7981-i2c                @            !q                                               J   	   .   	   *      	   Qmain dma                         +          	  Ldisabled             }   F      i2c@11005000              mediatek,mt7981-i2c                P            !q                                              J   	   .   	   *      	   Qmain dma                         +            Lokay            default                     }   G   i2c-mux@70            nxp,pca9545             p        s                              +             }   H   i2c@0                        +                    rtc@51            nxp,pcf8563             Q                      }   I      eeprom@57             atmel,24c02             W                    i2c@1                        +                         }   :            spi@11007000          *    mediatek,mt7988-spi-quad mediatek,spi-ipm                 p                                     J            *   	   5   	   8          Qparent-clk sel-clk spi-clk hclk                      +            Lokay            default                     }   J   flash@0       	    spi-nand                         u                                }   K   partitions            fixed-partitions                         +      partition@0         bl2                                          spi@11008000          ,    mediatek,mt7988-spi-single mediatek,spi-ipm                                                    J            +   	   6   	   9          Qparent-clk sel-clk spi-clk hclk                      +            default                    Lokay             }   L      spi@11009000          *    mediatek,mt7988-spi-quad mediatek,spi-ipm                                                      J            *   	   7   	   :          Qparent-clk sel-clk spi-clk hclk                      +          	  Ldisabled             }   M      lvts@1100a000             mediatek,mt7988-lvts-ap                                           J   	   -                              	                      lvts-calib-data-1            }   4      usb@11190000          '    mediatek,mt7988-xhci mediatek,mtk-xhci                        .     >              	  Smac ippc                             (   J   	   K   	   M   	   I   	   G   	   U      $   Qsys_ck ref_ck mcu_ck dma_ck xhci_ck                           	  Ldisabled          usb@11200000          '    mediatek,mt7988-xhci mediatek,mtk-xhci                         .      >              	  Smac ippc                             (   J   	   L   	   N   	   J   	   H   	   V      $   Qsys_ck ref_ck mcu_ck dma_ck xhci_ck                             Lokay             }   N      mmc@11230000              mediatek,mt7988-mmc               #                                                   J   	   ?   	   @   	   B   	   A              (      )                             Qsource hclk axi_cg ahb_cg                        +          	  Ldisabled             }   O      pcie@11280000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            pci                      +                (                	  Spcie-mac            .                              ?             8                                                                J   	   ]   	   Y   	      	   a      !   Qpl_250m tl_26m peri_26m top_133m            default                    Lokay                        	  Ipcie-phy            .           S                     `  f                                                                                              }   P   interrupt-controller                         .                     }            pcie@11290000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            pci                      +                )                	  Spcie-mac            .                              ?             8         (       (                  (       (                   J   	   ^   	   Z   	      	   b      !   Qpl_250m tl_26m peri_26m top_133m            default                    Lokay            .           S                     `  f                                                                                              }   Q   interrupt-controller                         .                     }            pcie@11300000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            pci                      +                0                	  Spcie-mac            .                               ?             8         0       0                  0       0                   J   	   [   	   W   	      	   _      !   Qpl_250m tl_26m peri_26m top_133m            default                    Lokay            .           S                     `  f                                                                                              }   R   interrupt-controller                         .                     }            pcie@11310000         *    mediatek,mt7986-pcie mediatek,mt8192-pcie            pci                      +                1                	  Spcie-mac            .                              ?             8         8       8                  8       8                   J   	   \   	   X   	      	   `      !   Qpl_250m tl_26m peri_26m top_133m            default                    Lokay            .           S                     `  f                                                                                              }   S   interrupt-controller                         .                     }            t-phy@11c50000        .    mediatek,mt7986-tphy mediatek,generic-tphy-v2                        +                    Lokay             }   T   usb-phy@11c50000                                   J   	   T         Qref         t            }         usb-phy@11c50700                        	          J   	   R         Qref         t            }            system-controller@11d10084            mediatek,mt7988-topmisc syscon                               }         xs-phy@11e10000       %    mediatek,mt7988-xsphy mediatek,xsphy                         +                    Lokay             }   U   usb-phy@11e10000                                   J   	   S         Qref         t            }         usb-phy@11e13000                 4                 J   	   Q         Qref         t                             }            phy@11f20000              mediatek,mt7988-xfi-tphy                                   J            G         Qxfipll topxtal                                  t             }   V      phy@11f30000              mediatek,mt7988-xfi-tphy                                   J            H         Qxfipll topxtal                         t             }   W      clock-controller@11f40000             mediatek,mt7988-xfi-pll                                                           }         efuse@11f50000        %    mediatek,mt7988-efuse mediatek,efuse                                               +      calib@918              	   (         }         calib@940              	@            }   '      calib@954              	T            }   )      calib@968              	h            }   +      calib@97c              	|            }   -         clock-controller@15000000             mediatek,mt7988-ethsys syscon                                              ?            }   /      switch@15020000           mediatek,mt7988-switch                                         .                                 !             }   X   ports                        +       port@0                          "      	  internal            wan          }   Y      port@1                         #      	  internal            lan1             }   Z      port@2                         $      	  internal            lan2             }   [      port@3                         %      	  internal            lan3             }   \      port@6                         &      	  internal       fixed-link            '                              mdio                         +                  ethernet-phy@0            ethernet-phy-ieee802.3-c22                                       '        phy-cal-data               (        gbe-led          }   "   leds                         +       led@0                        Lokay            wan                     }   ]      led@1                     	  Ldisabled             }   ^            ethernet-phy@1            ethernet-phy-ieee802.3-c22                                     )        phy-cal-data               *        gbe-led          }   #   leds                         +       led@0                        Lokay            lan                     }   _      led@1                     	  Ldisabled             }   `            ethernet-phy@2            ethernet-phy-ieee802.3-c22                                     +        phy-cal-data               ,        gbe-led          }   $   leds                         +       led@0                        Lokay            lan                     }   a      led@1                     	  Ldisabled             }   b            ethernet-phy@3            ethernet-phy-ieee802.3-c22                                     -        phy-cal-data               .        gbe-led          }   %   leds                         +       led@0                        Lokay            lan                     }   c      led@1                     	  Ldisabled             }   d                  clock-controller@15031000             mediatek,mt7988-ethwarp                                          ?            }   !      ethernet@15100000             mediatek,mt7988-eth                             `                                                                                         (  fe0 fe1 fe2 fe3 pdma0 pdma1 pdma2 pdma3          J   /      /      /      /      /      !       !      !      /         "      K      L      M      N      f                  $      a      d      e   /       /      /        D   Qcrypto fe gp2 gp1 gp3 ethwarp_wocpu2 ethwarp_wocpu1 ethwarp_wocpu0 esw top_eth_gmii_sel top_eth_refck_50m_sel top_eth_sys_200m_sel top_eth_sys_sel top_eth_xgmii_sel top_eth_mii_sel top_netsys_sel top_netsys_500m_sel top_netsys_pao_2x_sel top_netsys_sync_250m_sel top_netsys_ppefb_250m_sel top_netsys_warp_sel xgp1 xgp2 xgp3       0               !      A      B      C      E      0                                                  0                     +               /                    }   e   mac@0             mediatek,eth-mac                       	  internal             }   &   fixed-link            '                           mac@1             mediatek,eth-mac                        Lokay            '   1      	  internal             }   f      mac@2             mediatek,eth-mac                      	  Ldisabled            +in-band-status          usxgmii         3   2         }   g      mdio-bus                         +             }   h   ethernet-phy@15           ethernet-phy-ieee802.3-c45                         3        i2p5gbe-led          }   1            sram@15400000         
    mmio-sram                @                               +               @                   }   0         thermal-zones      cpu-thermal         7          M          [   4             }   i   trips      crit            k H        w        	   Ecritical             }   j      hot         k         w           Ehot          }   k      active-high         k 8        w           Eactive           }   6      active-med          k L        w           Eactive           }   7      active-low          k  @        w           Eactive           }   8         cooling-maps       map-cpu-active-high            5                 6      map-cpu-active-med             5                 7      map-cpu-active-low             5                 8               timer             arm,armv8-timer                   0                                    
         aliases         /soc/ethernet@15100000/mac@0            /soc/ethernet@15100000/mac@1            /soc/ethernet@15100000/mac@2          chosen          serial0:115200n8          pwm-fan           pwm-fan                P                            9      P        Lokay             }   5      gpio-leds         
    gpio-leds      led-green           status                     y      O            on           }   l      led-blue            wps                    y      ?            off          }   m         regulator-1p8v            regulator-fixed         fixed-1.8V           w@         w@         M         _         }   n      regulator-3p3v            regulator-fixed         fixed-3.3V           2Z         2Z         M         _         }   o      sfp1              sff,sfp            :                        6                  R           *                 =      F            N      E             }   2      __symbols__          /cci            ]/opp-table-cci          e/cpus/cpu@0         j/cpus/cpu@1         o/cpus/cpu@2         t/cpus/cpu@3         y/cpus/opp-table-0         "  /soc/interrupt-controller@c000000           /soc/clock-controller@10001000          /soc/clock-controller@1001b000          /soc/watchdog@1001c000          /soc/clock-controller@1001e000          /soc/pinctrl@1001f000         !  /soc/pinctrl@1001f000/pcie0-pins          !  /soc/pinctrl@1001f000/pcie1-pins          !  /soc/pinctrl@1001f000/pcie2-pins          !  /soc/pinctrl@1001f000/pcie3-pins             /soc/pinctrl@1001f000/spi1-pins       !  /soc/pinctrl@1001f000/uart0-pins          #  /soc/pinctrl@1001f000/i2c0-g0-pins        #  /soc/pinctrl@1001f000/i2c1-g0-pins        #  /soc/pinctrl@1001f000/i2c2-g1-pins        %  /soc/pinctrl@1001f000/gbe0-led0-pins          %  /soc/pinctrl@1001f000/gbe1-led0-pins          %  &/soc/pinctrl@1001f000/gbe2-led0-pins          %  5/soc/pinctrl@1001f000/gbe3-led0-pins          '  D/soc/pinctrl@1001f000/2p5gbe-led0-pins        (  V/soc/pinctrl@1001f000/mmc0-emmc-45-pins       (  h/soc/pinctrl@1001f000/mmc0-emmc-51-pins       '  z/soc/pinctrl@1001f000/mmc0-sdcard-pins        &  /soc/pinctrl@1001f000/spi0-flash-pins           /soc/pwm@10048000           /soc/mcusys@100e0000            /soc/serial@11000000            /soc/i2c@11003000           /soc/i2c@11003000/rt5190a@64          .  /soc/i2c@11003000/rt5190a@64/regulators/buck1         .  /soc/i2c@11003000/rt5190a@64/regulators/buck3           /soc/i2c@11004000           /soc/i2c@11005000           /soc/i2c@11005000/i2c-mux@70          *  /soc/i2c@11005000/i2c-mux@70/i2c@0/rtc@51         #  /soc/i2c@11005000/i2c-mux@70/i2c@1          /soc/spi@11007000            /soc/spi@11007000/flash@0           	/soc/spi@11008000           /soc/spi@11009000           /soc/lvts@1100a000          /soc/usb@11200000           /soc/mmc@11230000           $/soc/pcie@11280000        (  */soc/pcie@11280000/interrupt-controller         5/soc/pcie@11290000        (  ;/soc/pcie@11290000/interrupt-controller         F/soc/pcie@11300000        (  L/soc/pcie@11300000/interrupt-controller         W/soc/pcie@11310000        (  ]/soc/pcie@11310000/interrupt-controller         h/soc/t-phy@11c50000       %  m/soc/t-phy@11c50000/usb-phy@11c50000          %  y/soc/t-phy@11c50000/usb-phy@11c50700             /soc/system-controller@11d10084         /soc/xs-phy@11e10000          &  /soc/xs-phy@11e10000/usb-phy@11e10000         &  /soc/xs-phy@11e10000/usb-phy@11e13000           /soc/phy@11f20000           /soc/phy@11f30000           /soc/clock-controller@11f40000          /soc/efuse@11f50000/calib@918           /soc/efuse@11f50000/calib@940           /soc/efuse@11f50000/calib@954           /soc/efuse@11f50000/calib@968           /soc/efuse@11f50000/calib@97c           /soc/clock-controller@15000000          $/soc/switch@15020000          "  +/soc/switch@15020000/ports/port@0         "  5/soc/switch@15020000/ports/port@1         "  ?/soc/switch@15020000/ports/port@2         "  I/soc/switch@15020000/ports/port@3         )  S/soc/switch@15020000/mdio/ethernet-phy@0          4  \/soc/switch@15020000/mdio/ethernet-phy@0/leds/led@0       4  j/soc/switch@15020000/mdio/ethernet-phy@0/leds/led@1       )  x/soc/switch@15020000/mdio/ethernet-phy@1          4  /soc/switch@15020000/mdio/ethernet-phy@1/leds/led@0       4  /soc/switch@15020000/mdio/ethernet-phy@1/leds/led@1       )  /soc/switch@15020000/mdio/ethernet-phy@2          4  /soc/switch@15020000/mdio/ethernet-phy@2/leds/led@0       4  /soc/switch@15020000/mdio/ethernet-phy@2/leds/led@1       )  /soc/switch@15020000/mdio/ethernet-phy@3          4  /soc/switch@15020000/mdio/ethernet-phy@3/leds/led@0       4  /soc/switch@15020000/mdio/ethernet-phy@3/leds/led@1         /soc/clock-controller@15031000          /soc/ethernet@15100000          /soc/ethernet@15100000/mac@0            /soc/ethernet@15100000/mac@1            /soc/ethernet@15100000/mac@2             	/soc/ethernet@15100000/mdio-bus       0  	/soc/ethernet@15100000/mdio-bus/ethernet-phy@15         	/soc/sram@15400000          	$/thermal-zones/cpu-thermal        &  	0/thermal-zones/cpu-thermal/trips/crit         %  	>/thermal-zones/cpu-thermal/trips/hot          -  	K/thermal-zones/cpu-thermal/trips/active-high          ,  	`/thermal-zones/cpu-thermal/trips/active-med       ,  	t/thermal-zones/cpu-thermal/trips/active-low       	  	/pwm-fan            	/gpio-leds/led-green            	/gpio-leds/led-blue         	/regulator-1p8v         	/regulator-3p3v         /sfp1            	compatible interrupt-parent #address-cells #size-cells model chassis-type clocks clock-names operating-points-v2 proc-supply phandle opp-shared opp-hz opp-microvolt reg device_type enable-method mediatek,cci clock-frequency #clock-cells clock-output-names interrupts ranges no-map interrupt-controller #interrupt-cells #reset-cells status reg-names gpio-controller #gpio-cells gpio-ranges function groups #pwm-cells interrupt-names pinctrl-names pinctrl-0 clock-div vin2-supply vin3-supply vin4-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-allowed-modes regulator-boot-on regulator-always-on reset-gpios size spi-max-frequency spi-tx-bus-width spi-rx-bus-width label read-only #thermal-sensor-cells resets nvmem-cells nvmem-cell-names phys assigned-clocks assigned-clock-parents linux,pci-domain bus-range phy-names interrupt-map-mask interrupt-map #phy-cells mediatek,syscon-type mediatek,usxgmii-performance-errata phy-handle phy-mode ethernet speed full-duplex pause mediatek,pio color sram mediatek,ethsys mediatek,infracfg phy managed sfp polling-delay-passive polling-delay thermal-sensors temperature hysteresis cooling-device trip ethernet0 ethernet1 ethernet2 stdout-path cooling-levels #cooling-cells pwms default-state i2c-bus maximum-power-milliwatt los-gpios mod-def0-gpios rate-select0-gpios tx-disable-gpios tx-fault-gpios cci_opp cpu0 cpu1 cpu2 cpu3 cluster0_opp gic topckgen watchdog apmixedsys pcie0_pins pcie1_pins pcie2_pins pcie3_pins spi1_pins uart0_pins i2c0_pins i2c1_pins i2c2_1_pins gbe0_led0_pins gbe1_led0_pins gbe2_led0_pins gbe3_led0_pins i2p5gbe_led0_pins mmc0_pins_emmc_45 mmc0_pins_emmc_51 mmc0_pins_sdcard spi0_flash_pins pwm mcusys serial0 i2c0 rt5190a_64 rt5190_buck1 rt5190_buck3 i2c1 i2c2 pca9545 pcf8563 i2c_sfp1 spi0 spi_nand spi1 spi2 lvts ssusb1 mmc0 pcie2 pcie_intc2 pcie3 pcie_intc3 pcie0 pcie_intc0 pcie1 pcie_intc1 tphy tphyu2port0 tphyu3port0 topmisc xsphy xphyu2port0 xphyu3port0 xfi_tphy0 xfi_tphy1 xfi_pll lvts_calibration phy_calibration_p0 phy_calibration_p1 phy_calibration_p2 phy_calibration_p3 switch gsw_port0 gsw_port1 gsw_port2 gsw_port3 gsw_phy0 gsw_phy0_led0 gsw_phy0_led1 gsw_phy1 gsw_phy1_led0 gsw_phy1_led1 gsw_phy2 gsw_phy2_led0 gsw_phy2_led1 gsw_phy3 gsw_phy3_led0 gsw_phy3_led1 ethwarp eth gmac0 gmac1 gmac2 mdio_bus int_2p5g_phy eth_sram cpu_thermal cpu_trip_crit cpu_trip_hot cpu_trip_active_high cpu_trip_active_med cpu_trip_active_low fan led_green led_blue reg_1p8v reg_3p3v 