  i   8  h   (            	  0                                                                      ,PHYTEC Libra i.MX95 RDK FPSC          @   2phytec,imx95-libra-rdk-fpsc phytec,imx95-phycore-fpsc fsl,imx95    cpus                                 idle-states          =psci       cpu-pd-wait          2arm,idle-state           J  3          a         r  '           X           ix           :                     cpu@0            cpu          2arm,cortex-a55                        psci                                                   	perf                       )   @        ;           H           U   @        g           t                     cpu@100          cpu          2arm,cortex-a55                       psci                                                   	perf                       )   @        ;           H           U   @        g           t                     cpu@200          cpu          2arm,cortex-a55                       psci                                                   	perf                       )   @        ;           H           U   @        g           t                     cpu@300          cpu          2arm,cortex-a55                       psci                                                   	perf                       )   @        ;           H           U   @        g           t                     cpu@400          cpu          2arm,cortex-a55                                     	perf             psci                                               )   @        ;           H           U   @        g           t                     cpu@500          cpu          2arm,cortex-a55                                     	perf             psci                                               )   @        ;           H           U   @        g           t   	                  l2-cache-l0          2cache                      +   @        =                               t   
                  l2-cache-l1          2cache                      +   @        =                               t   
                  l2-cache-l2          2cache                      +   @        =                               t   
                  l2-cache-l3          2cache                      +   @        =                               t   
                  l2-cache-l4          2cache                      +   @        =                               t   
                  l2-cache-l5          2cache                      +   @        =                               t   
            	      l3-cache             2cache                      +   @        =                                   
      cpu-map    cluster0       core0                    core1                    core2                    core3                    core4                    core5                             clock-dummy          2fixed-clock                                 dummy               .      clock-ext1           2fixed-clock                     k@      	  clk_ext1          clock-sai-mclk1          2fixed-clock                               
  sai1_mclk         clock-sai-mclk2          2fixed-clock                               
  sai2_mclk         clock-sai-mclk3          2fixed-clock                               
  sai3_mclk         clock-sai-mclk4          2fixed-clock                               
  sai4_mclk         clock-sai-mclk5          2fixed-clock                               
  sai5_mclk         clock-sys100m            2fixed-clock                              clk_sys100m             K      clock-24m            2fixed-clock                     n6         osc_24m             >      sram@204c0000         
   2mmio-sram                 L                         L                                   firmware       scmi          	   2arm,scmi          0                                                                                             protocol@11                                    G      protocol@12                   protocol@13                                          protocol@14                                          protocol@15                                          protocol@19                         <   emdiogrp          0  '       (         	~       $                     [      enetc0grp        h  '   P  T                     8                                              ~                   ~                   ~                   ~                   ~                                      ~                   ~                   ~                   ~                   ~                               V      enetc1grp        8  '                                    ~                   ~                    ~                   ~                  ~                                    ~                   ~     $              ~  $  (              ~                  ~                              Y      flexcan1grp       0  '                                            E      flexcan2grp       0  '   t  x                |    D                    +      flexspigrp          '                                   p  t             t  x             x  |             |                                        -      gpio1grp          H  '                                                               F      gpio2grp            '   T  X                          =      lpi2c1grp         0  '                @                 @             @      lpi2c2grp         0  '                @                 @             C      lpi2c3grp         0  '             @               @             $      lpi2c4grp         0  '             @              @             %      lpi2c5grp         0  '   h  l        @    l  p        @             2      lpspi3grp         `  '   <  @                8  <                4  8                0  4                         (      lpspi4grp         `  '   d  h  <           `  d  D           \  `  @           X  \  0                    )      lpspi7grp         `  '   ,  0                (  ,                $  (                   $                         3      lpuart5grp        `  '       p               t                                  l                    *      lpuart7grp        0  '                                            0      lpuart8grp        `  '   D  H                @  D                L  P                H  L                         1      pcie0grp          0  '                                               Q      pcie1grp          0  '                                               T      regusdhc2vmmcgrp            '                             ]      sai5grp         '                                                                                                   /      tpm3grp         '   p  t                                tpm5grp         '   x  |                         "      usbcgrp       0  '                                                H      usb2grp       0  '                                          usdhc1grp          '  0  4                4  8                8  <                <  @                @  D                D  H                H  L                L  P                ,  0                (  ,                P  T                          4      usdhc1-100mhzgrp           '  0  4                4  8                8  <                <  @                @  D                D  H                H  L                L  P                ,  0                (  ,                P  T                          5      usdhc1-200mhzgrp           '  0  4                4  8                8  <                <  @                @  D                D  H                H  L                L  P                ,  0                (  ,                P  T                          6      usdhc2grp           '                                                                                                                                T  X                          7      usdhc2-100mhzgrp            '                                                                                                                                T  X                          8      usdhc2-200mhzgrp            '                                                                                                                                T  X                          9      usdhc3grp           '  X  \             \  `             `  d             d  h             h  l             l  p                       ;      lpuart2grp        0  '                                                D      lvds0grp            '   `  d                          _      rtcgrp          '   X  \                          B      tpm4grp         '   d  h                         !         protocol@80                   protocol@81                   protocol@82                   protocol@84                         pmu          2arm,cortex-a55-pmu          0        ?      thermal-zones      a55-thermal         ;           Q          _         trips      trip0           o (        {           passive                   trip1           o H        {        	   critical             cooling-maps       map0                     H                                ana-thermal         ;           Q          _          trips      trip0           o (        {           passive                   trip1           o H        {        	   critical             cooling-maps       map0                     H                                   psci             2arm,psci-1.0             Csmc       timer            2arm,armv8-timer       0  0        ?        ?        ?      
  ?        n6                             interrupt-controller@48000000            2arm,gic-v3                H              H                                                              0      	                                                 msi-controller@48040000          2arm,gic-v3-its               H                                                  P         usbphynop            2usb-nop-xceiv                 W      	  main_clk                            M      soc          2simple-bus                                       etm@40840000          "   2arm,coresight-etm4x arm,primecell                @                  ]                         H      	  apb_pclk          	  6disabled       out-ports      port       endpoint            =                              funnel           2arm,coresight-static-funnel       	  6disabled       in-ports       port       endpoint            =                           out-ports      port       endpoint            =                              funnel-sys           2arm,coresight-static-funnel       	  6disabled       in-ports       port       endpoint            =                           out-ports      port       endpoint            =                              etf@41030000              2arm,coresight-tmc arm,primecell              A                       H      	  apb_pclk          	  6disabled       in-ports       port       endpoint            =                           out-ports      port       endpoint            =                              etr@41040000              2arm,coresight-tmc arm,primecell              A                       H      	  apb_pclk          	  6disabled       in-ports       port       endpoint            =                              bus@42000000             2fsl,aips-bus simple-bus              B                   B       B      (       (                                  dma-controller@42000000          2fsl,imx95-edma5          B    !          M           X   @        0                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                              w        dma             #      dma-controller@42210000          2fsl,imx95-edma5          B!   !          M           X   @        0                                                                                                                                                                          	         	         
         
                                                                                                                                                                                                                                                                                                                                                                                                           w        dma       mailbox@42430000             2fsl,imx95-mu             BC             0                        w        e         	  6disabled          watchdog@42490000            2fsl,imx93-wdt            BI             0       M                 w        q   (      	  6disabled          pwm@424e0000             2fsl,imx7ulp-pwm          BN                   w        }         	  6disabled                        default       pwm@424f0000             2fsl,imx7ulp-pwm          BO                           }         	  6disabled               !        default       pwm@42500000             2fsl,imx7ulp-pwm          BP                           }         	  6disabled               "        default       pwm@42510000             2fsl,imx7ulp-pwm          BQ                           }         	  6disabled          i3c@42520000          $   2nxp,imx95-i3c silvaco,i3c-master-v1          BR             0       9                                           w              pclk fast_clk         	  6disabled          i2c@42530000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            BS             0       :                       w        per ipg                                       #              #   	               tx rx           6okay                        $        default    leds@62          2nxp,pca9533             b   led-1                     led-2                     led-3                           i2c@42540000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            BT             0       ;                       w        per ipg                                       #   
           #                  tx rx           6okay                        %        default    gpio@20          2ti,tca6416                            &        0                                  CSI1_CTRL1 CSI1_CTRL2 CSI1_CTRL3 CSI1_CTRL4 CSI2_CTRL1 CSI2_CTRL2 CSI2_CTRL3 CSI2_CTRL4 CLK_EN_AV nCAN2_EN nCAN1_EN PCIE1_nWAKE PCIE2_nWAKE PCIE2_nALERT_3V3 UART1_BT_RS_SEL UART1_RS232_485_SEL               '            a   bt-rs-hog                                   UART1_BT_RS_SEL                      spi@42550000                                       2fsl,imx95-spi fsl,imx7ulp-spi            BU             0       =                       w        per ipg             #              #                  tx rx         	  6disabled               (        default       spi@42560000                                       2fsl,imx95-spi fsl,imx7ulp-spi            BV             0       >                       w        per ipg             #              #                  tx rx         	  6disabled               )        default       serial@42570000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           BW             0       @                         ipg             #             #                   rx tx         	  6disabled          serial@42580000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           BX             0       A                         ipg             #             #                   rx tx         	  6disabled          serial@42590000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           BY             0       B                         ipg             #             #                   rx tx         	  6disabled               *        default       serial@425a0000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           BZ             0       C                         ipg             #             #                   rx tx         	  6disabled          can@425b0000             2fsl,imx95-flexcan            B[             0       &                 w      x        ipg per         
      x              
        1bZ         F            6okay               +        default         U   ,      can@42600000             2fsl,imx95-flexcan            B`             0       (                 w      y        ipg per         
      y              
        1bZ         F          	  6disabled          spi@425e0000             2nxp,imx8mm-fspi          B^     (              Zfspi_base fspi_mmap                                   0       0                 ~      ~        fspi_en fspi            
      ~              	        1         6okay               -        default    flash@0          2jedec,spi-nor                        d	        v                         '         sai@42650000             2fsl,imx95-sai            Be             0                        w   .         .   .        bus mclk0 mclk1 mclk2 mclk3             #   =          #   <                rx tx         	  6disabled          sai@42660000             2fsl,imx95-sai            Bf             0                        w   .         .   .        bus mclk0 mclk1 mclk2 mclk3             #   D          #   C                rx tx         	  6disabled          sai@42670000             2fsl,imx95-sai            Bg             0                        w   .         .   .        bus mclk0 mclk1 mclk2 mclk3             #   F          #   E                rx tx         	  6disabled               /        default       xcvr@42680000            2fsl,imx95-xcvr            Bh     Bh    Bh    Bh            Zram regs rxfifo txfifo          0                                  w         .      v        ipg phy spba pll_ipg                #   A          #   B                rx tx         	  6disabled          serial@42690000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           Bi             0       D                         ipg             #   X          #   W                rx tx           6okay               0        default       serial@426a0000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           Bj             0       E                         ipg             #   Z          #   Y                rx tx           6okay               1        default                i2c@426b0000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            Bk             0                              w        per ipg                                       #   G           #   H               tx rx           6okay                        2        default    eeprom@51            2atmel,24c02             Q                      '         i2c@426c0000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            Bl             0                              w        per ipg                                       #   I           #   J               tx rx         	  6disabled          i2c@426d0000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            Bm             0                              w        per ipg                                       #   K           #   L               tx rx         	  6disabled          i2c@426e0000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            Bn             0                              w        per ipg                                       #   M           #   N               tx rx         	  6disabled          spi@426f0000                                       2fsl,imx95-spi fsl,imx7ulp-spi            Bo             0                              w        per ipg             #   O           #   P               tx rx         	  6disabled          spi@42700000                                       2fsl,imx95-spi fsl,imx7ulp-spi            Bp             0                              w        per ipg             #   Q           #   R               tx rx         	  6disabled          spi@42710000                                       2fsl,imx95-spi fsl,imx7ulp-spi            Bq             0                              w        per ipg             #   S           #   T               tx rx         	  6disabled               3        default       spi@42720000                                       2fsl,imx95-spi fsl,imx7ulp-spi            Br             0                              w        per ipg             #   U           #   V               tx rx         	  6disabled          mailbox@42730000             2fsl,imx95-mu             Bs             0                        w        e         	  6disabled          can@427c0000             2fsl,imx95-flexcan            B|             0       *                 w      z        ipg per         
      z              
        1bZ         F          	  6disabled          can@427d0000             2fsl,imx95-flexcan            B}             0       ,                 w      {        ipg per         
      {              
        1bZ         F          	  6disabled             bus@42800000             2fsl,aips-bus simple-bus              B                                          B      B        mmc@42850000          !   2fsl,imx95-usdhc fsl,imx8mm-usdhc             B             0       V                 w                    ipg ahb per         
                    	        1ׄ         }                                 6okay                                          4           5        	   6           4      (  default state_100mhz state_200mhz sleep       mmc@42860000          !   2fsl,imx95-usdhc fsl,imx8mm-usdhc             B             0       W                 w                    ipg ahb per         
                    	        1ׄ         }                                 6okay                        7           8        	   9           7      (  default state_100mhz state_200mhz sleep          (        6   :      mmc@428b0000          !   2fsl,imx95-usdhc fsl,imx8mm-usdhc             B             0                        w                    ipg ahb per         
                    	        1ׄ         }                               	  6disabled               ;        default          gpio@43810000             2fsl,imx95-gpio fsl,imx8ulp-gpio              C                                     0       1          2                                     w      w      
  gpio port           B   <                   N          7                  RGMII2_nINT GPIO4 RTC_INT  LVDS1_BL_EN             =        default             &      gpio@43820000             2fsl,imx95-gpio fsl,imx8ulp-gpio              C                                     0       3          4                                     w      w      
  gpio port         @  B   <       h      <      J      <      *      <                  N                   SD2_RESET_B              ^      gpio@43840000             2fsl,imx95-gpio fsl,imx8ulp-gpio              C                                     0       5          6                                     w      w      
  gpio port            B   <       .      <      ,           N           ENET2_nINT              \      gpio@43850000             2fsl,imx95-gpio fsl,imx8ulp-gpio              C                                     0       7          8                                     w      w      
  gpio port            B   <       \      <      $           N                        USB1_OC USB2_OC          bus@44000000             2fsl,aips-bus simple-bus              D                  D       D                                  dma-controller@44000000          2fsl,imx93-edma3          D               M           X        t  0       `          a          b          c          d          e          f          g          h          i          j          k          l          m          n          o          p          q          r          s          t          u          v          w          x          y          z          {          |          }          ~                 +        dma             ?      mailbox@44220000             2fsl,imx95-mu             D"             0                        +        e         	  6disabled          timer@44290000           2nxp,imx95-sysctr-timer           D)             0       H              >        per          U      pwm@44310000             2fsl,imx7ulp-pwm          D1                   +        }         	  6disabled          pwm@44320000             2fsl,imx7ulp-pwm          D2                   <        }         	  6disabled          i3c@44330000          $   2nxp,imx95-i3c silvaco,i3c-master-v1          D3             0                                                  +      .        pclk fast_clk         	  6disabled          i2c@44340000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            D4             0                        /      +        per ipg                                       ?              ?                  tx rx           6okay                        @        default    temperature-sensor@48         
   2ti,tmp102               H                 temperature-sensor@49         
   2ti,tmp102               I                 temperature-sensor@4a         
   2ti,tmp102               J                 temperature-sensor@4b         
   2ti,tmp102               K                 eeprom@50            2st,24c32 atmel,24c32                P                       A      eeprom@51            2st,24c32 atmel,24c32                Q                       A      rtc@52           2microcrystal,rv3028             R        default            B             &        0              d            {                eeprom@58            2st,24c32 atmel,24c32                X                       A      temperature-sensor@4f            2nxp,p3t1755             O           '         i2c@44350000          "   2fsl,imx95-lpi2c fsl,imx7ulp-lpi2c            D5             0                        0      +        per ipg                                       ?              ?                  tx rx         	  6disabled                        C        default       spi@44360000                                       2fsl,imx95-spi fsl,imx7ulp-spi            D6             0                        1      +        per ipg             ?             ?                   tx rx         	  6disabled          spi@44370000                                       2fsl,imx95-spi fsl,imx7ulp-spi            D7             0                        2      +        per ipg             ?             ?                   tx rx         	  6disabled          serial@44380000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           D8             0                        4        ipg             ?             ?                   rx tx         	  6disabled          serial@44390000       7   2fsl,imx95-lpuart fsl,imx8ulp-lpuart fsl,imx7ulp-lpuart           D9             0                        5        ipg             ?             ?                   rx tx         	  6disabled               D        default       can@443a0000             2fsl,imx95-flexcan            D:             0                        +      ,        ipg per         
      ,              
        1bZ         F            6okay               E        default         U   ,      sai@443b0000             2fsl,imx95-sai            D;             0       "                 +   .      :   .   .        bus mclk0 mclk1 mclk2 mclk3             ?             ?                   rx tx         	  6disabled          micfil@44520000       "   2fsl,imx95-micfil fsl,imx93-micfil            DR           0  0                                              $        +      9               .      )  ipg_clk ipg_clk_app pll8k pll11k clkext3               ?                  rx        	  6disabled          adc@44530000             2nxp,imx93-adc            DS           $  0                                            )        ipg                  	  6disabled          mailbox@445b0000             2fsl,imx95-mu             D[                      0                                           e                  sram@445b1000         
   2mmio-sram            D[                D[                                scmi-sram-section@0          2arm,scmi-shmem                                    scmi-sram-section@80             2arm,scmi-shmem                                         mailbox@445d0000             2fsl,imx95-mu             D]             0                        +        e         	  6disabled          mailbox@445f0000             2fsl,imx95-mu             D_             0                        +        e         	  6disabled          mailbox@44630000             2fsl,imx95-mu             Dc             0                        +        e         	  6disabled             mailbox@47300000             2fsl,imx95-mu-v2x                 G0                 0                  e         mailbox@47320000             2fsl,imx95-mu-v2x                 G2                 0                  e         mailbox@47330000             2fsl,imx95-mu-v2x                 G3                 0                  e         mailbox@47340000             2fsl,imx95-mu-v2x                 G4                 0                  e         mailbox@47350000             2fsl,imx95-mu-v2x                 G5                 0                  e         gpio@47400000             2fsl,imx95-gpio fsl,imx8ulp-gpio              G@                                     0       
                                               6      6      
  gpio port           B   <       p           N           6okay          L      GPIO2 GPIO1     PCIE1_nPERST USB1_PWR_EN GPIO3 USB2_PWR_EN PCIE2_nPERST            F        default             R      efuse@47510000           2fsl,imx95-ocotp syscon               GQ                                     mac-address@0                       mac-address@1                       mac-address@2              %            mailbox@47520000             2fsl,imx95-mu-ele                 GR                 0                  e         	  6disabled          mailbox@47530000             2fsl,imx95-mu-ele                 GS                 0                  e         	  6disabled          mailbox@47540000             2fsl,imx95-mu-ele                 GT                 0                  e         	  6disabled          mailbox@47550000             2fsl,imx95-mu-ele                 GU                 0                  e         mailbox@47560000             2fsl,imx95-mu-ele                 GV                 0                  e         	  6disabled          mailbox@47570000             2fsl,imx95-mu-ele                 GW                 0                  e         	  6disabled          bus@49000000             2fsl,aips-bus simple-bus              I                  I       I                                  iommu@490d0000           2arm,smmu-v3          I           0  0      E         H         N         F           eventq gerror priq cmdq-sync                     	  6disabled                J         usb@4c010010             2fsl,imx95-dwc3 fsl,imx8mp-dwc3                L            L                        W              hsio suspend            0                                                        G                                          6okay               H        default                      usb@4c100000          
   2snps,dwc3                L                       W                    bus_early ref suspend           0                  U   I   I        usb2-phy usb3-phy                     ?        ^   J           eperipheral          6okay             syscon@4c0100c0          2nxp,imx95-hsio-blk-ctl syscon                L                              K            G               O      phy@4c1f0040          %   2fsl,imx95-usb-phy fsl,imx8mp-usb-phy                  L @       @    L                      W        phy                         G           6okay            m   L            I      usb@4c200000          *   2fsl,imx95-usb fsl,imx7d-usb fsl,imx27-usb                L                  0                                  W              usb_ctrl_root usb_wakeup            ^   J           U   M            G           y   N          	  6disabled          usbmisc@4c200200          6   2fsl,imx95-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                 L             L                               N      pcie@4c300000            2fsl,imx95-pcie        @       L0             `            L6             L4        @         Zdbi config atu app        8  Ӂ               o                      	                                            pci                                                          0      6           msi                                                                           2                                   3                                   4                                   5         (        W      $      #      X   O          $  pcie pcie_bus pcie_phy pcie_aux ref         
      #      $      X        1֓                         
            G                   P            P                      J            J                                   6okay               Q        default            R   
           $   S      pcie-ep@4c300000             2fsl,imx95-pcie-ep         `       L0             L6             L2             L4        @     L7            	                    Zdbi atu dbi2 app dma addr_space                    0      7           dma                W      $      #      X         pcie pcie_bus pcie_phy pcie_aux         
      #      $      X        1֓                         
               P                  G         	  6disabled          pcie@4c380000            2fsl,imx95-pcie        @       L8                        L>             L<        @         Zdbi config atu app        8  Ӂ                                    
                                            pci                                                         0      <           msi                                                                           8                                   9                                   :                                   ;         (        W      $      #      X   O          $  pcie pcie_bus pcie_phy pcie_aux ref         
      #      $      X        1֓                         
            G                   P            P              1                  J            J                                   6okay               T        default            R              $   S      pcie-ep@4c380000             2fsl,imx95-pcie-ep         `       L8             L>             L:             L<        @     L?            
                    Zdbi atu dbi2 app dma addr_space                    0      =           dma                W      $      #      X         pcie pcie_bus pcie_phy pcie_aux         
      #      $      X        1֓                         
               P                  G         	  6disabled          clock-controller@4c410000            2nxp,imx95-vpu-csr syscon                 LA                                  r            G           
      r      s      u              
                    1U'e             U      jpegdec@4c500000          $   2nxp,imx95-jpgdec nxp,imx8qxp-jpgdec              LP               0  0      '         (         )         *                 s   U           
   U                 u            G         jpegenc@4c550000          $   2nxp,imx95-jpgenc nxp,imx8qxp-jpgenc              LU               0  0      #         $         %         &                 s   U           
   U                 u            G         syscon@4c810000       "   2nxp,imx95-netcmix-blk-ctrl syscon                L                                  a        
      a              
        1U            G           6okay          sai@4c880000             2fsl,imx95-sai                L                 0                        a   .      i   .   .        bus mclk0 mclk1 mclk2 mclk3             G               #   ;          #   :                rx tx         	  6disabled          system-controller@4cde0000           2nxp,imx95-netc-blk-ctrl       0       L             L             L                Zierb prb netcmix                                                  G           
      b      f                            1'沀              b        ipg         6okay       pcie@4ca00000            2pci-host-ecam-generic                L                                           pci                                P   `         P   a          P   b      @   P   c         P   d         P   e         P   f         P   g                  J             J   !          J   "      @   J   #         J   $         J   %         J   &         J   '         p  ӂ       L      L                L      L                L      L                L      L            ethernet@0,0             2pci1131,e101                                               f        ref         6okay          	  >rgmii-id               V        default         G   W      ethernet@8,0             2pci1131,e101               @                               f        ref         6okay            G   X      	  >rgmii-id               Y        default       ethernet@10,0            2pci1131,e101                                      	  6disabled            Rin-band-status          G   Z      
  >10gbase-r         ethernet@18,0            2pci1131,ee02                                      	  6disabled             pcie@4cb00000            2pci-host-ecam-generic                L                                           pci                     8  ӂ       L      L                L      L            mdio@0,0             2pci1131,ee00                                                                  6okay               [        default    ethernet-phy@0           2ethernet-phy-ieee802.3-c22                            \        0                Z        p                                             X      ethernet-phy@1           2ethernet-phy-ieee802.3-c22                           &        0               Z        p                                             W      ethernet-phy@8           2ethernet-phy-ieee802.3-c45                        '      	  6disabled                Z               ddr-pmu@4e090dc0          $   2fsl,imx95-ddr-pmu fsl,imx93-ddr-pmu              N	               0       [            aliases       ;  /soc/system-controller@4cde0000/pcie@4ca00000/ethernet@8,0          /soc/bus@44000000/i2c@44350000          /soc/bus@42000000/i2c@426b0000          /soc/bus@42000000/i2c@42530000          /soc/bus@42000000/i2c@42540000          /soc/bus@44000000/i2c@44340000        &  /soc/bus@44000000/i2c@44340000/rtc@52           /firmware/scmi/protocol@81          /soc/bus@42000000/can@425b0000          /soc/bus@44000000/can@443a0000        ;  /soc/system-controller@4cde0000/pcie@4ca00000/ethernet@0,0        "  /soc/bus@42000000/serial@42690000         "  /soc/bus@42000000/serial@426a0000         memory@80000000          memory                               regulator-nvcc-aon           2regulator-fixed                   )        ; w@        S w@        kVDD_IO              A      regulator-usdhc2             2regulator-fixed         z  .           ]        default         ; 2Z        S 2Z      
  kVDDSW_SD2              ^                            :      reserved-memory                                      linux,cma            2shared-dma-pool                                        $    <                     chosen        "  /soc/bus@42000000/serial@42690000         backlight0           2pwm-backlight              _           `      	  6disabled                b      can-phy          2ti,tcan1043                      z            a   	               ,      panel-lvds0            b           S      	  6disabled          regulator-vdd-12v0           2regulator-fixed                   )        ;          S        	  kVDD_12V0                `      regulator-vdd-1v8            2regulator-fixed                   )        ; w@        S w@        kVDD_1V8             '      regulator-vdd-3v3            2regulator-fixed                   )        ; 2Z        S 2Z        kVDD_3V3             S      regulator-vdd-5v0            2regulator-fixed                   )        ; LK@        S LK@        kVDD_5V0             L         	interrupt-parent #address-cells #size-cells model compatible entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us wakeup-latency-us phandle device_type reg enable-method #cooling-cells cpu-idle-states power-domains power-domain-names i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache cache-level cache-unified cpu #clock-cells clock-frequency clock-output-names ranges mboxes shmem arm,max-rx-timeout-ms #power-domain-cells #thermal-sensor-cells fsl,pins interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend #interrupt-cells interrupt-controller dma-noncoherent msi-controller #msi-cells clocks clock-names #phy-cells arm,primecell-periphid status remote-endpoint #dma-cells dma-channels #mbox-cells timeout-sec #pwm-cells pinctrl-0 pinctrl-names dmas dma-names #gpio-cells gpio-controller gpio-line-names vcc-supply gpios gpio-hog line-name output-low assigned-clocks assigned-clock-parents assigned-clock-rates fsl,clk-source phys reg-names spi-max-frequency spi-rx-bus-width spi-tx-bus-width pintrc-names uart-has-rtscts pagesize fsl,tuning-start-tap fsl,tuning-step non-removable no-sd no-sdio pinctrl-1 pinctrl-2 pinctrl-3 disable-wp sd-uhs-sdr104 vmmc-supply gpio-ranges ngpios nxp,no-divider aux-voltage-chargeable wakeup-source trickle-resistor-ohms vs-supply #io-channel-cells interrupt-names #iommu-cells dma-ranges fsl,over-current-active-low fsl,power-active-low phy-names snps,gfladj-refclk-lpm-sel-quirk snps,parkmode-disable-ss-quirk iommus dr_mode vbus-supply fsl,usbmisc #index-cells linux,pci-domain bus-range num-lanes num-viewport interrupt-map-mask interrupt-map msi-map iommu-map iommu-map-mask fsl,max-link-speed reset-gpio vpcie-supply msi-map-mask phy-mode phy-handle managed enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,rx-internal-delay ti,tx-internal-delay max-speed ethernet1 i2c1 i2c2 i2c3 i2c4 i2c5 rtc0 rtc1 can1 can2 ethernet0 serial0 serial1 regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name off-on-delay-us enable-active-high alloc-ranges reusable linux,cma-default stdout-path power-supply max-bitrate enable-gpios backlight 