 a:   8 I   (             Ih                                                                      ,Freescale i.MX8QXP MEK           2fsl,imx8qxp-mek fsl,imx8qxp    aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000           /bus@5b000000/mmc@5b010000           /bus@5b000000/mmc@5b020000           /bus@5b000000/mmc@5b030000           /bus@5d000000/mailbox@5d1b0000           /bus@5d000000/mailbox@5d1c0000           /bus@5d000000/mailbox@5d1d0000           /bus@5d000000/mailbox@5d1e0000           /bus@5d000000/mailbox@5d1f0000           /bus@5a000000/serial@5a060000            /bus@5a000000/serial@5a070000            /bus@5a000000/serial@5a080000            /bus@5a000000/serial@5a090000            /bus@5a000000/spi@5a000000           /bus@5a000000/spi@5a010000           /bus@5a000000/spi@5a020000           /bus@5a000000/spi@5a030000            /vpu@2c000000/vpu-core@2d080000           /vpu@2c000000/vpu-core@2d090000       cpus                                 cpu@0            cpu          2arm,cortex-a35                          psci                       +   @        =           J           W   @        i           v                                                          cpu@1            cpu          2arm,cortex-a35                         psci                       +   @        =           J           W   @        i           v                                                    	      cpu@2            cpu          2arm,cortex-a35                         psci                       +   @        =           J           W   @        i           v                                                    
      cpu@3            cpu          2arm,cortex-a35                         psci                       +   @        =           J           W   @        i           v                                                          l2-cache0            2cache                                           -   @        ?                       opp-table            2operating-points-v2                        opp-900000000               5          B@         I      opp-1200000000              G                   I                  interrupt-controller@51a00000            2arm,gic-v3               Q             Q                                          !        6      	                    reserved-memory                                   A   decoder-boot@84000000                                  H           &      encoder-boot@86000000                                   H           )      decoder-rpc@92000000                                   H           '      dsp@92400000                @                  H        Ookay               J      encoder-rpc@94400000                @       p           H           *      memory@90000000                                H                 memory@90008000                               H                 memory@90010000                               H                 memory@90018000                              H                 memory@900ff000                              H                 memory@90400000          2shared-dma-pool             @                  H                 memory@942f0000             /                  H           H      memory@942f8000             /                 H           I      memory@94300000          2shared-dma-pool             0                  H           G      linux,cma            2shared-dma-pool         V           <           &    <            c         u      memory@880000000             H                                         pmu          2arm,cortex-a35-pmu          6               psci             2arm,psci-1.0            smc       system-controller            2fsl,imx-scu         ~tx0 rx0 gip3          $                                   power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd                               clock-controller             2fsl,imx8qxp-clk fsl,scu-clk                             pinctrl          2fsl,imx8qxp-iomuxc                cm40i2cgrp             c     L   d     L           .      cm40i2cgpio-grp            c     L   d     L           /      esai0grp          x     7      @   8      @   9      @   :      @   ;      @   <      @   =      @   >      @   ?      @   @      @           ;      fec1grp            5          4          &          %          '          (          )          *          ,          -          .          /          0          1                        flexcan0grp            j       !   i       !           ~      flexcan1grp            l       !   k       !                 i2c-mipi-csi0grp                                                 ioexprstgrp            Z     !           t      isl29023grp            [      !           u      lpi2c1grp                    !         !           s      lpuart0grp             o          p                  i      lpuart2grp             q          r                  l      lpuart3grp             n         m                 n      mipi-csi0grp          $          A        A         A                 pcieagrp          $           !         !        !                 typecgrp               \     !           v      typecmuxgrp            3      `                 sai0grp       0     R      `   T      @   S      @   U      @           ?      sai1grp       <     V      @   W     @   X     @   `     `   Y     @           A      usdhc1grp              	      A   
       !          !          !          !          !          !          !          !          !          A                 usdhc2grp         T           A          !           !   !       !   "       !   #       !          !                    ocotp            2fsl,imx8qxp-scu-ocotp                                             keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key              t        Ookay                     reset-controller             2fsl,imx-scu-reset                               rtc          2fsl,imx8qxp-sc-rtc                   watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt              <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal                                  timer            2arm,armv8-timer       0  6                                 
         clock-dummy          2fixed-clock                               
  clk_dummy                     clock-xtal32k            2fixed-clock                                xtal_32KHz                   clock-xtal24m            2fixed-clock                     n6         xtal_24MHz                   thermal-zones                 cpu0-thermal                       1          ?     c   trips      trip0           O         [          passive                  trip1           O         [        	  critical                        cooling-maps       map0            f         0  k      	   
               pmic-thermal                       1          ?        trips      trip0           O         [          passive                  trip1           O H        [        	  critical                        cooling-maps       map0            f         0  k      	   
                  clock-img-ipg            2fixed-clock                              img_ipg_clk                  clock-img-pxl            2fixed-clock                     #F         img_pxl_clk            $      bus@58000000             2simple-bus                                   AX       X                    isi@58100000            X           H  6      )         *         +         ,         -         .         0                                                    zper0 per1 per2 per3 per4 per5                      0       y     z     {     |     }     ~      	  Odisabled             2fsl,imx8qxp-isi               ports                                port@2                endpoint                                         irqsteer@58220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X"                         !        6      @                      zipg                                                                    gpio@58222000            2fsl,imx8qm-gpio fsl,imx35-gpio          X"                         !        6                                                                   clock-controller@58223018            2fsl,imx8qxp-lpcg            X"0                                                 csi0_lpcg_core_clk               y                 clock-controller@5822301c            2fsl,imx8qxp-lpcg            X"0                                                 csi0_lpcg_esc_clk                y                 i2c@58226000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X"`            6                              zper ipg                         n6                                 	  Odisabled                     csi@58227000             2fsl,imx8qxp-mipi-csi2           X"p    X"                                       zcore esc ui                             u* J              y                   	  Odisabled                  ports                                port@0                    port@1                endpoint                                         irqsteer@58240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X$                         !        6      A                      zipg                                                         	  Odisabled                     gpio@58242000            2fsl,imx8qm-gpio fsl,imx35-gpio          X$                         !        6                                                        	  Odisabled                     clock-controller@58243018            2fsl,imx8qxp-lpcg            X$0                                                 csi1_lpcg_core_clk               y      	  Odisabled                     clock-controller@5824301c            2fsl,imx8qxp-lpcg            X$0                                                 csi1_lpcg_esc_clk                y      	  Odisabled                     i2c@58246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X$`            6                              zper ipg                         n6                                 	  Odisabled                     csi@58247000             2fsl,imx8qxp-mipi-csi2           X$p    X$                                       zcore esc ui                             u* J              y                   	  Odisabled                     irqsteer@58260000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X&                         !        6      B                       zipg                           F                              	  Odisabled               !      clock-controller@58263004            2fsl,imx8qxp-lpcg            X&0                F                                 pi0_lpcg_ipg_clk                 y                 clock-controller@58263018            2fsl,imx8qxp-lpcg            X&0                F                                  pi0_lpcg_pxl_clk                 y                 clock-controller@5826301c            2fsl,imx8qxp-lpcg            X&0                F                                   pi0_lpcg_misc_clk                y                 i2c@58266000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X&`            6                I              zper ipg              I           n6              !             I      	  Odisabled                     jpegdec@58400000            X@             6      5              "       "              "       "                                        2nxp,imx8qxp-jpgdec          Ookay                     jpegenc@58450000            XE             6      1              #       #              #       #                                        2nxp,imx8qxp-jpgenc          Ookay                     clock-controller@58500000            2fsl,imx8qxp-lpcg            XP                $                               pdma0_lpcg_clk               y                 clock-controller@58510000            2fsl,imx8qxp-lpcg            XQ                $                               pdma1_lpcg_clk               z                 clock-controller@58520000            2fsl,imx8qxp-lpcg            XR                $                               pdma2_lpcg_clk               {                 clock-controller@58530000            2fsl,imx8qxp-lpcg            XS                $                               pdma3_lpcg_clk               |                 clock-controller@58540000            2fsl,imx8qxp-lpcg            XT                $                               pdma4_lpcg_clk               }                 clock-controller@58550000            2fsl,imx8qxp-lpcg            XU                $                               pdma5_lpcg_clk               ~                 clock-controller@58560000            2fsl,imx8qxp-lpcg            XV                $                               pdma6_lpcg_clk                                clock-controller@58570000            2fsl,imx8qxp-lpcg            XW                $                               pdma7_lpcg_clk                                clock-controller@58580000            2fsl,imx8qxp-lpcg            XX                $                               csi0_lpcg_pxl_clk                                 clock-controller@58590000            2fsl,imx8qxp-lpcg            XY                $                               csi1_lpcg_pxl_clk                      	  Odisabled                     clock-controller@585a0000            2fsl,imx8qxp-lpcg            XZ                $                               hdmi_rx_lpcg_pxl_link_clk                                 clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]                                                   0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk                         "      clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_                                                   0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk                         #         vpu@2c000000                                     A,       ,                  ,                               Ookay             2nxp,imx8qxp-vpu               mailbox@2d000000             2fsl,imx6sx-mu           -              6                                         Ookay               %      mailbox@2d020000             2fsl,imx6sx-mu           -             6                                         Ookay               (      vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder                        ~tx0 tx1 rx        $     %           %          %               Ookay               &   '                 vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder                        ~tx0 tx1 rx        $     (           (          (               Ookay               )   *                    bus@31400000             2simple-bus                                   A1@      1@   	                crypto@31400000          2fsl,imx8qxp-caam fsl,sec-v4.0           1@   	          6                                           A    1@   	                       -   	              jr@30000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        6                                       jr@40000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        6                                             clock-cm40-ipg           2fixed-clock                     )         cm40_ipg_clk               4      bus@34000000             2simple-bus                                   A4       4                   +              serial@37220000          2fsl,imx8qxp-lpuart          7"             6                 ,      ,          	  zipg baud                            n6                    	  Odisabled                     i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             6   	              -       -           zper ipg                          n6                       Ookay                                               9default gpio            G   .        Q   /        [   0   
            e   0   	                  gpio@20          2ti,tca6416                                                   audio-codec@48           2cirrus,cs42888             H           1            zmclk          ,       E        E         E      1            .                o   2              {   3           3           3           3                    intmux@37400000          2fsl,imx-intmux          7@                        `  6                                                                                         !                      4        zipg              !        Ookay               +      clock-controller@37620000            2fsl,imx8qxp-lpcg            7b                                   4                     *  cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk                           ,      clock-controller@37630000            2fsl,imx8qxp-lpcg            7c                                    4                     (  cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk                          -         bus@53000000             2simple-bus                                   AS       S                    gpu@53100000             2vivante,gc          S             6       @                                     zcore shader                                   )' 2                                  clock-audio-ipg          2fixed-clock                     '         audio_ipg_clk              =      clock-ext-aud-mclk0          2fixed-clock                                 ext_aud_mclk0              U      clock-ext-aud-mclk1          2fixed-clock                                 ext_aud_mclk1              V      clock-esai0-rx           2fixed-clock                                 esai0_rx_clk               W      clock-esai0-rx-hf            2fixed-clock                                 esai0_rx_hf_clk            X      clock-esai0-tx           2fixed-clock                                 esai0_tx_clk               Y      clock-esai0-tx-hf            2fixed-clock                                 esai0_tx_hf_clk            Z      clock-spdif0-rx          2fixed-clock                               
  spdif0_rx              [      clock-sai0-rx-bclk           2fixed-clock                                 sai0_rx_bclk               \      clock-sai0-tx-bclk           2fixed-clock                                 sai0_tx_bclk               ]      clock-sai1-rx-bclk           2fixed-clock                                 sai1_rx_bclk               ^      clock-sai1-tx-bclk           2fixed-clock                                 sai1_tx_bclk               _      clock-sai2-rx-bclk           2fixed-clock                                 sai2_rx_bclk               `      clock-sai3-rx-bclk           2fixed-clock                                 sai3_rx_bclk               a      clock-sai4-rx-bclk           2fixed-clock                                 sai4_rx_bclk               b      bus@59000000             2simple-bus                                   AY       Y                    asrc@59000000            2fsl,imx8qm-asrc         Y              6      t         d     5       5       6      7      8       8                                                               zmem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     9               9              9              9             9             9                  rxa rxb rxc txa txb txc                                                       Ookay                     esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai            Y             6                    :      :       :               zcore extal fsys spba                9             9                   rx tx                        Ookay          4     8        E        E         E      :               6                .                G   ;        9default                  spdif@59020000           2fsl,imx8qm-spdif            Y             6                        0     <          <                   =                  :  zcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba               9             9   	               rx tx                      	  Odisabled                     sai@59040000             2fsl,imx8qm-sai          Y             6      :              >          >                    zbus mclk0 mclk1 mclk2 mclk3         rx tx               9             9                        >        Ookay                      ,       E        E         E      >            .                9default         G   ?                 sai@59050000             2fsl,imx8qm-sai          Y             6      <              @          @                    zbus mclk0 mclk1 mclk2 mclk3         rx tx               9             9                        ?        Ookay          ,       E        E         E      @            .                9default         G   A                 sai@59060000             2fsl,imx8qm-sai          Y             6      >              B          B                    zbus mclk0 mclk1 mclk2 mclk3         rx             9                       @      	  Odisabled                     sai@59070000             2fsl,imx8qm-sai          Y             6      C              C          C                    zbus mclk0 mclk1 mclk2 mclk3         rx             9                             	  Odisabled                     dma-controller@591f0000          2fsl,imx8qm-edma         Y             
                      " \         6      v         w         x         y         z         {                                                                   ;         ;         =         =         ?         D                                                                               @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W           9      clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@                           =                   asrc0_lpcg_ipg_clk                          5      clock-controller@59410000            2fsl,imx8qxp-lpcg            YA                           8      =                     (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk                         :      clock-controller@59420000            2fsl,imx8qxp-lpcg            YB                           8      =                     %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw                            <      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD                           8      =                     !  sai0_lpcg_mclk sai0_lpcg_ipg_clk                 >           >      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE                           8      =                     !  sai1_lpcg_mclk sai1_lpcg_ipg_clk                 ?           @      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF                           8      =                     !  sai2_lpcg_mclk sai2_lpcg_ipg_clk                 @           B      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG                           8      =                     !  sai3_lpcg_mclk sai3_lpcg_ipg_clk                            C      clock-controller@59580000            2fsl,imx8qxp-lpcg            YX                           =   =   =                       4  dsp_lpcg_adb_clk dsp_lpcg_ipg_clk dsp_lpcg_core_clk                          D      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY                           =                   dsp_ram_lpcg_ipg_clk                            E      dsp@596e8000             2fsl,imx8qxp-hifi4           Yn              D      E      D           zipg ocram core                              ~tx rx rxdb        $     F           F          F               3imx/dsp/hifi4.bin           Ookay               G   H   I   J                 asrc@59800000            2fsl,imx8qm-asrc         Y             6      |         d     K      K      6       7       8       8                                                               zmem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `     L               L              L              L             L             L                  rxa rxb rxc txa txb txc           @                                         	  Odisabled                     sai@59820000             2fsl,imx8qm-sai          Y             6      I              M          M                    zbus mclk0 mclk1 mclk2 mclk3             L             L   	                rx tx                        Ookay          4     8                               M               7                .                 A           P      sai@59830000             2fsl,imx8qm-sai          Y             6      K              N          N                    zbus mclk0 mclk1 mclk2 mclk3            L   
                tx                       Ookay          4     8                               N               7                .                 A           Q      amix@59840000            2fsl,imx8qm-audmix           Y                O            zipg                      V   P   Q        Ookay                     mqs@59850000             2fsl,imx8qm-mqs          Y                R      R          
  zmclk core                      	  Odisabled                     dma-controller@599f0000          2fsl,imx8qm-edma         Y             
                      "           6      ~                                                                            J         J         L         X        l      m      n      o      p      q      r      s      t      u      v           L      clock-controller@59d00000            2fsl,imx8qxp-lpcg            Y                             E                       aud_rec_clk0_lpcg_clk                E           S      clock-controller@59d10000            2fsl,imx8qxp-lpcg            Y                                                    aud_rec_clk1_lpcg_clk                           T      clock-controller@59d20000            2fsl,imx8qxp-lpcg            Y                             E                        aud_pll_div_clk0_lpcg_clk                E           6      clock-controller@59d30000            2fsl,imx8qxp-lpcg            Y                                                     aud_pll_div_clk1_lpcg_clk                           7      clock-controller@59d50000            2fsl,imx8qxp-lpcg            Y                           8                       mclkout0_lpcg_clk                           1      clock-controller@59d60000            2fsl,imx8qxp-lpcg            Y                           8                       mclkout1_lpcg_clk                                 acm@59e00000             2fsl,imx8qxp-acm         Y                                                 E                         >     ?     @                               X     S       T       6       7       U   V   W   X   Y   Z   [   \   ]   ^   _   `   a   b       zaud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk             8      clock-controller@59c00000            2fsl,imx8qxp-lpcg            Y                           =                   asrc1_lpcg_ipg_clk                          K      clock-controller@59c20000            2fsl,imx8qxp-lpcg            Y                           8      =                     !  sai4_lpcg_mclk sai4_lpcg_ipg_clk                            M      clock-controller@59c30000            2fsl,imx8qxp-lpcg            Y                           8      =                     !  sai5_lpcg_mclk sai5_lpcg_ipg_clk                            N      clock-controller@59c40000            2fsl,imx8qxp-lpcg            Y                           =                    amix_lpcg_ipg_clk                           O      clock-controller@59c50000            2fsl,imx8qxp-lpcg            Y                           8      =                     !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk                            R         clock-dma-ipg            2fixed-clock                     '         dma_ipg_clk            p      bus@5a000000             2simple-bus                                   AZ       Z                    spi@5a000000             2fsl,imx7ulp-spi         Z                                        6      P                           c       c           zper ipg               5                          5            d              d                   tx rx         	  Odisabled                     spi@5a010000             2fsl,imx7ulp-spi         Z                                       6      Q                           e       e           zper ipg               6                          6            d              d                  tx rx         	  Odisabled                     spi@5a020000             2fsl,imx7ulp-spi         Z                                       6      R                           f       f           zper ipg               7                          7            d              d                  tx rx         	  Odisabled                     spi@5a030000             2fsl,imx7ulp-spi         Z                                       6      S                           g       g           zper ipg               8                          8            d              d                  tx rx         	  Odisabled                     serial@5a060000         Z             6      Y              h      h          	  zipg baud                  9           Ĵ               9        rx tx               d             d   	                Ookay             2fsl,imx8qxp-lpuart          9default         G   i                 serial@5a070000         Z             6      Z              j      j          	  zipg baud                  :           Ĵ               :        rx tx               d   
          d                 	  Odisabled             2fsl,imx8qxp-lpuart                   serial@5a080000         Z             6      [              k      k          	  zipg baud                  ;           Ĵ               ;        rx tx               d             d                   Ookay             2fsl,imx8qxp-lpuart          9default         G   l                 serial@5a090000         Z	             6      \              m      m          	  zipg baud                  <           Ĵ               <        rx tx               d             d                   Ookay             2fsl,imx8qxp-lpuart          9default         G   n                 pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             6                     o      o            zipg per                          n6         [                                  dma-controller@5a1f0000          2fsl,imx8qm-edma         Z             
                      6                                                                                                                                                                                                                                                      d      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@                              5      p                        spi0_lpcg_clk spi0_lpcg_ipg_clk               5           c      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA                              6      p                        spi1_lpcg_clk spi1_lpcg_ipg_clk               6           e      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB                              7      p                        spi2_lpcg_clk spi2_lpcg_ipg_clk               7           f      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC                              8      p                        spi3_lpcg_clk spi3_lpcg_ipg_clk               8           g      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF                              9      p                     '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk                9           h      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG                              :      p                     '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk                :           j      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH                              ;      p                     '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk                ;           k      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI                              <      p                     '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk                <           m      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY                                    p                     (  adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk                          o      i2c@5a800000            Z    @                                   6                     q       q           zper ipg               `           n6               `      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  i2c@5a810000            Z    @                                   6                     r       r           zper ipg               a           n6               a        Ookay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  9default         G   s   t              i2c-mux@71           2nxp,pca9646 nxp,pca9546                                      q        o   0         i2c@0                                            gpio@68          2maxim,max7322              h                                       i2c@1                                              i2c@2                                           pressure-sensor@60           2fsl,mpl3115            `         i2c@3                                           gpio@1a          2nxp,pca9557                                                 gpio@1d          2nxp,pca9557                                           2      light-sensor@44         9default         G   u         2isil,isl29023              D             0        6                  tcpc@50          2nxp,ptn5110 tcpci           9default         G   v           P             0        6                   connector            2usb-c-connector         fUSB-C           lsource          wdual            ,             ports                                port@0                 endpoint               w                    port@1                endpoint               x                                i2c@5a820000            Z    @                                   6                     y       y           zper ipg               b           n6               b      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                 i2c@5a830000            Z    @                                   6                     z       z           zper ipg               c           n6               c      	  Odisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                 adc@5a880000             2nxp,imx8qxp-adc                    Z             6                                  {       {           zper ipg               e           n6               e      	  Odisabled                    adc@5a890000             2nxp,imx8qxp-adc                    Z             6                                  |       |           zper ipg               f           n6               f      	  Odisabled                    can@5a8d0000             2fsl,imx8qm-flexcan          Z             6                                  }      }            zipg per               i           bZ               i                                Ookay            G   ~        9default                            can@5a8e0000             2fsl,imx8qm-flexcan          Z             6                                  }      }            zipg per               i           bZ               j                               Ookay            G           9default                      	      can@5a8f0000             2fsl,imx8qm-flexcan          Z             6                                  }      }            zipg per               i           bZ               k                             	  Odisabled              
      dma-controller@5a9f0000          2fsl,imx8qm-edma         Z   	          
                    `  6                                                                              @                                                          clock-controller@5ac00000            2fsl,imx8qxp-lpcg            Z                              `      p                        i2c0_lpcg_clk i2c0_lpcg_ipg_clk               `           q      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            Z                              a      p                        i2c1_lpcg_clk i2c1_lpcg_ipg_clk               a           r      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            Z                              b      p                        i2c2_lpcg_clk i2c2_lpcg_ipg_clk               b           y      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            Z                              c      p                        i2c3_lpcg_clk i2c3_lpcg_ipg_clk               c           z      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            Z                              e      p                        adc0_lpcg_clk adc0_lpcg_ipg_clk               e           {      clock-controller@5ac90000            2fsl,imx8qxp-lpcg            Z                              f      p                        adc1_lpcg_clk adc1_lpcg_ipg_clk               f           |      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            Z                              i      p   p                        5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk                  i           }         clock-conn-axi           2fixed-clock                     CU        conn_axi_clk                     clock-conn-ahb           2fixed-clock                     	!        conn_ahb_clk                     clock-conn-ipg           2fixed-clock                             conn_ipg_clk                     clock-conn-bch           2fixed-clock                     ׄ         conn_bch_clk                    bus@5b000000             2simple-bus                                   A[       [                   usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          6                                                                                                        Ookay                      '         3         ?         T        f                   usbmisc@5b0d0200            r         8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [                     usbphy@5b100000       &   2fsl,imx8qxp-usbphy fsl,imx7ulp-usbphy           [                                        Ookay                     mmc@5b010000            6                  [                                        zipg ahb per                       Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                                     9default         G                                                         mmc@5b020000            6                  [                                        zipg ahb per                                             Ookay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                                     9default         G                                                                            mmc@5b030000            6                  [                                        zipg ahb per                     	  Odisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                   ethernet@5b040000           [           0  6                                                                               zipg ahb enet_clk_ref ptp                                      沀sY@                                            Ookay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           9default         G         	  rgmii-id                                      mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22                                     ethernet@5b050000           [           0  6                                                                              zipg ahb enet_clk_ref ptp                                      沀sY@                                          	  Odisabled          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec                   usb@5b110000             2fsl,imx8qm-usb3         [                                       A      (                                         zlpm bus aclk ipg core                           沀                     Ookay                 usb@5b120000          
   2cdns,usb3           [     [     [             1otg xhci dev                       0  6                                            ;host peripheral otg wakeup          K           Pcdns3,usb3-phy          Z           Ookay            qotg          y             port       endpoint                          w               usb-phy@5b160000             2nxp,salvo-phy           [                           zsalvo_phy_clk                                    Ookay                     clock-controller@5b200000            2fsl,imx8qxp-lpcg            [                                                                9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk                                   clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!                                                               9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk                                   clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["                                                               9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk                                   clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#                      0                                                                         enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_rgmii_txc_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk                                   clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$                      0                                                                         enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk                                   clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['                                                  "  usboh3_ahb_clk usboh3_phy_ipg_clk                                 clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(                                                 0                                         M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk                                  clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)                              	        	                                    '  gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb               	                 clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)                                             apbhdma_hclk                 	                 dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [            0  6                                            
                                          	                 nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [      [@             1gpmi-nand bch                                     6                 ;bch                                         '  zgpmi_io gpmi_apb gpmi_bch gpmi_bch_apb                         rx-tx                	             	                 	  Odisabled                       bus@5c000000             2simple-bus                                   A\       \                   ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             6                             clock-lsio-bus           2fixed-clock                              lsio_bus_clk                     bus@5d000000             2simple-bus                                    A]       ]                                pwm@5d000000             2fsl,imx27-pwm           ]              zipg per                                              n6         [           6       ^         	  Odisabled                    pwm@5d010000             2fsl,imx27-pwm           ]             zipg per                                              n6         [           6       _         	  Odisabled                    pwm@5d020000             2fsl,imx27-pwm           ]             zipg per                                              n6         [           6       `         	  Odisabled                    pwm@5d030000             2fsl,imx27-pwm           ]             zipg per                                              n6         [           6       a         	  Odisabled                    gpio@5d080000           ]             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       P           8            E            K            P            R                   gpio@5d090000           ]	             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            Y   	      	   c            t              0      gpio@5d0a0000           ]
             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            {            ~                               gpio@5d0b0000           ]             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0                                                        gpio@5d0c0000           ]             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio                                            	                                                            %                    gpio@5d0d0000           ]             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            (            ,         	   3                    gpio@5d0e0000           ]             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio           !      gpio@5d0f0000           ]             6                                       !                                   2fsl,imx8qxp-gpio fsl,imx35-gpio           "      spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   1fspi_base fspi_mmap         6       \                                     zfspi_en fspi                        	  Odisabled              #      mailbox@5d1b0000            ]             6                           	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu              $      mailbox@5d1c0000            ]             6                           -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1d0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu              %      mailbox@5d1e0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu              &      mailbox@5d1f0000            ]             6                           	  Odisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu              '      mailbox@5d200000            ]              6                                           Ookay             2fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d210000            ]!             6                                         	  Odisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu              (      mailbox@5d280000            ](             6                                            2fsl,imx8qxp-mu fsl,imx6sx-mu               F      clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@                      4                                                                       h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk                                clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A                      4                                                                       h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk                                clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B                      4                                                                       h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk                                clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C                      4                                                                       h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk                                clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D                      4                                                                       h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk                         )      clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E                      4                                                                       h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk                         *      clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F                      4                                                                       h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk                         +      clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G                      4                                                                       h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk                         ,         clock-hsio-axi           2fixed-clock                     ׄ         hsio_axi_clk                     clock-hsio-per           2fixed-clock                     U        hsio_per_clk                     clock-hsio-refa          2gpio-gate-clock                                                   -      clock-hsio-refb          2gpio-gate-clock                                                          clock-xtal100m           2fixed-clock                              xtal_100MHz                  bus@5f000000             2simple-bus           A_       _             p                                                              .   pcie@5f010000            2fsl,imx8q-pcie          _                  1dbi config        0  A                                                          6       f          h           ;msi dma                                                            zdbi mstr slv                            pci                                  i                            j                            k                            l                                                                               	  Odisabled           K                    	  Ppcie-phy            G           9default         o                               /      pcie-ep@5f010000             2fsl,imx8q-pcie-ep           _                   1dbi addr_space                     6       h           ;dma                                   zdbi mstr slv                                                )           Ookay led        K                    	  Ppcie-phy            G           9default                      0      clock-controller@5f060000            2fsl,imx8qxp-lpcg            _                                                        F  hsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk                                  clock-controller@5f0b0000            2fsl,imx8qxp-lpcg            _                                              hsio_phyx1_per_clk                                 clock-controller@5f0d0000            2fsl,imx8qxp-lpcg            _                                              hsio_pcieb_per_clk                                 clock-controller@5f0f0000            2fsl,imx8qxp-lpcg            _                                              hsio_misc_per_clk                                  clock-controller@5f090000            2fsl,imx8qxp-lpcg            _	                                                               Q  hsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk                                   phy@5f1a0000             2fsl,imx8qxp-hsio             _     _     _     _             1reg phy ctrl misc         (                                       +  zpclk0 apb_pclk0 phy0_crr ctl0_crr misc_crr                                   Ookay            8pciea-x2-pcieb          Einput                       audio-codec-bt           2linux,bt-sco                                chosen          Y/bus@5a000000/serial@5a060000         imx8x-cm4            2fsl,imx8qxp-cm4         ~tx rx rxdb        $                                                                          )        e4          w            1      memory@80000000          memory                     @         usdhc2-vmmc          2regulator-fixed       	  SD1_SPWR             -         -                                            gpio-sbu-mux             2nxp,cbdtu02043 gpio-sbu-mux         9default         G                 	                                 port       endpoint                          x            i2c-mux          2i2c-mux-gpio                               	                                i2c@0                                            audio-codec@1a           2wlf,wm8960                        1            zmclk          ,       E        E         E      1            .                 	        	$                 	/              	<           	H           	U           	b           	q                       i2c@1                                           wm8962@1a            2wlf,wm8962                        1          ,       E        E         E      1            .                	U           	H           	<           	           	           	           	b           	q                          regulator-1v5            2regulator-fixed         1v5          `         `          2      regulator-1v8            2regulator-fixed         1v8          w@         w@          3      regulator-2v8            2regulator-fixed         2v8          *         *          4      regulator-pcie           2regulator-fixed          2Z         2Z      
  mpcie_3v3                                               regulator-audio          2regulator-fixed          2Z         2Z        cs42888_supply             3      regulator-audio-pwr          2regulator-fixed       	  audio-5v             LK@         LK@         	         	                 regulator-audio-3v3          2regulator-fixed       
  audio-3v3            2Z         2Z         	         	                 regulator-audio-1v8          2regulator-fixed       
  audio-1v8            w@         w@         	         	                 regulator-can-en             2regulator-fixed          2Z         2Z        can-en                                              regulator-can-stby           2regulator-fixed          2Z         2Z      	  can-stby                                       	                    regulator-usbotg1-vbus           2regulator-fixed          LK@         LK@        usb_otg1_vbus              2                                 sound-bt-sco             2simple-audio-card            	        	           
!dsp_a           
:           
Ybt-sco-audio       simple-audio-card,codec         
p            simple-audio-card,cpu           
z           
           
p                       sound-cs42888            2fsl,imx-audio-cs42888           
           
           
           
Line Out Jack AOUT1L Line Out Jack AOUT1R Line Out Jack AOUT2L Line Out Jack AOUT2R Line Out Jack AOUT3L Line Out Jack AOUT3R Line Out Jack AOUT4L Line Out Jack AOUT4R AIN1L Line In Jack AIN1R Line In Jack AIN2L Line In Jack AIN2R Line In Jack          ,imx-cs42888       sound-wm8960             2fsl,imx-audio-wm8960             ,wm8960-audio            
           
           
   0                
Headphone Jack HP_L Headphone Jack HP_R Ext Spk SPK_LP Ext Spk SPK_LN Ext Spk SPK_RP Ext Spk SPK_RN LINPUT1 Mic Jack Mic Jack MICB        sound-wm8962             2fsl,imx-audio-wm8962             ,wm8962-audio            
           
           
   0              m  
Headphone Jack HPOUTL Headphone Jack HPOUTR Ext Spk SPKOUTL Ext Spk SPKOUTR AMIC MICBIAS IN3R AMIC IN1R AMIC          __symbols__         
/cpus/cpu@0         
/cpus/cpu@1         
/cpus/cpu@2         
/cpus/cpu@3         
/cpus/l2-cache0         
/opp-table          /interrupt-controller@51a00000        '  /reserved-memory/decoder-boot@84000000        '  /reserved-memory/encoder-boot@86000000        &  %/reserved-memory/decoder-rpc@92000000           1/reserved-memory/dsp@92400000         &  >/reserved-memory/encoder-rpc@94400000         !  J/reserved-memory/memory@90000000          !  V/reserved-memory/memory@90008000          !  b/reserved-memory/memory@90010000          !  n/reserved-memory/memory@90018000          !  z/reserved-memory/memory@900ff000          !  /reserved-memory/memory@90400000          !  /reserved-memory/memory@942f0000          !  /reserved-memory/memory@942f8000          !  /reserved-memory/memory@94300000          "  /reserved-memory/memory@880000000         $  /system-controller/power-controller       $  	 /system-controller/clock-controller         /system-controller/pinctrl        &  /system-controller/pinctrl/cm40i2cgrp         +  /system-controller/pinctrl/cm40i2cgpio-grp        $  /system-controller/pinctrl/esai0grp       #  /system-controller/pinctrl/fec1grp        '  /system-controller/pinctrl/flexcan0grp        '  )/system-controller/pinctrl/flexcan1grp        ,  :/system-controller/pinctrl/i2c-mipi-csi0grp       '  P/system-controller/pinctrl/ioexprstgrp        '  b/system-controller/pinctrl/isl29023grp        %  s/system-controller/pinctrl/lpi2c1grp          &  /system-controller/pinctrl/lpuart0grp         &  /system-controller/pinctrl/lpuart2grp         &  /system-controller/pinctrl/lpuart3grp         (  /system-controller/pinctrl/mipi-csi0grp       $  /system-controller/pinctrl/pcieagrp       $  /system-controller/pinctrl/typecgrp       '  /system-controller/pinctrl/typecmuxgrp        #  /system-controller/pinctrl/sai0grp        #  /system-controller/pinctrl/sai1grp        %  /system-controller/pinctrl/usdhc1grp          %  /system-controller/pinctrl/usdhc2grp            */system-controller/ocotp            0/system-controller/keys       $  8/system-controller/reset-controller         B/system-controller/rtc        "  F/system-controller/thermal-sensor           L/clock-dummy            V/clock-xtal32k          ^/clock-xtal24m          f/thermal-zones        (  t/thermal-zones/cpu0-thermal/trips/trip0       (  /thermal-zones/cpu0-thermal/trips/trip1       (  /thermal-zones/pmic-thermal/trips/trip0       (  /thermal-zones/pmic-thermal/trips/trip1         /clock-img-ipg          /clock-img-pxl          /bus@58000000           /bus@58000000/isi@58100000        1  /bus@58000000/isi@58100000/ports/port@2/endpoint             /bus@58000000/irqsteer@58220000         /bus@58000000/gpio@58222000       (  /bus@58000000/clock-controller@58223018       (  /bus@58000000/clock-controller@5822301c         B/bus@58000000/i2c@58226000          /bus@58000000/csi@58227000        1  /bus@58000000/csi@58227000/ports/port@1/endpoint             $/bus@58000000/irqsteer@58240000         2/bus@58000000/gpio@58242000       (  B/bus@58000000/clock-controller@58243018       (  Q/bus@58000000/clock-controller@5824301c         _/bus@58000000/i2c@58246000          m/bus@58000000/csi@58247000           x/bus@58000000/irqsteer@58260000       (  /bus@58000000/clock-controller@58263004       (  /bus@58000000/clock-controller@58263018       (  /bus@58000000/clock-controller@5826301c         /bus@58000000/i2c@58266000          /bus@58000000/jpegdec@58400000          /bus@58000000/jpegenc@58450000        (  /bus@58000000/clock-controller@58500000       (  /bus@58000000/clock-controller@58510000       (  /bus@58000000/clock-controller@58520000       (  /bus@58000000/clock-controller@58530000       (  /bus@58000000/clock-controller@58540000       (  /bus@58000000/clock-controller@58550000       (  /bus@58000000/clock-controller@58560000       (  /bus@58000000/clock-controller@58570000       (  (/bus@58000000/clock-controller@58580000       (  6/bus@58000000/clock-controller@58590000       (  D/bus@58000000/clock-controller@585a0000       (  Z/bus@58000000/clock-controller@585d0000       (  l/bus@58000000/clock-controller@585f0000         ~/vpu@2c000000           /vpu@2c000000/mailbox@2d000000          /vpu@2c000000/mailbox@2d020000           /vpu@2c000000/vpu-core@2d080000          /vpu@2c000000/vpu-core@2d090000         /bus@31400000           /bus@31400000/crypto@31400000         '  /bus@31400000/crypto@31400000/jr@30000        '  /bus@31400000/crypto@31400000/jr@40000          /clock-cm40-ipg         /bus@34000000           /bus@34000000/serial@37220000           /bus@34000000/i2c@37230000        #  /bus@34000000/i2c@37230000/gpio@20        *  /bus@34000000/i2c@37230000/audio-codec@48           /bus@34000000/intmux@37400000         (  /bus@34000000/clock-controller@37620000       (  /bus@34000000/clock-controller@37630000         (/bus@53000000           4/bus@53000000/gpu@53100000          </clock-audio-ipg            J/clock-ext-aud-mclk0            \/clock-ext-aud-mclk1            n/clock-esai0-rx         /clock-esai0-rx-hf          /clock-esai0-tx         /clock-esai0-tx-hf          /clock-spdif0-rx            /clock-sai0-rx-bclk         /clock-sai0-tx-bclk         /clock-sai1-rx-bclk         /clock-sai1-tx-bclk         
/clock-sai2-rx-bclk         /clock-sai3-rx-bclk         ,/clock-sai4-rx-bclk         =/bus@59000000           J/bus@59000000/asrc@59000000         /bus@59000000/esai@59010000         P/bus@59000000/spdif@59020000            /bus@59000000/sai@59040000          /bus@59000000/sai@59050000          W/bus@59000000/sai@59060000          \/bus@59000000/sai@59070000        &  a/bus@59000000/dma-controller@591f0000         (  g/bus@59000000/clock-controller@59400000       (  r/bus@59000000/clock-controller@59410000       (  }/bus@59000000/clock-controller@59420000       (  s/bus@59000000/clock-controller@59440000       (  /bus@59000000/clock-controller@59450000       (  /bus@59000000/clock-controller@59460000       (  /bus@59000000/clock-controller@59470000       (  /bus@59000000/clock-controller@59580000       (  /bus@59000000/clock-controller@59590000         /bus@59000000/dsp@596e8000          /bus@59000000/asrc@59800000         /bus@59000000/sai@59820000          /bus@59000000/sai@59830000          /bus@59000000/amix@59840000         /bus@59000000/mqs@59850000        &  /bus@59000000/dma-controller@599f0000         (  /bus@59000000/clock-controller@59d00000       (  /bus@59000000/clock-controller@59d10000       (  /bus@59000000/clock-controller@59d20000       (  /bus@59000000/clock-controller@59d30000       (   /bus@59000000/clock-controller@59d50000       (  ./bus@59000000/clock-controller@59d60000         </bus@59000000/acm@59e00000        (  @/bus@59000000/clock-controller@59c00000       (  K/bus@59000000/clock-controller@59c20000       (  U/bus@59000000/clock-controller@59c30000       (  _/bus@59000000/clock-controller@59c40000       (  i/bus@59000000/clock-controller@59c50000         s/clock-dma-ipg          /bus@5a000000           /bus@5a000000/spi@5a000000          /bus@5a000000/spi@5a010000          /bus@5a000000/spi@5a020000          /bus@5a000000/spi@5a030000          /bus@5a000000/serial@5a060000           /bus@5a000000/serial@5a070000           /bus@5a000000/serial@5a080000           /bus@5a000000/serial@5a090000           /bus@5a000000/pwm@5a190000        &  /bus@5a000000/dma-controller@5a1f0000         (  /bus@5a000000/clock-controller@5a400000       (  /bus@5a000000/clock-controller@5a410000       (  /bus@5a000000/clock-controller@5a420000       (  /bus@5a000000/clock-controller@5a430000       (  /bus@5a000000/clock-controller@5a460000       (  /bus@5a000000/clock-controller@5a470000       (  /bus@5a000000/clock-controller@5a480000       (  /bus@5a000000/clock-controller@5a490000       (  /bus@5a000000/clock-controller@5a590000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000        4  /bus@5a000000/i2c@5a810000/i2c-mux@71/i2c@0/gpio@68       4  '/bus@5a000000/i2c@5a810000/i2c-mux@71/i2c@3/gpio@1a       4  1/bus@5a000000/i2c@5a810000/i2c-mux@71/i2c@3/gpio@1d       #  ;/bus@5a000000/i2c@5a810000/tcpc@50        -  C/bus@5a000000/i2c@5a810000/tcpc@50/connector          C  L/bus@5a000000/i2c@5a810000/tcpc@50/connector/ports/port@0/endpoint        C  X/bus@5a000000/i2c@5a810000/tcpc@50/connector/ports/port@1/endpoint           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000          e/bus@5a000000/adc@5a880000          j/bus@5a000000/adc@5a890000           /bus@5a000000/can@5a8d0000          1/bus@5a000000/can@5a8e0000          o/bus@5a000000/can@5a8f0000        &  x/bus@5a000000/dma-controller@5a9f0000         (  ~/bus@5a000000/clock-controller@5ac00000       (  /bus@5a000000/clock-controller@5ac10000       (  /bus@5a000000/clock-controller@5ac20000       (  /bus@5a000000/clock-controller@5ac30000       (  /bus@5a000000/clock-controller@5ac80000       (  /bus@5a000000/clock-controller@5ac90000       (  /bus@5a000000/clock-controller@5acd0000         /clock-conn-axi         /clock-conn-ahb         /clock-conn-ipg         /clock-conn-bch         /bus@5b000000           /bus@5b000000/usb@5b0d0000          /bus@5b000000/usbmisc@5b0d0200          /bus@5b000000/usbphy@5b100000           /bus@5b000000/mmc@5b010000          #/bus@5b000000/mmc@5b020000          /bus@5b000000/mmc@5b030000           /bus@5b000000/ethernet@5b040000       4  $/bus@5b000000/ethernet@5b040000/mdio/ethernet-phy@0          ,/bus@5b000000/ethernet@5b050000         1/bus@5b000000/usb@5b110000        (  9/bus@5b000000/usb@5b110000/usb@5b120000       6  G/bus@5b000000/usb@5b110000/usb@5b120000/port/endpoint           S/bus@5b000000/usb-phy@5b160000        (  \/bus@5b000000/clock-controller@5b200000       (  g/bus@5b000000/clock-controller@5b210000       (  r/bus@5b000000/clock-controller@5b220000       (  }/bus@5b000000/clock-controller@5b230000       (  /bus@5b000000/clock-controller@5b240000       (  /bus@5b000000/clock-controller@5b270000       (  /bus@5b000000/clock-controller@5b280000       (  /bus@5b000000/clock-controller@5b290000       (  /bus@5b000000/clock-controller@5b290004       &  /bus@5b000000/dma-controller@5b810000         '  /bus@5b000000/nand-controller@5b812000          /bus@5c000000           /bus@5c000000/ddr-pmu@5c020000          /clock-lsio-bus         /bus@5d000000            /bus@5d000000/pwm@5d000000          
/bus@5d000000/pwm@5d010000          /bus@5d000000/pwm@5d020000          /bus@5d000000/pwm@5d030000          (/bus@5d000000/gpio@5d080000         3/bus@5d000000/gpio@5d090000         >/bus@5d000000/gpio@5d0a0000         I/bus@5d000000/gpio@5d0b0000         T/bus@5d000000/gpio@5d0c0000         _/bus@5d000000/gpio@5d0d0000         j/bus@5d000000/gpio@5d0e0000         u/bus@5d000000/gpio@5d0f0000         /bus@5d000000/spi@5d120000          /bus@5d000000/mailbox@5d1b0000          /bus@5d000000/mailbox@5d1c0000          /bus@5d000000/mailbox@5d1d0000          /bus@5d000000/mailbox@5d1e0000          /bus@5d000000/mailbox@5d1f0000          /bus@5d000000/mailbox@5d200000          /bus@5d000000/mailbox@5d210000          /bus@5d000000/mailbox@5d280000        (  /bus@5d000000/clock-controller@5d400000       (  /bus@5d000000/clock-controller@5d410000       (  /bus@5d000000/clock-controller@5d420000       (  /bus@5d000000/clock-controller@5d430000       (  /bus@5d000000/clock-controller@5d440000       (  /bus@5d000000/clock-controller@5d450000       (  /bus@5d000000/clock-controller@5d460000       (  /bus@5d000000/clock-controller@5d470000         "/clock-hsio-axi         //clock-hsio-per         </clock-hsio-refa            J/clock-hsio-refb            X/clock-xtal100m         a/bus@5f000000           m/bus@5f000000/pcie@5f010000         /bus@5f000000/pcie@5f010000         s/bus@5f000000/pcie-ep@5f010000          |/bus@5f000000/pcie-ep@5f010000        (  /bus@5f000000/clock-controller@5f060000       (  /bus@5f000000/clock-controller@5f0b0000       (  /bus@5f000000/clock-controller@5f0d0000       (  /bus@5f000000/clock-controller@5f0f0000       (  /bus@5f000000/clock-controller@5f090000         /bus@5f000000/phy@5f1a0000          /audio-codec-bt         /imx8x-cm4          /usdhc2-vmmc            /gpio-sbu-mux/port/endpoint         /i2c-mux/i2c@0/audio-codec@1a           /i2c-mux/i2c@1/wm8962@1a            /regulator-1v5          /regulator-1v8          %/regulator-2v8          -/regulator-pcie         7/regulator-audio            A/regulator-audio-pwr            N/regulator-audio-3v3            \/regulator-audio-1v8            j/regulator-can-en           u/regulator-can-stby         /regulator-usbotg1-vbus       $  /sound-bt-sco/simple-audio-card,cpu          	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status alloc-ranges linux,cma-default reusable mbox-names mboxes #power-domain-cells #clock-cells fsl,pins linux,keycodes #reset-cells timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device clock-names power-domains remote-endpoint fsl,channel fsl,num-irqs #gpio-cells gpio-controller clock-indices assigned-clocks assigned-clock-rates resets #mbox-cells memory-region fsl,sec-era pinctrl-names pinctrl-0 pinctrl-1 scl-gpios sda-gpios reset-gpios VA-supply VD-supply VLC-supply VLS-supply dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map assigned-clock-parents #sound-dai-cells #dma-cells dma-channels dma-channel-mask firmware-name fsl,sai-asynchronous dais #pwm-cells label power-role data-role source-pdos #io-channel-cells fsl,clk-source fsl,scu-index xceiver-supply fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable hnp-disable srp-disable disable-over-current power-active-high vbus-supply #index-cells bus-width no-sd no-sdio non-removable fsl,tuning-start-tap fsl,tuning-step vmmc-supply cd-gpios wp-gpios fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode usb-role-switch #phy-cells gpio-ranges enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed vpcie-supply num-ib-windows num-ob-windows fsl,hsio-cfg fsl,refclk-pad-mode stdout-path fsl,entry-address fsl,resource-id regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high select-gpios orientation-switch mux-gpios i2c-parent wlf,shared-lrclk wlf,hp-cfg wlf,gpio-cfg AVDD-supply DBVDD-supply DCVDD-supply SPKVDD1-supply SPKVDD2-supply CPVDD-supply MICVDD-supply PLLVDD-supply regulator-always-on regulator-boot-on vin-supply simple-audio-card,bitclock-inversion simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,name sound-dai dai-tdm-slot-num dai-tdm-slot-width audio-asrc audio-codec audio-cpu audio-routing hp-det-gpios A35_0 A35_1 A35_2 A35_3 A35_L2 a35_opp_table gic decoder_boot encoder_boot decoder_rpc dsp_reserved encoder_rpc vdev0vring0 vdev0vring1 vdev1vring0 vdev1vring1 rsc_table vdevbuffer dsp_vdev0vring0 dsp_vdev0vring1 dsp_vdev0buffer gpu_reserved pd iomuxc pinctrl_cm40_i2c pinctrl_cm40_i2c_gpio pinctrl_esai0 pinctrl_fec1 pinctrl_flexcan1 pinctrl_flexcan2 pinctrl_i2c_mipi_csi0 pinctrl_ioexp_rst pinctrl_isl29023 pinctrl_lpi2c1 pinctrl_lpuart0 pinctrl_lpuart2 pinctrl_lpuart3 pinctrl_mipi_csi0 pinctrl_pcieb pinctrl_typec pinctrl_typec_mux pinctrl_sai0 pinctrl_sai1 pinctrl_usdhc1 pinctrl_usdhc2 ocotp scu_key scu_reset rtc tsens clk_dummy xtal32k xtal24m thermal_zones cpu_alert0 cpu_crit0 pmic_alert0 pmic_crit0 img_ipg_clk img_pxl_clk img_subsys isi isi_in_2 irqsteer_csi0 gpio0_mipi_csi0 csi0_core_lpcg csi0_esc_lpcg mipi_csi_0 mipi_csi0_out irqsteer_csi1 gpio0_mipi_csi1 csi1_core_lpcg csi1_esc_lpcg i2c_mipi_csi1 mipi_csi_1 irqsteer_parallel pi0_ipg_lpcg pi0_pxl_lpcg pi0_misc_lpcg i2c0_parallel jpegdec jpegenc pdma0_lpcg pdma1_lpcg pdma2_lpcg pdma3_lpcg pdma4_lpcg pdma5_lpcg pdma6_lpcg pdma7_lpcg csi0_pxl_lpcg csi1_pxl_lpcg hdmi_rx_pxl_link_lpcg img_jpeg_dec_lpcg img_jpeg_enc_lpcg vpu mu_m0 mu1_m0 vpu_core0 vpu_core1 security_subsys crypto sec_jr2 sec_jr3 cm40_ipg_clk cm40_subsys cm40_lpuart pca6416 cs42888 cm40_intmux cm40_uart_lpcg cm40_i2c_lpcg gpu0_subsys gpu_3d0 audio_ipg_clk clk_ext_aud_mclk0 clk_ext_aud_mclk1 clk_esai0_rx_clk clk_esai0_rx_hf_clk clk_esai0_tx_clk clk_esai0_tx_hf_clk clk_spdif0_rx clk_sai0_rx_bclk clk_sai0_tx_bclk clk_sai1_rx_bclk clk_sai1_tx_bclk clk_sai2_rx_bclk clk_sai3_rx_bclk clk_sai4_rx_bclk audio_subsys asrc0 spdif0 sai2 sai3 edma0 asrc0_lpcg esai0_lpcg spdif0_lpcg sai1_lpcg sai2_lpcg sai3_lpcg dsp_lpcg dsp_ram_lpcg dsp asrc1 sai4 sai5 amix mqs edma1 aud_rec0_lpcg aud_rec1_lpcg aud_pll_div0_lpcg aud_pll_div1_lpcg mclkout0_lpcg mclkout1_lpcg acm asrc1_lpcg sai4_lpcg sai5_lpcg amix_lpcg mqs0_lpcg dma_ipg_clk dma_subsys lpspi0 lpspi1 lpspi2 lpspi3 lpuart1 adma_pwm edma2 spi0_lpcg spi1_lpcg spi2_lpcg spi3_lpcg uart0_lpcg uart1_lpcg uart2_lpcg uart3_lpcg adma_pwm_lpcg max7322 pca9557_a pca9557_b ptn5110 usb_con1 typec_dr_sw typec_con_ss adc0 adc1 flexcan3 edma3 i2c0_lpcg i2c1_lpcg i2c2_lpcg i2c3_lpcg adc0_lpcg adc1_lpcg can0_lpcg conn_axi_clk conn_ahb_clk conn_ipg_clk conn_bch_clk conn_subsys usbotg1 usbmisc1 usbphy1 usdhc3 ethphy0 fec2 usbotg3 usbotg3_cdns3 usb3_drd_sw usb3_phy sdhc0_lpcg sdhc1_lpcg sdhc2_lpcg enet0_lpcg enet1_lpcg usb2_lpcg usb3_lpcg rawnand_0_lpcg rawnand_4_lpcg dma_apbh gpmi ddr_subsys ddr_pmu0 lsio_bus_clk lsio_subsys lsio_pwm0 lsio_pwm1 lsio_pwm2 lsio_pwm3 lsio_gpio0 lsio_gpio1 lsio_gpio2 lsio_gpio3 lsio_gpio4 lsio_gpio5 lsio_gpio6 lsio_gpio7 flexspi0 lsio_mu0 lsio_mu1 lsio_mu2 lsio_mu3 lsio_mu4 lsio_mu5 lsio_mu6 lsio_mu13 pwm0_lpcg pwm1_lpcg pwm2_lpcg pwm3_lpcg pwm4_lpcg pwm5_lpcg pwm6_lpcg pwm7_lpcg hsio_axi_clk hsio_per_clk hsio_refa_clk hsio_refb_clk xtal100m hsio_subsys pcie0 pcie0_ep pcieb_ep pcieb_lpcg phyx1_crr1_lpcg pcieb_crr3_lpcg misc_crr5_lpcg phyx1_lpcg hsio_phy bt_sco_codec imx8x_cm4 reg_usdhc2_vmmc usb3_data_ss wm8960 wm8962 reg_1v5 reg_1v8 reg_2v8 reg_pcieb reg_audio reg_audio_5v reg_audio_3v3 reg_audio_1v8 reg_can_en reg_can_stby reg_usb_otg1_vbus btcpu 