 7   8     (            
                                                                    1   ,Toradex Colibri iMX8QXP on Colibri Iris V2 Board          @   2toradex,colibri-imx8x-iris-v2 toradex,colibri-imx8x fsl,imx8qxp    aliases           =/bus@5b000000/ethernet@5b040000           G/bus@5b000000/ethernet@5b050000          Q/bus@5d000000/gpio@5d080000          W/bus@5d000000/gpio@5d090000          ]/bus@5d000000/gpio@5d0a0000          c/bus@5d000000/gpio@5d0b0000          i/bus@5d000000/gpio@5d0c0000          o/bus@5d000000/gpio@5d0d0000          u/bus@5d000000/gpio@5d0e0000          {/bus@5d000000/gpio@5d0f0000          /bus@5a000000/i2c@5a800000           /bus@5a000000/i2c@5a810000           /bus@5a000000/i2c@5a820000           /bus@5a000000/i2c@5a830000           /bus@5b000000/mmc@5b010000           /bus@5b000000/mmc@5b020000           /bus@5b000000/mmc@5b030000           /bus@5d000000/mailbox@5d1b0000           /bus@5d000000/mailbox@5d1c0000           /bus@5d000000/mailbox@5d1d0000           /bus@5d000000/mailbox@5d1e0000           /bus@5d000000/mailbox@5d1f0000           /bus@5a000000/serial@5a060000            /bus@5a000000/serial@5a070000            /bus@5a000000/serial@5a080000            /bus@5a000000/serial@5a090000            /bus@5a000000/spi@5a000000           /bus@5a000000/spi@5a010000           /bus@5a000000/spi@5a020000           /bus@5a000000/spi@5a030000            /vpu@2c000000/vpu-core@2d080000           /vpu@2c000000/vpu-core@2d090000       "   /bus@5a000000/i2c@5a810000/rtc@68           /system-controller/rtc        cpus                                 cpu@0           
cpu          2arm,cortex-a35                          psci            (           5   @        G           T           a   @        s                                                               
      cpu@1           
cpu          2arm,cortex-a35                         psci            (           5   @        G           T           a   @        s                                                                     cpu@2           
cpu          2arm,cortex-a35                         psci            (           5   @        G           T           a   @        s                                                                     cpu@3           
cpu          2arm,cortex-a35                         psci            (           5   @        G           T           a   @        s                                                                     l2-cache0            2cache                               *           7   @        I                       opp-table            2operating-points-v2                        opp-900000000               5          B@         I      opp-1200000000              G                   I                  interrupt-controller@51a00000            2arm,gic-v3               Q             Q                                          +        @      	                    reserved-memory                                   K   decoder-boot@84000000                                  R           (      encoder-boot@86000000                                   R           +      decoder-rpc@92000000                                   R           )      dsp@92400000                @                  R      	  Ydisabled          encoder-rpc@94400000                @       p           R           ,         pmu          2arm,cortex-a35-pmu          @               psci             2arm,psci-1.0            !smc       system-controller            2fsl,imx-scu         `tx0 rx0 gip3          $  k                                 power-controller             2fsl,imx8qxp-scu-pd fsl,scu-pd           r                    clock-controller             2fsl,imx8qxp-clk fsl,scu-clk                             pinctrl          2fsl,imx8qxp-iomuxc          default                             ad7879intgrp                     !           r      adc0grp       0     d       `   c       `   h       `   g       `           x      atmeladaptergrp            N      !   M     !      atmelconnectorgrp                   !         !      canintgrp                    @      csictlgrp                                     csimclkgrp                   A      extio0grp              1     @      fec1grp       x     5          4          &       a   %     a   '       a   (       a   -       a   .       a   /       a   0      a                 fec1slpgrp        x     5     A   4     A   &      A   %      A   '      A   (      A   -      A   .      A   /      A   0      A                 flexcan0grp            j       !   i       !      flexcan1grp            l       !   k       !      flexcan2grp            n       !   m       !      gpioblongrp                  `      gpiohpdgrp             z             gpiokeysgrp               p A                 hog0grp                  a             S                 a   ,                a             T                 a             U                 a   R                 a                                                               X                                 hog1grp                         hog2grp                         hogscfwgrp                          i2c0grp                 !        !           i      i2c0mipilvds0grp               t          u             i2c0mipilvds1grp               x          y             i2c1grp            v     !   w     !           t      lcdifgrp         ,     L      `   H      `   K      `   J      @         @   7      `         `   8      `   9      `   :      `   ;      `   <      `   =      `   >      `   ?      `   @      `   A      `   B      `   C      `   E      `   F      `   G      `   I      `   )      `   P      `      lpspi2grp         0     Y      !   Z      @   [      @   \      @           Z      lpspi2cs2grp               *      !      lpuart0grp        0     o          p          i         j                 ^      lpuart2grp             r          q                  a      lpuart3grp             m         n                 c      lpuart3ctrlgrp        H     {          V          W                                                d      pciebgrp          $          a        a          `                 pwmagrp                   a   `      `           f      pwmbgrp            M      `                 pwmcgrp            N      `                 pwmdgrp                   a   O      `                 sai0grp       0     ^     @   a     @   ]     @   _     @           :      sgtl5000grp                  A      sgtl5000usbclkgrp              e      !           j      usb3503agrp                  a           l      usbcdetgrp             3     @                 usbh1reggrp                 @                 usdhc1grp              	      A   
       !          !          !          !          !          !          !          !          !          A          !                 usdhc1-100mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !                 usdhc1-200mhzgrp               	      A   
       !          !          !          !          !          !          !          !          !          A          !                 usdhc2gpiogrp                   !                 usdhc2gpioslpgrp                     `                 usdhc2grp         T           A          !           !   !       !   "       !   #       !          !                 usdhc2-100mhzgrp          T           A          !           !   !       !   "       !   #       !          !                 usdhc2-200mhzgrp          T           A          !           !   !       !   "       !   #       !          !                 usdhc2slpgrp          T           `         `          `   !      `   "      `   #      `          !                 wifigrp                         gpioirisgrp       T                         R          U          T          ,         S                        uart1forceoffgrp                            uart23forceoffgrp              {             enable-3v3-vmmc-grp            X                        lvds-converter-grp        0     l          k                                               ocotp            2fsl,imx8qxp-scu-ocotp                                  keys          "   2fsl,imx8qxp-sc-key fsl,imx-sc-key              t      	  Ydisabled          reset-controller             2fsl,imx-scu-reset                               rtc          2fsl,imx8qxp-sc-rtc        watchdog          "   2fsl,imx8qxp-sc-wdt fsl,imx-sc-wdt              <      thermal-sensor        *   2fsl,imx8qxp-sc-thermal fsl,imx-sc-thermal                                  timer            2arm,armv8-timer       0  @                                 
         clock-dummy          2fixed-clock                               
  clk_dummy              "      clock-xtal32k            2fixed-clock                                xtal_32KHz        clock-xtal24m            2fixed-clock                     n6         xtal_24MHz        thermal-zones      cpu0-thermal                       +          9     c   trips      trip0           I _        U          passive            	      trip1           I (        U        	  critical             cooling-maps       map0            `   	      0  e   
                     pmic-thermal                       +          9        trips      trip0           I         U          passive                  trip1           I H        U        	  critical             cooling-maps       map0            `         0  e   
                        clock-img-ipg            2fixed-clock                              img_ipg_clk                  clock-img-pxl            2fixed-clock                     #F         img_pxl_clk            &      bus@58000000             2simple-bus                                   KX       X         isi@58100000            X           H  @      )         *         +         ,         -         .         0                                                    tper0 per1 per2 per3 per4 per5                      0       y     z     {     |     }     ~      	  Ydisabled             2fsl,imx8qxp-isi    ports                                port@2                endpoint                                         irqsteer@58220000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X"                         +        @      @                      tipg                                                                    gpio@58222000            2fsl,imx8qm-gpio fsl,imx35-gpio          X"                         +        @                                                        clock-controller@58223018            2fsl,imx8qxp-lpcg            X"0                                                 csi0_lpcg_core_clk               y                 clock-controller@5822301c            2fsl,imx8qxp-lpcg            X"0                                                 csi0_lpcg_esc_clk                y                 i2c@58226000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X"`            @                              tper ipg                         n6                                 	  Ydisabled          csi@58227000             2fsl,imx8qxp-mipi-csi2           X"p    X"                                       tcore esc ui                             u* J              y                   	  Ydisabled       ports                                port@0                    port@1                endpoint                                         irqsteer@58240000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X$                         +        @      A                      tipg                                                         	  Ydisabled                     gpio@58242000            2fsl,imx8qm-gpio fsl,imx35-gpio          X$                         +        @                                                        	  Ydisabled          clock-controller@58243018            2fsl,imx8qxp-lpcg            X$0                                                 csi1_lpcg_core_clk               y      	  Ydisabled                     clock-controller@5824301c            2fsl,imx8qxp-lpcg            X$0                                                 csi1_lpcg_esc_clk                y      	  Ydisabled                      i2c@58246000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X$`            @                              tper ipg                         n6                                 	  Ydisabled          csi@58247000             2fsl,imx8qxp-mipi-csi2           X$p    X$                            !            tcore esc ui                              u* J              y                   	  Ydisabled          irqsteer@58260000         %   2fsl,imx8qm-irqsteer fsl,imx-irqsteer            X&                         +        @      B              "        tipg                           F                              	  Ydisabled               #      clock-controller@58263004            2fsl,imx8qxp-lpcg            X&0                F                                 pi0_lpcg_ipg_clk                 y      clock-controller@58263018            2fsl,imx8qxp-lpcg            X&0                F                                  pi0_lpcg_pxl_clk                 y      clock-controller@5826301c            2fsl,imx8qxp-lpcg            X&0                F                                   pi0_lpcg_misc_clk                y      i2c@58266000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         X&`            @                I              tper ipg              I           n6              #             I      	  Ydisabled          jpegdec@58400000            X@             @      5              $       $              $       $                                        2nxp,imx8qxp-jpgdec          Yokay          jpegenc@58450000            XE             @      1              %       %              %       %                                        2nxp,imx8qxp-jpgenc          Yokay          clock-controller@58500000            2fsl,imx8qxp-lpcg            XP                &                               pdma0_lpcg_clk               y                 clock-controller@58510000            2fsl,imx8qxp-lpcg            XQ                &                               pdma1_lpcg_clk               z                 clock-controller@58520000            2fsl,imx8qxp-lpcg            XR                &                               pdma2_lpcg_clk               {                 clock-controller@58530000            2fsl,imx8qxp-lpcg            XS                &                               pdma3_lpcg_clk               |                 clock-controller@58540000            2fsl,imx8qxp-lpcg            XT                &                               pdma4_lpcg_clk               }                 clock-controller@58550000            2fsl,imx8qxp-lpcg            XU                &                               pdma5_lpcg_clk               ~                 clock-controller@58560000            2fsl,imx8qxp-lpcg            XV                &                               pdma6_lpcg_clk                     clock-controller@58570000            2fsl,imx8qxp-lpcg            XW                &                               pdma7_lpcg_clk                     clock-controller@58580000            2fsl,imx8qxp-lpcg            XX                &                               csi0_lpcg_pxl_clk                                 clock-controller@58590000            2fsl,imx8qxp-lpcg            XY                &                               csi1_lpcg_pxl_clk                      	  Ydisabled               !      clock-controller@585a0000            2fsl,imx8qxp-lpcg            XZ                &                               hdmi_rx_lpcg_pxl_link_clk                      clock-controller@585d0000            2fsl,imx8qxp-lpcg            X]                                                   0  img_jpeg_dec_lpcg_clk img_jpeg_dec_lpcg_ipg_clk                         $      clock-controller@585f0000            2fsl,imx8qxp-lpcg            X_                                                   0  img_jpeg_enc_lpcg_clk img_jpeg_enc_lpcg_ipg_clk                         %         vpu@2c000000                                     K,       ,                  ,                               Yokay             2nxp,imx8qxp-vpu    mailbox@2d000000             2fsl,imx6sx-mu           -              @                                         Yokay               '      mailbox@2d020000             2fsl,imx6sx-mu           -             @                                         Yokay               *      vpu-core@2d080000           -              2nxp,imx8q-vpu-decoder                        `tx0 tx1 rx        $  k   '           '          '               Yokay               (   )      vpu-core@2d090000           -              2nxp,imx8q-vpu-encoder                        `tx0 tx1 rx        $  k   *           *          *               Yokay               +   ,         bus@31400000             2simple-bus                                   K1@      1@   	     crypto@31400000          2fsl,imx8qxp-caam fsl,sec-v4.0           1@   	          @                                           K    1@   	                       '   	   jr@30000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        @                            jr@40000          +   2fsl,imx8qxp-job-ring fsl,sec-v4.0-job-ring                        @                                  clock-cm40-ipg           2fixed-clock                     )         cm40_ipg_clk               0      bus@34000000             2simple-bus                                   K4       4                   -   serial@37220000          2fsl,imx8qxp-lpuart          7"             @                 .      .          	  tipg baud                            n6                    	  Ydisabled          i2c@37230000          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c         7#             @   	              /       /           tper ipg                          n6                     	  Ydisabled          intmux@37400000          2fsl,imx-intmux          7@                        `  @                                                                                         +                      0        tipg              !      	  Ydisabled               -      clock-controller@37620000            2fsl,imx8qxp-lpcg            7b                                   0                     *  cm40_lpcg_uart_clk cm40_lpcg_uart_ipg_clk                           .      clock-controller@37630000            2fsl,imx8qxp-lpcg            7c                                    0                     (  cm40_lpcg_i2c_clk cm40_lpcg_i2c_ipg_clk                          /         bus@53000000             2simple-bus                                   KS       S         gpu@53100000             2vivante,gc          S             @       @                                     tcore shader                                   )' 2                       clock-audio-ipg          2fixed-clock                     '         audio_ipg_clk              8      clock-ext-aud-mclk0          2fixed-clock                                 ext_aud_mclk0              H      clock-ext-aud-mclk1          2fixed-clock                                 ext_aud_mclk1              I      clock-esai0-rx           2fixed-clock                                 esai0_rx_clk               J      clock-esai0-rx-hf            2fixed-clock                                 esai0_rx_hf_clk            K      clock-esai0-tx           2fixed-clock                                 esai0_tx_clk               L      clock-esai0-tx-hf            2fixed-clock                                 esai0_tx_hf_clk            M      clock-spdif0-rx          2fixed-clock                               
  spdif0_rx              N      clock-sai0-rx-bclk           2fixed-clock                                 sai0_rx_bclk               O      clock-sai0-tx-bclk           2fixed-clock                                 sai0_tx_bclk               P      clock-sai1-rx-bclk           2fixed-clock                                 sai1_rx_bclk               Q      clock-sai1-tx-bclk           2fixed-clock                                 sai1_tx_bclk               R      clock-sai2-rx-bclk           2fixed-clock                                 sai2_rx_bclk               S      clock-sai3-rx-bclk           2fixed-clock                                 sai3_rx_bclk               T      clock-sai4-rx-bclk           2fixed-clock                                 sai4_rx_bclk               U      bus@59000000             2simple-bus                                   KY       Y         asrc@59000000            2fsl,imx8qm-asrc         Y              @      t         d     1       1       2      3      4       4      "   "   "   "   "   "   "   "   "   "   "   "   "        tmem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  3   5               5              5              5             5             5                  8rxa rxb rxc txa txb txc         B  @        P           _                       	  Ydisabled          esai@59010000         !   2fsl,imx8qm-esai fsl,imx6ull-esai            Y             @                    6      6       6      "        tcore extal fsys spba             3   5             5                   8rx tx                      	  Ydisabled          spdif@59020000           2fsl,imx8qm-spdif            Y             @                        0     7      "   7       "   "   "   8   "   "   "      :  tcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba            3   5             5   	               8rx tx                      	  Ydisabled          sai@59040000             2fsl,imx8qm-sai          Y             @      :              9      "   9       "   "        tbus mclk0 mclk1 mclk2 mclk3         8rx tx            3   5             5                        >        Yokay            p            default            :                 sai@59050000             2fsl,imx8qm-sai          Y             @      <              ;      "   ;       "   "        tbus mclk0 mclk1 mclk2 mclk3         8rx tx            3   5             5                        ?      	  Ydisabled          sai@59060000             2fsl,imx8qm-sai          Y             @      >              <      "   <       "   "        tbus mclk0 mclk1 mclk2 mclk3         8rx          3   5                       @      	  Ydisabled          sai@59070000             2fsl,imx8qm-sai          Y             @      C              =      "   =       "   "        tbus mclk0 mclk1 mclk2 mclk3         8rx          3   5                             	  Ydisabled          dma-controller@591f0000          2fsl,imx8qm-edma         Y                                    \         @      v         w         x         y         z         {                                                                   ;         ;         =         =         ?         D                                                                               @      A      B      C      D      E      F      G      H      I      J      K      L      M      N      O      P      Q      R      S      T      U      V      W           5      clock-controller@59400000            2fsl,imx8qxp-lpcg            Y@                           8                   asrc0_lpcg_ipg_clk                          1      clock-controller@59410000            2fsl,imx8qxp-lpcg            YA                           4      8                     (  esai0_lpcg_extal_clk esai0_lpcg_ipg_clk                         6      clock-controller@59420000            2fsl,imx8qxp-lpcg            YB                           4      8                     %  spdif0_lpcg_tx_clk spdif0_lpcg_gclkw                            7      clock-controller@59440000            2fsl,imx8qxp-lpcg            YD                           4      8                     !  sai0_lpcg_mclk sai0_lpcg_ipg_clk                 >           9      clock-controller@59450000            2fsl,imx8qxp-lpcg            YE                           4      8                     !  sai1_lpcg_mclk sai1_lpcg_ipg_clk                 ?           ;      clock-controller@59460000            2fsl,imx8qxp-lpcg            YF                           4      8                     !  sai2_lpcg_mclk sai2_lpcg_ipg_clk                 @           <      clock-controller@59470000            2fsl,imx8qxp-lpcg            YG                           4      8                     !  sai3_lpcg_mclk sai3_lpcg_ipg_clk                            =      clock-controller@59590000            2fsl,imx8qxp-lpcg            YY                           8                   dsp_ram_lpcg_ipg_clk                       asrc@59800000            2fsl,imx8qm-asrc         Y             @      |         d     >      >      2       3       4       4      "   "   "   "   "   "   "   "   "   "   "   "   "        tmem ipg asrck_0 asrck_1 asrck_2 asrck_3 asrck_4 asrck_5 asrck_6 asrck_7 asrck_8 asrck_9 asrck_a asrck_b asrck_c asrck_d asrck_e asrck_f spba          `  3   ?               ?              ?              ?             ?             ?                  8rxa rxb rxc txa txb txc         B  @        P           _                      	  Ydisabled          sai@59820000             2fsl,imx8qm-sai          Y             @      I              @      "   @       "   "        tbus mclk0 mclk1 mclk2 mclk3          3   ?             ?   	                8rx tx                      	  Ydisabled               C      sai@59830000             2fsl,imx8qm-sai          Y             @      K              A      "   A       "   "        tbus mclk0 mclk1 mclk2 mclk3         3   ?   
                8tx                     	  Ydisabled               D      amix@59840000            2fsl,imx8qm-audmix           Y                B            tipg                         C   D      	  Ydisabled          mqs@59850000             2fsl,imx8qm-mqs          Y                E      E          
  tmclk core                      	  Ydisabled          dma-controller@599f0000          2fsl,imx8qm-edma         Y                                              @      ~                                                                            J         J         L         X        l      m      n      o      p      q      r      s      t      u      v           ?      clock-controller@59d00000            2fsl,imx8qxp-lpcg            Y                             E                       aud_rec_clk0_lpcg_clk                E           F      clock-controller@59d10000            2fsl,imx8qxp-lpcg            Y                                                    aud_rec_clk1_lpcg_clk                           G      clock-controller@59d20000            2fsl,imx8qxp-lpcg            Y                             E                        aud_pll_div_clk0_lpcg_clk                E           2      clock-controller@59d30000            2fsl,imx8qxp-lpcg            Y                                                     aud_pll_div_clk1_lpcg_clk                           3      clock-controller@59d50000            2fsl,imx8qxp-lpcg            Y                           4                       mclkout0_lpcg_clk                           k      clock-controller@59d60000            2fsl,imx8qxp-lpcg            Y                           4                       mclkout1_lpcg_clk                      acm@59e00000             2fsl,imx8qxp-acm         Y                                                 E                         >     ?     @                               X     F       G       2       3       H   I   J   K   L   M   N   O   P   Q   R   S   T   U       taud_rec_clk0_lpcg_clk aud_rec_clk1_lpcg_clk aud_pll_div_clk0_lpcg_clk aud_pll_div_clk1_lpcg_clk ext_aud_mclk0 ext_aud_mclk1 esai0_rx_clk esai0_rx_hf_clk esai0_tx_clk esai0_tx_hf_clk spdif0_rx sai0_rx_bclk sai0_tx_bclk sai1_rx_bclk sai1_tx_bclk sai2_rx_bclk sai3_rx_bclk sai4_rx_bclk             4      clock-controller@59c00000            2fsl,imx8qxp-lpcg            Y                           8                   asrc1_lpcg_ipg_clk                          >      clock-controller@59c20000            2fsl,imx8qxp-lpcg            Y                           4      8                     !  sai4_lpcg_mclk sai4_lpcg_ipg_clk                            @      clock-controller@59c30000            2fsl,imx8qxp-lpcg            Y                           4      8                     !  sai5_lpcg_mclk sai5_lpcg_ipg_clk                            A      clock-controller@59c40000            2fsl,imx8qxp-lpcg            Y                           8                    amix_lpcg_ipg_clk                           B      clock-controller@59c50000            2fsl,imx8qxp-lpcg            Y                           4      8                     !  mqs0_lpcg_mclk mqs0_lpcg_ipg_clk                            E         clock-dma-ipg            2fixed-clock                     '         dma_ipg_clk            g      bus@5a000000             2simple-bus                                   KZ       Z         spi@5a000000             2fsl,imx7ulp-spi         Z                                        @      P                           V       V           tper ipg               5                          5         3   W              W                   8tx rx         	  Ydisabled          spi@5a010000             2fsl,imx7ulp-spi         Z                                       @      Q                           X       X           tper ipg               6                          6         3   W              W                  8tx rx         	  Ydisabled          spi@5a020000             2fsl,imx7ulp-spi         Z                                       @      R                           Y       Y           tper ipg               7                          7         3   W              W                  8tx rx           Yokay            default            Z           [             spi@5a030000             2fsl,imx7ulp-spi         Z                                       @      S                           \       \           tper ipg               8                          8         3   W              W                  8tx rx         	  Ydisabled          serial@5a060000         Z             @      Y              ]      ]          	  tipg baud                  9           Ĵ               9        8rx tx            3   W             W   	                Yokay             2fsl,imx8qxp-lpuart          default            ^      serial@5a070000         Z             @      Z              _      _          	  tipg baud                  :           Ĵ               :        8rx tx            3   W   
          W                 	  Ydisabled             2fsl,imx8qxp-lpuart        serial@5a080000         Z             @      [              `      `          	  tipg baud                  ;           Ĵ               ;        8rx tx            3   W             W                   Yokay             2fsl,imx8qxp-lpuart          default            a      serial@5a090000         Z	             @      \              b      b          	  tipg baud                  <           Ĵ               <        8rx tx            3   W             W                   Yokay             2fsl,imx8qxp-lpuart          default            c   d      pwm@5a190000             2fsl,imx8qxp-pwm fsl,imx27-pwm           Z             @                     e      e            tipg per                          n6                                  default            f        Yokay          dma-controller@5a1f0000          2fsl,imx8qm-edma         Z                                   @                                                                                                                                                                                                                                                      W      clock-controller@5a400000            2fsl,imx8qxp-lpcg            Z@                              5      g                        spi0_lpcg_clk spi0_lpcg_ipg_clk               5           V      clock-controller@5a410000            2fsl,imx8qxp-lpcg            ZA                              6      g                        spi1_lpcg_clk spi1_lpcg_ipg_clk               6           X      clock-controller@5a420000            2fsl,imx8qxp-lpcg            ZB                              7      g                        spi2_lpcg_clk spi2_lpcg_ipg_clk               7           Y      clock-controller@5a430000            2fsl,imx8qxp-lpcg            ZC                              8      g                        spi3_lpcg_clk spi3_lpcg_ipg_clk               8           \      clock-controller@5a460000            2fsl,imx8qxp-lpcg            ZF                              9      g                     '  uart0_lpcg_baud_clk uart0_lpcg_ipg_clk                9           ]      clock-controller@5a470000            2fsl,imx8qxp-lpcg            ZG                              :      g                     '  uart1_lpcg_baud_clk uart1_lpcg_ipg_clk                :           _      clock-controller@5a480000            2fsl,imx8qxp-lpcg            ZH                              ;      g                     '  uart2_lpcg_baud_clk uart2_lpcg_ipg_clk                ;           `      clock-controller@5a490000            2fsl,imx8qxp-lpcg            ZI                              <      g                     '  uart3_lpcg_baud_clk uart3_lpcg_ipg_clk                <           b      clock-controller@5a590000            2fsl,imx8qxp-lpcg            ZY                                    g                     (  adma_pwm_lpcg_clk adma_pwm_lpcg_ipg_clk                          e      i2c@5a800000            Z    @                                   @                     h       h           tper ipg               `           n6               `        Yokay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  default            i   j   usb-hub@8            2smsc,usb3803                     ,       E        E         E      k            .                default            l           m                 k            trefclk                                   n                 m            audio-codec@a            2fsl,sgtl5000               
        p          ,       E        E         E      k            .                   k               o           p           q                 touchscreen@2c           2adi,ad7879-1            default            r           ,             n        @              (           A   x        X           s                                          	  Ydisabled          gpio@43          2fcs,fxl6408            C                          u  Wi-Fi_W_DISABLE Wi-Fi_WKUP_WLAN PWR_EN_+V3.3_WiFi_N PCIe_REF_CLK_EN USB_RESET_N USB_BYPASS_N Wi-Fi_PDn Wi-Fi_WKUP_BT               m         i2c@5a810000            Z    @                                   @                     s       s           tper ipg               a           n6               a        Yokay          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c                  default            t   rtc@68        	   2st,m41t0               h         i2c@5a820000            Z    @                                   @                     u       u           tper ipg               b           n6               b      	  Ydisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       i2c@5a830000            Z    @                                   @                     v       v           tper ipg               c           n6               c      	  Ydisabled          $   2fsl,imx8qxp-lpi2c fsl,imx7ulp-lpi2c       adc@5a880000             2nxp,imx8qxp-adc                    Z             @                                  w       w           tper ipg               e           n6               e        Yokay            default            x           p      can@5a8d0000             2fsl,imx8qm-flexcan          Z             @                                  y      y            tipg per               i           bZ               i                              	  Ydisabled          can@5a8e0000             2fsl,imx8qm-flexcan          Z             @                                  y      y            tipg per               i           bZ               j                             	  Ydisabled          can@5a8f0000             2fsl,imx8qm-flexcan          Z             @                                  y      y            tipg per               i           bZ               k                             	  Ydisabled          dma-controller@5a9f0000          2fsl,imx8qm-edma         Z   	                              `  @                                                                              @                                                clock-controller@5ac00000            2fsl,imx8qxp-lpcg            Z                              `      g                        i2c0_lpcg_clk i2c0_lpcg_ipg_clk               `           h      clock-controller@5ac10000            2fsl,imx8qxp-lpcg            Z                              a      g                        i2c1_lpcg_clk i2c1_lpcg_ipg_clk               a           s      clock-controller@5ac20000            2fsl,imx8qxp-lpcg            Z                              b      g                        i2c2_lpcg_clk i2c2_lpcg_ipg_clk               b           u      clock-controller@5ac30000            2fsl,imx8qxp-lpcg            Z                              c      g                        i2c3_lpcg_clk i2c3_lpcg_ipg_clk               c           v      clock-controller@5ac80000            2fsl,imx8qxp-lpcg            Z                              e      g                        adc0_lpcg_clk adc0_lpcg_ipg_clk               e           w      clock-controller@5acd0000            2fsl,imx8qxp-lpcg            Z                              i      g   g                        5  can0_lpcg_pe_clk can0_lpcg_ipg_clk can0_lpcg_chi_clk                  i           y         clock-conn-axi           2fixed-clock                     CU        conn_axi_clk                     clock-conn-ahb           2fixed-clock                     	!        conn_ahb_clk                     clock-conn-ipg           2fixed-clock                             conn_ipg_clk                     clock-conn-bch           2fixed-clock                     ׄ         conn_bch_clk          bus@5b000000             2simple-bus                                   K[       [         usb@5b0d0000          -   2fsl,imx7ulp-usb fsl,imx6ul-usb fsl,imx27-usb            [                          @                    z           {               |           '            8           L                        Yokay             `         l           }   }                                      ~      usbmisc@5b0d0200                     8   2fsl,imx7ulp-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc         [               {      usbphy@5b100000       &   2fsl,imx8qxp-usbphy fsl,imx7ulp-usbphy           [                |                        Yokay               z      mmc@5b010000            @                  [                                        tipg ahb per                       Yokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                                               "  default state_100mhz state_200mhz                                          mmc@5b020000            @                  [                                        tipg ahb per                                             Yokay          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc                      *   n   	           3         (  default state_100mhz state_200mhz sleep                                                   ?               I         T      mmc@5b030000            @                  [                                        tipg ahb per                     	  Ydisabled          "   2fsl,imx8qxp-usdhc fsl,imx7d-usdhc         ethernet@5b040000           [           0  @                                                                               tipg ahb enet_clk_ref ptp                                      沀sY@        g           y                         Yokay          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec           default sleep                                 rmii                           mdio                                 ethernet-phy@2           2ethernet-phy-ieee802.3-c22             d                                  ethernet@5b050000           [           0  @                                                                              tipg ahb enet_clk_ref ptp                                      沀sY@        g           y                       	  Ydisabled          .   2fsl,imx8qxp-fec fsl,imx8qm-fec fsl,imx6sx-fec         usb@5b110000             2fsl,imx8qm-usb3         [                                       K      (                                         tlpm bus aclk ipg core                           沀                     Yokay       usb@5b120000          
   2cdns,usb3           [     [     [             otg xhci dev                       0  @                                            host peripheral otg wakeup                     cdns3,usb3-phy                     Yokay            host             usb-phy@5b160000             2nxp,salvo-phy           [                           tsalvo_phy_clk                                    Yokay                     clock-controller@5b200000            2fsl,imx8qxp-lpcg            [                                                                9  sdhc0_lpcg_per_clk sdhc0_lpcg_ipg_clk sdhc0_lpcg_ahb_clk                                   clock-controller@5b210000            2fsl,imx8qxp-lpcg            [!                                                               9  sdhc1_lpcg_per_clk sdhc1_lpcg_ipg_clk sdhc1_lpcg_ahb_clk                                   clock-controller@5b220000            2fsl,imx8qxp-lpcg            ["                                                               9  sdhc2_lpcg_per_clk sdhc2_lpcg_ipg_clk sdhc2_lpcg_ahb_clk                                   clock-controller@5b230000            2fsl,imx8qxp-lpcg            [#                      0                                                                         enet0_lpcg_timer_clk enet0_lpcg_txc_sampling_clk enet0_lpcg_ahb_clk enet0_lpcg_ref_50mhz_clk enet0_lpcg_ipg_clk enet0_lpcg_ipg_s_clk                                   clock-controller@5b240000            2fsl,imx8qxp-lpcg            [$                      0                                                                         enet1_lpcg_timer_clk enet1_lpcg_txc_sampling_clk enet1_lpcg_ahb_clk enet1_lpcg_rgmii_txc_clk enet1_lpcg_ipg_clk enet1_lpcg_ipg_s_clk                                   clock-controller@5b270000            2fsl,imx8qxp-lpcg            ['                                                  "  usboh3_ahb_clk usboh3_phy_ipg_clk                           |      clock-controller@5b280000            2fsl,imx8qxp-lpcg            [(                                                 0                                         M  usb3_app_clk usb3_lpm_clk usb3_ipg_clk usb3_core_pclk usb3_phy_clk usb3_aclk                                  clock-controller@5b290000            2fsl,imx8qxp-lpcg            [)                              	        	                                    '  gpmi_bch gpmi_io gpmi_apb gpmi_bch_apb               	                 clock-controller@5b290004            2fsl,imx8qxp-lpcg            [)                                             apbhdma_hclk                 	                 dma-controller@5b810000       (   2fsl,imx8qxp-dma-apbh fsl,imx28-dma-apbh         [            0  @                                                                                      	                 nand-controller@5b812000             2fsl,imx8qxp-gpmi-nand           [      [@             gpmi-nand bch                                     @                 bch                                         '  tgpmi_io gpmi_apb gpmi_bch gpmi_bch_apb          3               8rx-tx                	             	                 	  Ydisabled             bus@5c000000             2simple-bus                                   K\       \         ddr-pmu@5c020000             2fsl,imx8-ddr-pmu            \             @                   clock-lsio-bus           2fixed-clock                              lsio_bus_clk                     bus@5d000000             2simple-bus                                    K]       ]                      pwm@5d000000             2fsl,imx27-pwm           ]              tipg per                                              n6                    @       ^           Yokay                       default       pwm@5d010000             2fsl,imx27-pwm           ]             tipg per                                              n6                    @       _           Yokay                       default       pwm@5d020000             2fsl,imx27-pwm           ]             tipg per                                              n6                    @       `           Yokay                       default       pwm@5d030000             2fsl,imx27-pwm           ]             tipg per                                              n6                    @       a         	  Ydisabled          gpio@5d080000           ]             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       P           8            E            K            P            R           SODIMM_70 SODIMM_60 SODIMM_58 SODIMM_78 SODIMM_72 SODIMM_80 SODIMM_46 SODIMM_62 SODIMM_48 SODIMM_74 SODIMM_50 SODIMM_52 SODIMM_54 SODIMM_66 SODIMM_64 SODIMM_68   SODIMM_82 SODIMM_56 SODIMM_28 SODIMM_30  SODIMM_61 SODIMM_103 SODIMM_79 SODIMM_97  SODIMM_25 SODIMM_27 SODIMM_100                     gpio@5d090000           ]	             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            Y   	      	   c            t          SODIMM_86 SODIMM_92 SODIMM_90 SODIMM_88    SODIMM_59  SODIMM_6 SODIMM_8   SODIMM_2 SODIMM_4 SODIMM_34 SODIMM_32 SODIMM_63 SODIMM_55 SODIMM_33 SODIMM_35 SODIMM_36 SODIMM_38 SODIMM_21 SODIMM_19 SODIMM_140 SODIMM_142 SODIMM_196 SODIMM_194 SODIMM_186 SODIMM_188 SODIMM_138               [      gpio@5d0a0000           ]
             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            {            ~                       SODIMM_23   SODIMM_144        gpio@5d0b0000           ]             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0                                               SODIMM_96 SODIMM_75 SODIMM_37 SODIMM_29      SODIMM_43 SODIMM_45 SODIMM_69 SODIMM_71 SODIMM_73 SODIMM_77 SODIMM_89 SODIMM_93 SODIMM_95 SODIMM_99 SODIMM_105 SODIMM_107 SODIMM_98 SODIMM_102 SODIMM_104 SODIMM_106              n   lvds-tx-on-hog                                   "         gpio@5d0c0000           ]             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio                                            	                                                            %              SODIMM_129 SODIMM_133 SODIMM_127 SODIMM_131             SODIMM_44  SODIMM_76 SODIMM_31 SODIMM_47 SODIMM_190 SODIMM_192 SODIMM_49 SODIMM_51 SODIMM_53                  gpio@5d0d0000           ]             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       0            (            ,         	   3         a   SODIMM_57 SODIMM_65 SODIMM_85     SODIMM_135 SODIMM_137 UNUSABLE_SODIMM_180 UNUSABLE_SODIMM_184                     gpio@5d0e0000           ]             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       gpio@5d0f0000           ]             @                                       +                                   2fsl,imx8qxp-gpio fsl,imx35-gpio       spi@5d120000                                       2nxp,imx8qxp-fspi            ]                   fspi_base fspi_mmap         @       \                                     tfspi_en fspi                        	  Ydisabled          mailbox@5d1b0000            ]             @                           	  Ydisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1c0000            ]             @                           -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu                     mailbox@5d1d0000            ]             @                           	  Ydisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1e0000            ]             @                           	  Ydisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d1f0000            ]             @                           	  Ydisabled          -   2fsl,imx8-mu-scu fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d200000            ]              @                                         	  Ydisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d210000            ]!             @                                         	  Ydisabled             2fsl,imx8qxp-mu fsl,imx6sx-mu          mailbox@5d280000            ](             @                                            2fsl,imx8qxp-mu fsl,imx6sx-mu          clock-controller@5d400000            2fsl,imx8qxp-lpcg            ]@                      4                                                                       h  pwm0_lpcg_ipg_clk pwm0_lpcg_ipg_hf_clk pwm0_lpcg_ipg_s_clk pwm0_lpcg_ipg_slv_clk pwm0_lpcg_ipg_mstr_clk                                clock-controller@5d410000            2fsl,imx8qxp-lpcg            ]A                      4                                                                       h  pwm1_lpcg_ipg_clk pwm1_lpcg_ipg_hf_clk pwm1_lpcg_ipg_s_clk pwm1_lpcg_ipg_slv_clk pwm1_lpcg_ipg_mstr_clk                                clock-controller@5d420000            2fsl,imx8qxp-lpcg            ]B                      4                                                                       h  pwm2_lpcg_ipg_clk pwm2_lpcg_ipg_hf_clk pwm2_lpcg_ipg_s_clk pwm2_lpcg_ipg_slv_clk pwm2_lpcg_ipg_mstr_clk                                clock-controller@5d430000            2fsl,imx8qxp-lpcg            ]C                      4                                                                       h  pwm3_lpcg_ipg_clk pwm3_lpcg_ipg_hf_clk pwm3_lpcg_ipg_s_clk pwm3_lpcg_ipg_slv_clk pwm3_lpcg_ipg_mstr_clk                                clock-controller@5d440000            2fsl,imx8qxp-lpcg            ]D                      4                                                                       h  pwm4_lpcg_ipg_clk pwm4_lpcg_ipg_hf_clk pwm4_lpcg_ipg_s_clk pwm4_lpcg_ipg_slv_clk pwm4_lpcg_ipg_mstr_clk                     clock-controller@5d450000            2fsl,imx8qxp-lpcg            ]E                      4                                                                       h  pwm5_lpcg_ipg_clk pwm5_lpcg_ipg_hf_clk pwm5_lpcg_ipg_s_clk pwm5_lpcg_ipg_slv_clk pwm5_lpcg_ipg_mstr_clk                     clock-controller@5d460000            2fsl,imx8qxp-lpcg            ]F                      4                                                                       h  pwm6_lpcg_ipg_clk pwm6_lpcg_ipg_hf_clk pwm6_lpcg_ipg_s_clk pwm6_lpcg_ipg_slv_clk pwm6_lpcg_ipg_mstr_clk                     clock-controller@5d470000            2fsl,imx8qxp-lpcg            ]G                      4                                                                       h  pwm7_lpcg_ipg_clk pwm7_lpcg_ipg_hf_clk pwm7_lpcg_ipg_s_clk pwm7_lpcg_ipg_slv_clk pwm7_lpcg_ipg_mstr_clk                        clock-hsio-axi           2fixed-clock                     ׄ         hsio_axi_clk                     clock-hsio-per           2fixed-clock                     U        hsio_per_clk                     clock-hsio-refa          2gpio-gate-clock                                .               clock-hsio-refb          2gpio-gate-clock                                .   m                        clock-xtal100m           2fixed-clock                              xtal_100MHz                  bus@5f000000             2simple-bus           K_       _             p                                       ;                pcie@5f010000            2fsl,imx8q-pcie          _                  dbi config        0  K                                                          @       f          h           msi dma                                                            tdbi mstr slv            F               
pci         P                         i                            j                            k                            l           ^                       q           {                                    Yokay            default                                        	  pcie-phy                            pcie-ep@5f010000             2fsl,imx8q-pcie-ep           _                   dbi addr_space          q           @       h           dma                                   tdbi mstr slv                                                         	  Ydisabled          clock-controller@5f060000            2fsl,imx8qxp-lpcg            _                                                        F  hsio_pcieb_mstr_axi_clk hsio_pcieb_slv_axi_clk hsio_pcieb_dbi_axi_clk                                  clock-controller@5f0b0000            2fsl,imx8qxp-lpcg            _                                              hsio_phyx1_per_clk                                 clock-controller@5f0d0000            2fsl,imx8qxp-lpcg            _                                              hsio_pcieb_per_clk                                 clock-controller@5f0f0000            2fsl,imx8qxp-lpcg            _                                              hsio_misc_per_clk                                  clock-controller@5f090000            2fsl,imx8qxp-lpcg            _	                                                               Q  hsio_phyx1_pclk hsio_phyx1_epcs_tx_clk hsio_phyx1_epcs_rx_clk hsio_phyx1_apb_clk                                   phy@5f1a0000             2fsl,imx8qxp-hsio             _     _     _     _             reg phy ctrl misc         (                                       +  tpclk0 apb_pclk0 phy0_crr ctl0_crr misc_crr                                   Yokay            pciea-x2-pcieb          input                       chosen          /bus@5a000000/serial@5a090000         gpio-keys         
   2gpio-keys           default                    Yokay       key-wakeup             
           n   
            Wake-Up                     		         usbc-det             2linux,extcon-usb-gpio           default                    	      	            Yokay               }      regulator-module-3v3             2regulator-fixed         	 +V3.3           	/ 2Z        	G 2Z           q      regulator-module-3v3-avdd            2regulator-fixed         	G 2Z        	/ 2Z        	 +V3.3_AVDD_AUDIO               o      regulator-module-vref-1v8            2regulator-fixed         	G w@        	/ w@      	  	 vref-1v8               p      regulator-module-wifi            2regulator-fixed         	_   m                	d         	w      
  	 Wi-Fi_PDn           	        regulator-usbh-vbus          2regulator-fixed         default                    	_                  	w        	G LK@        	/ LK@      
  	 usbh_vbus              ~      sound-card           2simple-audio-card           	           	i2s         	           	colibri-imx8x      simple-audio-card,codec            k            
                    simple-audio-card,cpu           
            regulator-3v3            2regulator-fixed         	G 2Z        	/ 2Z        	 3.3V          regulator-3v3-vmmc           2regulator-fixed         default                     	d        	_                  	G 2Z        	/ 2Z      	  	 3v3_vmmc            	   d                    	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 gpio5 gpio6 gpio7 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 mu0 mu1 mu2 mu3 mu4 serial0 serial1 serial2 serial3 spi0 spi1 spi2 spi3 vpu-core0 vpu-core1 rtc0 rtc1 device_type reg enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache clocks operating-points-v2 #cooling-cells phandle cache-level cache-unified opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend #interrupt-cells interrupt-controller interrupts ranges no-map status mbox-names mboxes #power-domain-cells #clock-cells pinctrl-names pinctrl-0 fsl,pins linux,keycodes #reset-cells timeout-sec #thermal-sensor-cells clock-frequency clock-output-names polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device clock-names power-domains remote-endpoint fsl,channel fsl,num-irqs #gpio-cells gpio-controller clock-indices assigned-clocks assigned-clock-rates resets #mbox-cells memory-region fsl,sec-era dmas dma-names fsl,asrc-rate fsl,asrc-width fsl,asrc-clk-map #sound-dai-cells #dma-cells dma-channels dma-channel-mask dais cs-gpios #pwm-cells bypass-gpios disabled-ports initial-mode intn-gpios reset-gpios VDDA-supply VDDD-supply VDDIO-supply touchscreen-max-pressure adi,resistance-plate-x adi,first-conversion-delay adi,acquisition-time adi,median-filter-size adi,averaging adi,conversion-interval gpio-line-names #io-channel-cells vref-supply fsl,clk-source fsl,scu-index fsl,usbphy fsl,usbmisc ahb-burst-config tx-burst-size-dword rx-burst-size-dword adp-disable disable-over-current extcon hnp-disable power-active-high srp-disable vbus-supply #index-cells bus-width non-removable no-sd no-sdio pinctrl-1 pinctrl-2 fsl,tuning-start-tap fsl,tuning-step cd-gpios vmmc-supply pinctrl-3 disable-wp cap-power-off-card fsl,num-tx-queues fsl,num-rx-queues phy-mode phy-handle fsl,magic-packet max-speed reg-names interrupt-names phys phy-names cdns,on-chip-buff-size dr_mode #phy-cells gpio-ranges gpio-hog output-high enable-gpios dma-ranges bus-range interrupt-map interrupt-map-mask num-lanes num-viewport fsl,max-link-speed num-ib-windows num-ob-windows fsl,hsio-cfg fsl,refclk-pad-mode stdout-path debounce-interval label linux,code wakeup-source id-gpios regulator-name regulator-min-microvolt regulator-max-microvolt gpio enable-active-high regulator-always-on startup-delay-us simple-audio-card,bitclock-master simple-audio-card,format simple-audio-card,frame-master simple-audio-card,name sound-dai 