     8     (              H                                                                   $   ,SolidRun i.MX8MQ HummingBoard Pulse       '   2solidrun,hummingboard-pulse fsl,imx8mq     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          $   /soc@0/bus@30800000/serial@30860000       $   /soc@0/bus@30800000/serial@30890000       $   /soc@0/bus@30800000/serial@30880000       $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30820000          !   /soc@0/bus@30800000/spi@30830000          !   /soc@0/bus@30800000/spi@30840000          clock-ckil           2fixed-clock                                   ckil                %      clock-osc-25m            2fixed-clock                       }x@         osc_25m             &      clock-osc-27m            2fixed-clock                                osc_27m             '      clock-hdmi-phy-27m           2fixed-clock                                hdmi_phy_27m          clock-ext1           2fixed-clock                       k@      	   clk_ext1                (      clock-ext2           2fixed-clock                       k@      	   clk_ext2                )      clock-ext3           2fixed-clock                       k@      	   clk_ext3                *      clock-ext4           2fixed-clock                       k@      	   clk_ext4                +      cpus                                 cpu@0            cpu          2arm,cortex-a53                                     psci                          @        .           ;           H   @        Z           g           x                                 speed_grade                   cpu@1            cpu          2arm,cortex-a53                                    psci                          @        .           ;           H   @        Z           g           x                                cpu@2            cpu          2arm,cortex-a53                                    psci                          @        .           ;           H   @        Z           g           x                                cpu@3            cpu          2arm,cortex-a53                                    psci                          @        .           ;           H   @        Z           g           x                                l2-cache0            2cache                                             @        0                        opp-table            2operating-points-v2                         opp-800000000               /                                 I               opp-1000000000              ;                                 I               opp-1300000000              M|m          B@                       I               opp-1500000000              Yh/          B@                       I                  funnel           2arm,coresight-static-funnel    in-ports                                 port@0                  endpoint                                     port@1                 endpoint                                     port@2                 endpoint                                     port@3                 endpoint                	                        out-ports      port       endpoint                
                           pmu          2arm,cortex-a53-pmu          0                            psci             2arm,psci-1.0            smc       thermal-zones      cpu-thermal         ;           Q          _          trips      cpu-alert           o 8        {           passive                   cpu-crit            o _        {        	   critical             cooling-maps       map0                     0                          gpu-thermal         ;           Q          _         trips      gpu-alert           o 8        {           passive                   gpu-crit            o _        {        	   critical             cooling-maps       map0                                      vpu-thermal         ;           Q          _         trips      vpu-crit            o _        {        	   critical                   timer            2arm,armv8-timer       0  0                                 
                               soc@0            2fsl,imx8mq-soc simple-bus                                                >           @       @                         soc_unique_id      etm@28440000          "   2arm,coresight-etm4x arm,primecell            (D                               g      	  apb_pclk       out-ports      port       endpoint                                           etm@28540000          "   2arm,coresight-etm4x arm,primecell            (T                               g      	  apb_pclk       out-ports      port       endpoint                                           etm@28640000          "   2arm,coresight-etm4x arm,primecell            (d                               g      	  apb_pclk       out-ports      port       endpoint                                           etm@28740000          "   2arm,coresight-etm4x arm,primecell            (t                               g      	  apb_pclk       out-ports      port       endpoint                            	               funnel@28c03000       +   2arm,coresight-dynamic-funnel arm,primecell           (0                   g      	  apb_pclk       in-ports                                 port@0                  endpoint                            
         port@1                 endpoint                out-ports      port       endpoint                                           etf@28c04000              2arm,coresight-tmc arm,primecell          (@                   g      	  apb_pclk       in-ports       port       endpoint                                        out-ports      port       endpoint                                           etr@28c06000              2arm,coresight-tmc arm,primecell          (`                   g      	  apb_pclk       in-ports       port       endpoint                                           bus@30000000             2fsl,aips-bus simple-bus          0    @                                   0   0    @     sai@30010000                         2fsl,imx8mq-sai           0             0       _                                               bus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30030000                         2fsl,imx8mq-sai           0             0       Z                                               bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30040000                         2fsl,imx8mq-sai           0             0       Z                                               bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mq-sai           0             0       d                                               bus mclk1 mclk2 mclk3                                               rx tx         	  disabled          gpio@30200000            2fsl,imx8mq-gpio fsl,imx35-gpio           0              0       @          A                                  
                    +           <           
               :      gpio@30210000            2fsl,imx8mq-gpio fsl,imx35-gpio           0!             0       B          C                                  
                    +           <           (               M      gpio@30220000            2fsl,imx8mq-gpio fsl,imx35-gpio           0"             0       D          E                                  
                    +           <           =         gpio@30230000            2fsl,imx8mq-gpio fsl,imx35-gpio           0#             0       F          G                                  
                    +           <           W          gpio@30240000            2fsl,imx8mq-gpio fsl,imx35-gpio           0$             0       H          I                                  
                    +           <           w         tmu@30260000             2fsl,imx8mq-tmu           0&             0       1                           H        V    
 &  H  a     @  d       #      )      /      5      =      C      K      Q      W   	   _   
   g      o           #     +     3     ;     C     K     U     ]  	   g  
   p           #     -     7     A     K     W     c     o           !     -     9     E     S     _     q        x                     watchdog@30280000            2fsl,imx8mq-wdt fsl,imx21-wdt             0(             0       N                          okay            default            !               watchdog@30290000            2fsl,imx8mq-wdt fsl,imx21-wdt             0)             0       O                        	  disabled          watchdog@302a0000            2fsl,imx8mq-wdt fsl,imx21-wdt             0*             0       
                        	  disabled          dma-controller@302c0000          2fsl,imx8mq-sdma fsl,imx7d-sdma           0,             0       g                                ipg ahb                    imx/sdma/sdma-imx7d.bin                   lcd-controller@30320000       "   2fsl,imx8mq-lcdif fsl,imx6sx-lcdif            02             0                                             pix axi disp_axi                   !      $            #                    #      %                    #g      	  disabled       port       endpoint                "            6            pinctrl@30330000             2fsl,imx8mq-iomuxc            03             default            #                fec1grp      h     h                    l              #   p                    t                    x                    |                                                                                                                                                                                     L                             Q      i2c1grp       0      |            @                  @              7      pcie0grp          H    ,    $          t    X                                      qspigrp              \                   `                  t                  x                  |                                            O      uart1grp          H    4               I  8                 I     d                          /      uart4grp          H    P                 I  L              I    H                          =      usdhc1grp                                                                                                                                                             $                    (                    ,                    4                    0                           F      usdhc1-100mhzgrp                                                                                                                                                              $                    (                    ,                    4                    0                           G      usdhc1-200mhzgrp                                                                                                                                                              $                    (                    ,                    4                    0                           H      wdoggrp            0                            !      hoggrp        `                     A                   A    d              A     h              A            #      i2c2grp       0                  @                   @              8      i2c3grp       0    $              @    (              @              <      typecgrp          0    0                   @               pY            9      uart2grp          0    @                 I  <               I            1      uart3grp          0    H                 I  D              I            0      usdhc2gpiogrp                8              A            J      usdhc2vmmcgpiogrp              \                 A            ^      usdhc2grp                <                    @                    D                    H                    L                    P                  8                            I      usdhc2-100mhzgrp                 <                    @                    D                    H                    L                    P                  8                            K      usdhc2-200mhzgrp                 <                    @                    D                    H                    L                    P                  8                            L         syscon@30340000       (   2fsl,imx8mq-iomuxc-gpr syscon simple-mfd          04                 ?   mux-controller        	   2mmio-mux            $           7   4               2         efuse@30350000           2fsl,imx8mq-ocotp syscon          05                                                soc-uid@4                                    speed-grade@10                                   mac-address@90                             P         clock-controller@30360000            2fsl,imx8mq-anatop            06             0       1                     snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd           07                 $   snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         E   $        L   4        0                                        	  snvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey         E   $        0                                snvs-pwrkey         S   t         a      	  disabled             clock-controller@30380000            2fsl,imx8mq-ccm           08             0       U          V                           %   &   '   (   )   *   +      9  ckil osc_25m osc_27m clk_ext1 clk_ext2 clk_ext3 clk_ext4          @        X     !      q      u                                         /             .  +        ,        N                V                              reset-controller@30390000            2fsl,imx8mq-src syscon            09             0       Y           o               5      gpc@303a0000             2fsl,imx8mq-gpc           0:             0       W                                 +                  pgc                              power-domain@0          |                             3      power-domain@1          |                           ,            ]      power-domain@2          |                            W      power-domain@3          |                            Z      power-domain@4          |                      power-domain@5          |                                      f      o      p           -            U      power-domain@6          |                                                          x      y      j                                 N              #F  /                .            \      power-domain@7          |                      power-domain@8          |                            >      power-domain@9          |                	            C      power-domain@a          |                
            ,               bus@30400000             2fsl,aips-bus simple-bus          0@   @                                   0@  0@   @     pwm@30660000             2fsl,imx8mq-pwm fsl,imx27-pwm             0f             0       Q                                ipg per                  	  disabled          pwm@30670000             2fsl,imx8mq-pwm fsl,imx27-pwm             0g             0       R                                ipg per                  	  disabled          pwm@30680000             2fsl,imx8mq-pwm fsl,imx27-pwm             0h             0       S                                ipg per                  	  disabled          pwm@30690000             2fsl,imx8mq-pwm fsl,imx27-pwm             0i             0       T                                ipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer             0j             0       /               &        per          bus@30800000             2fsl,aips-bus simple-bus          0   @                                   0  0   @              spdif@30810000           2fsl,imx35-spdif          0             0                P                                                                           :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                               	               rx tx         	  disabled          spi@30820000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0             0                                       ipg per                                           rx tx         	  disabled          spi@30830000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0             0                                        ipg per                                          rx tx         	  disabled          spi@30840000                                    !   2fsl,imx8mq-ecspi fsl,imx51-ecspi             0             0       !                                ipg per                                          rx tx         	  disabled          serial@30860000          2fsl,imx8mq-uart fsl,imx6q-uart           0             0                                       ipg per                                            rx tx           okay            default            /                                    }x@      serial@30880000          2fsl,imx8mq-uart fsl,imx6q-uart           0             0                                       ipg per                                            rx tx           okay            default            0                            G               serial@30890000          2fsl,imx8mq-uart fsl,imx6q-uart           0             0                                       ipg per                                            rx tx           okay            default            1                                  spdif@308a0000           2fsl,imx35-spdif          0             0                P                                                                           :  core rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled          sai@308b0000                         2fsl,imx8mq-sai           0             0       `                                               bus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          sai@308c0000                         2fsl,imx8mq-sai           0             0       2                                               bus mclk1 mclk2 mclk3                                              rx tx         	  disabled          crypto@30900000          2fsl,sec-v4.0                                      0                 0             0       [                  t            	  aclk ipg       jr@1000          2fsl,sec-v4.0-job-ring                          0       i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring                           0       j         jr@3000          2fsl,sec-v4.0-job-ring              0            0       r            dsi@30a00000             2fsl,imx8mq-nwl-dsi           0                                     (                                       !  core rx_esc tx_esc phy_ref lcdif                                            G      L        Ĵ ր1-         0       "              2               3           4        dphy                5      5      5      5           byte dpi esc pclk         	  disabled       ports                                port@0                                            endpoint@0                           6            "         port@1                 endpoint                   dphy@30a00300            2fsl,imx8mq-mipi-dphy             0                           phy_ref                !      $            #                    #      %                n6 #g                       3      	  disabled                4      i2c@30a20000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             0       #                                                    okay            default            7             pmic@8           2fsl,pfuze100                   regulators     sw1ab                      8            -      sw1c                       8            .      sw2           5          2Z         0      sw3ab                      "         0      sw4           5          2Z         0      swbst             LK@         N0      vsnvs             B@         -         0      vrefddr          0      vgen1             5                vgen2             5                   0      vgen3             w@         2Z         0      vgen4             w@         2Z         0      vgen5             w@         2Z         0      vgen6             w@         2Z            eeprom@50            2atmel,24c01             P        okay             i2c@30a30000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             0       $                                                    okay            default            8             usb-typec@50             2nxp,ptn5110 tcpci               P        default            9             :        0         connector            2usb-c-connector         DUSB-C           Jdual            Tdual            _sink            n        z         T@   port       endpoint                ;            X                  i2c@30a40000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             0       %                                                    okay            default            <             eeprom@57            2atmel,24c02             W        okay          rtc@69           2abracon,ab1805              i      	  schottky                        i2c@30a50000             2fsl,imx8mq-i2c fsl,imx21-i2c             0             0       &                                                  	  disabled          serial@30a60000          2fsl,imx8mq-uart fsl,imx6q-uart           0             0                                       ipg per                                            rx tx           okay            default            =                            G        Ĵ       csi@30a70000             2fsl,imx8mq-mipi-csi2             0                                        core esc ui                                   ր-@              L      W      N           >           5   &   5   '   5   (           ?              @      @           dram          	  disabled       ports                                port@1                 endpoint                A            B               csi@30a90000             2fsl,imx8mq-csi           0             0       *                          mclk          	  disabled       port       endpoint                B            A            csi@30b60000             2fsl,imx8mq-mipi-csi2             0                                        core esc ui                                   ր-@              L      W      N           C           5   )   5   *   5   +           ?              @      @           dram          	  disabled       ports                                port@1                 endpoint                D            E               csi@30b80000             2fsl,imx8mq-csi           0             0       +                          mclk          	  disabled       port       endpoint                E            D            mailbox@30aa0000             2fsl,imx8mq-mu fsl,imx6sx-mu          0             0       X                                   mmc@30b40000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0             0                               i              ipg ahb per                                          okay                          ׄ       "  default state_100mhz state_200mhz              F        (   G        2   H         <      mmc@30b50000          !   2fsl,imx8mq-usdhc fsl,imx7d-usdhc             0             0                               i              ipg ahb per                                          okay                                 "  default state_100mhz state_200mhz              I   J        (   K   J        2   L   J        J   M              S   N      spi@30bb0000                                       2fsl,imx8mq-qspi fsl,imx7d-qspi           0                   _QuadSPI QuadSPI-memory          0       k                                qspi_en qspi            okay            default            O   flash@0                                                2micron,n25q256a jedec,spi-nor           i@      	  disabled             dma-controller@30bd0000          2fsl,imx8mq-sdma fsl,imx7d-sdma           0             0                               t        ipg ahb                    imx/sdma/sdma-imx7d.bin                   ethernet@30be0000            2fsl,imx8mq-fec fsl,imx6sx-fec            0           0  0       v          w          x          y         (                                       "  ipg ahb ptp enet_clk_ref enet_out                  h                                 L      P      Q      O             sY@            {                         P        mac-address            ?              okay            default            Q      	  rgmii-id               R            mdio                                 ethernet-phy@4           2ethernet-phy-ieee802.3-c22                         :   	                         R               interconnect@32700000            2fsl,imx8mq-noc fsl,imx8m-noc             2p                    q           S                   x   T            @   opp-table            2operating-points-v2             T   opp-133000000               U      opp-400000000               ׄ       opp-800000000               /             bus@32c00000             2fsl,aips-bus simple-bus          2   @                                   2  2   @     interrupt-controller@32e2d000         $   2fsl,imx8m-irqsteer fsl,imx-irqsteer          2            0                                 ipg                        @                 +            gpu@38000000             2vivante,gc           8              0                                f      o      p        core shader bus reg                  (        a      d      o      p            (                                        / / / /                U                  usb@38100000             2fsl,imx8mq-dwc3 snps,dwc3            8                                        bus_early ref suspend                 n                    V      H        e          0       (              V   V        usb2-phy usb3-phy              W         $        okay            Cotg    port       endpoint                X            ;            usb-phy@381f0040             2fsl,imx8mq-usb-phy           8 @   @                       phy                             H                             okay                V      usb@38200000             2fsl,imx8mq-dwc3 snps,dwc3            8                                         bus_early ref suspend                 n                    V      H        e          0       )              Y   Y        usb2-phy usb3-phy              Z         $        okay            Chost          usb-phy@382f0040             2fsl,imx8mq-usb-phy           8/ @   @                       phy                             H                             okay                Y      video-codec@38300000             2nxp,imx8mq-vpu-g1            80             0                                    [          video-codec@38310000             2nxp,imx8mq-vpu-g2            81             0                                    [         blk-ctrl@38320000            2fsl,imx8mq-vpu-blk-ctrl          82                \   \   \      
  Kbus g1 g2                                g1 g2           |               [      pcie@33800000            2fsl,imx8mq-pcie          3   @               _dbi config                                    pci         ^             0                                                 h           0       z           rmsi         +                                                           }                            |                            {                            z                                                }      }      ~         pcie pcie_bus pcie_phy pcie_aux            ]           5      5      5           pciephy apps turnoff                  |      }      ~              T      P      G        沀        	  disabled          pcie-ep@33800000             2fsl,imx8mq-pcie-ep            3           3     3             _dbi addr_space dbi2 atu         h           0                  rdma                                                        pcie pcie_bus pcie_phy pcie_aux            ]           5   "   5   $   5   %        pciephy apps turnoff                                            T      P      G        沀                                         	  disabled          pcie@33c00000            2fsl,imx8mq-pcie          3   @  '             _dbi config                                    pci         ^             0             '                                      h           0       J           rmsi         +                                                           M                            L                            K                            J                                                                    pcie pcie_bus pcie_phy pcie_aux            ]           5   "   5   $   5   %        pciephy apps turnoff                                            T      P      G        沀        	  disabled          pcie-ep@33c00000             2fsl,imx8mq-pcie-ep            3            3     3             _dbi addr_space dbi2 atu         h           0       P           rdma                                                                  pcie pcie_bus pcie_phy pcie_aux            ]           5   "   5   $   5   %        pciephy apps turnoff                                            T      P      G        沀                              	  disabled          interrupt-controller@38800000            2arm,gic-v3        (   8     8     1       1      1                           +                    0      	                                  memory-controller@3d400000           2fsl,imx8mq-ddrc fsl,imx8m-ddrc           =@   @          core pll alt apb                                v      w      	  disabled                S      ddr-pmu@3d800000          %   2fsl,imx8mq-ddr-pmu fsl,imx8m-ddr-pmu             =   @                       0       b            regulator-vdd-3v3            2regulator-fixed          0        vdd_3v3           2Z         2Z      chosen        $  /soc@0/bus@30800000/serial@30860000       regulator-usdhc2-vmmc            2regulator-fixed         default            ^        VSD_3V3           2Z         2Z            :                  N      regulator-v-5v0          2regulator-fixed         v_5v0            LK@          LK@         0         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 serial0 serial1 serial2 serial3 spi0 spi1 spi2 #clock-cells clock-frequency clock-output-names phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 #cooling-cells nvmem-cells nvmem-cell-names cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend remote-endpoint interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend ranges dma-ranges cpu clock-names #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges little-endian fsl,tmu-range fsl,tmu-calibration #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name assigned-clocks assigned-clock-parents assigned-clock-rates fsl,pins #mux-control-cells mux-reg-masks regmap offset linux,keycode wakeup-source #reset-cells #power-domain-cells power-domains power-supply #pwm-cells uart-has-rtscts mux-controls phys phy-names resets reset-names #phy-cells regulator-min-microvolt regulator-max-microvolt regulator-always-on label data-role power-role try-power-role source-pdos sink-pdos op-sink-microwatt abracon,tc-diode abracon,tc-resistor fsl,mipi-phy-gpr interconnects interconnect-names #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 non-removable cd-gpios vmmc-supply reg-names spi-max-frequency fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle fsl,magic-packet reset-gpios reset-assert-us fsl,ddrc #interconnect-cells fsl,channel fsl,num-irqs snps,parkmode-disable-ss-quirk dr_mode power-domain-names bus-range num-lanes interrupt-names interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain num-ib-windows num-ob-windows regulator-name stdout-path gpio 