     8     (            
  ¤                                                                   3   ,Gateworks Venice GW71xx-2x i.MX8MP Development Kit        &   2gateworks,imx8mp-gw71xx-2x fsl,imx8mp      aliases       &   =/soc@0/bus@30800000/ethernet@30bf0000         &   G/soc@0/bus@30800000/ethernet@30bf0000         "   Q/soc@0/bus@30000000/gpio@30200000         "   W/soc@0/bus@30000000/gpio@30210000         "   ]/soc@0/bus@30000000/gpio@30220000         "   c/soc@0/bus@30000000/gpio@30230000         "   i/soc@0/bus@30000000/gpio@30240000         !   o/soc@0/bus@30800000/i2c@30a20000          !   t/soc@0/bus@30800000/i2c@30a30000          !   y/soc@0/bus@30800000/i2c@30a40000          !   ~/soc@0/bus@30800000/i2c@30a50000          !   /soc@0/bus@30800000/i2c@30ad0000          !   /soc@0/bus@30800000/i2c@30ae0000          !   /soc@0/bus@30800000/mmc@30b40000          !   /soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30bb0000          (   /soc@0/bus@30800000/i2c@30a20000/rtc@68       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                       !  
        2          D            cpu@0           Lcpu          2arm,cortex-a53          X            \             cpsci            q           ~   @                                 @                                         speed_grade                                          *           D         cpu@1           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         cpu@2           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         cpu@3           Lcpu          2arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         l2-cache0            2cache            5        C           s              @                   D            opp-table            2operating-points-v2          O        D      opp-1200000000          Z    G         a P        o              I               opp-1600000000          Z    _^         a ~        o               I               opp-1800000000          Z    kI         a B@        o                I                  clock-osc-32k            2fixed-clock                                osc_32k         D   &      clock-osc-24m            2fixed-clock                     n6         osc_24m         D   '      clock-ext1           2fixed-clock                     k@      	  clk_ext1            D   (      clock-ext2           2fixed-clock                     k@      	  clk_ext2            D   )      clock-ext3           2fixed-clock                     k@      	  clk_ext3            D   *      clock-ext4           2fixed-clock                     k@      	  clk_ext4            D   +      funnel           2arm,coresight-static-funnel    in-ports                                 port@0          X       endpoint                       D            port@1          X      endpoint               	        D            port@2          X      endpoint               
        D            port@3          X      endpoint                       D               out-ports      port       endpoint                       D                  reserved-memory                                      dsp@92400000            X    @                        	  disabled             pmu          2arm,cortex-a53-pmu                        psci             2arm,psci-1.0             smc       thermal-zones      cpu-thermal                              !         trips      trip0           1 L        =          Spassive         D         trip1           1 s        =        	  Scritical             cooling-maps       map0            H         T  M                                 soc-thermal                              !          trips      trip0           1 L        =          Spassive         D         trip1           1 s        =        	  Scritical             cooling-maps       map0            H         T  M                                    timer            2arm,armv8-timer       0                                
           z          \      soc@0            2fsl,imx8mp-soc simple-bus                                                >                      soc_unique_id      etm@28440000          "   2arm,coresight-etm4x arm,primecell           X(D             s           \      ]      	  wapb_pclk       out-ports      port       endpoint                       D                  etm@28540000          "   2arm,coresight-etm4x arm,primecell           X(T             s           \      ]      	  wapb_pclk       out-ports      port       endpoint                       D   	               etm@28640000          "   2arm,coresight-etm4x arm,primecell           X(d             s           \      ]      	  wapb_pclk       out-ports      port       endpoint                       D   
               etm@28740000          "   2arm,coresight-etm4x arm,primecell           X(t             s           \      ]      	  wapb_pclk       out-ports      port       endpoint                       D                  funnel@28c03000       +   2arm,coresight-dynamic-funnel arm,primecell          X(0            \      ]      	  wapb_pclk       in-ports                                 port@0          X       endpoint                       D            port@1          X      endpoint             port@2          X      endpoint                out-ports      port       endpoint                       D                  etf@28c04000              2arm,coresight-tmc arm,primecell         X(@            \      ]      	  wapb_pclk       in-ports       port       endpoint                       D               out-ports      port       endpoint                       D                   etr@28c06000              2arm,coresight-tmc arm,primecell         X(`            \      ]      	  wapb_pclk       in-ports       port       endpoint                        D                  bus@30000000             2fsl,aips-bus simple-bus         X0    @                                       gpio@30200000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0                     @          A           \                                                         !                  D   0      gpio@30210000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0!                    B          C           \                                                         !       #           D   8      gpio@30220000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0"                    D          E           \                                                          !       8      !                 D   I      gpio@30230000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0#                    F          G           \                                                         !       R          D          dio1   dio0   pci_usb_sel          dio3  dio2  pci_wdis#            D   =      gpio@30240000            2fsl,imx8mp-gpio fsl,imx35-gpio          X0$                    H          I           \                                                         !       r           D   /      tmu@30260000             2fsl,imx8mp-tmu          X0&             \                "        calib                      D         watchdog@30280000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0(                    N           \             okay            default            #               watchdog@30290000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0)                    O           \           	  disabled          watchdog@302a0000            2fsl,imx8mp-wdt fsl,imx21-wdt            X0*                    
           \           	  disabled          timer@302d0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0-                    7           \                    wipg per       timer@302e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0.                    6           \                    wipg per       timer@302f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0/                    5           \                    wipg per       pinctrl@30330000             2fsl,imx8mp-iomuxc           X03             default            $        D   !   eqosgrp      P  $   T                    X                 |                                                                                x                    t                    h                    d                    `                    \                    l                    p                         D   F      ethphy0grp        0  $    x             @                  P        D   H      gscgrp          $                  P        D   7      i2c1grp       0  $     `         @     d         @         D   5      i2c1gpiogrp       0  $     `           @     d           @         D   6      i2c2grp       0  $    h         @     l         @         D   :      i2c2gpiogrp       0  $    h           @     l           @         D   ;      i2c3grp       0  $    p         @     t         @         D   >      i2c3gpiogrp       0  $    p           @     t           @         D   ?      uart2grp          0  $  (             @  ,                @        D   3      usdhc3grp          $  $              (                h              l              p              t              |                L  $             P  (             T  ,             H  0                D   A      usdhc3-100mhzgrp           $  $              (                h              l              p              t              |                L  $             P  (             T  ,             H  0                D   B      usdhc3-200mhzgrp           $  $              (                h              l              p              t              |                L  $             P  (             T  ,             H  0                D   C      wdoggrp         $     |             f        D   #      hoggrp          $  h             @ F  t             @ F               @                @ F               @ F               @         D   $      accelgrp            $                 P        D   <      gpioledgrp        0  $  L                  \                        D   }      pcie0grp            $                         D   l      ppsgrp          $  T               F        D   ~      usb1grp         $   H               @        D   u      usbcon1grp          $  4               @        D   {      spi2grp       x  $    P  h         @    T  p         @    X  l         @    \             @   <                @        D   .      uart1grp          0  $                @  $                @        D   1      uart3grp          0  $  0             @  4                @        D   2         syscon@30340000          2fsl,imx8mp-iomuxc-gpr syscon            X04             D   4      efuse@30350000        )   2fsl,imx8mp-ocotp fsl,imx8mm-ocotp syscon            X05             \                                  unique-id@8         X              D         speed-grade@10          X              D         mac-address@90          X              D   D      mac-address@96          X              D   E      calib@264           X  d           D   "         clock-controller@30360000         $   2fsl,imx8mp-anatop fsl,imx8mm-anatop         X06                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          X07             D   %   snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp         -   %        4   4                                    \            	  wsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey         -   %                          \              wsnvs-pwrkey         ;   t         I      	  disabled          snvs-lpgpr        +   2fsl,imx8mp-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mp-ccm          X08                    U          V                      \   &   '   (   )   *   +      4  wosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       (  W      B            g      h            (  g      8      ,      A      8      @        ~        ; / e         D         reset-controller@30390000            2fsl,imx8mp-src syscon           X09                    Y                      D   [      gpc@303a0000             2fsl,imx8mp-gpc          X0:                                 W                          pgc                              power-domain@0                      X            D   V      power-domain@1                      X           D   a      power-domain@2                      X           D   _      power-domain@3                      X           D   `      power-domain@4                      X           \      i      j             W     2      i      j        g      A      8      8        ~; / ׄ         D   t      power-domain@5                      X           \          6        W      l      H        g      8      8        ~ׄ /         D   K      power-domain@6                      X           \                 ,        D   n      power-domain@7                      X           \           f        W      e      f        g      8      8        ~/ ׄ         D   ,      power-domain@8                      X           \             D   p      power-domain@9                      X   	        \           4           ,        D   m      power-domain@10                     X   
        \                  D   U      power-domain@11                     X           D   q      power-domain@12                     X           D   r      power-domain@13                     X           D   s      power-domain@14                     X           \           c        W      d      c        g      @      3        ~e k@        D   b      power-domain@15                     X           D   c      power-domain@16                     X           D   W      power-domain@17                     X           \     7             W     7        g      @        ~e         D   ^      power-domain@18                     X           \             D   X               bus@30400000             2fsl,aips-bus simple-bus         X0@   @                                       pwm@30660000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0f                    Q           \                    wipg per                  	  disabled          pwm@30670000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0g                    R           \                    wipg per                  	  disabled          pwm@30680000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0h                    S           \                    wipg per                  	  disabled          pwm@30690000             2fsl,imx8mp-pwm fsl,imx27-pwm            X0i                    T           \                    wipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            X0j                    /           \   '        wper       timer@306e0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0n                    3           \                    wipg per       timer@306f0000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0o                    3           \                    wipg per       timer@30700000           2fsl,imx8mp-gpt fsl,imx6dl-gpt           X0p                    4           \                    wipg per          bus@30800000             2fsl,aips-bus simple-bus         X0   @                                       spba-bus@30800000            2fsl,spba-bus simple-bus         X0                                          spi@30820000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                               \                    wipg per         ~Ĵ         W              g      8            -             -                 rx tx         	  disabled          spi@30830000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                                \                    wipg per         ~Ĵ         W              g      8            -            -                 rx tx           okay            default            .           /         0   
      tpm@1            2atmel,attpm20p tcg,tpm_tis-spi          X           }x@         spi@30840000                                    "   2fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                    !           \                    wipg per         ~Ĵ         W              g      8            -            -                 rx tx         	  disabled          serial@30860000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             -             -                  rx tx           okay            default            1      serial@30880000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             -             -                  rx tx           okay            default            2      serial@30890000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             -             -                  rx tx           okay            default            3      can@308c0000             2fsl,imx8mp-flexcan          X0                               \      n              wipg per         W      t        g      0        ~bZ                        4            	  disabled          can@308d0000             2fsl,imx8mp-flexcan          X0                               \      n              wipg per         W      u        g      0        ~bZ                        4            	  disabled             crypto@30900000          2fsl,sec-v4.0                                     X0                 0                    [           \      k      n      	  waclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           X                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           X                      j         jr@3000          2fsl,sec-v4.0-job-ring           X  0                   r            i2c@30a20000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    #           \              okay                     default gpio               5           6           /              (   /         gsc@20           2gw,gsc          X               7             8                                                                    D   9   adc          2gw,gsc-adc                               channel@6           2            X           :temp          channel@8           2           X           :vdd_bat       channel@16          2           X         	  :fan_tach          channel@82          2           X           :vdd_vin         @  VT        channel@84          2           X         	  :vdd_adc1            @  '  '      channel@86          2           X         	  :vdd_adc2            @  '  '      channel@88          2           X           :vdd_1p0       channel@8c          2           X           :vdd_1p8       channel@8e          2           X           :vdd_2p5       channel@90          2           X           :vdd_3p3         @  '  '      channel@92          2           X         	  :vdd_dram          channel@98          2           X           :vdd_soc       channel@9a          2           X           :vdd_arm       channel@a2          2           X           :vdd_gsc         @  '  '         fan-controller@0             2gw,gsc-fan          X   
         gpio@23          2nxp,pca9555         X   #                                 9                   D   z      eeprom@50            2atmel,24c02         X   P        X         eeprom@51            2atmel,24c02         X   Q        X         eeprom@52            2atmel,24c02         X   R        X         eeprom@53            2atmel,24c02         X   S        X         rtc@68           2dallas,ds1672           X   h      pmic@69          2mps,mp5416          X   i   regulators     buck1           abuck1           p P         B@                        buck2           abuck2           p                                  buck3           abuck3           p P         B@                          D         buck4           abuck4           p w@         w@                        ldo1            aldo1            p w@         w@                        ldo2            aldo2            p B@         B@                        ldo3            aldo3            p &%         &%                        ldo4            aldo4            p 2Z         2Z                                 i2c@30a30000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    $           \              okay                     default            :           ;           /              (   /         eeprom@52            2atmel,24c32         X   R        X          accelerometer@19             2st,lis2de12         X           default            <                        =                       i2c@30a40000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    %           \              okay                     default gpio               >           ?           /              (   /            i2c@30a50000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    &           \            	  disabled          serial@30a60000          2fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             -             -                  rx tx         	  disabled          mailbox@30aa0000             2fsl,imx8mp-mu fsl,imx6sx-mu         X0                    X           \                       mailbox@30e60000             2fsl,imx8mp-mu fsl,imx6sx-mu         X0                                          \   @   $      	  disabled            D   y      i2c@30ad0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    L           \            	  disabled          i2c@30ae0000             2fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    M           \            	  disabled          mmc@30b40000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per                                        	  disabled          mmc@30b50000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per                                        	  disabled          mmc@30b60000          2   2fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per                                          okay          "  default state_100mhz state_200mhz              A           B           C        W              ~ׄ                spi@30bb0000             2nxp,imx8mp-fspi         X0                   )fspi_base fspi_mmap                k           \                    wfspi_en fspi            ~Ĵ         W                                      	  disabled          dma-controller@30bd0000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                               \            k        wipg ahb         3           >imx/sdma/sdma-imx7d.bin         D   -      ethernet@30be0000         -   2fsl,imx8mp-fec fsl,imx8mq-fec fsl,imx6sx-fec            X0           0         v          w          x          y         (  \                                    "  wipg ahb ptp enet_clk_ref enet_out            W      ^                           g      6      :      ;      9        ~     sY@            W           i              D        mac-address            4            	  disabled          ethernet@30bf0000         '   2nxp,imx8mp-dwmac-eqos snps,dwmac-5.10a          X0                                         {macirq eth_wake_irq          \                                wstmmaceth pclk ptp_ref tx           W      ^                    g      6      :      ;        ~     sY@           E        mac-address            4           okay            default            F      	  rgmii-id               G   mdio             2snps,dwmac-mdio                              ethernet-phy@0           2ethernet-phy-ieee802.3-c22             H        default         X                 I                                                                  D   G   leds                                 led@1           X                      lan         keep          led@2           X                      lan         keep                         bus@30c00000             2fsl,aips-bus simple-bus         X0   @                                       spba-bus@30c00000            2fsl,spba-bus simple-bus         X0                                          sai@30c10000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   @              @      @      @           wbus mclk0 mclk1 mclk2 mclk3             J              J                  rx tx                  _         	  disabled          sai@30c20000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   @             @      @      @           wbus mclk0 mclk1 mclk2 mclk3             J             J                  rx tx                  `         	  disabled          sai@30c30000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   @             @   	   @   
   @           wbus mclk0 mclk1 mclk2 mclk3             J             J                  rx tx                  2         	  disabled          sai@30c50000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   @             @      @      @           wbus mclk0 mclk1 mclk2 mclk3             J             J   	               rx tx                  Z         	  disabled          sai@30c60000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   @             @      @      @           wbus mclk0 mclk1 mclk2 mclk3             J   
          J                  rx tx                  Z         	  disabled          sai@30c80000             2fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   @             @      @      @           wbus mclk0 mclk1 mclk2 mclk3             J             J                  rx tx                  o         	  disabled          easrc@30c90000        "   2fsl,imx8mp-easrc fsl,imx8mn-easrc           X0                    z           \   @           wmem            J             J             J             J             J             J             J             J                @  ctx0_rx ctx0_tx ctx1_rx ctx1_tx ctx2_rx ctx2_tx ctx3_rx ctx3_tx         imx/easrc/easrc-imx8mn.bin          +  @        9         	  disabled          audio-controller@30ca0000            2fsl,imx8mp-micfil           X0                       0         m          n          ,          -         (  \   @      @   6      &      '            )  wipg_clk ipg_clk_app pll8k pll11k clkext3               J                 rx        	  disabled          aud2htx@30cb0000             2fsl,imx8mp-aud2htx          X0                               \   @   !        wbus            J                  tx        	  disabled          xcvr@30cc0000            2fsl,imx8mp-xcvr          X0     0    0    0            )ram regs rxfifo txfifo        $                                         \   @      @   &   @      @   #        wipg phy spba pll_ipg                J             J                  rx tx           I   @          	  disabled             dma-controller@30e00000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0             3           \   @                wipg ahb                "           >imx/sdma/sdma-imx7d.bin       dma-controller@30e10000           2fsl,imx8mp-sdma fsl,imx8mq-sdma         X0             3           \   @                wipg ahb                g           >imx/sdma/sdma-imx7d.bin         D   J      clock-controller@30e20000            2fsl,imx8mp-audio-blk-ctrl           X0                                 @  \           {      |      }                       A      &  wahb sai1 sai2 sai3 sai5 sai6 sai7 axi              K        W                    ~p           D   @         interconnect@32700000            2fsl,imx8mp-noc fsl,imx8m-noc            X2p             \      g        P              L        D   Y   opp-table            2operating-points-v2         D   L   opp-200000000           Z           opp-800000000           Z    /       opp-1000000000          Z    ;             bus@32c00000             2fsl,aips-bus simple-bus         X2   @                                       isi@32e00000             2fsl,imx8mp-isi          X2    @                          *           \                  waxi apb         d   M           M         	  disabled       ports                                port@0          X       endpoint               N        D   P         port@1          X      endpoint               O        D   Q               isp@32e10000             2fsl,imx8mp-isp          X2                    J            \                            wisp aclk hclk pclk             M      M         	  qisp csi2            d   M          	  disabled       ports                                port@1          X               isp@32e20000             2fsl,imx8mp-isp          X2                    K            \                            wisp aclk hclk pclk             M      M         	  qisp csi2            d   M         	  disabled       ports                                port@1          X               dwe@32e30000             2nxp,imx8mp-dw100            X2                    d           \                  waxi ahb            M         csi@32e40000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                               沀         \                            wpclk wrap phy axi           W                    g      >                 M         	  disabled       ports                                port@0          X          port@1          X      endpoint               P        D   N               csi@32e50000          *   2fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                    P           沀         \                            wpclk wrap phy axi           W                    g      >                 M         	  disabled       ports                                port@0          X          port@1          X      endpoint               Q        D   O               dsi@32e60000             2fsl,imx8mp-mipi-dsim            X2             \                   wbus_clk sclk_mipi           W      b              g      8              ~ n6         n6                              M          	  disabled       ports                                port@0          X       endpoint               R        D   S         port@1          X      endpoint                   display-controller@32e80000          2fsl,imx8mp-lcdif            X2             \                       wpix axi disp_axi                                 M         	  disabled       port       endpoint               S        D   R            display-controller@32e90000          2fsl,imx8mp-lcdif            X2                               \                       wpix axi disp_axi               M         	  disabled       port       endpoint               T        D   Z            blk-ctrl@32ec0000         !   2fsl,imx8mp-media-blk-ctrl syscon            X2                                    (     U   V   V   U   U   W   U   X   X   W      F  qbus mipi-dsi1 mipi-csi1 lcdif1 isi mipi-csi2 lcdif2 isp dwe mipi-dsi2              Y      Y      Y      Y      Y      Y      Y      Y      Y       Y      Y   !   Y      Y   "   Y      Y   #   Y         /  lcdif-rd lcdif-wr isi0 isi1 isi2 isp0 isp1 dwe        @  \                                              &  wapb axi cam1 cam2 disp1 disp2 isp phy         0  W      a      b           9     8            (  g      A      8      (      (      @        ~e          e =                   D   M   bridge@5c            2fsl,imx8mp-ldb          X   \     (         	  )ldb lvds            \     I        wldb         W              g      (      	  disabled       ports                                port@0          X       endpoint               Z        D   T         port@1          X      endpoint             port@2          X      endpoint                      pcie-phy@32f00000            2fsl,imx8mp-pcie-phy         X2             I   [      [           pciephy perst              \                       okay                                \   ]        wref         D   k      blk-ctrl@32f10000             2fsl,imx8mp-hsio-blk-ctrl syscon         X2     $        \                  	  wusb pcie               ^   ^   _   `   ^   a      (  qbus usb usb-phy1 usb-phy2 pcie pcie-phy       @     Y      Y      Y      Y      Y      Y      Y      Y           noc-pcie usb1 usb2 pcie                                D   \      blk-ctrl@32fc0000             2fsl,imx8mp-hdmi-blk-ctrl syscon         X2           (  \      c                               wapb axi ref_266m ref_24m fdcc         (     b   b   b   b   b   b   b   c   b   b      =  qbus irqsteer lcdif pai pvi trng hdmi-tx hdmi-tx-phy hdcp hrv          0     Y      Y      Y      Y      Y      Y           hrv lcdif-hdmi hdcp                    D   d      interrupt-controller@32fc2000         %   2fsl,imx8mp-irqsteer fsl,imx-irqsteer            X2                    +                                             @        \      c        wipg            d            D   e      display-bridge@32fc4000          2fsl,imx8mp-hdmi-pvi         X2@                 e                      d         	  disabled       ports                                port@0          X       endpoint               f        D   i         port@1          X      endpoint               g        D   j               display-controller@32fc6000          2fsl,imx8mp-lcdif            X2`                 e                   \   h      c             wpix axi disp_axi               d         	  disabled       port       endpoint               i        D   f            hdmi@32fd8000            2fsl,imx8mp-hdmi-tx          X2   ~             e                    \      c               h        wiahb isfr cec pix           W              g      6           d                    	  disabled       ports                                port@0          X       endpoint               j        D   g         port@1          X               phy@32fdff00             2fsl,imx8mp-hdmi-phy         X2            \      c              wapb ref         W              g                 d                                 	  disabled            D   h         pcie@33800000            2fsl,imx8mp-pcie         X3   @               )dbi config          \          7              wpcie pcie_bus pcie_aux          W      x        ~         g      9                                 Lpci         )             0  ݁                                               3           =                             {msi                    J                       ]                         ~                            }                            |                            {           k           ~               \           I   [      [           apps turnoff               k      	  pcie-phy            okay            default            l           =            pcie-ep@33800000             2fsl,imx8mp-pcie-ep           X3           3     3             )dbi addr_space dbi2 atu         \          7              wpcie pcie_bus pcie_aux          W      x        ~         g      9        3                             {dma         k              \           I   [      [           apps turnoff               k      	  pcie-phy                                	  disabled          gpu@38000000             2vivante,gc          X8                                 \           4           f        wcore shader bus reg                    W     3     4        g      A      A        ~; ;            m        D         gpu@38008000             2vivante,gc          X8                               \                 f        wcore bus reg                       W     5        g      A        ~;            n        D         video-codec@38300000             2nxp,imx8mm-vpu-g1           X80                               \             W      r        g      8        ~/            o          video-codec@38310000             2nxp,imx8mq-vpu-g2           X81                               \     
        W      s      +        g      +        ~)' )'            o         blk-ctrl@38330000            2fsl,imx8mp-vpu-blk-ctrl syscon          X83                           p   q   r   s        qbus g1 g2 vc8000e           \          
     	        wg1 g2 vc8000e           W      `        g      8        ~/       0     Y   %   Y   $   Y   &   Y   $   Y   '   Y   $        g1 g2 vc8000e           D   o      npu@38500000             2vivante,gc          X8P                                 \                i      j        wcore shader bus reg                       t        D         interrupt-controller@38800000            2arm,gic-v3          X8     8                                                    	                        D         memory-controller@3d400000           2snps,ddrc-3.80a         X=@   @                          ddr-pmu@3d800000          %   2fsl,imx8mp-ddr-pmu fsl,imx8m-ddr-pmu            X=   @                 b         usb-phy@381f0040             2fsl,imx8mp-usb-phy          X8 @   @        \              wphy         W              g                 \                       okay            D   v      usb@32f10100             2fsl,imx8mp-dwc3         X2    8              \          @        whsio suspend                                 \                                     @   @                       okay            default            u            usb@38100000          
   2snps,dwc3           X8             \                 @        wbus_early ref suspend                  (              v   v        usb2-phy usb3-phy                     	         	.         	:         	F        	Rotg          	Z        	jperipheral          okay       port       endpoint               w        D   |               usb-phy@382f0040             2fsl,imx8mp-usb-phy          X8/ @   @        \              wphy         W              g                 \                       okay            D   x      usb@32f10108             2fsl,imx8mp-dwc3         X2   8/              \          @        whsio suspend                                 \                                     @   @                       okay             	         	   usb@38200000          
   2snps,dwc3           X8              \                 @        wbus_early ref suspend                  )              x   x        usb2-phy usb3-phy                     	        	Rhost            okay             dsp@3b6e8000             2fsl,imx8mp-hifi4            X;n            \   @      @       @      @           wipg ocram core debug               K        	tx rx rxdb        $  	   y           y          y               imx/dsp/hifi4.bin           I   @         	  runstall          	  disabled             memory@40000000         Lmemory          X    @                gpio-keys         
   2gpio-keys      key-user-pb         :user_pb            z              	         key-user-pb1x         
  :user_pb1x           	               9                  key-erased          :key_erased          	               9                 key-eeprom-wp         
  :eeprom_wp           	               9                 key-tamper          :tamper          	               9                 switch-hold         :switch_hold         	               9                    connector         %   2gpio-usb-b-connector usb-b-connector            default            {        Smicro           :Type-C          	   I          port       endpoint               |        D   w            led-controller        
   2gpio-leds           default            }   led-0           status                        =               on        
  	heartbeat         led-1           status                        =               off          clock-pcie0          2fixed-clock                              D   ]      pps       	   2pps-gpio            default            ~           =               okay          chosen        6  	/soc@0/bus@30800000/spba-bus@30800000/serial@30890000            	interrupt-parent #address-cells #size-cells model compatible ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us wakeup-latency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache nvmem-cells nvmem-cell-names operating-points-v2 #cooling-cells cpu-idle-states cpu-supply cache-unified cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names remote-endpoint ranges no-map status interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend cpu clock-names gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output fsl,pins regmap offset linux,keycode wakeup-source assigned-clocks assigned-clock-parents assigned-clock-rates #reset-cells #power-domain-cells power-domains #pwm-cells dmas dma-names cs-gpios spi-max-frequency fsl,clk-source fsl,stop-mode pinctrl-1 scl-gpios sda-gpios gw,mode label gw,voltage-divider-ohms pagesize regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on st,drdy-int-pin #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 non-removable reg-names #dma-cells fsl,sdma-ram-script-name fsl,num-tx-queues fsl,num-rx-queues interrupt-names intf_mode phy-mode phy-handle ti,rx-internal-delay ti,tx-internal-delay tx-fifo-depth rx-fifo-depth color function default-state #sound-dai-cells firmware-name fsl,asrc-rate fsl,asrc-format resets #interconnect-cells fsl,blk-ctrl power-domain-names samsung,pll-clock-frequency interconnects interconnect-names reset-names #phy-cells fsl,refclk-pad-mode fsl,clkreq-unsupported fsl,channel fsl,num-irqs reg-io-width bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phys phy-names reset-gpio num-ib-windows num-ob-windows dma-ranges fsl,over-current-active-low snps,gfladj-refclk-lpm-sel-quirk snps,parkmode-disable-ss-quirk adp-disable hnp-disable srp-disable dr_mode usb-role-switch role-switch-default-mode fsl,permanently-attached fsl,disable-port-power-control mbox-names mboxes linux,code id-gpios linux,default-trigger stdout-path 