 %e   8 8   (            -                                                                     C   ,phytec,imx8mp-libra-rdk-fpsc phytec,imx8mp-phycore-fpsc fsl,imx8mp           7PHYTEC i.MX8MP Libra RDK FPSC      aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         &   G/soc@0/bus@30800000/ethernet@30bf0000         "   Q/soc@0/bus@30000000/gpio@30200000         "   W/soc@0/bus@30000000/gpio@30210000         "   ]/soc@0/bus@30000000/gpio@30220000         "   c/soc@0/bus@30000000/gpio@30230000         "   i/soc@0/bus@30000000/gpio@30240000         !   o/soc@0/bus@30800000/i2c@30a20000          !   t/soc@0/bus@30800000/i2c@30a30000          !   y/soc@0/bus@30800000/i2c@30a40000          !   ~/soc@0/bus@30800000/i2c@30a50000          !   /soc@0/bus@30800000/i2c@30ad0000          !   /soc@0/bus@30800000/i2c@30ae0000          !   /soc@0/bus@30800000/mmc@30b40000          !   /soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       !   /soc@0/bus@30800000/spi@30bb0000          (   /soc@0/bus@30800000/i2c@30a20000/rtc@52       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          ,arm,idle-state             3                                       !  
        2          D            cpu@0           Lcpu          ,arm,cortex-a53          X            \             cpsci            q           ~   @                                 @                                         speed_grade                                          *           D         cpu@1           Lcpu          ,arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         cpu@2           Lcpu          ,arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         cpu@3           Lcpu          ,arm,cortex-a53          X           \             cpsci            q           ~   @                                 @                                                               *           D         l2-cache0            ,cache            5        C           s              @                   D            opp-table            ,operating-points-v2          O        D      opp-1200000000          Z    G         a P        o              I               opp-1600000000          Z    _^         a ~        o               I               opp-1800000000          Z    kI         a B@        o                I                  clock-osc-32k            ,fixed-clock                                osc_32k         D   '      clock-osc-24m            ,fixed-clock                     n6         osc_24m         D   (      clock-ext1           ,fixed-clock                     k@      	  clk_ext1            D   )      clock-ext2           ,fixed-clock                     k@      	  clk_ext2            D   *      clock-ext3           ,fixed-clock                     k@      	  clk_ext3            D   +      clock-ext4           ,fixed-clock                     k@      	  clk_ext4            D   ,      funnel           ,arm,coresight-static-funnel    in-ports                                 port@0          X       endpoint                       D            port@1          X      endpoint               	        D            port@2          X      endpoint               
        D            port@3          X      endpoint                       D               out-ports      port       endpoint                       D                  reserved-memory                                      dsp@92400000            X    @                        	  disabled            D            pmu          ,arm,cortex-a53-pmu                        psci             ,arm,psci-1.0             smc       thermal-zones      cpu-thermal                              !         trips      trip0           1 L        =          Spassive         D         trip1           1 s        =        	  Scritical            D            cooling-maps       map0            H         T  M                                 soc-thermal                              !          trips      trip0           1 L        =          Spassive         D         trip1           1 s        =        	  Scritical            D            cooling-maps       map0            H         T  M                                    timer            ,arm,armv8-timer       0                                
           z          \      soc@0            ,fsl,imx8mp-soc simple-bus                                                >                      soc_unique_id           D      etm@28440000          "   ,arm,coresight-etm4x arm,primecell           X(D             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D                  etm@28540000          "   ,arm,coresight-etm4x arm,primecell           X(T             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D   	               etm@28640000          "   ,arm,coresight-etm4x arm,primecell           X(d             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D   
               etm@28740000          "   ,arm,coresight-etm4x arm,primecell           X(t             s           \      ]      	  wapb_pclk            D      out-ports      port       endpoint                       D                  funnel@28c03000       +   ,arm,coresight-dynamic-funnel arm,primecell          X(0            \      ]      	  wapb_pclk       in-ports                                 port@0          X       endpoint                       D            port@1          X      endpoint            D            port@2          X      endpoint            D               out-ports      port       endpoint                       D                  etf@28c04000              ,arm,coresight-tmc arm,primecell         X(@            \      ]      	  wapb_pclk       in-ports       port       endpoint                       D               out-ports      port       endpoint                       D                   etr@28c06000              ,arm,coresight-tmc arm,primecell         X(`            \      ]      	  wapb_pclk       in-ports       port       endpoint                        D                  bus@30000000             ,fsl,aips-bus simple-bus         X0    @                                            D      gpio@30200000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0                     @          A           \                                                         !                          PCIE1_nPERST            D         gpio@30210000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0!                    B          C           \                                                         !       #                              SD2_RESET_B          D         gpio@30220000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0"                    D          E           \                                                          !       8      !               .                     I2C6_SCL I2C6_SDA I2C5_SCL           D   M      gpio@30230000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0#                    F          G           \                                                         !       R          f  GPIO6 RGMII2_nINT GPIO7 GPIO4               X_PMIC_IRQ_B   GPIO5   RGMII2_EVENT_OUT   RGMII2_EVENT_IN              "        default         D   @      gpio@30240000            ,fsl,imx8mp-gpio fsl,imx35-gpio          X0$                    H          I           \                                                         !       r               I2C5_SDA GPIO1    SPI1_CS    SPI2_CS I2C1_SCL I2C1_SDA I2C2_SCL I2C2_SDA I2C3_SCL I2C3_SDA  GPIO2  LVDS1_BL_EN SPI3_CS  GPIO3              #        default         D   ?      tmu@30260000             ,fsl,imx8mp-tmu          X0&             \                $        calib                      D         watchdog@30280000            ,fsl,imx8mp-wdt fsl,imx21-wdt            X0(                    N           \             okay               %        default                  D         watchdog@30290000            ,fsl,imx8mp-wdt fsl,imx21-wdt            X0)                    O           \           	  disabled            D         watchdog@302a0000            ,fsl,imx8mp-wdt fsl,imx21-wdt            X0*                    
           \           	  disabled            D         timer@302d0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0-                    7           \                    wipg per         D         timer@302e0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0.                    6           \                    wipg per         D         timer@302f0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0/                    5           \                    wipg per         D         pinctrl@30330000             ,fsl,imx8mp-iomuxc           X03             D   !   can1grp       0  $                  T      L        T        D   9      can2grp       0  $                 T  4    P        T        D   ;      eqosgrp        $  L                                                       X                 T                    \                    `                    d                    h                    l                    p                                                                                |                    t                    x                         D   ^      fecgrp       h  $  X                  \    |           `               d               h                  l                                 @  t                  x                  |                                                                                          p                     D   \      flexspigrp          $     D                   @                  X                   \                   `                  d                  x                      D   Y      gpio4grp          `  $  T                @                   H                 P                       D   "      gpio5grp          H  $    <                 |               0                       D   #      hdmigrp       `  $  H                  @                  D                  L                        D         i2c1gpiogrp       0  $    d                  `                     D   >      i2c1grp       0  $    d         @      `         @         D   =      i2c2gpiogrp       0  $    l                 h                     D   E      i2c2grp       0  $    l         @     h         @         D   D      i2c3gpiogrp       0  $    t                 p                     D   H      i2c3grp       0  $    t         @     p         @         D   G      i2c5gpiogrp       0  $    8               4                       D   L      i2c5grp       0  $    8        @   4          @         D   K      i2c6gpiogrp       0  $  0                 ,                       D   O      i2c6grp       0  $  0          @   ,          @         D   N      pcie0grp          0  $    x               4                 @        D         pmicirqgrp          $                 @        D   A      pwm1grp         $     x                     D   .      pwm2grp         $   8                       D   /      pwm3grp         $    4                     D   0      pwm4grp         $    0                     D   1      regusdhc2vmmcgrp            $     8              @        D         sai5grp         $  D                                                           8               <                                      D   a      spi1grp       `  $    @  X               D  `               H  \               L                     D   3      spi2grp       `  $    P  h              T  p              X  l              \                     D   4      spi3grp       `  $                     $                  (                  (                       D   5      uart2grp          `  $    (          @    $             @               @                  @        D   7      uart3grp          `  $                @                  @               @                  @        D   6      uart4grp          0  $  8              @  <                @        D   I      usb0grp       H  $   D                  H                  <                       D         usb1grp       H  $   L                  P                  @                       D         usdhc1grp           $   0                  ,                                                                                                                                          D   P      usdhc2grp           $                    @     <               @                         $                   (                   ,                   0                   4                 $                        D   Q      usdhc2-100mhzgrp            $                    @     <               @                         $                   (                   ,                   0                   4                 $                        D   R      usdhc2-200mhzgrp            $                    @     <               @                         $                   (                   ,                   0                   4                 $                        D   S      usdhc3grp          $     H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                    D   V      usdhc3-100mhzgrp           $     H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                    D   W      usdhc3-200mhzgrp           $     H  0             L  $             P  (             T  ,            h              l              p              t              |             $              (                    D   X      wdoggrp         $     |                      D   %      lvds0grp            $  $                        D         rtcgrp          $  ,                       D   C         syscon@30340000          ,fsl,imx8mp-iomuxc-gpr syscon            X04             D   8      efuse@30350000        )   ,fsl,imx8mp-ocotp fsl,imx8mm-ocotp syscon            X05             \                                       D      unique-id@8         X              D         speed-grade@10          X              D         mac-address@90          X              D   Z      mac-address@96          X              D   ]      calib@264           X  d           D   $         clock-controller@30360000         $   ,fsl,imx8mp-anatop fsl,imx8mm-anatop         X06                        D         snvs@30370000         #   ,fsl,sec-v4.0-mon syscon simple-mfd          X07             D   &   snvs-rtc-lp          ,fsl,sec-v4.0-mon-rtc-lp         -   &        4   4                                    \            	  wsnvs-rtc            D         snvs-powerkey            ,fsl,sec-v4.0-pwrkey         -   &                          \              wsnvs-pwrkey         ;   t         I        okay            D         snvs-lpgpr        +   ,fsl,imx8mp-snvs-lpgpr fsl,imx7d-snvs-lpgpr          D            clock-controller@30380000            ,fsl,imx8mp-ccm          X08                    U          V                      \   '   (   )   *   +   ,      4  wosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       (  W      B            g      h            (  g      8      ,      A      8      @        ~        ; / e         D         reset-controller@30390000            ,fsl,imx8mp-src syscon           X09                    Y                      D   s      gpc@303a0000             ,fsl,imx8mp-gpc          X0:                                 W                               D      pgc                              power-domain@0                      X            D   m      power-domain@1                      X           D   x      power-domain@2                      X           D   v      power-domain@3                      X           D   w      power-domain@4                      X           \      i      j             W     2      i      j        g      A      8      8        ~; / ׄ         D         power-domain@5                      X           \          6        W      l      H        g      8      8        ~ׄ /         D   b      power-domain@6                      X           \                 -        D         power-domain@7                      X           \           f        W      e      f        g      8      8        ~/ ׄ         D   -      power-domain@8                      X           \             D         power-domain@9                      X   	        \           4           -        D         power-domain@10                     X   
        \                  D   l      power-domain@11                     X           D         power-domain@12                     X           D         power-domain@13                     X           D         power-domain@14                     X           \           c        W      d      c        g      @      3        ~e k@        D   y      power-domain@15                     X           D   z      power-domain@16                     X           D   n      power-domain@17                     X           \     7             W     7        g      @        ~e         D   u      power-domain@18                     X           \             D   o               bus@30400000             ,fsl,aips-bus simple-bus         X0@   @                                            D      pwm@30660000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0f                    Q           \                    wipg per                  	  disabled               .        default         D         pwm@30670000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0g                    R           \                    wipg per                  	  disabled               /        default         D         pwm@30680000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0h                    S           \                    wipg per                  	  disabled               0        default         D         pwm@30690000             ,fsl,imx8mp-pwm fsl,imx27-pwm            X0i                    T           \                    wipg per                  	  disabled               1        default         D         timer@306a0000           ,nxp,sysctr-timer            X0j                    /           \   (        wper         D         timer@306e0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0n                    3           \                    wipg per         D         timer@306f0000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0o                    3           \                    wipg per         D         timer@30700000           ,fsl,imx8mp-gpt fsl,imx6dl-gpt           X0p                    4           \                    wipg per         D            bus@30800000             ,fsl,aips-bus simple-bus         X0   @                                            D      spba-bus@30800000            ,fsl,spba-bus simple-bus         X0                                          spi@30820000                                    "   ,fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                               \                    wipg per         ~Ĵ         W              g      8            2             2                 rx tx         	  disabled               3        default         D         spi@30830000                                    "   ,fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                                \                    wipg per         ~Ĵ         W              g      8            2            2                 rx tx         	  disabled               4        default         D         spi@30840000                                    "   ,fsl,imx8mp-ecspi fsl,imx6ul-ecspi           X0                    !           \                    wipg per         ~Ĵ         W              g      8            2            2                 rx tx         	  disabled               5        default         D         serial@30860000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             2             2                  rx tx         	  disabled            D         serial@30880000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             2             2                  rx tx         	  disabled               6        default                  D         serial@30890000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             2             2                  rx tx         	  disabled               7        default                  D         can@308c0000             ,fsl,imx8mp-flexcan          X0                               \      n              wipg per         W      t        g      0        ~bZ                        8              okay               9        default            :        D         can@308d0000             ,fsl,imx8mp-flexcan          X0                               \      n              wipg per         W      u        g      0        ~bZ                        8              okay               ;        default            <        D            crypto@30900000          ,fsl,sec-v4.0                                     X0                 0                    [           \      k      n      	  waclk ipg            D      jr@1000          ,fsl,sec-v4.0-job-ring           X                     i         	  disabled            D         jr@2000          ,fsl,sec-v4.0-job-ring           X                      j           D         jr@3000          ,fsl,sec-v4.0-job-ring           X  0                   r           D            i2c@30a20000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    #           \              okay                        =           >        default gpio               ?              )   ?              D      pmic@25          ,nxp,pca9450c            X   %             @                         A        default         D      regulators     BUCK1            3         G        Y ~        q P        VDD_SOC (BUCK1)           5        D         BUCK2            3         G        Y B@        q P        VDD_ARM (BUCK2)           5         ~         P        D         BUCK4            3         G        Y 2Z        q 2Z        VDD_3V3 (BUCK4)         D         BUCK5            3         G        Y w@        q w@        VDD_1V8 (BUCK5)         D         BUCK6            3         G        Y         q         NVCC_DRAM_1V1 (BUCK6)           D         LDO1             3         G        Y w@        q w@        NVCC_SNVS_1V8 (LDO1)            D         LDO3             3         G        Y w@        q w@        VDDA_1V8 (LDO3)         D         LDO5             3         G        Y 2Z        q w@        NVCC_SD2 (LDO5)         D   U            eeprom@50            ,atmel,24c32         X   P                       B      eeprom@51            ,atmel,24c32         X   Q                                B      rtc@52           ,microcrystal,rv3028         X   R             ?                                    C        default                    I        D            i2c@30a30000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    $           \              okay               D           E        default gpio               ?              )   ?                       D      eeprom@51            ,atmel,24c02         X   Q                      F         i2c@30a40000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    %           \              okay               G           H        default gpio               ?              )   ?                       D      leds@62          ,nxp,pca9533         X   b   led-1           S         led-2           S         led-3           S               i2c@30a50000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    &           \            	  disabled            D         serial@30a60000          ,fsl,imx8mp-uart fsl,imx6q-uart          X0                               \                    wipg per             2             2                  rx tx           okay               I        default         D         mailbox@30aa0000             ,fsl,imx8mp-mu fsl,imx6sx-mu         X0                    X           \              $           D         mailbox@30e60000             ,fsl,imx8mp-mu fsl,imx6sx-mu         X0                               $           \   J   $      	  disabled            D         i2c@30ad0000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    L           \              okay               K           L        default gpio               M              )   ?                       D      gpio@20          ,ti,tca6416          X                 @                                          CSI1_CTRL1 CSI1_CTRL2 CSI1_CTRL3 CSI1_CTRL4 CSI2_CTRL1 CSI2_CTRL2 CSI2_CTRL3 CSI2_CTRL4 CLK_EN_AV nCAN2_EN nCAN1_EN PCIE1_nWAKE PCIE2_nWAKE PCIE2_nALERT_3V3 UART1_BT_RS_SEL UART1_RS232_485_SEL               F        D      bt-rs-hog           #                0        9UART1_BT_RS_SEL          C        D         rs232-485-hog           #                0        9UART1_RS232_485_SEL          N        D               i2c@30ae0000             ,fsl,imx8mp-i2c fsl,imx21-i2c                                      X0                    M           \            	  disabled               N           O        default gpio               M              )   M              D         mmc@30b40000          2   ,fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per         Z           o                    	  disabled               P        default         D         mmc@30b50000          2   ,fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per         Z           o                      okay               Q           R           S      "  default state_100mhz state_200mhz                       T           U        W              ~                  D         mmc@30b60000          2   ,fsl,imx8mp-usdhc fsl,imx8mm-usdhc fsl,imx7d-usdhc           X0                               \      n      _             wipg ahb per         Z           o                      okay            W             ~ׄ                     V           W           X      "  default state_100mhz state_200mhz           D         spi@30bb0000             ,nxp,imx8mp-fspi         X0                   fspi_base fspi_mmap                k           \                    wfspi_en fspi            ~Ĵ         W                                        okay               Y        default         D      flash@0          ,jedec,spi-nor           X            Ĵ                                   F        D            dma-controller@30bd0000           ,fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                               \            k        wipg ahb                    imx/sdma/sdma-imx7d.bin         D   2      ethernet@30be0000         -   ,fsl,imx8mp-fec fsl,imx8mq-fec fsl,imx6sx-fec            X0           0         v          w          x          y         (  \                                    "  wipg ahb ptp enet_clk_ref enet_out            W      ^                           g      6      :      ;      9        ~     sY@            5           G              Z        mac-address            8              okay            Y   [      	  drgmii-id               \        default          m        D      mdio                                 ethernet-phy@0           ,ethernet-phy-ieee802.3-c22          X                 @                       ~                                                          D   [            ethernet@30bf0000         '   ,nxp,imx8mp-dwmac-eqos snps,dwmac-5.10a          X0                                         macirq eth_wake_irq          \                                wstmmaceth pclk ptp_ref tx           W      ^                    g      6      :      ;        ~     sY@           ]        mac-address            8           okay          	  drgmii-id               ^        default         Y   _        D      mdio             ,snps,dwmac-mdio                              ethernet-phy@1           ,ethernet-phy-ieee802.3-c22          X            ~                                                 D   _               bus@30c00000             ,fsl,aips-bus simple-bus         X0   @                                            D      spba-bus@30c00000            ,fsl,spba-bus simple-bus         X0                                          sai@30c10000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   J              J      J      J           wbus mclk0 mclk1 mclk2 mclk3             `              `                  rx tx                  _         	  disabled            D         sai@30c20000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   J             J      J      J           wbus mclk0 mclk1 mclk2 mclk3             `             `                  rx tx                  `         	  disabled            D         sai@30c30000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   J             J   	   J   
   J           wbus mclk0 mclk1 mclk2 mclk3             `             `                  rx tx                  2         	  disabled            D         sai@30c50000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   J             J      J      J           wbus mclk0 mclk1 mclk2 mclk3             `             `   	               rx tx                  Z         	  disabled               a        default         D         sai@30c60000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   J             J      J      J           wbus mclk0 mclk1 mclk2 mclk3             `   
          `                  rx tx                  Z         	  disabled            D         sai@30c80000             ,fsl,imx8mp-sai fsl,imx8mq-sai           X0                       (  \   J             J      J      J           wbus mclk0 mclk1 mclk2 mclk3             `             `                  rx tx                  o         	  disabled            D         easrc@30c90000        "   ,fsl,imx8mp-easrc fsl,imx8mn-easrc           X0                    z           \   J           wmem            `             `             `             `             `             `             `             `                @  ctx0_rx ctx0_tx ctx1_rx ctx1_tx ctx2_rx ctx2_tx ctx3_rx ctx3_tx         !imx/easrc/easrc-imx8mn.bin          /  @        =         	  disabled            D         audio-controller@30ca0000            ,fsl,imx8mp-micfil           X0                       0         m          n          ,          -         (  \   J      J   6      &      '            )  wipg_clk ipg_clk_app pll8k pll11k clkext3               `                 rx        	  disabled            D         aud2htx@30cb0000             ,fsl,imx8mp-aud2htx          X0                               \   J   !        wbus            `                  tx        	  disabled            D         xcvr@30cc0000            ,fsl,imx8mp-xcvr          X0     0    0    0            ram regs rxfifo txfifo        $                                         \   J      J   &   J      J   #        wipg phy spba pll_ipg                `             `                  rx tx           M   J          	  disabled            D            dma-controller@30e00000           ,fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                        \   J                wipg ahb                "           imx/sdma/sdma-imx7d.bin         D         dma-controller@30e10000           ,fsl,imx8mp-sdma fsl,imx8mq-sdma         X0                        \   J                wipg ahb                g           imx/sdma/sdma-imx7d.bin         D   `      clock-controller@30e20000            ,fsl,imx8mp-audio-blk-ctrl           X0                                 @  \           {      |      }                       A      &  wahb sai1 sai2 sai3 sai5 sai6 sai7 axi              b        W                    ~p           D   J         interconnect@32700000            ,fsl,imx8mp-noc fsl,imx8m-noc            X2p             \      g        T              c        D   p   opp-table            ,operating-points-v2         D   c   opp-200000000           Z           opp-800000000           Z    /       opp-1000000000          Z    ;             bus@32c00000             ,fsl,aips-bus simple-bus         X2   @                                            D      isi@32e00000             ,fsl,imx8mp-isi          X2    @                          *           \                  waxi apb         h   d           d         	  disabled            D      ports                                port@0          X       endpoint               e        D   g         port@1          X      endpoint               f        D   h               isp@32e10000             ,fsl,imx8mp-isp          X2                    J            \                            wisp aclk hclk pclk             d      d         	  uisp csi2            h   d          	  disabled            D      ports                                port@1          X               isp@32e20000             ,fsl,imx8mp-isp          X2                    K            \                            wisp aclk hclk pclk             d      d         	  uisp csi2            h   d         	  disabled            D      ports                                port@1          X               dwe@32e30000             ,nxp,imx8mp-dw100            X2                    d           \                  waxi ahb            d           D         csi@32e40000          *   ,fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                               沀         \                            wpclk wrap phy axi           W                    g      >                 d         	  disabled            D      ports                                port@0          X          port@1          X      endpoint               g        D   e               csi@32e50000          *   ,fsl,imx8mp-mipi-csi2 fsl,imx8mm-mipi-csi2           X2                    P           沀         \                            wpclk wrap phy axi           W                    g      >                 d         	  disabled            D      ports                                port@0          X          port@1          X      endpoint               h        D   f               dsi@32e60000             ,fsl,imx8mp-mipi-dsim            X2             \                   wbus_clk sclk_mipi           W      b              g      8              ~ n6         n6                              d          	  disabled            D      ports                                port@0          X       endpoint               i        D   j         port@1          X      endpoint            D                  display-controller@32e80000          ,fsl,imx8mp-lcdif            X2             \                       wpix axi disp_axi                                 d         	  disabled            D      port       endpoint               j        D   i            display-controller@32e90000          ,fsl,imx8mp-lcdif            X2                               \                       wpix axi disp_axi               d         	  disabled            D      port       endpoint               k        D   q            blk-ctrl@32ec0000         !   ,fsl,imx8mp-media-blk-ctrl syscon            X2                                    (     l   m   m   l   l   n   l   o   o   n      F  ubus mipi-dsi1 mipi-csi1 lcdif1 isi mipi-csi2 lcdif2 isp dwe mipi-dsi2              p      p      p      p      p      p      p      p      p       p      p   !   p      p   "   p      p   #   p         /  lcdif-rd lcdif-wr isi0 isi1 isi2 isp0 isp1 dwe        @  \                                              &  wapb axi cam1 cam2 disp1 disp2 isp phy         0  W      a      b           9     8            (  g      A      8      (      (      @        ~e          e =                   D   d   bridge@5c            ,fsl,imx8mp-ldb          X   \     (         	  ldb lvds            \     I        wldb         W              g      (      	  disabled            D      ports                                port@0          X       endpoint               q        D   k         port@1          X      endpoint               r        D            port@2          X      endpoint            D                     pcie-phy@32f00000            ,fsl,imx8mp-pcie-phy         X2             M   s      s           pciephy perst              t                       okay            \   t        wref                             D         blk-ctrl@32f10000             ,fsl,imx8mp-hsio-blk-ctrl syscon         X2     $        \                  	  wusb pcie               u   u   v   w   u   x      (  ubus usb usb-phy1 usb-phy2 pcie pcie-phy       @     p      p      p      p      p      p      p      p           noc-pcie usb1 usb2 pcie                                D   t      blk-ctrl@32fc0000             ,fsl,imx8mp-hdmi-blk-ctrl syscon         X2           (  \      c                               wapb axi ref_266m ref_24m fdcc         (     y   y   y   y   y   y   y   z   y   y      =  ubus irqsteer lcdif pai pvi trng hdmi-tx hdmi-tx-phy hdcp hrv          0     p      p      p      p      p      p           hrv lcdif-hdmi hdcp                    D   {      interrupt-controller@32fc2000         %   ,fsl,imx8mp-irqsteer fsl,imx-irqsteer            X2                    +                               	           	   @        \      c        wipg            {            D   |      display-bridge@32fc4000          ,fsl,imx8mp-hdmi-pvi         X2@                 |                      {         	  disabled            D      ports                                port@0          X       endpoint               }        D            port@1          X      endpoint               ~        D                  display-controller@32fc6000          ,fsl,imx8mp-lcdif            X2`                 |                   \         c             wpix axi disp_axi               {         	  disabled            D      port       endpoint                       D   }            hdmi@32fd8000            ,fsl,imx8mp-hdmi-tx          X2   ~             |                    \      c                       wiahb isfr cec pix           W              g      6           {           	          	  disabled            D      ports                                port@0          X       endpoint                       D   ~         port@1          X               phy@32fdff00             ,fsl,imx8mp-hdmi-phy         X2            \      c              wapb ref         W              g                 {                                 	  disabled            D            pcie@33800000            ,fsl,imx8mp-pcie         X3   @               dbi config          \          7              wpcie pcie_bus pcie_aux          W      x        ~         g      9                                 Lpci         	-             0  ݁                                               	7           	A                             msi                    	N                       	a                         ~                            }                            |                            {           	o           	               t           M   s      s           apps turnoff            	         	  	pcie-phy            okay                       default         	                 	           D         pcie-ep@33800000             ,fsl,imx8mp-pcie-ep           X3           3     3             dbi addr_space dbi2 atu         \          7              wpcie pcie_bus pcie_aux          W      x        ~         g      9        	7                             dma         	o              t           M   s      s           apps turnoff            	         	  	pcie-phy            	           	         	  disabled            D         gpu@38000000             ,vivante,gc          X8                                 \           4           f        wcore shader bus reg                    W     3     4        g      A      A        ~; ;                    D         gpu@38008000             ,vivante,gc          X8                               \                 f        wcore bus reg                       W     5        g      A        ~;                    D         video-codec@38300000             ,nxp,imx8mm-vpu-g1           X80                               \             W      r        g      8        ~/                        D         video-codec@38310000             ,nxp,imx8mq-vpu-g2           X81                               \     
        W      s      +        g      +        ~)' )'                       D         blk-ctrl@38330000            ,fsl,imx8mp-vpu-blk-ctrl syscon          X83                                            ubus g1 g2 vc8000e           \          
     	        wg1 g2 vc8000e           W      `        g      8        ~/       0     p   %   p   $   p   &   p   $   p   '   p   $        g1 g2 vc8000e           D         npu@38500000             ,vivante,gc          X8P                                 \                i      j        wcore shader bus reg                               D         interrupt-controller@38800000            ,arm,gic-v3          X8     8                                                    	                        D         memory-controller@3d400000           ,snps,ddrc-3.80a         X=@   @                            D        ddr-pmu@3d800000          %   ,fsl,imx8mp-ddr-pmu fsl,imx8m-ddr-pmu            X=   @                 b         usb-phy@381f0040             ,fsl,imx8mp-usb-phy          X8 @   @        \              wphy         W              g                 t                     	  disabled            D         usb@32f10100             ,fsl,imx8mp-dwc3         X2    8              \          @        whsio suspend                                 t                                     	@   @                     	  disabled                       default         D     usb@38100000          
   ,snps,dwc3           X8             \                 @        wbus_early ref suspend                  (           	              	usb2-phy usb3-phy            	         
        D           usb-phy@382f0040             ,fsl,imx8mp-usb-phy          X8/ @   @        \              wphy         W              g                 t                     	  disabled            D         usb@32f10108             ,fsl,imx8mp-dwc3         X2   8/              \          @        whsio suspend                                 t                                     	@   @                     	  disabled                       default         D     usb@38200000          
   ,snps,dwc3           X8              \                 @        wbus_early ref suspend                  )           	              	usb2-phy usb3-phy            	         
        D           dsp@3b6e8000             ,fsl,imx8mp-hifi4            X;n            \   J      J       J      J           wipg ocram core debug               b        
#tx rx rxdb        $  
.                                       !imx/dsp/hifi4.bin           M   J         	  runstall          	  disabled            D           memory@40000000         Lmemory          X    @                regulator-usdhc2             ,regulator-fixed         
5  .                   default         Y 2Z        q 2Z      
  VDDSW_SD2           
E   d        	                   
V        D   T      regulator-vdd-io             ,regulator-fixed          3         G        VDD_IO          Y w@        q w@        D   B      backlight0           ,pwm-backlight                      default         
i         	  disabled            D         chosen        $  
v/soc@0/bus@30800000/serial@30a60000       panel-lvds          
           
i         	  disabled            D     port       endpoint                       D   r            regulator-can1-stby          ,regulator-fixed         Y w@        q w@      
  can1-stby           	      
           D   :      regulator-can2-stby          ,regulator-fixed         Y w@        q w@      
  can2-stby           	      	           D   <      regulator-vdd-12v0           ,regulator-fixed          3         G        Y          q        	  VDD_12V0            D         regulator-vdd-1v8            ,regulator-fixed          3         G        Y w@        q w@        VDD_1V8         D   F      regulator-vdd-3v3            ,regulator-fixed          3         G        Y 2Z        q 2Z        VDD_3V3         D         regulator-vdd-5v0            ,regulator-fixed          3         G        Y LK@        q LK@        VDD_5V0         D        __symbols__         
/cpus/idle-states/cpu-pd-wait           
/cpus/cpu@0         
/cpus/cpu@1         
/cpus/cpu@2         
/cpus/cpu@3         
/cpus/l2-cache0         
/opp-table          
/clock-osc-32k          
/clock-osc-24m          
/clock-ext1         
/clock-ext2         
/clock-ext3         
/clock-ext4       !  
/funnel/in-ports/port@0/endpoint          !  /funnel/in-ports/port@1/endpoint          !  /funnel/in-ports/port@2/endpoint          !  2/funnel/in-ports/port@3/endpoint             E/funnel/out-ports/port/endpoint         Y/reserved-memory/dsp@92400000         '  f/thermal-zones/cpu-thermal/trips/trip0        '  q/thermal-zones/cpu-thermal/trips/trip1        '  {/thermal-zones/soc-thermal/trips/trip0        '  /thermal-zones/soc-thermal/trips/trip1          /soc@0          /soc@0/etm@28440000       ,  /soc@0/etm@28440000/out-ports/port/endpoint         /soc@0/etm@28540000       ,  /soc@0/etm@28540000/out-ports/port/endpoint         /soc@0/etm@28640000       ,  /soc@0/etm@28640000/out-ports/port/endpoint         /soc@0/etm@28740000       ,  /soc@0/etm@28740000/out-ports/port/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@0/endpoint       0  /soc@0/funnel@28c03000/in-ports/port@1/endpoint       0  
/soc@0/funnel@28c03000/in-ports/port@2/endpoint       /  /soc@0/funnel@28c03000/out-ports/port/endpoint        +  5/soc@0/etf@28c04000/in-ports/port/endpoint        ,  A/soc@0/etf@28c04000/out-ports/port/endpoint       +  N/soc@0/etr@28c06000/in-ports/port/endpoint          Z/soc@0/bus@30000000       "   W/soc@0/bus@30000000/gpio@30200000         "   ]/soc@0/bus@30000000/gpio@30210000         "   c/soc@0/bus@30000000/gpio@30220000         "   i/soc@0/bus@30000000/gpio@30230000         "  `/soc@0/bus@30000000/gpio@30240000         !  f/soc@0/bus@30000000/tmu@30260000          &  j/soc@0/bus@30000000/watchdog@30280000         &  p/soc@0/bus@30000000/watchdog@30290000         &  v/soc@0/bus@30000000/watchdog@302a0000         #  |/soc@0/bus@30000000/timer@302d0000        #  /soc@0/bus@30000000/timer@302e0000        #  /soc@0/bus@30000000/timer@302f0000        %  /soc@0/bus@30000000/pinctrl@30330000          -  /soc@0/bus@30000000/pinctrl@30330000/can1grp          -  /soc@0/bus@30000000/pinctrl@30330000/can2grp          -  /soc@0/bus@30000000/pinctrl@30330000/eqosgrp          ,  /soc@0/bus@30000000/pinctrl@30330000/fecgrp       0  /soc@0/bus@30000000/pinctrl@30330000/flexspigrp       .  /soc@0/bus@30000000/pinctrl@30330000/gpio4grp         .  /soc@0/bus@30000000/pinctrl@30330000/gpio5grp         -  /soc@0/bus@30000000/pinctrl@30330000/hdmigrp          1  /soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          -  /soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  %/soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp          -  7/soc@0/bus@30000000/pinctrl@30330000/i2c2grp          1  D/soc@0/bus@30000000/pinctrl@30330000/i2c3gpiogrp          -  V/soc@0/bus@30000000/pinctrl@30330000/i2c3grp          1  c/soc@0/bus@30000000/pinctrl@30330000/i2c5gpiogrp          -  u/soc@0/bus@30000000/pinctrl@30330000/i2c5grp          1  /soc@0/bus@30000000/pinctrl@30330000/i2c6gpiogrp          -  /soc@0/bus@30000000/pinctrl@30330000/i2c6grp          .  /soc@0/bus@30000000/pinctrl@30330000/pcie0grp         0  /soc@0/bus@30000000/pinctrl@30330000/pmicirqgrp       -  /soc@0/bus@30000000/pinctrl@30330000/pwm1grp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm2grp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm3grp          -  /soc@0/bus@30000000/pinctrl@30330000/pwm4grp          6  /soc@0/bus@30000000/pinctrl@30330000/regusdhc2vmmcgrp         -  /soc@0/bus@30000000/pinctrl@30330000/sai5grp          -  /soc@0/bus@30000000/pinctrl@30330000/spi1grp          -  $/soc@0/bus@30000000/pinctrl@30330000/spi2grp          -  3/soc@0/bus@30000000/pinctrl@30330000/spi3grp          .  B/soc@0/bus@30000000/pinctrl@30330000/uart2grp         .  P/soc@0/bus@30000000/pinctrl@30330000/uart3grp         .  ^/soc@0/bus@30000000/pinctrl@30330000/uart4grp         -  l/soc@0/bus@30000000/pinctrl@30330000/usb0grp          -  y/soc@0/bus@30000000/pinctrl@30330000/usb1grp          /  /soc@0/bus@30000000/pinctrl@30330000/usdhc1grp        /  /soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp         /  /soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  /soc@0/bus@30000000/pinctrl@30330000/wdoggrp          .  /soc@0/bus@30000000/pinctrl@30330000/lvds0grp         ,  &/soc@0/bus@30000000/pinctrl@30330000/rtcgrp       $  2/soc@0/bus@30000000/syscon@30340000       #  6/soc@0/bus@30000000/efuse@30350000        /  </soc@0/bus@30000000/efuse@30350000/unique-id@8        2  G/soc@0/bus@30000000/efuse@30350000/speed-grade@10         2  W/soc@0/bus@30000000/efuse@30350000/mac-address@90         2  `/soc@0/bus@30000000/efuse@30350000/mac-address@96         -  i/soc@0/bus@30000000/efuse@30350000/calib@264          .  s/soc@0/bus@30000000/clock-controller@30360000         "  z/soc@0/bus@30000000/snvs@30370000         .  /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  /soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  /soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  /soc@0/bus@30000000/clock-controller@30380000         .  /soc@0/bus@30000000/reset-controller@30390000         !  /soc@0/bus@30000000/gpc@303a0000          4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  	/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  +/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11          5  6/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@12          5  A/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@13          5  Q/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@14          5  ]/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@15          5  j/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@16          5  x/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@17          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@18            /soc@0/bus@30400000       !  /soc@0/bus@30400000/pwm@30660000          !  /soc@0/bus@30400000/pwm@30670000          !  /soc@0/bus@30400000/pwm@30680000          !  /soc@0/bus@30400000/pwm@30690000          #  /soc@0/bus@30400000/timer@306a0000        #  /soc@0/bus@30400000/timer@306e0000        #  /soc@0/bus@30400000/timer@306f0000        #  /soc@0/bus@30400000/timer@30700000          /soc@0/bus@30800000       3  /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3  ,/soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  ;/soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  X/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  J/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         3  /soc@0/bus@30800000/spba-bus@30800000/can@308c0000        3  /soc@0/bus@30800000/spba-bus@30800000/can@308d0000        $  /soc@0/bus@30800000/crypto@30900000       ,  /soc@0/bus@30800000/crypto@30900000/jr@1000       ,  /soc@0/bus@30800000/crypto@30900000/jr@2000       ,  /soc@0/bus@30800000/crypto@30900000/jr@3000       !   t/soc@0/bus@30800000/i2c@30a20000          )  /soc@0/bus@30800000/i2c@30a20000/pmic@25          :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK1         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK2         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK4         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK5         :  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/BUCK6         9  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO1          9  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO3          9  /soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators/LDO5          (  /soc@0/bus@30800000/i2c@30a20000/rtc@52       !   y/soc@0/bus@30800000/i2c@30a30000          !   ~/soc@0/bus@30800000/i2c@30a40000          !   /soc@0/bus@30800000/i2c@30a50000          $  f/soc@0/bus@30800000/serial@30a60000       %  g/soc@0/bus@30800000/mailbox@30aa0000          %  /soc@0/bus@30800000/mailbox@30e60000          !   /soc@0/bus@30800000/i2c@30ad0000          )  /soc@0/bus@30800000/i2c@30ad0000/gpio@20          3  $/soc@0/bus@30800000/i2c@30ad0000/gpio@20/bt-rs-hog        7  4/soc@0/bus@30800000/i2c@30ad0000/gpio@20/rs232-485-hog        !  /soc@0/bus@30800000/i2c@30ae0000          !  /soc@0/bus@30800000/mmc@30b40000          !  /soc@0/bus@30800000/mmc@30b50000          !  /soc@0/bus@30800000/mmc@30b60000          !  /soc@0/bus@30800000/spi@30bb0000          )  H/soc@0/bus@30800000/spi@30bb0000/flash@0          ,  P/soc@0/bus@30800000/dma-controller@30bd0000       &  /soc@0/bus@30800000/ethernet@30be0000         :  V/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0         &  /soc@0/bus@30800000/ethernet@30bf0000         :  ^/soc@0/bus@30800000/ethernet@30bf0000/mdio/ethernet-phy@1           f/soc@0/bus@30c00000       3  l/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c10000        3  q/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c20000        3  v/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c30000        3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c50000        3  {/soc@0/bus@30c00000/spba-bus@30c00000/sai@30c60000        3  /soc@0/bus@30c00000/spba-bus@30c00000/sai@30c80000        5  /soc@0/bus@30c00000/spba-bus@30c00000/easrc@30c90000          @  /soc@0/bus@30c00000/spba-bus@30c00000/audio-controller@30ca0000       7  /soc@0/bus@30c00000/spba-bus@30c00000/aud2htx@30cb0000        4  /soc@0/bus@30c00000/spba-bus@30c00000/xcvr@30cc0000       ,  /soc@0/bus@30c00000/dma-controller@30e00000       ,  /soc@0/bus@30c00000/dma-controller@30e10000       .  /soc@0/bus@30c00000/clock-controller@30e20000           /soc@0/interconnect@32700000          '  /soc@0/interconnect@32700000/opp-table          /soc@0/bus@32c00000       !  /soc@0/bus@32c00000/isi@32e00000          7  /soc@0/bus@32c00000/isi@32e00000/ports/port@0/endpoint        7  /soc@0/bus@32c00000/isi@32e00000/ports/port@1/endpoint        !  /soc@0/bus@32c00000/isp@32e10000          !  /soc@0/bus@32c00000/isp@32e20000          !  /soc@0/bus@32c00000/dwe@32e30000          !  /soc@0/bus@32c00000/csi@32e40000          7  /soc@0/bus@32c00000/csi@32e40000/ports/port@1/endpoint        !  /soc@0/bus@32c00000/csi@32e50000          7  "/soc@0/bus@32c00000/csi@32e50000/ports/port@1/endpoint        !  1/soc@0/bus@32c00000/dsi@32e60000          7  :/soc@0/bus@32c00000/dsi@32e60000/ports/port@0/endpoint        7  K/soc@0/bus@32c00000/dsi@32e60000/ports/port@1/endpoint        0  D/soc@0/bus@32c00000/display-controller@32e80000       >  X/soc@0/bus@32c00000/display-controller@32e80000/port/endpoint         0  g/soc@0/bus@32c00000/display-controller@32e90000       >  n/soc@0/bus@32c00000/display-controller@32e90000/port/endpoint         &  |/soc@0/bus@32c00000/blk-ctrl@32ec0000         0  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c       F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@0/endpoint         F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@1/endpoint         F  /soc@0/bus@32c00000/blk-ctrl@32ec0000/bridge@5c/ports/port@2/endpoint         &  /soc@0/bus@32c00000/pcie-phy@32f00000         &  /soc@0/bus@32c00000/blk-ctrl@32f10000         &  /soc@0/bus@32c00000/blk-ctrl@32fc0000         2  /soc@0/bus@32c00000/interrupt-controller@32fc2000         ,  /soc@0/bus@32c00000/display-bridge@32fc4000       B  /soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@0/endpoint         B  /soc@0/bus@32c00000/display-bridge@32fc4000/ports/port@1/endpoint         0  /soc@0/bus@32c00000/display-controller@32fc6000       >  /soc@0/bus@32c00000/display-controller@32fc6000/port/endpoint         "  /soc@0/bus@32c00000/hdmi@32fd8000         8  !/soc@0/bus@32c00000/hdmi@32fd8000/ports/port@0/endpoint       !  2/soc@0/bus@32c00000/phy@32fdff00            /soc@0/pcie@33800000            >/soc@0/pcie@33800000            C/soc@0/pcie-ep@33800000         L/soc@0/pcie-ep@33800000         /soc@0/gpu@38000000         /soc@0/gpu@38008000         //soc@0/video-codec@38300000         :/soc@0/video-codec@38310000         T/soc@0/blk-ctrl@38330000            d/soc@0/npu@38500000       %  h/soc@0/interrupt-controller@38800000          "  l/soc@0/memory-controller@3d400000           s/soc@0/usb-phy@381f0040         }/soc@0/usb@32f10100       !  /soc@0/usb@32f10100/usb@38100000            /soc@0/usb-phy@382f0040         /soc@0/usb@32f10108       !  /soc@0/usb@32f10108/usb@38200000            /soc@0/dsp@3b6e8000         /regulator-usdhc2           /regulator-vdd-io           /backlight0         /panel-lvds         /panel-lvds/port/endpoint           /regulator-can1-stby            /regulator-can2-stby            /regulator-vdd-12v0         	/regulator-vdd-1v8          /regulator-vdd-3v3          !/regulator-vdd-5v0           	interrupt-parent #address-cells #size-cells compatible model ethernet0 ethernet1 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us wakeup-latency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache nvmem-cells nvmem-cell-names operating-points-v2 #cooling-cells cpu-idle-states cpu-supply cache-unified cache-level opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names remote-endpoint ranges no-map status interrupts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device arm,no-tick-in-suspend cpu clock-names gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names pinctrl-0 pinctrl-names #thermal-sensor-cells fsl,ext-reset-output fsl,pins regmap offset linux,keycode wakeup-source assigned-clocks assigned-clock-parents assigned-clock-rates #reset-cells #power-domain-cells power-domains #pwm-cells dmas dma-names fsl,dte-mode fsl,clk-source fsl,stop-mode xceiver-supply pinctrl-1 scl-gpios sda-gpios regulator-always-on regulator-boot-on regulator-max-microvolt regulator-min-microvolt regulator-name regulator-ramp-delay nxp,dvs-run-voltage nxp,dvs-standby-voltage pagesize vcc-supply read-only aux-voltage-chargeable trickle-resistor-ohms #mbox-cells gpio-hog line-name output-low output-high fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 sd-uhs-sdr104 vmmc-supply vqmmc-supply disable-wp non-removable reg-names spi-max-frequency spi-rx-bus-width spi-tx-bus-width #dma-cells fsl,sdma-ram-script-name fsl,num-tx-queues fsl,num-rx-queues phy-handle phy-mode fsl,magic-packet enet-phy-lane-no-swap ti,clk-output-sel ti,fifo-depth ti,min-output-impedance ti,rx-internal-delay ti,tx-internal-delay interrupt-names intf_mode #sound-dai-cells firmware-name fsl,asrc-rate fsl,asrc-format resets #interconnect-cells fsl,blk-ctrl power-domain-names samsung,pll-clock-frequency interconnects interconnect-names reset-names #phy-cells fsl,clkreq-unsupported fsl,refclk-pad-mode fsl,channel fsl,num-irqs reg-io-width bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phys phy-names reset-gpio vpcie-supply num-ib-windows num-ob-windows dma-ranges snps,gfladj-refclk-lpm-sel-quirk snps,parkmode-disable-ss-quirk mbox-names mboxes off-on-delay-us startup-delay-us enable-active-high power-supply stdout-path backlight cpu_pd_wait A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 ca_funnel_in_port0 ca_funnel_in_port1 ca_funnel_in_port2 ca_funnel_in_port3 ca_funnel_out_port0 dsp_reserved cpu_alert0 cpu_crit0 soc_alert0 soc_crit0 soc etm0 etm0_out_port etm1 etm1_out_port etm2 etm2_out_port etm3 etm3_out_port hugo_funnel_in_port0 hugo_funnel_in_port1 hugo_funnel_in_port2 hugo_funnel_out_port0 etf_in_port etf_out_port etr_in_port aips1 gpio5 tmu wdog1 wdog2 wdog3 gpt1 gpt2 gpt3 iomuxc pinctrl_flexcan1 pinctrl_flexcan2 pinctrl_eqos pinctrl_fec pinctrl_flexspi pinctrl_gpio4 pinctrl_gpio5 pinctrl_hdmi pinctrl_i2c1_gpio pinctrl_i2c1 pinctrl_i2c2_gpio pinctrl_i2c2 pinctrl_i2c3_gpio pinctrl_i2c3 pinctrl_i2c5_gpio pinctrl_i2c5 pinctrl_i2c6_gpio pinctrl_i2c6 pinctrl_pcie0 pinctrl_pmic pinctrl_pwm1 pinctrl_pwm2 pinctrl_pwm3 pinctrl_pwm4 pinctrl_reg_usdhc2_vmmc pinctrl_sai5 pinctrl_ecspi1 pinctrl_ecspi2 pinctrl_ecspi3 pinctrl_uart2 pinctrl_uart3 pinctrl_uart4 pinctrl_usb0 pinctrl_usb1 pinctrl_usdhc1 pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_lvds0 pinctrl_rtc gpr ocotp imx8mp_uid cpu_speed_grade eth_mac1 eth_mac2 tmu_calib anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_mipi_phy1 pgc_pcie_phy pgc_usb1_phy pgc_usb2_phy pgc_mlmix pgc_audio pgc_gpu2d pgc_gpumix pgc_vpumix pgc_gpu3d pgc_mediamix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_vc8000e pgc_hdmimix pgc_hdmi_phy pgc_mipi_phy2 pgc_hsiomix pgc_ispdwp aips2 system_counter gpt6 gpt5 gpt4 aips3 uart1 crypto sec_jr0 sec_jr1 sec_jr2 buck1 buck2 buck4 buck5 buck6 ldo1 ldo3 ldo5 rv3028 mu2 gpio_expander uart1_bt_rs_sel uart1_rs232_485_sel spi_nor sdma1 ethphy0 ethphy1 aips5 sai1 sai2 sai3 sai6 sai7 easrc micfil aud2htx xcvr sdma3 sdma2 audio_blk_ctrl noc noc_opp_table aips4 isi_0 isi_in_0 isi_in_1 isp_0 isp_1 dewarp mipi_csi_0 mipi_csi_0_out mipi_csi_1 mipi_csi_1_out mipi_dsi dsim_from_lcdif1 mipi_dsi_out lcdif1_to_dsim lcdif2 lcdif2_to_ldb media_blk_ctrl lvds_bridge ldb_from_lcdif2 ldb_lvds_ch0 ldb_lvds_ch1 hsio_blk_ctrl hdmi_blk_ctrl irqsteer_hdmi hdmi_pvi pvi_from_lcdif3 pvi_to_hdmi_tx lcdif3_to_pvi hdmi_tx_from_pvi hdmi_tx_phy pcie pcie0_ep pcie_ep vpumix_blk_ctrl npu gic edacmc usb3_phy0 usb3_0 usb_dwc3_0 usb3_phy1 usb3_1 usb_dwc3_1 dsp reg_vdd_io backlight_lvds0 panel0_lvds panel0_in reg_can1_stby reg_can2_stby reg_vdd_12v0 reg_vdd_1v8 reg_vdd_3v3 reg_vdd_5v0 