     8  d   (              ,                                                                   &   ,Gateworks Venice GW7904 i.MX8MM board         #   2gateworks,imx8mm-gw7904 fsl,imx8mm     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   /soc@0/bus@30800000/i2c@30a20000/rtc@68       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                         
        (            cpu@0           0cpu          2arm,cortex-a53          <            @              Gpsci            U           b   @        t                         @                                                    speed_grade                                          (   
      cpu@1           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                                          (         cpu@2           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                                          (         cpu@3           0cpu          2arm,cortex-a53          <           @              Gpsci            U           b   @        t                         @                                                                          (         l2-cache0            2cache                       %        W           d   @        v           (            opp-table            2operating-points-v2          3        (      opp-1200000000          >    G         E P        S              d I         u      opp-1600000000          >    _^         E ~        S              d I         u      opp-1800000000          >    kI         E B@        S              d I         u         clock-osc-32k            2fixed-clock                                osc_32k         (         clock-osc-24m            2fixed-clock                     n6         osc_24m         (         clock-ext1           2fixed-clock                     k@      	  clk_ext1            (         clock-ext2           2fixed-clock                     k@      	  clk_ext2            (         clock-ext3           2fixed-clock                     k@      	  clk_ext3            (         clock-ext4           2fixed-clock                     k@      	  clk_ext4            (         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L                  7passive         (   	      trip1            s                	  7critical             cooling-maps       map0               	      0  #   
                        usbphynop1          2             2usb-nop-xceiv           @              =              M      2      	  dmain_clk            p           (   G      usbphynop2          2             2usb-nop-xceiv           @              =              M      2      	  dmain_clk            p           (   I      soc@0            2fsl,imx8mm-soc simple-bus                                    ~            >           @       @                         soc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         <0    @                                   ~0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  <0               ~   sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    _            @                                  dbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    `            @                                  dbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    2            @                                  dbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            @                                  dbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           <0                    Z            @                                  dbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            2fsl,imx8mm-micfil           <0           0         m          n          ,          -         (  @                  &      '            )  dipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled          spdif@30090000           2fsl,imx35-spdif         <0	                             P  @      ^            r                           ^                           :  dcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0                     @          A           @                                                                
         )              rs232_en#                               (   0      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0!                    B          C           @                                                                (           (   7      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0"                    D          E           @                                                                =           (   ,      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0#                    F          G           @                                                                W            (   '      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          <0$                    H          I           @                                                                w         )              pci_wdis#                               (   "      tmu@30260000             2fsl,imx8mm-tmu          <0&             @                         calib                       (         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0(                    N           @              okay            +default         9            C      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0)                    O           @            	  disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            <0*                    
           @            	  disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0,                    g           @                    dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0+                    "           @                    dipg ahb         X           cimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           <03             +default         9           (      hoggrp        0  |   X              @  A    t           @  A        (         accelgrp            |   d                Y        (   /      fec1grp        |   h                    l                 p                    t                    x                    |                                                                                                                                                                                      $                  (                      (   >      gpioledsgrp       `  |   H              @     L              @     P              @     T              @          (   X      gscgrp          |    ,             Y        (   &      i2c1grp       0  |    |            @                 @         (   $      i2c1gpiogrp       0  |    |           @                @         (   %      i2c2grp       0  |                @                  @         (   )      i2c2gpiogrp       0  |               @                 @         (   *      i2c3grp       0  |  $              @   (              @         (   -      i2c3gpiogrp       0  |  $             @   (             @         (   .      i2c4grp       0  |  ,              @   0              @         (   1      i2c4gpiogrp       0  |  ,             @   0             @         (   2      pciegrp         |    p              A        (   O      pmicgrp         |    |              A        (   +      uart1grp          `  |  4              @  8                @  D               @  H               @        (   !      uart2grp          0  |  <              @  @                @        (   #      usdhc2grp           |     <                   @                   D                   H                   L                   P                      (   3      usdhc2-100mhzgrp            |     <                   @                   D                   H                   L                   P                      (   5      usdhc2-200mhzgrp            |     <                   @                   D                   H                   L                   P                      (   6      usdhc2-gpiogrp        0  |     8                8                       (   4      usdhc3grp          |  8                 <                                                    $                 (                 0                    h                 l                 p                  d                     (   9      usdhc3-100mhzgrp           |  8                 <                                                    $                 (                 0                    h                 l                 p                  d                     (   :      usdhc3-200mhzgrp           |  8                 <                                                    $                 (                 0                    h                 l                 p                  d                     (   ;      wdoggrp         |   0                        (            syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            <04             (   =      efuse@30350000           2fsl,imx8mm-ocotp syscon         <05             @                                  unique-id@4         <              (         speed-grade@10          <              (         calib@3c            <   <           (         mac-address@90          <              (   <         clock-controller@30360000            2fsl,imx8mm-anatop           <06                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          <07             (      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    @            	  dsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      @              dsnvs-pwrkey            t               	  disabled          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          <08                    U          V                      @                        4  dosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  =      B            [      ^      `                     M      8      ,      /      8                    ׄ ׄ ,p          (         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            <09                    Y                      (         gpc@303a0000             2fsl,imx8mm-gpc          <0:                    W                                       pgc                              power-domain@0                      <            @      X        =      X        M      @        (         power-domain@1                      <           p           @              (   M      power-domain@2                      <           (         power-domain@3                      <           (         power-domain@4                      <           @            Z        =      Y      Z        M      8      8        / ׄ         (         power-domain@5                      <            @      Z                                         p           (   P      power-domain@6                      <           @              =      T        M      8        (   R      power-domain@7                      <           (   S      power-domain@8                      <           (   T      power-domain@9                      <   	        (   U      power-domain@10                     <   
        @                    =      U      V        M      A      8        e          (   D      power-domain@11                     <         	  disabled            (   E               bus@30400000             2fsl,aips-bus simple-bus         <0@   @                                   ~0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0f                    Q           @                    dipg per                  	  disabled          pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0g                    R           @                    dipg per                  	  disabled          pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0h                    S           @                    dipg per                  	  disabled          pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            <0i                    T           @                    dipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            <0j                    /           @           dper          bus@30800000             2fsl,aips-bus simple-bus         <0   @                                   ~0  0   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  <0              ~   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                               @                    dipg per                                             rx tx         	  disabled          spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                                @                    dipg per                                            rx tx         	  disabled          spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      <0                    !           @                    dipg per                                            rx tx         	  disabled          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                              rx tx           okay            +default         9   !           "                 "            serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                              rx tx         	  disabled          serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                              rx tx           okay            +default         9   #         crypto@30900000          2fsl,sec-v4.0                                     <0             ~    0                    [           @      ]      _      	  daclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           <                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           <                      j         jr@3000          2fsl,sec-v4.0-job-ring           <  0                   r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    #           @              okay                     +default gpio            9   $           %           "                 "         gsc@20           2gw,gsc          <            9   &             '                                                                    (   (   adc          2gw,gsc-adc                               channel@6           )            <           1temp          channel@82          )           <           1vin         7  VT          O 
`      channel@84          )           <           1vdd_5p0         7  '  '      channel@86          )           <           1vdd_3p3         7  '  '      channel@88          )           <           1vdd_0p9       channel@8c          )           <           1vdd_soc       channel@8e          )           <           1vdd_arm       channel@90          )           <           1vdd_1p8       channel@92          )           <         	  1vdd_dram          channel@a2          )           <           1vdd_gsc         7  '  '            gpio@23          2nxp,pca9555         <   #                                 (                   (   W      eeprom@50            2atmel,24c02         <   P        k         eeprom@51            2atmel,24c02         <   Q        k         eeprom@52            2atmel,24c02         <   R        k         eeprom@53            2atmel,24c02         <   S        k         rtc@68           2dallas,ds1672           <   h         i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    $           @              okay                     +default gpio            9   )           *           "                 "         pmic@4b          2rohm,bd71847            <   K        +default         9   +             ,                       t                    @           clk-32k-out    regulators     BUCK1           buck1            
`                                            BUCK2           buck2            
`                                               B@                 (         BUCK3           buck3            
`         p                        BUCK4           buck4            -         2Z                        BUCK5           buck5            }         p                        BUCK6           buck6            5          \                        LDO1            ldo1             j                                  LDO2            ldo2             5                                  LDO3            ldo3             w@         2Z                        LDO4            ldo4                      w@                        LDO6            ldo6                      w@                                 i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            <0                    %           @              okay                     +default gpio            9   -           .           "                 "         accelerometer@19            +default         9   /         2st,lis2de12         <           1                0                       i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      <0                    &           @              okay                     +default gpio            9   1           2           "                 "         gpio@27          2nxp,pca9555         <   '                            (   Y         serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          <0                               @                    dipg per                                              rx tx         	  disabled          mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         <0                    X           @              A         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per         M           b           r         	  disabled          mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per         M           b           r           okay          "  +default state_100mhz state_200mhz           9   3   4           5   4        |   6   4           7                 8      mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            <0                               @      _      S              dipg ahb per         M           b           r           okay          "  +default state_100mhz state_200mhz           9   9           :        |   ;        =              ׄ                spi@30bb0000                                       2nxp,imx8mm-fspi         <0                   fspi_base fspi_mmap                k           @                    dfspi_en fspi          	  disabled          dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         <0                               @            ]        dipg ahb         X           cimx/sdma/sdma-imx7d.bin         (          ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            <0           0         v          w          x          y         (  @                  u      t      v      "  dipg ahb ptp enet_clk_ref enet_out            =      R      u      t      v         M      6      :      ;      9             sY@                                     <        mac-address            =              okay            +default         9   >      	  rgmii-id               ?                   mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22          <            (   ?               bus@32c00000             2fsl,aips-bus simple-bus         <2   @                                   ~2  2   @     lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           <2             @      k                    dpix axi disp_axi            =      k      U      V        M      (      A      8        n6 e                            p   @         	  disabled       port       endpoint               A        (   B            dsi@32e10000             2fsl,imx8mm-mipi-dsim            <2             @                    dbus_clk sclk_mipi           =              M      6                          p   @         	  disabled       ports                                port@0          <       endpoint               B        (   A         port@1          <      endpoint                   csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         <2                               @              dmclk            p   @          	  disabled       port       endpoint               C        (   F            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         <2            p   D   D   D   E   E      '  bus csi-bridge lcdif mipi-dsi mipi-csi        P  @                                                                  o  dcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                   	  disabled            (   @      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            <2                               =              M      A        -@         @                                dpclk wrap phy axi           p   @         	  disabled       ports                                port@0          <          port@1          <      endpoint               F        (   C               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    (           @              =      X        M      @        .   G        3   H            p           okay            ?host             G      usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          \           <2            (   H      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          <2                    )           @              =      X        M      @        .   I        3   J            p         	  disabled          usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc          \           <2            (   J      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         <2             @   K        dref         =      h                 M      :                      ipciephy         2            okay            u                    (   N         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           <3             0                                                  X                      @              (   L      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      <3       3 @   @         gpmi-nand bch                             bch         @                    dgpmi_io gpmi_bch_apb               L            rx-tx         	  disabled          pcie@33800000            2fsl,imx8mm-pcie         <3   @               dbi config                                   0pci                      0  ~                                                                            z           msi                                                                    }                            |                            {                            z                                  @         K      i        dpcie pcie_bus pcie_aux          p   M                            iapps turnoff            .   N      	  #pcie-phy            okay            +default         9   O        -   "              =      i      g         沀        M      9      >      pcie-ep@33800000             2fsl,imx8mm-pcie-ep           <3           3     3             dbi addr_space dbi2 atu                                      dma                    @            h      i        dpcie pcie_bus pcie_aux          p   M                            iapps turnoff            .   N      	  #pcie-phy            8           G         	  disabled          gpu@38000000             2vivante,gc          <8                                 @      Z                          dreg bus core shader         =            *        M      *            /         p   P      gpu@38008000             2vivante,gc          <8                               @      Z                    dreg bus core            =            *        M      *            /         p   P      video-codec@38300000             2nxp,imx8mm-vpu-g1           <80                               @              p   Q          video-codec@38310000             2nxp,imx8mq-vpu-g2           <81                               @              p   Q         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          <83             p   R   S   T   U        bus g1 g2 h1            @                        	  dg1 g2 h1            =      c      d        M      +      +        #F #F                    (   Q      interrupt-controller@38800000            2arm,gic-v3          <8     8                                                    	           (         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          <=@   @          dcore pll alt apb             @                  a      b           V   opp-table            2operating-points-v2         (   V   opp-25000000            >    }x@      opp-100000000           >           opp-750000000           >    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            <=   @                 b            chosen        6  V/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         memory@40000000         0memory          <    @                gpio-keys         
   2gpio-keys      key-0           1user_pb            W              b         key-1         
  1user_pb1x           b               (                  key-2           1key_erased          b               (                 key-3         
  1eeprom_wp           b               (                 key-4           1switch_hold         b               (                    led-controller        
   2gpio-leds           +default         9   X   led-0           mstatus          v         
  1led01_grn              Y               |off       led-1           mstatus          v         
  1led01_yel              Y              |off       led-2           mstatus          v         
  1led02_grn              Y              |off       led-3           mstatus          v         
  1led02_yel              Y              |off       led-4           mstatus          v         
  1led03_grn              Y              |off       led-5           mstatus          v         
  1led03_yel              Y              |off       led-6           mstatus          v         
  1led04_grn              Y              |off       led-7           mstatus          v         
  1led04_yel              Y              |off       led-8           mstatus          v         
  1led05_grn              Y              |off       led-9           mstatus          v         
  1led05_yel              Y   	           |off       led-10          mstatus          v         
  1led06_grn              0              |off       led-11          mstatus          v         
  1led06_red              0   	           |off       led-12          mstatus          v         
  1led07_grn              0   
           |off       led-13          mstatus          v         
  1led07_red              0              |off       led-14          mstatus          v         
  1led08_grn              Y   
           |off       led-15          mstatus          v         
  1led08_yel              Y              |off       led-16          mstatus          v         
  1led09_grn              Y              |off       led-17          mstatus          v         
  1led09_yel              Y              |off       led-18          mstatus          v         
  1led10_grn              Y              |off       led-19          mstatus          v         
  1led10_yel              Y              |off          pcie0-refclk             2fixed-clock                              (   K      regulator-3p3v           2regulator-fixed         3P3V             2Z         2Z                 (   8         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells pinctrl-names pinctrl-0 fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cts-gpios rts-gpios pinctrl-1 scl-gpios sda-gpios gw,mode label gw,voltage-divider-ohms gw,voltage-offset-microvolt pagesize rohm,reset-snvs-powered regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on regulator-ramp-delay rohm,dvs-run-voltage rohm,dvs-idle-voltage st,drdy-int-pin #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 cd-gpios vmmc-supply non-removable reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle local-mac-address remote-endpoint power-domain-names phys fsl,usbmisc dr_mode disable-over-current #index-cells reset-names fsl,refclk-pad-mode fsl,clkreq-unsupported dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio num-ib-windows num-ob-windows stdout-path linux,code function color default-state 