  E   8     (              T                                                                   3   ,Gateworks Venice GW72xx-0x i.MX8MM Development Kit           2gw,imx8mm-gw72xx-0x fsl,imx8mm     aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   /soc@0/bus@30800000/i2c@30a20000/rtc@68       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         =   /soc@0/pcie@33800000/pcie@0,0/pcie@0,0/pcie@3,0/ethernet@0,0          !   /soc@0/bus@32c00000/usb@32e40000          !   /soc@0/bus@32c00000/usb@32e50000          cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                  
                    +  
        <            cpu@0           Dcpu          2arm,cortex-a53          P            T              [psci            i           v   @                                 @                                                    speed_grade                               "           <   
      cpu@1           Dcpu          2arm,cortex-a53          P           T              [psci            i           v   @                                 @                                                               "           <         cpu@2           Dcpu          2arm,cortex-a53          P           T              [psci            i           v   @                                 @                                                               "           <         cpu@3           Dcpu          2arm,cortex-a53          P           T              [psci            i           v   @                                 @                                                               "           <         l2-cache0            2cache           -            9        k           x   @                   <            opp-table            2operating-points-v2          G        <      opp-1200000000          R    G         Y P        g              x I               opp-1600000000          R    _^         Y ~        g              x I               opp-1800000000          R    kI         Y B@        g              x I                  clock-osc-32k            2fixed-clock                                osc_32k         <         clock-osc-24m            2fixed-clock                     n6         osc_24m         <         clock-ext1           2fixed-clock                     k@      	  clk_ext1            <         clock-ext2           2fixed-clock                     k@      	  clk_ext2            <         clock-ext3           2fixed-clock                     k@      	  clk_ext3            <         clock-ext4           2fixed-clock                     k@      	  clk_ext4            <         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L        '          Kpassive         <   	      trip1            s        '        	  Kcritical            <   ]         cooling-maps       map0            2   	      0  7   
                        usbphynop1          F             2usb-nop-xceiv           T              Q              a      2      	  xmain_clk                       <   F      usbphynop2          F             2usb-nop-xceiv           T              Q              a      2      	  xmain_clk                       <   I      soc@0            2fsl,imx8mm-soc simple-bus                                                >           @       @                         soc_unique_id           <   ^   bus@30000000             2fsl,aips-bus simple-bus         P0    @                                   0   0    @          <   _   spba-bus@30000000            2fsl,spba-bus simple-bus                                  P0                       <   `   sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           P0                    _            T                                  xbus mclk1 mclk2 mclk3                                               rx tx         	  disabled            <   a      sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           P0                    `            T                                  xbus mclk1 mclk2 mclk3                                              rx tx         	  disabled            <   b      sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           P0                    2            T                                  xbus mclk1 mclk2 mclk3                                              rx tx           okay            default                    Q      n        a      &        w          <   c      sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           P0                    Z            T                                  xbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled            <   d      sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           P0                    Z            T                                  xbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled            <   e      audio-controller@30080000            2fsl,imx8mm-micfil           P0           0         m          n          ,          -         (  T                  &      '            )  xipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled            <   f      spdif@30090000           2fsl,imx35-spdif         P0	                             P  T      ^            r                           ^                           :  xcore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled            <   g         gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          P0                     @          A           T                                           )           :          
         G  Frs485_term mipi_gpio4     pci_usb_sel dio0  dio1                                <   $      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          P0!                    B          C           T                                           )           :          (           <   +      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          P0"                    D          E           T                                           )           :          =           <   h      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          P0#                    F          G           T                                           )           :          W          W  Frs485_en mipi_gpio3 rs485_hd mipi_gpio2 mipi_gpio1   pci_wdis#                                  <   0   rs485-hd-hog          	  yrs485_hd                                   d      rs485-en-hog          	  yrs485_en           m                         d         gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          P0$                    H          I           T                                           )           :          w           <   #      tmu@30260000             2fsl,imx8mm-tmu          P0&             T                         calib           V            <         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            P0(                    N           T              okay            default                     l        <   i      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            P0)                    O           T            	  disabled            <   j      watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            P0*                    
           T            	  disabled            <   k      dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         P0,                    g           T                    xipg ahb                    imx/sdma/sdma-imx7d.bin         <         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         P0+                    "           T                    xipg ahb                    imx/sdma/sdma-imx7d.bin         <   l      pinctrl@30330000             2fsl,imx8mm-iomuxc           P03             default                    <      fec1grp      h     h                    l                 p                    t                    x                    |                                                                                                                                                                                       \                      <   =      gscgrp                             Y        <   *      i2c1grp       0      |            @                 @         <   (      i2c1gpiogrp       0      |           @                @         <   )      i2c2grp       0                  @                  @         <   -      i2c2gpiogrp       0                 @                 @         <   .      uart2grp          H    <              @  @                @  P               @        <   '      usdhc3grp            8                 <                                                    $                 (                 0                    h                 l                 p                  d                     <   8      usdhc3-100mhzgrp             8                 <                                                    $                 (                 0                    h                 l                 p                  d                     <   9      usdhc3-200mhzgrp             8                 <                                                    $                 (                 0                    h                 l                 p                  d                     <   :      wdoggrp            0                        <         hoggrp              P           @  A   @              @  A  x             @  A   D              @  A   L              @  A   (              @   \             @   d             @         <         accelgrp              p               Y        <   /      gpioledgrp        0      X                  T                      <   Y      i2c3grp       0    $              @   (              @         <   1      pcie0grp              t                A        <   P      ppsgrp             d                 A        <   Z      regusb1grp        0     X                 A   \                A        <   [      regusb2grp             H                 A        <   \      sai3grp       x      @                   D                   L                   H                   <                       <         spi2grp       x      l                   p                   t                   x                 P                         <   "      uart1grp          0    4              @  8                @        <   %      uart3grp          0    D             @  H                @        <   &      uart4grp          0    L             @  P                @        <   2      usdhc2grp                <                   @                   D                   H                   L                   P                      <   3      usdhc2-100mhzgrp                 <                   @                   D                   H                   L                   P                      <   5      usdhc2-200mhzgrp                 <                   @                   D                   H                   L                   P                      <   6      usdhc2gpiogrp         H       8                  T                 8                       <   4         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            P04             <   <      efuse@30350000           2fsl,imx8mm-ocotp syscon         P05             T                                       <   m   unique-id@4         P              <         speed-grade@10          P              <         calib@3c            P   <           <         mac-address@90          P              <   ;         clock-controller@30360000            2fsl,imx8mm-anatop           P06                        <   n      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          P07             <      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    T            	  xsnvs-rtc            <   o      snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      T              xsnvs-pwrkey            t               	  disabled            <   p      snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr          <   q         clock-controller@30380000            2fsl,imx8mm-ccm          P08                    U          V                      T                        4  xosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  Q      B            [      ^      `                     a      8      ,      /      8                    ׄ ׄ ,p          <         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            P09                    Y                      <         gpc@303a0000             2fsl,imx8mm-gpc          P0:                    W                                 )           <   r   pgc                              power-domain@0                      P            T      X        Q      X        a      @        <         power-domain@1                      P                      T              <   N      power-domain@2                      P           <         power-domain@3                      P           <         power-domain@4                      P           T            Z        Q      Y      Z        a      8      8        / ׄ         <          power-domain@5                      P            T      Z                                                     <   Q      power-domain@6                      P           T              Q      T        a      8        <   S      power-domain@7                      P           <   T      power-domain@8                      P           <   U      power-domain@9                      P   	        <   V      power-domain@10                     P   
        T                    Q      U      V        a      A      8        e          <   C      power-domain@11                     P           <   D               bus@30400000             2fsl,aips-bus simple-bus         P0@   @                                   0@  0@   @          <   s   pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            P0f                    Q           T                    xipg per                   	  disabled            <   t      pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            P0g                    R           T                    xipg per                   	  disabled            <   u      pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            P0h                    S           T                    xipg per                   	  disabled            <   v      pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            P0i                    T           T                    xipg per                   	  disabled            <   w      timer@306a0000           2nxp,sysctr-timer            P0j                    /           T           xper         <   x         bus@30800000             2fsl,aips-bus simple-bus         P0   @                                   0  0   @                   <   y   spba-bus@30800000            2fsl,spba-bus simple-bus                                  P0                      <   z   spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      P0                               T                    xipg per             !             !                 rx tx         	  disabled            <   {      spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      P0                                T                    xipg per             !            !                 rx tx           okay            default            "           #         $   
           <   |   tpm@1            2atmel,attpm20p tcg,tpm_tis-spi          P           %Q          spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      P0                    !           T                    xipg per             !            !                 rx tx         	  disabled            <   }      serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          P0                               T                    xipg per             !             !                  rx tx           okay            default            %        <   ~      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          P0                               T                    xipg per             !             !                  rx tx           okay            default            &        <         serial@30890000                     #                2fsl,imx8mm-uart fsl,imx6q-uart          P0                               T                    xipg per             !             !                  rx tx           okay            default            '        <            crypto@30900000          2fsl,sec-v4.0                                     P0                 0                    [           T      ]      _      	  xaclk ipg            <      jr@1000          2fsl,sec-v4.0-job-ring           P                     i         	  disabled            <         jr@2000          2fsl,sec-v4.0-job-ring           P                      j           <         jr@3000          2fsl,sec-v4.0-job-ring           P  0                   r           <            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      P0                    #           T              okay                     default gpio               (        &   )        0   #              :   #              <      gsc@20           2gw,gsc          P               *             +                               )                                     <   ,   adc          2gw,gsc-adc                               channel@6           D            P           Ltemp          channel@8           D           P           Lvdd_bat       channel@16          D           P         	  Lfan_tach          channel@82          D           P           Lvdd_vin         R  VT        channel@84          D           P         	  Lvdd_adc1            R  '  '      channel@86          D           P         	  Lvdd_adc2            R  '  '      channel@88          D           P         	  Lvdd_dram          channel@8c          D           P           Lvdd_1p2       channel@8e          D           P           Lvdd_1p0       channel@90          D           P           Lvdd_2p5         R  '  '      channel@92          D           P           Lvdd_3p3         R  '  '      channel@98          D           P         	  Lvdd_0p95          channel@9a          D           P           Lvdd_1p8       channel@a2          D           P           Lvdd_gsc         R  '  '         fan-controller@0             2gw,gsc-fan          P   
         gpio@23          2nxp,pca9555         P   #                                 ,                   <   X      eeprom@50            2atmel,24c02         P   P        j         eeprom@51            2atmel,24c02         P   Q        j         eeprom@52            2atmel,24c02         P   R        j         eeprom@53            2atmel,24c02         P   S        j         rtc@68           2dallas,ds1672           P   h        <         pmic@69          2mps,mp5416          P   i   regulators     buck1           sbuck1            5          B@         9         g                        buck2           sbuck2            5                   !         OX                        buck3           sbuck3            5          B@         9         g                 <         buck4           sbuck4            w@         w@         !         OX                        ldo1            sldo1             w@         w@                        ldo2            sldo2             5          5                         ldo3            sldo3                                              ldo4            sldo4             w@         w@                                 i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      P0                    $           T              okay                     default            -        &   .        0   #              :   #              <      eeprom@52            2atmel,24c32         P   R        j          accelerometer@19            default            /         2st,lis2de12         P                           0                       i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            P0                    %           T              okay                     default            1        <         i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      P0                    &           T            	  disabled            <         serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          P0                               T                    xipg per             !             !                  rx tx         	  disabled           default            2        <         mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         P0                    X           T                         <         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            P0                               T      _      S              xipg ahb per         "           7           G         	  disabled            <         mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            P0                               T      _      S              xipg ahb per         "           7           G           okay          "  default state_100mhz state_200mhz              3   4        &   5   4        Q   6   4        [   +              d   7        <         mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            P0                               T      _      S              xipg ahb per         "           7           G           okay          "  default state_100mhz state_200mhz              8        &   9        Q   :        Q              ׄ          p        <         spi@30bb0000                                       2nxp,imx8mm-fspi         P0                   ~fspi_base fspi_mmap                k           T                    xfspi_en fspi          	  disabled            <         dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         P0                               T            ]        xipg ahb                    imx/sdma/sdma-imx7d.bin         <   !      ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            P0           0         v          w          x          y         (  T                  u      t      v      "  xipg ahb ptp enet_clk_ref enet_out            Q      R      u      t      v         a      6      :      ;      9             sY@                                     ;        mac-address            <              okay            default            =      	  rgmii-id               >        <      mdio                                 ethernet-phy@0           2ethernet-phy-ieee802.3-c22          P                                                        <   >   leds                                 led@1           P                      lan         #keep          led@2           P                      lan         #keep                         bus@32c00000             2fsl,aips-bus simple-bus         P2   @                                   2  2   @          <      lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           P2             T      k                    xpix axi disp_axi            Q      k      U      V        a      (      A      8        n6 e                               ?         	  disabled            <      port       endpoint            1   @        <   A            dsi@32e10000             2fsl,imx8mm-mipi-dsim            P2             T                    xbus_clk sclk_mipi           Q              a      6                             ?         	  disabled            <      ports                                port@0          P       endpoint            1   A        <   @         port@1          P      endpoint            <                  csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         P2                               T              xmclk               ?          	  disabled            <      port       endpoint            1   B        <   E            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         P2               C   C   C   D   D      '  Abus csi-bridge lcdif mipi-dsi mipi-csi        P  T                                                                  o  xcsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     <   ?      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            P2                               Q              a      A        -@         T                                xpclk wrap phy axi              ?         	  disabled            <      ports                                port@0          P          port@1          P      endpoint            1   E        <   B               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          P2                    (           T              Q      X        a      @        T   F        Y   G                       okay            eotg          m           H        <         usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     P2            <   G      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          P2                    )           T              Q      X        a      @        T   I        Y   J                       okay            ehost                        K        <         usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     P2            <   J      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         P2             T   L        xref         Q      h                 a      :                      pciephy         F            okay                                <   O         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           P3             0                                                                        T              <   M      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      P3       3 @   @         ~gpmi-nand bch                             bch         T                    xgpmi_io gpmi_bch_apb               M            rx-tx         	  disabled            <         pcie@33800000            2fsl,imx8mm-pcie         P3   @               ~dbi config                                   Dpci                      0                                                                              z           msi         )           (                       ;                         }                            |                            {                            z           I           \            T         L      i        xpcie pcie_bus pcie_aux             N                            apps turnoff            T   O      	  mpcie-phy            okay            default            P        w   0              Q      i      g         沀        a      9      >        <      pcie@0,0            P                            Dpci                                      pcie@0,0            P                            Dpci                                      pcie@3,0            P                           Dpci                                      ethernet@0,0            P                                                                              <                     pcie-ep@33800000             2fsl,imx8mm-pcie-ep           P3           3     3             ~dbi addr_space dbi2 atu                                      dma         I           T            h      i        xpcie pcie_bus pcie_aux             N                            apps turnoff            T   O      	  mpcie-phy                                	  disabled            <         gpu@38000000             2vivante,gc          P8                                 T      Z                          xreg bus core shader         Q            *        a      *            /            Q        <         gpu@38008000             2vivante,gc          P8                               T      Z                    xreg bus core            Q            *        a      *            /            Q        <         video-codec@38300000             2nxp,imx8mm-vpu-g1           P80                               T                 R            <         video-codec@38310000             2nxp,imx8mq-vpu-g2           P81                               T                 R           <         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          P83                S   T   U   V        Abus g1 g2 h1            T                        	  xg1 g2 h1            Q      c      d        a      +      +        #F #F                    <   R      interrupt-controller@38800000            2arm,gic-v3          P8     8                          )                          	           <         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          P=@   @          xcore pll alt apb             T                  a      b           W        <      opp-table            2operating-points-v2         <   W   opp-25000000            R    }x@      opp-100000000           R           opp-750000000           R    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            P=   @                 b            memory@40000000         Dmemory          P    @                gpio-keys         
   2gpio-keys      key-user-pb         Luser_pb            X                       key-user-pb1x         
  Luser_pb1x                          ,                  key-erased          Lkey_erased                         ,                 key-eeprom-wp         
  Leeprom_wp                          ,                 key-tamper          Ltamper                         ,                 switch-hold         Lswitch_hold                        ,                    led-controller        
   2gpio-leds           default            Y   led-0           status                        #               #on        
  heartbeat         led-1           status                        #               #off          pcie0-refclk             2fixed-clock                              <   L      pps       	   2pps-gpio            default            Z           $               okay          regulator-3p3v           2regulator-fixed         s3P3V             2Z         2Z                 <   7      regulator-usb-otg1          default            [         2regulator-fixed         susb_otg1_vbus           }   $                         LK@         LK@        <   H      regulator-usb-otg2          default            \         2regulator-fixed         susb_otg2_vbus           }   $                         LK@         LK@        <   K      chosen        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         __symbols__         /cpus/idle-states/cpu-pd-wait           /cpus/cpu@0         	/cpus/cpu@1         	
/cpus/cpu@2         	/cpus/cpu@3         	/cpus/l2-cache0         	/opp-table          	+/clock-osc-32k          	3/clock-osc-24m          	;/clock-ext1         	D/clock-ext2         	M/clock-ext3         	V/clock-ext4       '  	_/thermal-zones/cpu-thermal/trips/trip0        '  	j/thermal-zones/cpu-thermal/trips/trip1          	t/usbphynop1         	/usbphynop2         	/soc@0          	/soc@0/bus@30000000       &  	/soc@0/bus@30000000/spba-bus@30000000         3  	/soc@0/bus@30000000/spba-bus@30000000/sai@30010000        3  	/soc@0/bus@30000000/spba-bus@30000000/sai@30020000        3  	/soc@0/bus@30000000/spba-bus@30000000/sai@30030000        3  	/soc@0/bus@30000000/spba-bus@30000000/sai@30050000        3  	/soc@0/bus@30000000/spba-bus@30000000/sai@30060000        @  	/soc@0/bus@30000000/spba-bus@30000000/audio-controller@30080000       5  	/soc@0/bus@30000000/spba-bus@30000000/spdif@30090000          "   M/soc@0/bus@30000000/gpio@30200000         "   S/soc@0/bus@30000000/gpio@30210000         "   Y/soc@0/bus@30000000/gpio@30220000         "   _/soc@0/bus@30000000/gpio@30230000         "  	/soc@0/bus@30000000/gpio@30240000         !  	/soc@0/bus@30000000/tmu@30260000          &  	/soc@0/bus@30000000/watchdog@30280000         &  	/soc@0/bus@30000000/watchdog@30290000         &  	/soc@0/bus@30000000/watchdog@302a0000         ,  	/soc@0/bus@30000000/dma-controller@302c0000       ,  	/soc@0/bus@30000000/dma-controller@302b0000       %  	/soc@0/bus@30000000/pinctrl@30330000          -  	/soc@0/bus@30000000/pinctrl@30330000/fec1grp          ,  	/soc@0/bus@30000000/pinctrl@30330000/gscgrp       -  
	/soc@0/bus@30000000/pinctrl@30330000/i2c1grp          1  
/soc@0/bus@30000000/pinctrl@30330000/i2c1gpiogrp          -  
(/soc@0/bus@30000000/pinctrl@30330000/i2c2grp          1  
5/soc@0/bus@30000000/pinctrl@30330000/i2c2gpiogrp          .  
G/soc@0/bus@30000000/pinctrl@30330000/uart2grp         /  
U/soc@0/bus@30000000/pinctrl@30330000/usdhc3grp        6  
d/soc@0/bus@30000000/pinctrl@30330000/usdhc3-100mhzgrp         6  
z/soc@0/bus@30000000/pinctrl@30330000/usdhc3-200mhzgrp         -  
/soc@0/bus@30000000/pinctrl@30330000/wdoggrp          ,  
/soc@0/bus@30000000/pinctrl@30330000/hoggrp       .  
/soc@0/bus@30000000/pinctrl@30330000/accelgrp         0  
/soc@0/bus@30000000/pinctrl@30330000/gpioledgrp       -  
/soc@0/bus@30000000/pinctrl@30330000/i2c3grp          .  
/soc@0/bus@30000000/pinctrl@30330000/pcie0grp         ,  
/soc@0/bus@30000000/pinctrl@30330000/ppsgrp       0  
/soc@0/bus@30000000/pinctrl@30330000/regusb1grp       0  /soc@0/bus@30000000/pinctrl@30330000/regusb2grp       -  /soc@0/bus@30000000/pinctrl@30330000/sai3grp          -  %/soc@0/bus@30000000/pinctrl@30330000/spi2grp          .  2/soc@0/bus@30000000/pinctrl@30330000/uart1grp         .  @/soc@0/bus@30000000/pinctrl@30330000/uart3grp         .  N/soc@0/bus@30000000/pinctrl@30330000/uart4grp         /  \/soc@0/bus@30000000/pinctrl@30330000/usdhc2grp        6  k/soc@0/bus@30000000/pinctrl@30330000/usdhc2-100mhzgrp         6  /soc@0/bus@30000000/pinctrl@30330000/usdhc2-200mhzgrp         3  /soc@0/bus@30000000/pinctrl@30330000/usdhc2gpiogrp        $  /soc@0/bus@30000000/syscon@30340000       #  /soc@0/bus@30000000/efuse@30350000        /  /soc@0/bus@30000000/efuse@30350000/unique-id@4        2  /soc@0/bus@30000000/efuse@30350000/speed-grade@10         ,  /soc@0/bus@30000000/efuse@30350000/calib@3c       2  /soc@0/bus@30000000/efuse@30350000/mac-address@90         .  /soc@0/bus@30000000/clock-controller@30360000         "  /soc@0/bus@30000000/snvs@30370000         .  /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         0  /soc@0/bus@30000000/snvs@30370000/snvs-powerkey       -  /soc@0/bus@30000000/snvs@30370000/snvs-lpgpr          .  /soc@0/bus@30000000/clock-controller@30380000         .  /soc@0/bus@30000000/reset-controller@30390000         !  /soc@0/bus@30000000/gpc@303a0000          4  "/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@0       4  ./soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@1       4  7/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@2       4  @/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@3       4  I/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@4       4  T/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@5       4  \/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@6       4  g/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@7       4  r/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@8       4  }/soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@9       5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@10          5  /soc@0/bus@30000000/gpc@303a0000/pgc/power-domain@11            /soc@0/bus@30400000       !  /soc@0/bus@30400000/pwm@30660000          !  /soc@0/bus@30400000/pwm@30670000          !  /soc@0/bus@30400000/pwm@30680000          !  /soc@0/bus@30400000/pwm@30690000          #  /soc@0/bus@30400000/timer@306a0000          /soc@0/bus@30800000       &  /soc@0/bus@30800000/spba-bus@30800000         3  /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3  /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3  /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        6  :/soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6  H/soc@0/bus@30800000/spba-bus@30800000/serial@30880000         6  
O/soc@0/bus@30800000/spba-bus@30800000/serial@30890000         $  /soc@0/bus@30800000/crypto@30900000       ,  /soc@0/bus@30800000/crypto@30900000/jr@1000       ,  /soc@0/bus@30800000/crypto@30900000/jr@2000       ,  /soc@0/bus@30800000/crypto@30900000/jr@3000       !   j/soc@0/bus@30800000/i2c@30a20000          (  
/soc@0/bus@30800000/i2c@30a20000/gsc@20       )  }/soc@0/bus@30800000/i2c@30a20000/gpio@23          (  /soc@0/bus@30800000/i2c@30a20000/rtc@68       :  /soc@0/bus@30800000/i2c@30a20000/pmic@69/regulators/buck3         !   o/soc@0/bus@30800000/i2c@30a30000          !   t/soc@0/bus@30800000/i2c@30a40000          !  /soc@0/bus@30800000/i2c@30a50000          $  V/soc@0/bus@30800000/serial@30a60000       %  	/soc@0/bus@30800000/mailbox@30aa0000          !  /soc@0/bus@30800000/mmc@30b40000          !  d/soc@0/bus@30800000/mmc@30b50000          !  
]/soc@0/bus@30800000/mmc@30b60000          !  $/soc@0/bus@30800000/spi@30bb0000          ,  ,/soc@0/bus@30800000/dma-controller@30bd0000       &  	/soc@0/bus@30800000/ethernet@30be0000         :  2/soc@0/bus@30800000/ethernet@30be0000/mdio/ethernet-phy@0           :/soc@0/bus@32c00000       #  @/soc@0/bus@32c00000/lcdif@32e00000        1  F/soc@0/bus@32c00000/lcdif@32e00000/port/endpoint          !  T/soc@0/bus@32c00000/dsi@32e10000          7  ]/soc@0/bus@32c00000/dsi@32e10000/ports/port@0/endpoint        7  m/soc@0/bus@32c00000/dsi@32e10000/ports/port@1/endpoint        !  z/soc@0/bus@32c00000/csi@32e20000          /  ~/soc@0/bus@32c00000/csi@32e20000/port/endpoint        &  /soc@0/bus@32c00000/blk-ctrl@32e28000         &  /soc@0/bus@32c00000/mipi-csi@32e30000         <  /soc@0/bus@32c00000/mipi-csi@32e30000/ports/port@1/endpoint       !  /soc@0/bus@32c00000/usb@32e40000          %  /soc@0/bus@32c00000/usbmisc@32e40200          !  /soc@0/bus@32c00000/usb@32e50000          %  /soc@0/bus@32c00000/usbmisc@32e50200          &  /soc@0/bus@32c00000/pcie-phy@32f00000           /soc@0/dma-controller@33000000           /soc@0/nand-controller@33002000         
/soc@0/pcie@33800000          =  /soc@0/pcie@33800000/pcie@0,0/pcie@0,0/pcie@3,0/ethernet@0,0            /soc@0/pcie-ep@33800000         /soc@0/gpu@38000000         /soc@0/gpu@38008000         k/soc@0/video-codec@38300000         v/soc@0/video-codec@38310000         /soc@0/blk-ctrl@38330000          %  /soc@0/interrupt-controller@38800000          "  /soc@0/memory-controller@3d400000         ,  /soc@0/memory-controller@3d400000/opp-table         */pcie0-refclk           7/regulator-3p3v         @/regulator-usb-otg1         R/regulator-usb-otg2          	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 ethernet1 usb0 usb1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status pinctrl-names pinctrl-0 assigned-clock-rates gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges gpio-line-names #thermal-sensor-cells fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency pinctrl-1 scl-gpios sda-gpios gw,mode label gw,voltage-divider-ohms pagesize regulator-name regulator-min-microvolt regulator-max-microvolt regulator-min-microamp regulator-max-microamp regulator-boot-on regulator-always-on st,drdy-int-pin #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-2 cd-gpios vmmc-supply non-removable reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-mode phy-handle ti,rx-internal-delay ti,tx-internal-delay tx-fifo-depth rx-fifo-depth color function default-state remote-endpoint power-domain-names phys fsl,usbmisc dr_mode over-current-active-low vbus-supply #index-cells disable-over-current reset-names fsl,refclk-pad-mode fsl,clkreq-unsupported dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names reset-gpio local-mac-address num-ib-windows num-ob-windows linux,code linux,default-trigger enable-active-high stdout-path cpu_pd_wait A53_0 A53_1 A53_2 A53_3 A53_L2 a53_opp_table osc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4 cpu_alert0 cpu_crit0 usbphynop1 usbphynop2 soc aips1 spba2 sai1 sai2 sai3 sai5 sai6 micfil spdif1 gpio5 tmu wdog1 wdog2 wdog3 sdma2 sdma3 iomuxc pinctrl_fec1 pinctrl_gsc pinctrl_i2c1 pinctrl_i2c1_gpio pinctrl_i2c2 pinctrl_i2c2_gpio pinctrl_uart2 pinctrl_usdhc3 pinctrl_usdhc3_100mhz pinctrl_usdhc3_200mhz pinctrl_wdog pinctrl_hog pinctrl_accel pinctrl_gpio_leds pinctrl_i2c3 pinctrl_pcie0 pinctrl_pps pinctrl_reg_usb1_en pinctrl_reg_usb2_en pinctrl_sai3 pinctrl_spi2 pinctrl_uart1 pinctrl_uart3 pinctrl_uart4 pinctrl_usdhc2 pinctrl_usdhc2_100mhz pinctrl_usdhc2_200mhz pinctrl_usdhc2_gpio gpr ocotp imx8mm_uid cpu_speed_grade tmu_calib fec_mac_address anatop snvs snvs_rtc snvs_pwrkey snvs_lpgpr clk src gpc pgc_hsiomix pgc_pcie pgc_otg1 pgc_otg2 pgc_gpumix pgc_gpu pgc_vpumix pgc_vpu_g1 pgc_vpu_g2 pgc_vpu_h1 pgc_dispmix pgc_mipi aips2 pwm1 pwm2 pwm3 pwm4 system_counter aips3 spba1 ecspi1 ecspi2 ecspi3 crypto sec_jr0 sec_jr1 sec_jr2 gsc_rtc buck3_reg i2c4 usdhc1 flexspi sdma1 ethphy0 aips4 lcdif lcdif_to_dsim mipi_dsi dsim_from_lcdif mipi_dsi_out csi csi_in disp_blk_ctrl mipi_csi imx8mm_mipi_csi_out usbotg1 usbmisc1 usbotg2 usbmisc2 pcie_phy dma_apbh gpmi eth1 pcie0_ep gpu_3d gpu_2d vpu_blk_ctrl gic ddrc ddrc_opp_table pcie0_refclk reg_3p3v reg_usb_otg1_vbus reg_usb_otg2_vbus gpio-hog output-high line-name output-low rts-gpios linux,rs485-enabled-at-boot-time 