     8     (              `                                                                   #   ,Kontron BL i.MX8MM OSM-S (N802X S)        8   2kontron,imx8mm-bl-osm-s kontron,imx8mm-osm-s fsl,imx8mm    aliases       &   =/soc@0/bus@30800000/ethernet@30be0000         "   G/soc@0/bus@30000000/gpio@30200000         "   M/soc@0/bus@30000000/gpio@30210000         "   S/soc@0/bus@30000000/gpio@30220000         "   Y/soc@0/bus@30000000/gpio@30230000         "   _/soc@0/bus@30000000/gpio@30240000         !   e/soc@0/bus@30800000/i2c@30a20000          !   j/soc@0/bus@30800000/i2c@30a30000          !   o/soc@0/bus@30800000/i2c@30a40000          !   t/soc@0/bus@30800000/i2c@30a50000          !   y/soc@0/bus@30800000/mmc@30b40000          !   ~/soc@0/bus@30800000/mmc@30b50000          !   /soc@0/bus@30800000/mmc@30b60000          6   /soc@0/bus@30800000/spba-bus@30800000/serial@30860000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30890000         6   /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         $   /soc@0/bus@30800000/serial@30a60000       3   /soc@0/bus@30800000/spba-bus@30800000/spi@30820000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30830000        3   /soc@0/bus@30800000/spba-bus@30800000/spi@30840000        (   /soc@0/bus@30800000/i2c@30a20000/rtc@52       .   /soc@0/bus@30000000/snvs@30370000/snvs-rtc-lp         3   /soc@0/bus@32c00000/usb@32e50000/usb1@1/ethernet@1        cpus                                 idle-states          psci       cpu-pd-wait          2arm,idle-state             3                                       !  
        2            cpu@0           :cpu          2arm,cortex-a53          F            J              Qpsci            _           l   @        ~                         @                                                    speed_grade                    	                      2   
      cpu@1           :cpu          2arm,cortex-a53          F           J              Qpsci            _           l   @        ~                         @                                                    	                      2         cpu@2           :cpu          2arm,cortex-a53          F           J              Qpsci            _           l   @        ~                         @                                                    	                      2         cpu@3           :cpu          2arm,cortex-a53          F           J              Qpsci            _           l   @        ~                         @                                                    	                      2         l2-cache0            2cache           #            /        a           n   @                   2            opp-table            2operating-points-v2          =        2      opp-1200000000          H    G         O P        ]              n I               opp-1600000000          H    _^         O ~        ]              n I               opp-1800000000          H    kI         O B@        ]              n I                  clock-osc-32k            2fixed-clock                                osc_32k         2         clock-osc-24m            2fixed-clock                     n6         osc_24m         2         clock-ext1           2fixed-clock                     k@      	  clk_ext1            2         clock-ext2           2fixed-clock                     k@      	  clk_ext2            2         clock-ext3           2fixed-clock                     k@      	  clk_ext3            2         clock-ext4           2fixed-clock                     k@      	  clk_ext4            2         psci             2arm,psci-1.0             smc       pmu          2arm,cortex-a53-pmu                        timer            2arm,armv8-timer       0                                
           z                thermal-zones      cpu-thermal                                    trips      trip0            L                  Apassive         2   	      trip1            s                	  Acritical             cooling-maps       map0            (   	      0  -   
                        usbphynop1          <             2usb-nop-xceiv           J              G              W      2      	  nmain_clk            z           2   W      usbphynop2          <             2usb-nop-xceiv           J              G              W      2      	  nmain_clk            z           2   [      soc@0            2fsl,imx8mm-soc simple-bus                                                >           @       @                         soc_unique_id      bus@30000000             2fsl,aips-bus simple-bus         F0    @                                   0   0    @     spba-bus@30000000            2fsl,spba-bus simple-bus                                  F0                  sai@30010000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    _            J                                  nbus mclk1 mclk2 mclk3                                               rx tx         	  disabled          sai@30020000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    `            J                                  nbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30030000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    2            J                                  nbus mclk1 mclk2 mclk3                                              rx tx         	  disabled          sai@30050000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    Z            J                                  nbus mclk1 mclk2 mclk3                               	               rx tx         	  disabled          sai@30060000                         2fsl,imx8mm-sai fsl,imx8mq-sai           F0                    Z            J                                  nbus mclk1 mclk2 mclk3                  
                            rx tx         	  disabled          audio-controller@30080000            2fsl,imx8mm-micfil           F0           0         m          n          ,          -         (  J                  &      '            )  nipg_clk ipg_clk_app pll8k pll11k clkext3                                rx                    	  disabled          spdif@30090000           2fsl,imx35-spdif         F0	                             P  J      ^            r                           ^                           :  ncore rxtx0 rxtx1 rxtx2 rxtx3 rxtx4 rxtx5 rxtx6 rxtx7 spba                                              rx tx         	  disabled             gpio@30200000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0                     @          A           J                                                                
           default                   ' GPIO_A_0  GPIO_A_1  GPIO_A_2 GPIO_A_3 GPIO_A_4 GPIO_A_5 GPIO_A_6 GPIO_A_7 DIO1_OUT DIO2_OUT USB_A_OC# CAM_MCK USB_B_OC# ETH_MDC ETH_MDIO ETH_A_(S)(R)(G)MII_TXD3 ETH_A_(S)(R)(G)MII_TXD2 ETH_A_(S)(R)(G)MII_TXD1 ETH_A_(S)(R)(G)MII_TXD0 ETH_A_(R)(G)MII_TX_EN(_ER) ETH_A_(R)(G)MII_TX_CLK ETH_A_(R)(G)MII_RX_DV(_ER) ETH_A_(R)(G)MII_RX_CLK ETH_A_(S)(R)(G)MII_RXD0 ETH_A_(S)(R)(G)MII_RXD1 ETH_A_(R)(G)MII_RXD2 ETH_A_(R)(G)MII_RXD3         2   4      gpio@30210000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0!                    B          C           J                                                                (         m  '            SDIO_A_CD# SDIO_A_CLK SDIO_A_CMD SDIO_A_D0 SDIO_A_D1 SDIO_A_D2 SDIO_A_D3 SDIO_A_PWR_EN SDIO_A_WP            2   E      gpio@30220000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0"                    D          E           J                                                                =           default                   'GPIO_C_5 GPIO_C_4 SDIO_B_CD# SDIO_B_D5 SDIO_B_D6 SDIO_B_D7 GPIO_C_0 GPIO_C_1 GPIO_C_2 GPIO_C_3 SDIO_B_D0 SDIO_B_D1 SDIO_B_D2 SDIO_B_D3  SDIO_B_D4 CARRIER_PWR_EN SDIO_B_CLK SDIO_B_CMD DIO3_OUT USB_B_EN DIO4_OUT PCIe_CLKREQ# PCIe_A_PERST# PCIe_WAKE# USB_A_EN            2   K      gpio@30230000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0#                    F          G           J                                                                W            default                 !  'GPIO_C_7  I2S_A_DATA_IN I2S_B_DATA_IN DIO1_IN BOOT_SEL0# BOOT_SEL1#    I2S_LRCLK I2S_BITCLK I2S_A_DATA_OUT I2S_B_DATA_OUT DIO2_IN DIO3_IN DIO4_IN SPI_A_/WP_(IO2) SPI_A_/HOLD_(IO3) GPIO_C_6 I2S_MCLK UART_A_TX UART_A_RX UART_A_CTS UART_A_RTS    PCIe_SM_ALERT UART_B_RTS UART_B_CTS UART_B_RX            2   6      gpio@30240000            2fsl,imx8mm-gpio fsl,imx35-gpio          F0$                    H          I           J                                                                w           'UART_B_TX SDIO_B_PWR_EN SDIO_B_WP PWM_2 PWM_1 PWM_0     SPI_A_SCK SPI_A_SDO_(IO1) SPI_A_SCK SPI_A_CS0#   I2C_A_SCL I2C_A_SDA I2C_B_SCL I2C_B_SDA PCIe_SMCLK PCIe_SMDAT SPI_B_SCK SPI_B_SDO SPI_B_SDI SPI_B_CS0# UART_CON_RX UART_CON_TX UART_C_RX UART_C_TX         2   '      tmu@30260000             2fsl,imx8mm-tmu          F0&             J                         calib           7            2         watchdog@30280000            2fsl,imx8mm-wdt fsl,imx21-wdt            F0(                    N           J              okay            default                     M      watchdog@30290000            2fsl,imx8mm-wdt fsl,imx21-wdt            F0)                    O           J            	  disabled          watchdog@302a0000            2fsl,imx8mm-wdt fsl,imx21-wdt            F0*                    
           J            	  disabled          dma-controller@302c0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         F0,                    g           J                    nipg ahb         b           mimx/sdma/sdma-imx7d.bin         2         dma-controller@302b0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         F0+                    "           J                    nipg ahb         b           mimx/sdma/sdma-imx7d.bin       pinctrl@30330000             2fsl,imx8mm-iomuxc           F03             2      csimckgrp              `                Y      ecspi1grp         `      d                   `                   \                    h                      2   &      ecspi2grp         `      t                   p                   l                   x                      2   (      ecspi2gpiogrp         0                                              2   )      ecspi3grp         `    <                  8                  4                  @                        2   .      enetrgmiigrp         P     h                    l                 p                    t                    x                    |                                                                                                                                                                                          2   N      enetrmiigrp            h                    l                 t             @     x                 V   |                 V                    V                    V                   V                    V                    V      gpio1grp               ,                    4                    <                    @                    D                    H                    L                    P                    T                    X                         2         gpio3grp                 \                   `                  t                  x                  |                                  @                  H                        2         gpio4grp              \                  l                  p                  t                                                                                                 2         i2c1grp       0      |            @                  @          2   2      i2c2grp       0                  @     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                   $                   (                   ,                   0                    4                      2   >      usdhc2grp                <                    @                   D                   H                   L                   P                   X            @     8             @          2   @      usdhc2-100mhzgrp                 <                    @                   D                   H                   L                   P                   X            @     8             @          2   B      usdhc2-200mhzgrp                 <                    @                   D                   H                   L                   P                   X            @     8             @          2   C      usdhc2gpiogrp                8                      2   A      usdhc3grp             8                  <                                                       $                  (                  0                     h                  l                  p                      2   F      usdhc3-100mhzgrp              8                  <                                                       $                  (                  0                     h                  l                  p                      2   H      usdhc3-200mhzgrp              8                  <                                                       $                  (                  0                     h                  l                  p                      2   I      usdhc3gpiogrp         0       d                  L                      2   G      wdoggrp            0                        2         cangrp              H                      2   *      usbhubgrp               L                      2   9         syscon@30340000          2fsl,imx8mm-iomuxc-gpr syscon            F04             2   M      efuse@30350000           2fsl,imx8mm-ocotp syscon         F05             J                                  unique-id@4         F              2         speed-grade@10          F              2         calib@3c            F   <           2         mac-address@90          F              2   L         clock-controller@30360000            2fsl,imx8mm-anatop           F06                      snvs@30370000         #   2fsl,sec-v4.0-mon syscon simple-mfd          F07             2      snvs-rtc-lp          2fsl,sec-v4.0-mon-rtc-lp                       4                                    J            	  nsnvs-rtc          snvs-powerkey            2fsl,sec-v4.0-pwrkey                                      J              nsnvs-pwrkey            t               	  disabled          snvs-lpgpr        +   2fsl,imx8mm-snvs-lpgpr fsl,imx7d-snvs-lpgpr           clock-controller@30380000            2fsl,imx8mm-ccm          F08                    U          V                      J                        4  nosc_32k osc_24m clk_ext1 clk_ext2 clk_ext3 clk_ext4       8  G      B            [      ^      `                     W      8      ,      /      8                    ׄ ׄ ,p          2         reset-controller@30390000         %   2fsl,imx8mm-src fsl,imx8mq-src syscon            F09                    Y                      2          gpc@303a0000             2fsl,imx8mm-gpc          F0:                    W                                       pgc                              power-domain@0                      F            J      X        G      X        W      @        2         power-domain@1                      F           z           J              2   _      power-domain@2                      F           2         power-domain@3                      F           2         power-domain@4                      F           J            Z        G      Y      Z        W      8      8        / ׄ         2   !      power-domain@5                      F            J      Z                                          z   !        2   a      power-domain@6                      F           J              G      T        W      8        2   c      power-domain@7                      F           2   d      power-domain@8                      F           2   e      power-domain@9                      F   	        2   f      power-domain@10                     F   
        J                    G      U      V        W      A      8        e          2   T      power-domain@11                     F           2   U               bus@30400000             2fsl,aips-bus simple-bus         F0@   @                                   0@  0@   @     pwm@30660000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0f                    Q           J                    nipg per                  	  disabled            default            "      pwm@30670000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0g                    R           J                    nipg per                    okay            default            #        2   m      pwm@30680000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0h                    S           J                    nipg per                  	  disabled            default            $      pwm@30690000             2fsl,imx8mm-pwm fsl,imx27-pwm            F0i                    T           J                    nipg per                  	  disabled          timer@306a0000           2nxp,sysctr-timer            F0j                    /           J           nper          bus@30800000             2fsl,aips-bus simple-bus         F0   @                                   0  0   @              spba-bus@30800000            2fsl,spba-bus simple-bus                                  F0                 spi@30820000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      F0                               J                    nipg per             %             %                 rx tx           okay            default            &           '   	      flash@0          2mxicy,mx25r1635f jedec,spi-nor          
Ĵ         F       partitions           2fixed-partitions                                partition@0         u-boot          F             partition@1e0000            env         F            partition@1f0000            env_redundant           F                     spi@30830000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      F0                                J                    nipg per             %            %                 rx tx           okay            default            (   )           '         can@0            2microchip,mcp251xfd         F            default            *        J   +        "   '              
         6   ,        A   -         spi@30840000          !   2fsl,imx8mm-ecspi fsl,imx51-ecspi                                      F0                    !           J                    nipg per             %            %                 rx tx           okay            default            .           '         eeram@0          2microchip,48l640            F            
1-          serial@30860000          2fsl,imx8mm-uart fsl,imx6q-uart          F0                               J                    nipg per             %             %                  rx tx           okay            default            /         P      serial@30880000          2fsl,imx8mm-uart fsl,imx6q-uart          F0                               J                    nipg per             %             %                  rx tx           okay            default            0      serial@30890000          2fsl,imx8mm-uart fsl,imx6q-uart          F0                               J                    nipg per             %             %                  rx tx           okay            default            1         `         P         crypto@30900000          2fsl,sec-v4.0                                     F0                 0                    [           J      ]      _      	  naclk ipg       jr@1000          2fsl,sec-v4.0-job-ring           F                     i         	  disabled          jr@2000          2fsl,sec-v4.0-job-ring           F                      j         jr@3000          2fsl,sec-v4.0-job-ring           F  0                   r            i2c@30a20000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      F0                    #           J              okay                     default            2   pmic@25          2nxp,pca9450a            F   %        default            3             4                  regulators     BUCK1           +0V8_VDD_SOC (BUCK1)             5          P                            5         P         5       BUCK2           +0V9_VDD_ARM (BUCK2)             P         ~                            5         ~         P        2         BUCK3           +0V9_VDD_DRAM&PU (BUCK3)             P         ~                        BUCK4           +3V3 (BUCK4)             2Z         2Z                          2   ,      BUCK5           +1V8 (BUCK5)             w@         w@                          2   ?      BUCK6           +1V1_NVCC_DRAM (BUCK6)                                            LDO1            +1V8_NVCC_SNVS (LDO1)            w@         w@                        LDO2            +0V8_VDD_SNVS (LDO2)             5                                  LDO3            +1V8_VDDA (LDO3)             w@         w@                        LDO4            +0V9_VDD_PHY (LDO4)                                           LDO5            NVCC_SD (LDO5)           w@         2Z        '   4               2   D            eeprom@50            2atmel,24c64         F   P        5           C            g          rtc@52           2microcrystal,rv3028         F   R        default            5        "   6               i2c@30a30000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      F0                    $           J            	  disabled            default            7      i2c@30a40000                                       2fsl,imx8mm-i2c fsl,imx21-i2c            F0                    %           J              okay            default            8   usb-hub@2c           2microchip,usb2514b          default            9        F   ,        L               `   '               i2c@30a50000             2fsl,imx8mm-i2c fsl,imx21-i2c                                      F0                    &           J            	  disabled            default            :      serial@30a60000          2fsl,imx8mm-uart fsl,imx6q-uart          F0                               J                    nipg per             %             %                  rx tx         	  disabled            default            ;      mailbox@30aa0000             2fsl,imx8mm-mu fsl,imx6sx-mu         F0                    X           J              l         mmc@30b40000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            F0                               J      _      S              nipg ahb per         x                                 okay          "  default state_100mhz state_200mhz              <           =           >           ,           ?               mmc@30b50000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            F0                               J      _      S              nipg ahb per         x                                 okay          "  default state_100mhz state_200mhz              @   A           B   A           C   A           ,           D           E            mmc@30b60000          !   2fsl,imx8mm-usdhc fsl,imx7d-usdhc            F0                               J      _      S              nipg ahb per         x                               	  disabled          "  default state_100mhz state_200mhz              F   G           H   G           I   G           J           D           K            spi@30bb0000                                       2nxp,imx8mm-fspi         F0                   fspi_base fspi_mmap                k           J                    nfspi_en fspi          	  disabled          dma-controller@30bd0000           2fsl,imx8mm-sdma fsl,imx8mq-sdma         F0                               J            ]        nipg ahb         b           mimx/sdma/sdma-imx7d.bin         2   %      ethernet@30be0000         -   2fsl,imx8mm-fec fsl,imx8mq-fec fsl,imx6sx-fec            F0           0         v          w          x          y         (  J                  u      t      v      "  nipg ahb ptp enet_clk_ref enet_out            G      R      u      t      v         W      6      :      ;      9             sY@                                     L        mac-address            M              okay            default            N      	  'rgmii-id            ;   O   mdio                                 ethernet-phy@0           2ethernet-phy-id4f51.e91b            F            F  '        `   4              2   O               bus@32c00000             2fsl,aips-bus simple-bus         F2   @                                   2  2   @     lcdif@32e00000        "   2fsl,imx8mm-lcdif fsl,imx6sx-lcdif           F2             J      k                    npix axi disp_axi            G      k      U      V        W      (      A      8        n6 e                            z   P         	  disabled       port       endpoint            V   Q        2   R            dsi@32e10000             2fsl,imx8mm-mipi-dsim            F2             J                    nbus_clk sclk_mipi           G              W      6                          z   P         	  disabled       ports                                port@0          F       endpoint            V   R        2   Q         port@1          F      endpoint                   csi@32e20000             2fsl,imx8mm-csi fsl,imx7-csi         F2                               J              nmclk            z   P          	  disabled       port       endpoint            V   S        2   V            blk-ctrl@32e28000             2fsl,imx8mm-disp-blk-ctrl syscon         F2            z   T   T   T   U   U      '  fbus csi-bridge lcdif mipi-dsi mipi-csi        P  J                                                                  o  ncsi-bridge-axi csi-bridge-apb csi-bridge-core lcdif-axi lcdif-apb lcdif-pix dsi-pclk dsi-ref csi-aclk csi-pclk                     2   P      mipi-csi@32e30000            2fsl,imx8mm-mipi-csi2            F2                               G              W      A        -@         J                                npclk wrap phy axi           z   P         	  disabled       ports                                port@0          F          port@1          F      endpoint            V   V        2   S               usb@32e40000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          F2                    (           J              G      X        W      @        y   W        ~   X            z           okay            default            Y           Z        otg       usbmisc@32e40200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     F2            2   X      usb@32e50000          +   2fsl,imx8mm-usb fsl,imx7d-usb fsl,imx27-usb          F2                    )           J              G      X        W      @        y   [        ~   \            z           okay            default            ]        host                                          usb1@1           2usb424,2514         F                                ethernet@1           2usbb95,772b         F                               usbmisc@32e50200          7   2fsl,imx8mm-usbmisc fsl,imx7d-usbmisc fsl,imx6q-usbmisc                     F2            2   \      pcie-phy@32f00000            2fsl,imx8mm-pcie-phy         F2             J      h        nref         G      h                 W      :                       pciephy         <          	  disabled            2   `         dma-controller@33000000       &   2fsl,imx7d-dma-apbh fsl,imx28-dma-apbh           F3             0                                                  b                      J              2   ^      nand-controller@33002000          )   2fsl,imx8mm-gpmi-nand fsl,imx7d-gpmi-nand                                      F3       3 @   @         gpmi-nand bch                             bch         J                    ngpmi_io gpmi_bch_apb               ^            rx-tx         	  disabled          pcie@33800000            2fsl,imx8mm-pcie         F3   @               dbi config                                   :pci                      0                                                                              z           msi                                           /                         }                            |                            {                            z           =           P            J            h      i        npcie pcie_bus pcie_aux          z   _                              apps turnoff            y   `      	  apcie-phy          	  disabled          pcie-ep@33800000             2fsl,imx8mm-pcie-ep           F3           3     3             dbi addr_space dbi2 atu                                      dma         =           J            h      i        npcie pcie_bus pcie_aux          z   _                              apps turnoff            y   `      	  apcie-phy            k           z         	  disabled          gpu@38000000             2vivante,gc          F8                                 J      Z                          nreg bus core shader         G            *        W      *            /         z   a      gpu@38008000             2vivante,gc          F8                               J      Z                    nreg bus core            G            *        W      *            /         z   a      video-codec@38300000             2nxp,imx8mm-vpu-g1           F80                               J              z   b          video-codec@38310000             2nxp,imx8mq-vpu-g2           F81                               J              z   b         blk-ctrl@38330000            2fsl,imx8mm-vpu-blk-ctrl syscon          F83             z   c   d   e   f        fbus g1 g2 h1            J                        	  ng1 g2 h1            G      c      d        W      +      +        #F #F                    2   b      interrupt-controller@38800000            2arm,gic-v3          F8     8                                                    	           2         memory-controller@3d400000           2fsl,imx8mm-ddrc fsl,imx8m-ddrc          F=@   @          ncore pll alt apb             J                  a      b           g   opp-table            2operating-points-v2         2   g   opp-100000000           H           opp-750000000           H    ,            ddr-pmu@3d800000          %   2fsl,imx8mm-ddr-pmu fsl,imx8m-ddr-pmu            F=   @                 b            memory@40000000         :memory          F    @                chosen        6  /soc@0/bus@30800000/spba-bus@30800000/serial@30880000         regulator-usb1-vbus          2regulator-fixed         default            h                    K                LK@         LK@        VBUS_USB_A          2   Z      regulator-usb2-vbus          2regulator-fixed         default            i                    K                LK@         LK@        VBUS_USB_B        	  disabled          regulator-usdhc2-vcc             2regulator-fixed         default            j                    E                2Z         2Z        VCC_SDIO_A        	  disabled          regulator-usdhc3-vcc             2regulator-fixed         default            k                    '                2Z         2Z        VCC_SDIO_B        	  disabled            2   J      regulator-vdd-carrier            2regulator-fixed         default            l           K                                          VDD_CARRIER    regulator-state-standby                regulator-state-mem                regulator-state-disk                      clock-osc-can            2fixed-clock                     bZ         osc-can         2   +      leds          
   2gpio-leds      led1            led1               4            
  heartbeat         led2            led2               K            led3            led3               K               pwm-beeper           2pwm-beeper             m                regulator-5v             2regulator-fixed                   LK@         LK@        vdd-5v          2   -         	interrupt-parent #address-cells #size-cells model compatible ethernet0 gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 mmc0 mmc1 mmc2 serial0 serial1 serial2 serial3 spi0 spi1 spi2 rtc0 rtc1 ethernet1 entry-method arm,psci-suspend-param local-timer-stop entry-latency-us exit-latency-us min-residency-us phandle device_type reg clocks enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 nvmem-cells nvmem-cell-names cpu-idle-states #cooling-cells cpu-supply cache-level cache-unified opp-shared opp-hz opp-microvolt opp-supported-hw clock-latency-ns opp-suspend #clock-cells clock-frequency clock-output-names interrupts arm,no-tick-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device #phy-cells assigned-clocks assigned-clock-parents clock-names power-domains ranges dma-ranges #sound-dai-cells dmas dma-names status gpio-controller #gpio-cells interrupt-controller #interrupt-cells gpio-ranges pinctrl-names pinctrl-0 gpio-line-names #thermal-sensor-cells fsl,ext-reset-output #dma-cells fsl,sdma-ram-script-name fsl,pins regmap offset linux,keycode wakeup-source assigned-clock-rates #reset-cells #power-domain-cells resets #pwm-cells cs-gpios spi-max-frequency label interrupts-extended vdd-supply xceiver-supply uart-has-rtscts linux,rs485-enabled-at-boot-time regulator-name regulator-min-microvolt regulator-max-microvolt regulator-boot-on regulator-always-on regulator-ramp-delay nxp,dvs-run-voltage nxp,dvs-standby-voltage sd-vsel-gpios address-width pagesize non-removable-ports reset-gpios #mbox-cells fsl,tuning-start-tap fsl,tuning-step bus-width pinctrl-1 pinctrl-2 vmmc-supply vqmmc-supply non-removable cd-gpios reg-names fsl,num-tx-queues fsl,num-rx-queues fsl,stop-mode phy-connection-type phy-handle reset-assert-us remote-endpoint power-domain-names phys fsl,usbmisc vbus-supply dr_mode #index-cells disable-over-current local-mac-address reset-names dma-channels interrupt-names bus-range num-lanes num-viewport interrupt-map-mask interrupt-map fsl,max-link-speed linux,pci-domain phy-names num-ib-windows num-ob-windows stdout-path enable-active-high gpio regulator-on-in-suspend regulator-off-in-suspend linux,default-trigger pwms 