    8 y   (            K y\                             )    rockchip,rk3588-evb2-v10 rockchip,rk3588                                     +            7Rockchip RK3588 EVB2 V10 Board     aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /mmc@fe2e0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0            cpu           arm,cortex-a55                      
psci                      +   
            2           B           O   @        a           n           {   @                                                                        cpu@100          cpu           arm,cortex-a55                     
psci                      +   
            2           B           O   @        a           n           {   @                                                                        cpu@200          cpu           arm,cortex-a55                     
psci                      +   
            2           B           O   @        a           n           {   @                                                                        cpu@300          cpu           arm,cortex-a55                     
psci                      +   
            2           B           O   @        a           n           {   @                                                                        cpu@400          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                       cpu@500          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                       cpu@600          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                       cpu@700          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                 	      idle-states         psci       cpu-sleep             arm,idle-state                              %   d        6   x        F                      l2-cache-l0           cache           D           Q   @        c           W            c                            l2-cache-l1           cache           D           Q   @        c           W            c                            l2-cache-l2           cache           D           Q   @        c           W            c                            l2-cache-l3           cache           D           Q   @        c           W            c                            l2-cache-b0           cache           D           Q   @        c           W            c                            l2-cache-b1           cache           D           Q   @        c           W            c                            l2-cache-b2           cache           D           Q   @        c           W            c                            l2-cache-b3           cache           D           Q   @        c           W            c                               l3-cache              cache           D 0          Q   @        c           W            c                 display-subsystem             rockchip,display-subsystem          q         firmware       scmi              arm,scmi-smc            w                                  +       protocol@14                                  
      protocol@16                                              hdmi0-sound           simple-audio-card           i2s                    hdmi0         	  disabled       simple-audio-card,codec                  simple-audio-card,cpu                       pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                            psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        spll                      timer             arm,armv8-timer       P                                               
                          %  +sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         xin24m                    clock-2           fixed-clock                    xin32k                    reserved-memory                      +            ;   shmem@10f000              arm,scmi-shmem                                B                 hdmi-receiver-cma             shared-dma-pool         I                    J    
           V                B      	  disabled                       gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             `   
           p         +                       core coregroup stacks                   0         \              ]              ^               +job mmu gpu                       okay                           !           "                 usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                +                       ref_clk suspend_clk bus_clk         otg            #   $           usb2-phy usb3-phy         
  utmi_wide                              R                                    &         G         h      	  disabled          usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      +                  %           &        usb                       okay          usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      +                  %           &        usb                       okay          usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      +                  '           (        usb                       okay          usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      +                  '           (        usb                       okay          usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  +     j     i     h     k     r      &  ref_clk suspend_clk bus_clk utmi pipe           host               )         	  usb3-phy          
  utmi_wide                4                  &         G         h               	  disabled          iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               +eventq gerror priq cmdq-sync                                iommu@fcb00000            arm,smmu-v3                             @        }                                       {               +eventq gerror priq cmdq-sync                     	  disabled          syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   |      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   m      syscon@fd5e8000       !    rockchip,rk3588-dcphy-grf syscon                ^       @                  syscon@fd5ec000       !    rockchip,rk3588-dcphy-grf syscon                ^       @                  syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    n      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon              Z`                 +                      syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon              Z       @         +                o      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    +      syscon@fd5b4000       #    rockchip,rk3588-csidphy-grf syscon              [@                         syscon@fd5b5000       #    rockchip,rk3588-csidphy-grf syscon              [P                         syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                        syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                        syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    +             phyclk          usb480m_phy0                                      m             phy apb         okay                  otg-port                        okay               *           #            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@8000              rockchip,rk3588-usb2phy                                   +             phyclk          usb480m_phy2                                      o             phy apb         okay               %   host-port                       okay               *           &            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +      usb2phy@c000              rockchip,rk3588-usb2phy                                   +             phyclk          usb480m_phy3                                      p              phy apb         okay               '   host-port                       okay               *           (            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                         sram@fd600000         
    mmio-sram               `                 ;        `                          +         clock-controller@fd7c0000             rockchip,rk3588-cru             |                `                                                                         ]      q                 @  pA .  2Fq )׫ׄ e /  ׄ   e Zр            +                                       i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               +     t     s      	  i2c pclk               ,        default                      +          	  disabled          serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               +                  baudclk apb_pclk               -      -           tx rx              .        default                             	  disabled          pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +                	  pwm pclk               /        default                  	  disabled          pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +                	  pwm pclk               0        default                  	  disabled          pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +                	  pwm pclk               1        default                  	  disabled          pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +                	  pwm pclk               2        default                  	  disabled          power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  p   power-controller          !    rockchip,rk3588-power-controller                        )            +            okay                  power-domain@8                     )                         +       power-domain@9             	         +     !     #     "             =   3   4   5        )                         +       power-domain@10            
        +     !     #     "        =   6        )          power-domain@11                    +     !     #     "        =   7        )                power-domain@12                    +                       =   8   9   :   ;        )            D   !      power-domain@13                                 +            )       power-domain@14                  (  +                                 =   <        )          power-domain@15                     +                            =   =        )          power-domain@16                    +                  =   >   ?   @                     +            )       power-domain@17                     +                            =   A   B   C        )                power-domain@21                    +                                                                                                   =   D   E   F   G   H   I   J   K                     +            )       power-domain@23                    +      C      A             =   L        )          power-domain@14                     +                            =   <        )          power-domain@15                    +                       =   =        )          power-domain@22                    +                  =   M        )             power-domain@24                    +     [     Z     ]        =   N   O                     +            )       power-domain@25                  8  +                                   Z        =   P        )             power-domain@26                  8  +                                   Q        =   Q   R        )          power-domain@27                  0  +                                      =   S   T   U   V                     +            )       power-domain@28                     +                            =   W   X        )          power-domain@29                  (  +                                 =   Y   Z        )             power-domain@30                    +     z     {        =   [        )          power-domain@31                  @  +     W                                           =   \   ]   ^   _        )          power-domain@33            !        +     W     Z     [        )          power-domain@34            "        +     W     Z     [        )          power-domain@37            %        +          2        =   `        )          power-domain@38            &        +      4      5        )          power-domain@40            (        =   a        )                npu@fdab0000              rockchip,rk3588-rknn-core         0                               0                Rpc cna core                n                +              
        #        aclk hclk npu pclk          `   
           p                           srst_a srst_h                 	        \   b      	  disabled          iommu@fdab9000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                                                 n               +                   aclk iface                            	      	  disabled               b      npu@fdac0000              rockchip,rk3588-rknn-core         0                               0                Rpc cna core                o                +             
        #        aclk hclk npu pclk          `   
           p                             srst_a srst_h                 
        \   c      	  disabled          iommu@fdaca000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                                    o               +                  aclk iface                            
      	  disabled               c      npu@fdad0000              rockchip,rk3588-rknn-core         0                               0                Rpc cna core                p                +             
        #        aclk hclk npu pclk          `   
           p                             srst_a srst_h                         \   d      	  disabled          iommu@fdada000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                                    p               +                  aclk iface                                  	  disabled               d      video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                      w               +vdpu            +                
  aclk hclk           \   e                    iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               v               aclk iface          +                                               e      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                                    t               +                       aclk hclk sclk               r     q     p        core axi ahb                        video-codec@fdba0000              rockchip,rk3588-vepu121                                     z               +                
  aclk hclk           \   f                    iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               y               +                  aclk iface                                       f      video-codec@fdba4000              rockchip,rk3588-vepu121             @                       |               +                
  aclk hclk           \   g                    iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu             H        @               {               +                  aclk iface                                       g      video-codec@fdba8000              rockchip,rk3588-vepu121                                    ~               +                
  aclk hclk           \   h                    iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               }               +                  aclk iface                                       h      video-codec@fdbac000              rockchip,rk3588-vepu121                                                   +                
  aclk hclk           \   i                    iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @                              +                  aclk iface                                       i      video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               +vdpu            `      A      C        pׄ ׄ         +      A      C      
  aclk hclk                                                     vop@fdd90000              rockchip,rk3588-vop                      B     P                Rvop gamma-lut                               @  +     ]     \     a     b     c     d     [   j   k      Q  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop pll_hdmiphy0 pll_hdmiphy1            \   l                         m        c   n        t   o           p        okay       ports                        +                  port@0                       +                   endpoint@2                        q           z         port@1                       +                     port@2                       +                     port@3                       +                           iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  +     ]     \        aclk iface                                    okay               l      spdif-tx@fddb0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                                            `           
  mclk hclk           +                  tx             r                                                         	  disabled          i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    +                       mclk_tx mclk_rx hclk            `                              s            tx                                     tx-m                      	  disabled          spdif-tx@fdde0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                                            `     A      
  mclk hclk           +     D     @        tx             r                                                         	  disabled          i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    +     4     4     5        mclk_tx mclk_rx hclk            `     1                         s           tx                                     tx-m                      	  disabled                     i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   +     0     0     ,        mclk_tx mclk_rx hclk            `     -                         s           rx                                     rx-m                      	  disabled          dsi@fde20000              rockchip,rk3588-mipi-dsi2                                                      +     e     g      	  pclk sys                         apb                          t   
        dcphy              n      	  disabled       ports                        +       port@0                    port@1                         dsi@fde30000              rockchip,rk3588-mipi-dsi2                                                      +     f     h      	  pclk sys                         apb                          u   
        dcphy              n      	  disabled       ports                        +       port@0                    port@1                         dp@fde50000           rockchip,rk3588-dp                      @                               `             p $       (  +                                 apb aux hdcp i2s spdif             $                                                	  disabled       ports                        +       port@0                    port@1                         hdmi@fde80000             rockchip,rk3588-dw-hdmi-qp                             0  +                    4     R             pclk earc ref aud hdp hclk_vo1        P                                                                h               +avp cec earc main hpd              j        default            v   w   x   y                                0        ref hdp            m           o                    okay                  ports                        +       port@0                 endpoint               z           q         port@1                endpoint               {          '               edp@fdec0000              rockchip,rk3588-edp                              +                   dp pclk                                  j        dp                                          dp apb             o      	  disabled       ports                        +       port@0                    port@1                         qos@fdf35000              rockchip,rk3588-qos syscon              P                    8      qos@fdf35200              rockchip,rk3588-qos syscon              R                    9      qos@fdf35400              rockchip,rk3588-qos syscon              T                    :      qos@fdf35600              rockchip,rk3588-qos syscon              V                    ;      qos@fdf36000              rockchip,rk3588-qos syscon              `                    [      qos@fdf39000              rockchip,rk3588-qos syscon                                  `      qos@fdf3d800              rockchip,rk3588-qos syscon                                  a      qos@fdf3e000              rockchip,rk3588-qos syscon                                  ]      qos@fdf3e200              rockchip,rk3588-qos syscon                                  \      qos@fdf3e400              rockchip,rk3588-qos syscon                                  ^      qos@fdf3e600              rockchip,rk3588-qos syscon                                  _      qos@fdf40000              rockchip,rk3588-qos syscon                                   Y      qos@fdf40200              rockchip,rk3588-qos syscon                                  Z      qos@fdf40400              rockchip,rk3588-qos syscon                                  S      qos@fdf40500              rockchip,rk3588-qos syscon                                  T      qos@fdf40600              rockchip,rk3588-qos syscon                                  U      qos@fdf40800              rockchip,rk3588-qos syscon                                  V      qos@fdf41000              rockchip,rk3588-qos syscon                                  W      qos@fdf41100              rockchip,rk3588-qos syscon                                  X      qos@fdf60000              rockchip,rk3588-qos syscon                                   >      qos@fdf60200              rockchip,rk3588-qos syscon                                  ?      qos@fdf60400              rockchip,rk3588-qos syscon                                  @      qos@fdf61000              rockchip,rk3588-qos syscon                                  A      qos@fdf61200              rockchip,rk3588-qos syscon                                  B      qos@fdf61400              rockchip,rk3588-qos syscon                                  C      qos@fdf62000              rockchip,rk3588-qos syscon                                   <      qos@fdf63000              rockchip,rk3588-qos syscon              0                    =      qos@fdf64000              rockchip,rk3588-qos syscon              @                    L      qos@fdf66000              rockchip,rk3588-qos syscon              `                    D      qos@fdf66200              rockchip,rk3588-qos syscon              b                    E      qos@fdf66400              rockchip,rk3588-qos syscon              d                    F      qos@fdf66600              rockchip,rk3588-qos syscon              f                    G      qos@fdf66800              rockchip,rk3588-qos syscon              h                    H      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    I      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    J      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    K      qos@fdf67000              rockchip,rk3588-qos syscon              p                    M      qos@fdf67200              rockchip,rk3588-qos syscon              r               qos@fdf70000              rockchip,rk3588-qos syscon                                   6      qos@fdf71000              rockchip,rk3588-qos syscon                                  7      qos@fdf72000              rockchip,rk3588-qos syscon                                   3      qos@fdf72200              rockchip,rk3588-qos syscon              "                    4      qos@fdf72400              rockchip,rk3588-qos syscon              $                    5      qos@fdf80000              rockchip,rk3588-qos syscon                                   P      qos@fdf81000              rockchip,rk3588-qos syscon                                  Q      qos@fdf81200              rockchip,rk3588-qos syscon                                  R      qos@fdf82000              rockchip,rk3588-qos syscon                                   N      qos@fdf82200              rockchip,rk3588-qos syscon              "                    O      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :                  |      pcie@fe180000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  +     C     H     >     M     R           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                +sys pmc msg legacy err                                          `                    }                      }                     }                     }                      '           6  0    ~  0            >  0      0            H              )         	  pcie-phy                  "      T  ;                                                     @      	       @         0     
@       @                                     Rdbi apb config               )     .      	  pwr pipe                         +         	  disabled       legacy-interrupt-controller          R                                                                     }         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  +     D     I     ?     N     S     s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                +sys pmc msg legacy err                                          `                                                                                                          '           6  @    ~  @            >  @      @            H                       	  pcie-phy                  "      T  ;                                                     @      
        @         0     
A        @                                     Rdbi apb config               *     /      	  pwr pipe                         +         	  disabled       legacy-interrupt-controller          R                                                                              ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     +macirq eth_wake_irq       (  +     6     7     Y     ^     5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref               !             $      
  stmmaceth              m        g   +        x                                                 	  disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                           rx-queues-config                             queue0        queue1           tx-queues-config                             queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  +     b     _     e     T     o        sata pmalive rxoob ref asic                                 +          	  disabled       sata-port@0                     0 @                      	  sata-phy            =            L             sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  +     d     a     g     V     q        sata pmalive rxoob ref asic                                 +          	  disabled       sata-port@0                     0 @             )         	  sata-phy            =            L             spi@fe2b0000              rockchip,sfc                +        @                               +     /     0        clk_sfc hclk_sfc                         +          	  disabled          mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                +   
      
   	                  biu ciu ciu-drive ciu-sample            [           f         default                                   (      	  disabled          mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                +                            biu ciu ciu-drive ciu-sample            [           fр        default                          %        okay                         +            t            ~                                                                             wifi@1            brcm,bcm4329-fmac                                              
  +host-wake                      default          mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       `     -     .     ,        p n6        (  +     ,     *     +     -     .        core bus axi block timer            f                                default       (                                   core bus axi block timer            okay            t                                                       rng@fe378000              rockchip,rk3588-rng             7                                     +   
                 0      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       +      +      /      (        mclk_tx mclk_rx hclk            `      )      -                               -       -           tx rx                 &              *      +      
  tx-m rx-m            "        default       (                                                  	  disabled          i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       +     y     }     u        mclk_tx mclk_rx hclk               -      -           tx rx                ^     _      
  tx-m rx-m            "        default       (                                                  	  disabled          i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       +                    i2s_clk i2s_hclk            `                               r       r           tx rx                 &        default                                       	  disabled          i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       +      %              i2s_clk i2s_hclk            `      "                         r      r           tx rx                 &        default                                       	  disabled          spdif-tx@fe4e0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             N                               `      7      
  mclk hclk           +      9      6        tx             -                                            default               &                  	  disabled          spdif-tx@fe4f0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             O                               `      =      
  mclk hclk           +      ?      <        tx             r                                            default               &                  	  disabled          interrupt-controller@fe600000             arm,gic-v3               `             h                       	                R         =        M    a          W     8         b         ;                                +                 msi-controller@fe640000           arm,gic-v3-its              d                  =         b        q              ~      msi-controller@fe660000           arm,gic-v3-its              f                  =         b        q                   ppi-partitions     interrupt-partition-0           |                             interrupt-partition-1           |            	                       dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                        +      n      	  apb_pclk                          -      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                        +      o      	  apb_pclk                          r      i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            {      	  i2c pclk                  >                          default                      +          	  disabled          i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            |      	  i2c pclk                  ?                          default                      +            okay       rtc@51            haoyu,hym8563              Q                    hym8563                                   default                               (         i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            }      	  i2c pclk                  @                          default                      +          	  disabled          i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +            ~      	  i2c pclk                  A                          default                      +          	  disabled          i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  B                          default                      +          	  disabled          timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               +      T      W        pclk timer        watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              +      d      c      
  tclk pclk                 ;             spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               +                    spiclk apb_pclk            -      -           tx rx                                       default                      +          	  disabled          spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               +                    spiclk apb_pclk            -      -           tx rx                                       default                      +          	  disabled          spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               +                    spiclk apb_pclk            r      r           tx rx                                       default                      +            okay            `              p    pmic@0            rockchip,rk806                                                                                        default          B@                 	           	           	           	&           	2           	>           	J           	V           	b           	n           	{           	           	           	           	      dvs1-null-pins          	gpio_pwrctrl1         	  	pin_fun0                     dvs2-null-pins          	gpio_pwrctrl2         	  	pin_fun0                     dvs3-null-pins          	gpio_pwrctrl3         	  	pin_fun0                     regulators     dcdc-reg1            	         	        	 dp        
 ~        
  0        
4vdd_gpu_s0          
C          
_   "        
v  '           !   regulator-state-mem          
         dcdc-reg2            	         	        	 dp        
 ~        
  0        
4vdd_npu_s0     regulator-state-mem          
         dcdc-reg3            	         	        	 
L        
 q        
  0        
4vdd_log_s0     regulator-state-mem          
        
 q         dcdc-reg4            	         	        	 dp        
 ~        
  0        
4vdd_vdenc_s0       regulator-state-mem          
         dcdc-reg5            	         	        	 
L        
 ~        
  0        
C          
4vdd_gpu_mem_s0          
_   !        
v  '           "   regulator-state-mem          
         dcdc-reg6            	         	        	 
L        
 ~        
  0        
4vdd_npu_mem_s0     regulator-state-mem          
         dcdc-reg7            	         	        	         
         
  0        
4vdd_2v0_pldo_s3               regulator-state-mem          
        
          dcdc-reg8            	         	        	 
L        
 ~        
  0        
4vdd_vdenc_mem_s0       regulator-state-mem          
         dcdc-reg9            	         	        
4vdd2_ddr_s3    regulator-state-mem          
         dcdc-reg10           	         	        	         
         
  0        
4vcc_1v1_nldo_s3               regulator-state-mem          
        
          pldo-reg1            	         	        	 w@        
 w@        
  0        
4avcc_1v8_s0    regulator-state-mem          
         pldo-reg2            	         	        	 w@        
 w@        
  0        
4vdd1_1v8_ddr_s3    regulator-state-mem          
        
 w@         pldo-reg3            	         	        	 w@        
 w@        
  0        
4avcc_1v8_codec_s0      regulator-state-mem          
         pldo-reg4            	         	        	 2Z        
 2Z        
  0        
4vcc_3v3_s3     regulator-state-mem          
        
 2Z         pldo-reg5            	         	        	 w@        
 2Z        
  0        
4vccio_sd_s0    regulator-state-mem          
         pldo-reg6            	         	        	 w@        
 w@        
  0        
4vccio_1v8_s3       regulator-state-mem          
        
 w@         nldo-reg1            	         	        	 q        
 q        
  0        
4vdd_0v75_s3    regulator-state-mem          
        
 q         nldo-reg2            	         	        	         
         
4vdd2l_0v9_ddr_s3       regulator-state-mem          
        
          nldo-reg3            	         	        	 q        
 q        
4vdd_0v75_hdmi_edp_s0       regulator-state-mem          
         nldo-reg4            	         	        	 q        
 q        
4avdd_0v75_s0       regulator-state-mem          
         nldo-reg5            	         	        	 P        
 P        
4vdd_0v85_s0    regulator-state-mem          
               pmic@1            rockchip,rk806                                                                                    default          B@        	           	           	           	&           	2           	>           	J           	V           	b           	n           	{           	           	           	           	      dvs1-null-pins          	gpio_pwrctrl1         	  	pin_fun0                     dvs2-null-pins          	gpio_pwrctrl2         	  	pin_fun0                     dvs3-null-pins          	gpio_pwrctrl3         	  	pin_fun0                     regulators     dcdc-reg1            	         	        
_           
v  '        	 dp        
         
  0        
4vdd_cpu_big1_s0               regulator-state-mem          
         dcdc-reg2            	         	        
_           
v  '        	 dp        
         
  0        
4vdd_cpu_big0_s0               regulator-state-mem          
         dcdc-reg3            	         	        
_           
v  '        	 dp        
 ~        
  0        
4vdd_cpu_lit_s0                regulator-state-mem          
         dcdc-reg4            	         	        	 2Z        
 2Z        
  0        
4vcc_3v3_s0     regulator-state-mem          
         dcdc-reg5            	         	        
_           
v  '        	 
L        
         
  0        
4vdd_cpu_big1_mem_s0               regulator-state-mem          
         dcdc-reg6            	         	        
_           
v  '        	 
L        
         
  0        
4vdd_cpu_big0_mem_s0               regulator-state-mem          
         dcdc-reg7            	         	        	 w@        
 w@        
  0        
4vcc_1v8_s0     regulator-state-mem          
         dcdc-reg8            	         	        
_           
v  '        	 
L        
 ~        
  0        
4vdd_cpu_lit_mem_s0                regulator-state-mem          
         dcdc-reg9            	         	        
4vddq_ddr_s0    regulator-state-mem          
         dcdc-reg10           	         	        	 
L        
         
  0        
4vdd_ddr_s0     regulator-state-mem          
         pldo-reg1            	         	        	 w@        
 w@        
  0        
4vcc_1v8_cam_s0     regulator-state-mem          
         pldo-reg2            	         	        	 w@        
 w@        
  0        
4avdd1v8_ddr_pll_s0     regulator-state-mem          
         pldo-reg3            	         	        	 w@        
 w@        
  0        
4vdd_1v8_pll_s0     regulator-state-mem          
         pldo-reg4            	         	        	 2Z        
 2Z        
  0        
4vcc_3v3_sd_s0      regulator-state-mem          
         pldo-reg5            	         	        	 *        
 *        
  0        
4vcc_2v8_cam_s0     regulator-state-mem          
         pldo-reg6            	         	        	 w@        
 w@      	  
4pldo6_s3       regulator-state-mem          
        
 w@         nldo-reg1            	         	        	 q        
 q        
  0        
4vdd_0v75_pll_s0    regulator-state-mem          
         nldo-reg2            	         	        	 P        
 P        
4vdd_ddr_pll_s0     regulator-state-mem          
         nldo-reg3            	         	        	 P        
 P        
  0        
4avdd_0v85_s0       regulator-state-mem          
         nldo-reg4            	         	        	 O        
 O        
  0        
4avdd_1v2_cam_s0    regulator-state-mem          
         nldo-reg5            	         	        	 O        
 O        
  0        
4avdd_1v2_s0    regulator-state-mem          
                  spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               +                    spiclk apb_pclk            r      r           tx rx                                       default                      +          	  disabled          serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               +                    baudclk apb_pclk               -      -   	        tx rx                      default                             	  disabled          serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               +                    baudclk apb_pclk               -   
   -           tx rx                      default                               okay          serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               +                    baudclk apb_pclk               -      -           tx rx                      default                             	  disabled          serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               +                    baudclk apb_pclk               r   	   r   
        tx rx                      default                             	  disabled          serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               +                    baudclk apb_pclk               r      r           tx rx                      default                             	  disabled          serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               +                    baudclk apb_pclk               r      r           tx rx                      default                             	  disabled          serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               +                    baudclk apb_pclk               s      s           tx rx                      default                             	  disabled          serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               +                    baudclk apb_pclk               s   	   s   
        tx rx                      default                             	  disabled          serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               +                    baudclk apb_pclk               s      s           tx rx                      default                             	  disabled          pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      L      K      	  pwm pclk                       default                  	  disabled          pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +      L      K      	  pwm pclk                       default                  	  disabled          pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      L      K      	  pwm pclk                       default                  	  disabled          pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +      L      K      	  pwm pclk                       default                  	  disabled          pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      O      N      	  pwm pclk                       default                  	  disabled          pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +      O      N      	  pwm pclk                       default                  	  disabled          pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      O      N      	  pwm pclk                       default                  	  disabled          pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +      O      N      	  pwm pclk                       default                  	  disabled          pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      R      Q      	  pwm pclk                       default                  	  disabled          pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +      R      Q      	  pwm pclk                       default                  	  disabled          pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +      R      Q      	  pwm pclk                       default                  	  disabled          pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +      R      Q      	  pwm pclk                       default                  	  disabled          thermal-zones      package-thermal         
            
                      trips      package-crit             8                   	  critical                bigcore0-thermal            
   d        
                     trips      bigcore0-alert           L                   passive                  bigcore0-crit            8                   	  critical             cooling-maps       map0            +           0                  bigcore2-thermal            
   d        
                     trips      bigcore2-alert           L                   passive                  bigcore2-crit            8                   	  critical             cooling-maps       map0            +           0      	            littlecore-thermal          
   d        
                     trips      littlecore-alert             L                   passive                  littlecore-crit          8                   	  critical             cooling-maps       map0            +         0  0                        center-thermal          
            
                     trips      center-crit          8                   	  critical                gpu-thermal         
   d        
                     trips      gpu-alert            L                   passive                  gpu-crit             8                   	  critical             cooling-maps       map0            +           0               npu-thermal         
            
                     trips      npu-crit             8                   	  critical                   tsadc@fec00000            rockchip,rk3588-tsadc                                                     +                    tsadc apb_pclk          `              p               V      W        tsadc-apb tsadc         ?         V            m                                  default sleep                    	  disabled                     adc@fec10000              rockchip,rk3588-saradc                                                               +                    saradc apb_pclk               U        saradc-apb        	  disabled          i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  C                          default                      +          	  disabled          i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  D                          default                      +          	  disabled          i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +                  	  i2c pclk                  E                          default                      +          	  disabled          spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               +                    spiclk apb_pclk            s      s           tx rx                                       default                      +          	  disabled          efuse@fecc0000            rockchip,rk3588-otp                               +                                otp apb_pclk phy arb                                      otp apb arb                      +      cpu-code@2                      id@7                        cpu-leakage@17                      cpu-leakage@18                      cpu-leakage@19                      log-leakage@1a                      gpu-leakage@1b                      cpu-version@1c                                    npu-leakage@28             (         codec-leakage@29               )            dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                        +      p      	  apb_pclk                          s      phy@fed60000              rockchip,rk3588-hdptx-phy                                 +          T        ref apb                               8       #          c     d     e     !     "      "  phy apb init cmn lane ropll lcpll                      okay               j      phy@fed80000              rockchip,rk3588-usbdp-phy                                           +          l     V           refclk immortal pclk utmi         (                                       init cmn lane pcs_apb pma_apb                                                       okay                             $      phy@feda0000              rockchip,rk3588-mipi-dcphy                                          +                 	  pclk ref                  i                 j        m_phy apb grf s_phy                  	  disabled               t      phy@fedb0000              rockchip,rk3588-mipi-dcphy                                          +                 	  pclk ref                  k                 l        m_phy apb grf s_phy                  	  disabled               u      phy@fedc0000              rockchip,rk3588-csi-dphy                                 +              pclk                                            apb phy                  	  disabled          phy@fedc8000              rockchip,rk3588-csi-dphy                ܀                +              pclk                                            apb phy                  	  disabled          phy@fee00000              rockchip,rk3588-naneng-combphy                               +          v     W        ref apb pipe            `             p                         <     C        phy apb            +                 	  disabled                     phy@fee20000              rockchip,rk3588-naneng-combphy                               +          x     W        ref apb pipe            `             p                         >     E        phy apb            +                 	  disabled               )      sram@ff001000         
    mmio-sram                               ;                                 +         pinctrl           rockchip,rk3588-pinctrl          ;                               +                gpio@fd8a0000             rockchip,gpio-bank                                                    +     q     r                 6                       R                                       gpio@fec20000             rockchip,gpio-bank                                                    +      s      t                 6                       R                            gpio@fec30000             rockchip,gpio-bank                                                    +      u      v                 6         @             R                                       gpio@fec40000             rockchip,gpio-bank                                                    +      w      x                 6         `             R                            gpio@fec50000             rockchip,gpio-bank                                                    +      y      z                 6                      R                                *      pcfg-pull-up             B                pcfg-pull-down           O                pcfg-pull-none           ^                pcfg-pull-none-drv-level-2           ^        k                   pcfg-pull-up-drv-level-1             B        k                   pcfg-pull-up-drv-level-2             B        k                   pcfg-pull-none-smt           ^         z                pcfg-pull-none-drv-level-1-smt           ^        k            z          	      pcfg-pull-none-drv-level-3-smt           ^        k            z          
      pcfg-pull-none-drv-level-5-smt           ^        k            z                auddsm        bt1120        can0          can1          can2          cif       clk32k        cpu       ddrphych0         ddrphych1         ddrphych2         ddrphych3         dp0       dp1       emmc       emmc-rstnout                                        emmc-bus8                                                                                                                    emmc-clk                                        emmc-cmd                                         emmc-data-strobe                                           eth1          fspi          gmac1         gpu       hdmi       hdmim0-tx0-cec                                v      hdmim0-tx0-hpd                                w      hdmim0-tx0-scl                                x      hdmim0-tx0-sda                     	           y      hdmim0-tx1-hpd                                     hdmim1-tx1-scl                                     hdmim1-tx1-sda                     	                hdmim2-tx1-cec                                        i2c0       i2c0m0-xfer                                             ,         i2c1       i2c1m0-xfer                    	            	                      i2c2       i2c2m0-xfer                    	            	                      i2c3       i2c3m0-xfer                   	           	                      i2c4       i2c4m0-xfer                   	           	                      i2c5       i2c5m0-xfer                   	           	                      i2c6       i2c6m0-xfer                    	            	                      i2c7       i2c7m0-xfer                   	           	                      i2c8       i2c8m0-xfer                   	           	                      i2s0       i2s0-lrck                                       i2s0-sclk                                       i2s0-sdi0                                       i2s0-sdi1                                       i2s0-sdi2                                       i2s0-sdi3                                       i2s0-sdo0                                       i2s0-sdo1                                       i2s0-sdo2                                       i2s0-sdo3                                          i2s1       i2s1m0-lrck                                     i2s1m0-sclk                                     i2s1m0-sdi0                                     i2s1m0-sdi1                                     i2s1m0-sdi2                                     i2s1m0-sdi3                                     i2s1m0-sdo0               	                      i2s1m0-sdo1               
                      i2s1m0-sdo2                                     i2s1m0-sdo3                                        i2s2       i2s2m1-lrck                                     i2s2m1-sclk                                     i2s2m1-sdi                
                      i2s2m1-sdo                                         i2s3       i2s3-lrck                                       i2s3-sclk                                       i2s3-sdi                                        i2s3-sdo                                           jtag          litcpu        mcu       mipi          npu       pcie20x1          pcie30phy         pcie30x1          pcie30x2          pcie30x4          pdm0          pdm1          pmic       pmic-pins         p                                                                                                           pmu       pwm0       pwm0m0-pins                                /         pwm1       pwm1m0-pins                                0         pwm2       pwm2m0-pins                                1         pwm3       pwm3m0-pins                                2         pwm4       pwm4m0-pins                                         pwm5       pwm5m0-pins                	                         pwm6       pwm6m0-pins                                         pwm7       pwm7m0-pins                                         pwm8       pwm8m0-pins                                        pwm9       pwm9m0-pins                                        pwm10      pwm10m0-pins                                            pwm11      pwm11m0-pins                                           pwm12      pwm12m0-pins                                           pwm13      pwm13m0-pins                                           pwm14      pwm14m0-pins                                           pwm15      pwm15m0-pins                                           refclk        sata          sata0         sata1         sata2         sdio       sdiom0-pins       `                   
                                            	                         sdmmc      sdmmc-bus4        @                                                               sdmmc-clk                                       sdmmc-cmd                                       sdmmc-det                                           spdif0     spdif0m0-tx                                        spdif1     spdif1m0-tx                                        spi0       spi0m0-pins       0                                                       spi0m0-cs0                                       spi0m0-cs1                                          spi1       spi1m1-pins       0                                                    spi1m1-cs0                                      spi1m1-cs1                                         spi2       spi2m2-pins       0                                                       spi2m2-cs0                 	                      spi2m2-cs1                                          spi3       spi3m1-pins       0                                                    spi3m1-cs0                                      spi3m1-cs1                                         spi4       spi4m0-pins       0                                                    spi4m0-cs0                                      spi4m0-cs1                                         tsadc      tsadc-shut-org                                          uart0      uart0m1-xfer                                	                .         uart1      uart1m1-xfer                      
           
                      uart2      uart2m0-xfer                       
            
                      uart3      uart3m1-xfer                      
           
                      uart4      uart4m1-xfer                      
           
                      uart5      uart5m1-xfer                      
           
                      uart6      uart6m1-xfer                       
           
                      uart7      uart7m1-xfer                      
           
                      uart8      uart8m1-xfer                      
           
                      uart9      uart9m1-xfer                      
           
                      vop       bt656         gpio-func      tsadc-gpio-func                                          eth0          gmac0         hym8563    hym8563-int                                          usb    vcc5v0-host-en                                ,         wifi       wifi-enable-h                                 )      wifi-host-wake-irq                                             hdmi1-sound           simple-audio-card           i2s                    hdmi1         	  disabled       simple-audio-card,codec                 simple-audio-card,cpu                      usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                +                       ref_clk suspend_clk bus_clk         host                           usb2-phy usb3-phy         
  utmi_wide                              S                  &         G         h        okay          syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                  &      syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                   %      syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @           $      syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +             #   usb2phy@4000              rockchip,rk3588-usb2phy           @                        +             phyclk          usb480m_phy1                                      n             phy apb         okay              "   otg-port                        okay               *                      syscon@fd5e4000       $    rockchip,rk3588-hdptxphy-grf syscon             ^@                  !      spdif-tx@fddb8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             ۀ                              `           
  mclk hclk           +                  tx             r                                                         	  disabled          i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      +                       mclk_tx mclk_rx hclk            `                              s           tx                                     tx-m                      	  disabled          spdif-tx@fdde8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             ހ                              `     F      
  mclk hclk           +     I     E        tx             r                                                         	  disabled          i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      +     9     9     ?        mclk_tx mclk_rx hclk            `     6                         s           tx                                     tx-m                      	  disabled                    i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      +     +     +     '        mclk_tx mclk_rx hclk            `     (                         s           rx                                     rx-m                      	  disabled          i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    +     &     &     "        mclk_tx mclk_rx hclk            `     #                         s           rx                                     rx-m                      	  disabled          dp@fde60000           rockchip,rk3588-dp                      @                               `             p $       (  +                                 apb aux hdcp i2s spdif                                                            	  disabled       ports                        +       port@0                    port@1                         hdmi@fdea0000             rockchip,rk3588-dw-hdmi-qp                             0  +                    9     S             pclk earc ref aud hdp hclk_vo1        P                                                                i               +avp cec earc main hpd              k        default                                                 1        ref hdp            m           o                  	  disabled                 ports                        +       port@0                    port@1                         edp@fded0000              rockchip,rk3588-edp                              +                  dp pclk                                  k        dp                                          dp apb             o      	  disabled       ports                        +       port@0                    port@1                         hdmi_receiver@fdee0000        .    rockchip,rk3588-hdmirx-ctrler snps,dw-hdmi-rx                       `       0                                                    +cec hdmi dma          8  +     	               
          !           3  aclk audio cr_para pclk ref hclk_s_hdmirx hclk_vo1                                                               axi apb ref biu            m        t   o      	  disabled          pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        0  +     @     E     ;     J     O     t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                           +sys pmc msg legacy err                                          `                                                                                                       '           6                     >                      H                   	  pcie-phy                  "      T  ;                                                     @      	        @         0     
@        @                                     Rdbi apb config               &     +      	  pwr pipe          	  disabled       legacy-interrupt-controller          R                                                                            pcie-ep@fe150000              rockchip,rk3588-pcie-ep       P     
@             
@                         	        @      
@0                 Rdbi dbi2 apb addr_space atu       0  +     @     E     ;     J     O     t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe                                                                                                                                       +  +sys pmc msg legacy err dma0 dma1 dma2 dma3          '           H                   	  pcie-phy                  "             &     +      	  pwr pipe          	  disabled          pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       0  +     A     F     <     K     P     u      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                              +sys pmc msg legacy err                                          `                                                                                                      '           6                   >                    H                   	  pcie-phy                  "      T  ;                                                     @      	@       @         0     
@@       @                                     Rdbi apb config               '     ,      	  pwr pipe          	  disabled       legacy-interrupt-controller          R                                                                             pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  +     B     G     =     L     Q           )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                +sys pmc msg legacy err                                          `                                                                                                      '           6       ~               >                      H                      	  pcie-phy                  "      T  ;                                                     @      	       @         0     
@       @                                     Rdbi apb config               (     -      	  pwr pipe                         +         	  disabled       legacy-interrupt-controller          R                                                                             ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     +macirq eth_wake_irq       (  +     6     7     X     ]     4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref               !             #      
  stmmaceth              m        g   +        x                                               	  disabled       mdio              snps,dwmac-mdio                      +          stmmac-axi-config                                                                          rx-queues-config                            queue0        queue1           tx-queues-config                             queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  +     c     `     f     U     p        sata pmalive rxoob ref asic                                 +          	  disabled       sata-port@0                     0 @                     	  sata-phy            =            L             phy@fed70000              rockchip,rk3588-hdptx-phy                                 +          U        ref apb                               8       &          f     g     h     $     %      "  phy apb init cmn lane ropll lcpll             !      	  disabled               k      phy@fed90000              rockchip,rk3588-usbdp-phy                                           +          m     W  "        refclk immortal pclk utmi         (                                       init cmn lane pcs_apb pma_apb             #                     $                   okay                                  phy@fee10000              rockchip,rk3588-naneng-combphy                               +          w     W        ref apb pipe            `             p                         =     D        phy apb            +           %      	  disabled                    phy@fee80000              rockchip,rk3588-pcie3-phy                                            +     y        pclk                 H        phy            +          &      	  disabled                    opp-table-cluster0            operating-points-v2                        opp-1008000000              <          
L 
L ~          @      opp-1200000000              G          
4 
4 ~          @      opp-1416000000              Tfr            ~          @               opp-1608000000              _"          P P ~          @      opp-1800000000              kI          ~ ~ ~          @         opp-table-cluster1            operating-points-v2                        opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table-cluster2            operating-points-v2                        opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table-gpu             operating-points-v2                opp-300000000                         
L 
L P      opp-400000000               ׄ          
L 
L P      opp-500000000               e          
L 
L P      opp-600000000               #F          
L 
L P      opp-700000000               )'          
` 
` P      opp-800000000               /          q q P      opp-900000000               5          5  5  P      opp-1000000000              ;          P P P         chosen          serial2:1500000n8         hdmi-con              hdmi-connector          a      port       endpoint              '           {            sdio-pwrseq           mmc-pwrseq-simple           +  (      
  ext_clock           default           )                                             vcc12v-dcin-regulator             regulator-fixed         
4vcc12v_dcin          	         	        	          
            .      vcc5v0-host           regulator-fixed         
4vcc5v0_host          	         	        	 LK@        
 LK@         (        ;  *               @  +        default           ,           *      regulator-vcc5v0-usb              regulator-fixed         
4vcc5v0_usb           	         	        	 LK@        
 LK@        @  -          +      vcc5v0-sys-regulator              regulator-fixed         
4vcc5v0_sys           	         	        	 LK@        
 LK@        @  .                 regulator-vcc5v0-usbdcin              regulator-fixed         
4vcc5v0_usbdcin           	         	        	 LK@        
 LK@        @  .          -         	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 mmc0 cpu device_type reg enable-method capacity-dmips-mhz clocks cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts clock-frequency clock-output-names interrupt-names ranges no-map alloc-ranges alignment assigned-clocks assigned-clock-rates clock-names power-domains mali-supply sram-supply dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos domain-supply reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu remote-endpoint assigned-clock-parents #sound-dai-cells rockchip,vo-grf bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map iommu-map num-lanes interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-sd-highspeed cap-sdio-irq disable-wp keep-power-in-suspend mmc-pwrseq no-mmc non-removable no-sd sd-uhs-sdr104 mmc-hs400-1_8v mmc-hs400-enhanced-strobe no-sdio rockchip,trcm-sync-tx-only dma-noncoherent mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells wakeup-source num-cs #gpio-cells gpio-controller spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply pins function regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-name regulator-enable-ramp-delay regulator-coupled-with regulator-coupled-max-spread regulator-off-in-suspend regulator-suspend-microvolt regulator-on-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,dp-lane-mux rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins memory-region rockchip,phy-grf opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend stdout-path post-power-on-delay-ms reset-gpios enable-active-high gpio vin-supply 