 ħ   8 8   (            ;o                               U    edgeble,neural-compute-module-6a-io edgeble,neural-compute-module-6a rockchip,rk3588                                     +            7Edgeble Neu6A IO Board     regulator-vcc3v3-pcie2x1l1                       +        X  P        U 2Z        = 2Z         +                 vcc3v3_pcie2x1l1 efa                  default                            i          regulator-fixed       aliases          =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000           [/i2c@fd880000            `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000            y/i2c@fec80000            ~/i2c@fec90000            /i2c@feca0000            /serial@fd890000             /serial@feb40000             /serial@feb50000             /serial@feb60000             /serial@feb70000             /serial@feb80000             /serial@feb90000             /serial@feba0000             /serial@febb0000             /serial@febc0000             /spi@feb00000            /spi@feb10000            /spi@feb20000            /spi@feb30000            /spi@fecb0000            /mmc@fe2e0000         cpus                         +       cpu-map    cluster0       core0                     core1                     core2                     core3                        cluster1       core0                     core1                        cluster2       core0                     core1               	            cpu@0            cpu           arm,cortex-a55                      
psci                      +   
            2           B           O   @        a           n           {   @                                                                                   cpu@100          cpu           arm,cortex-a55                     
psci                      +   
            2           B           O   @        a           n           {   @                                                                                   cpu@200          cpu           arm,cortex-a55                     
psci                      +   
            2           B           O   @        a           n           {   @                                                                                   cpu@300          cpu           arm,cortex-a55                     
psci                      +   
            2           B           O   @        a           n           {   @                                                                                   cpu@400          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                                  cpu@500          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                                  cpu@600          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                                  cpu@700          cpu           arm,cortex-a76                     
psci                       +   
           2           B           O   @        a           n           {   @                                                                            	      idle-states         psci       cpu-sleep             arm,idle-state                              0   d        A   x        Q                      l2-cache-l0           cache           D           Q   @        c           b            n                            l2-cache-l1           cache           D           Q   @        c           b            n                            l2-cache-l2           cache           D           Q   @        c           b            n                            l2-cache-l3           cache           D           Q   @        c           b            n                            l2-cache-b0           cache           D           Q   @        c           b            n                            l2-cache-b1           cache           D           Q   @        c           b            n                            l2-cache-b2           cache           D           Q   @        c           b            n                            l2-cache-b3           cache           D           Q   @        c           b            n                               l3-cache              cache           D 0          Q   @        c           b            n                 display-subsystem             rockchip,display-subsystem          |             .      firmware       scmi              arm,scmi-smc                                              +              /   protocol@14                                  
      protocol@16                                              hdmi0-sound           simple-audio-card           i2s                    hdmi0         	  disabled              0   simple-audio-card,codec                  simple-audio-card,cpu                       pmu-a55           arm,cortex-a55-pmu                            pmu-a76           arm,cortex-a76-pmu                             psci              arm,psci-1.0            smc       clock-0           fixed-clock         )׫        #spll                          1      timer             arm,armv8-timer       P                                               
                          %  6sec-phys phys virt hyp-phys hyp-virt          clock-1           fixed-clock         n6         #xin24m                        2      clock-2           fixed-clock                    #xin32k                        3      reserved-memory                      +            F   shmem@10f000              arm,scmi-shmem                                M                 hdmi-receiver-cma             shared-dma-pool         T                    J    
           a                M      	  disabled                       gpu@fb000000          *    rockchip,rk3588-mali arm,mali-valhall-csf                                             k   
           {         +   !     !     !          core coregroup stacks                   0         \              ]              ^               6job mmu gpu            "         	  disabled               #                 usb@fc000000              rockchip,rk3588-dwc3 snps,dwc3                      @                                +   !     !     !          ref_clk suspend_clk bus_clk         otg            $   %           usb2-phy usb3-phy         
  utmi_wide              "              !  R                                             :         [      	  disabled              4      usb@fc800000          "    rockchip,rk3588-ehci generic-ehci                                                      +   !     !     !     &           '        usb            "           okay              5      usb@fc840000          "    rockchip,rk3588-ohci generic-ohci                                                      +   !     !     !     &           '        usb            "           okay              6      usb@fc880000          "    rockchip,rk3588-ehci generic-ehci                                                      +   !     !     !     (           )        usb            "           okay              7      usb@fc8c0000          "    rockchip,rk3588-ohci generic-ohci                                                      +   !     !     !     (           )        usb            "           okay              8      usb@fcd00000              rockchip,rk3588-dwc3 snps,dwc3                     @                              (  +   !  j   !  i   !  h   !  k   !  r      &  ref_clk suspend_clk bus_clk utmi pipe           host               *         	  usb3-phy          
  utmi_wide              !  4                           :         [         }        okay              9      iommu@fc900000            arm,smmu-v3                             @        q             s             v             o               6eventq gerror priq cmdq-sync                                iommu@fcb00000            arm,smmu-v3                             @        }                                       {               6eventq gerror priq cmdq-sync                     	  disabled              :      syscon@fd58a000       )    rockchip,rk3588-pmugrf syscon simple-mfd                X                   }      syscon@fd58c000           rockchip,rk3588-sys-grf syscon              X                   p      syscon@fd5e8000       !    rockchip,rk3588-dcphy-grf syscon                ^       @                  syscon@fd5ec000       !    rockchip,rk3588-dcphy-grf syscon                ^       @                  syscon@fd5a4000           rockchip,rk3588-vop-grf syscon              Z@                    q      syscon@fd5a6000           rockchip,rk3588-vo0-grf syscon              Z`                 +   !                   syscon@fd5a8000           rockchip,rk3588-vo1-grf syscon              Z       @         +   !             r      syscon@fd5ac000           rockchip,rk3588-usb-grf syscon              Z       @                  syscon@fd5b0000           rockchip,rk3588-php-grf syscon              [                    -      syscon@fd5b4000       #    rockchip,rk3588-csidphy-grf syscon              [@                         syscon@fd5b5000       #    rockchip,rk3588-csidphy-grf syscon              [P                         syscon@fd5bc000       $    rockchip,rk3588-pipe-phy-grf syscon             [                         syscon@fd5c4000       $    rockchip,rk3588-pipe-phy-grf syscon             \@                         syscon@fd5c8000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @                  syscon@fd5d0000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]        @                      +                 usb2phy@0             rockchip,rk3588-usb2phy                                    +   !          phyclk          #usb480m_phy0                                    !  m   !          phy apb       	  disabled                  otg-port                      	  disabled               $            syscon@fd5d8000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +             ;   usb2phy@8000              rockchip,rk3588-usb2phy                                   +   !          phyclk          #usb480m_phy2                                    !  o   !          phy apb         okay               &   host-port                       okay               +           '            syscon@fd5dc000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]       @                      +             <   usb2phy@c000              rockchip,rk3588-usb2phy                                   +   !          phyclk          #usb480m_phy3                                    !  p   !           phy apb         okay               (   host-port                       okay               ,           )            syscon@fd5e0000       $    rockchip,rk3588-hdptxphy-grf syscon             ^                          syscon@fd5f0000           rockchip,rk3588-ioc syscon              _                          sram@fd600000         
    mmio-sram               `                 F        `                          +             =      clock-controller@fd7c0000             rockchip,rk3588-cru             |                k   !      !      !      !      !      !      !      !      !     !     !     !     !  ]   !   q   !      !        @  {A .  2Fq )׫ׄ e /  ׄ   e Zр            -                                 !      i2c@fd880000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                                    =               +   !  t   !  s      	  i2c pclk               .        default                      +            okay              >   regulator@42              rockchip,rk8602            B                   vdd_cpu_big0_s0                   +        = dp        U         m             +              regulator-state-mem                   regulator@43               rockchip,rk8603 rockchip,rk8602            C                   vdd_cpu_big1_s0                   +        = dp        U         m             +              regulator-state-mem                      serial@fd890000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      K               +   !     !          baudclk apb_pclk               /      /           tx rx              0        default                             	  disabled              ?      pwm@fd8b0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !     !        	  pwm pclk               1        default                  	  disabled              @      pwm@fd8b0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +   !     !        	  pwm pclk               2        default                  	  disabled              A      pwm@fd8b0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !     !        	  pwm pclk               3        default                    okay              B      pwm@fd8b0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +   !     !        	  pwm pclk               4        default                  	  disabled              C      power-management@fd8d8000         &    rockchip,rk3588-pmu syscon simple-mfd                                  s   power-controller          !    rockchip,rk3588-power-controller                                    +            okay               "   power-domain@8                                              +              D   power-domain@9             	         +   !  !   !  #   !  "   !             5   6   7                                 +       power-domain@10            
        +   !  !   !  #   !  "           8                  power-domain@11                    +   !  !   !  #   !  "           9                        power-domain@12                    +   !     !     !             :   ;   <   =                       >          E      power-domain@13                                 +                   power-domain@14                  (  +   !     !     !     !     !             ?                  power-domain@15                     +   !     !     !     !             @                  power-domain@16                    +   !     !             A   B   C                     +                   power-domain@17                     +   !     !     !     !             D   E   F                        power-domain@21                    +   !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !     !              G   H   I   J   K   L   M   N                     +                   power-domain@23                    +   !   C   !   A   !             O                  power-domain@14                     +   !     !     !     !             ?                  power-domain@15                    +   !     !     !             @                  power-domain@22                    +   !     !             P                     power-domain@24                    +   !  [   !  Z   !  ]           Q   R                     +                   power-domain@25                  8  +   !     !     !     !     !     !     !  Z           S                     power-domain@26                  8  +   !     !     !     !     !     !     !  Q           T   U                  power-domain@27                  0  +   !     !     !     !     !     !             V   W   X   Y                     +                   power-domain@28                     +   !     !     !     !             Z   [                  power-domain@29                  (  +   !     !     !     !     !             \   ]                     power-domain@30                    +   !  z   !  {           ^                  power-domain@31                  @  +   !  W   !     !     !     !     !     !     !             _   `   a   b                  power-domain@33            !        +   !  W   !  Z   !  [                  power-domain@34            "        +   !  W   !  Z   !  [                  power-domain@37            %        +   !     !  2           c                  power-domain@38            &        +   !   4   !   5                  power-domain@40            (           d                        npu@fdab0000              rockchip,rk3588-rknn-core         0                               0                 pc cna core                n                +   !     !      
      !  #        aclk hclk npu pclk          k   
           {            !     !          srst_a srst_h              "   	        
   e      	  disabled              F      iommu@fdab9000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                                                 n               +   !     !           aclk iface                         "   	      	  disabled               e      npu@fdac0000              rockchip,rk3588-rknn-core         0                               0                 pc cna core                o                +   !     !     
      !  #        aclk hclk npu pclk          k   
           {            !      !           srst_a srst_h              "   
        
   f      	  disabled              G      iommu@fdaca000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                                    o               +   !     !          aclk iface                         "   
      	  disabled               f      npu@fdad0000              rockchip,rk3588-rknn-core         0                               0                 pc cna core                p                +   !     !     
      !  #        aclk hclk npu pclk          k   
           {            !      !           srst_a srst_h              "           
   g      	  disabled              H      iommu@fdada000        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                                    p               +   !     !          aclk iface                         "         	  disabled               g      video-codec@fdb50000          +    rockchip,rk3588-vpu121 rockchip,rk3568-vpu                                      w               6vdpu            +   !     !        
  aclk hclk           
   h           "             I      iommu@fdb50800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               v               aclk iface          +   !     !             "                          h      rga@fdb80000          (    rockchip,rk3588-rga rockchip,rk3288-rga                                    t               +   !     !     !          aclk hclk sclk             !  r   !  q   !  p        core axi ahb               "             J      video-codec@fdba0000              rockchip,rk3588-vepu121                                     z               +   !     !        
  aclk hclk           
   i           "             K      iommu@fdba0800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               y               +   !     !          aclk iface             "                          i      video-codec@fdba4000              rockchip,rk3588-vepu121             @                       |               +   !     !        
  aclk hclk           
   j           "             L      iommu@fdba4800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu             H        @               {               +   !     !          aclk iface             "                          j      video-codec@fdba8000              rockchip,rk3588-vepu121                                    ~               +   !     !        
  aclk hclk           
   k           "             M      iommu@fdba8800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @               }               +   !     !          aclk iface             "                          k      video-codec@fdbac000              rockchip,rk3588-vepu121                                                   +   !     !        
  aclk hclk           
   l           "             N      iommu@fdbac800        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu                     @                              +   !     !          aclk iface             "                          l      video-codec@fdc70000              rockchip,rk3588-av1-vpu                                     l               6vdpu            k   !   A   !   C        {ׄ ׄ         +   !   A   !   C      
  aclk hclk              "               !     !      !     !            O      vop@fdd90000              rockchip,rk3588-vop                      B     P                 vop gamma-lut                               @  +   !  ]   !  \   !  a   !  b   !  c   !  d   !  [   m   n      Q  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2 dclk_vp3 pclk_vop pll_hdmiphy0 pll_hdmiphy1            
   o           "              p           q        "   r        3   s        okay              P   ports                        +                  port@0                       +                          Q   endpoint@8                     @   t                   port@1                       +                         R      port@2                       +                         S      port@3                       +                         T            iommu@fdd97e00        ,    rockchip,rk3588-iommu rockchip,rk3568-iommu              ~                                                  +   !  ]   !  \        aclk iface                         "           okay               o      spdif-tx@fddb0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                              P   !           k   !        
  mclk hclk           +   !     !          tx             u                                    "           g          	  disabled              U      i2s@fddc0000              rockchip,rk3588-i2s-tdm                                                    +   !     !     !          mclk_tx mclk_rx hclk            k   !          P   !              v            tx             "              !          tx-m            g          	  disabled              V      spdif-tx@fdde0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif                              P   !           k   !  A      
  mclk hclk           +   !  D   !  @        tx             u                                    "           g          	  disabled              W      i2s@fddf0000              rockchip,rk3588-i2s-tdm                                                    +   !  4   !  4   !  5        mclk_tx mclk_rx hclk            k   !  1        P   !              v           tx             "              !          tx-m            g          	  disabled                     i2s@fddfc000              rockchip,rk3588-i2s-tdm                                                   +   !  0   !  0   !  ,        mclk_tx mclk_rx hclk            k   !  -        P   !              v           rx             "              !          rx-m            g          	  disabled              X      dsi@fde20000              rockchip,rk3588-mipi-dsi2                                                      +   !  e   !  g      	  pclk sys               !          apb            "              w   
        dcphy              q      	  disabled              Y   ports                        +       port@0                        Z      port@1                       [            dsi@fde30000              rockchip,rk3588-mipi-dsi2                                                      +   !  f   !  h      	  pclk sys               !          apb            "              x   
        dcphy              q      	  disabled              \   ports                        +       port@0                        ]      port@1                       ^            dp@fde50000           rockchip,rk3588-dp                      @                               k   !          { $       (  +   !     !     !     !     !          apb aux hdcp i2s spdif             %              "              !          g          	  disabled              _   ports                        +       port@0                        `      port@1                       a            hdmi@fde80000             rockchip,rk3588-dw-hdmi-qp                             0  +   !     !     !     !  4   !  R   !          pclk earc ref aud hdp hclk_vo1        P                                                                h               6avp cec earc main hpd              m        default            y   z   {   |           "              !     !  0        ref hdp            p        x   r        g          	  disabled                  ports                        +       port@0                        b      port@1                       c            edp@fdec0000              rockchip,rk3588-edp                              +   !      !          dp pclk                                  m        dp             "              !     !          dp apb             r      	  disabled              d   ports                        +       port@0                        e      port@1                       f            qos@fdf35000              rockchip,rk3588-qos syscon              P                    :      qos@fdf35200              rockchip,rk3588-qos syscon              R                    ;      qos@fdf35400              rockchip,rk3588-qos syscon              T                    <      qos@fdf35600              rockchip,rk3588-qos syscon              V                    =      qos@fdf36000              rockchip,rk3588-qos syscon              `                    ^      qos@fdf39000              rockchip,rk3588-qos syscon                                  c      qos@fdf3d800              rockchip,rk3588-qos syscon                                  d      qos@fdf3e000              rockchip,rk3588-qos syscon                                  `      qos@fdf3e200              rockchip,rk3588-qos syscon                                  _      qos@fdf3e400              rockchip,rk3588-qos syscon                                  a      qos@fdf3e600              rockchip,rk3588-qos syscon                                  b      qos@fdf40000              rockchip,rk3588-qos syscon                                   \      qos@fdf40200              rockchip,rk3588-qos syscon                                  ]      qos@fdf40400              rockchip,rk3588-qos syscon                                  V      qos@fdf40500              rockchip,rk3588-qos syscon                                  W      qos@fdf40600              rockchip,rk3588-qos syscon                                  X      qos@fdf40800              rockchip,rk3588-qos syscon                                  Y      qos@fdf41000              rockchip,rk3588-qos syscon                                  Z      qos@fdf41100              rockchip,rk3588-qos syscon                                  [      qos@fdf60000              rockchip,rk3588-qos syscon                                   A      qos@fdf60200              rockchip,rk3588-qos syscon                                  B      qos@fdf60400              rockchip,rk3588-qos syscon                                  C      qos@fdf61000              rockchip,rk3588-qos syscon                                  D      qos@fdf61200              rockchip,rk3588-qos syscon                                  E      qos@fdf61400              rockchip,rk3588-qos syscon                                  F      qos@fdf62000              rockchip,rk3588-qos syscon                                   ?      qos@fdf63000              rockchip,rk3588-qos syscon              0                    @      qos@fdf64000              rockchip,rk3588-qos syscon              @                    O      qos@fdf66000              rockchip,rk3588-qos syscon              `                    G      qos@fdf66200              rockchip,rk3588-qos syscon              b                    H      qos@fdf66400              rockchip,rk3588-qos syscon              d                    I      qos@fdf66600              rockchip,rk3588-qos syscon              f                    J      qos@fdf66800              rockchip,rk3588-qos syscon              h                    K      qos@fdf66a00              rockchip,rk3588-qos syscon              j                    L      qos@fdf66c00              rockchip,rk3588-qos syscon              l                    M      qos@fdf66e00              rockchip,rk3588-qos syscon              n                    N      qos@fdf67000              rockchip,rk3588-qos syscon              p                    P      qos@fdf67200              rockchip,rk3588-qos syscon              r                   g      qos@fdf70000              rockchip,rk3588-qos syscon                                   8      qos@fdf71000              rockchip,rk3588-qos syscon                                  9      qos@fdf72000              rockchip,rk3588-qos syscon                                   5      qos@fdf72200              rockchip,rk3588-qos syscon              "                    6      qos@fdf72400              rockchip,rk3588-qos syscon              $                    7      qos@fdf80000              rockchip,rk3588-qos syscon                                   S      qos@fdf81000              rockchip,rk3588-qos syscon                                  T      qos@fdf81200              rockchip,rk3588-qos syscon                                  U      qos@fdf82000              rockchip,rk3588-qos syscon                                   Q      qos@fdf82200              rockchip,rk3588-qos syscon              "                    R      dfi@fe060000                                   rockchip,rk3588-dfi       @                       &              0              :               3   }          h      pcie@fe180000                                                default       *    rockchip,rk3588-pcie rockchip,rk3568-pcie              0   ?      0  +   !  C   !  H   !  >   !  M   !  R   !        )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                6sys pmc msg legacy err                                          `                    ~                      ~                     ~                     ~                                   0      0              0      0                          *         	  pcie-phy               "   "      T  F                                                     @      	       @         0     
@       @                                      dbi apb config             !  )   !  .      	  pwr pipe                         +           okay led          i   legacy-interrupt-controller                                                                                ~         pcie@fe190000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie              @   O      0  +   !  D   !  I   !  ?   !  N   !  S   !  s      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                6sys pmc msg legacy err                                          `                                                                                                                       @      @              @      @                                   	  pcie-phy               "   "      T  F                                                     @      
        @         0     
A        @                                      dbi apb config             !  *   !  /      	  pwr pipe                         +         	  disabled              j   legacy-interrupt-controller                                                                                         ethernet@fe1c0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     6macirq eth_wake_irq       (  +   !  6   !  7   !  Y   !  ^   !  5      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            "   !           !  $      
  stmmaceth              p           -        &            6        G           Z            m      	  disabled              k   mdio              snps,dwmac-mdio                      +              l      stmmac-axi-config           v                                                                rx-queues-config                             queue0        queue1           tx-queues-config                             queue0        queue1              sata@fe210000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              !                                    (  +   !  b   !  _   !  e   !  T   !  o        sata pmalive rxoob ref asic                                 +            okay              m   sata-port@0                      @                      	  sata-phy                                     sata@fe230000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              #                                    (  +   !  d   !  a   !  g   !  V   !  q        sata pmalive rxoob ref asic                                 +          	  disabled              n   sata-port@0                      @             *         	  sata-phy                                     spi@fe2b0000              rockchip,sfc                +        @                               +   !  /   !  0        clk_sfc hclk_sfc                         +          	  disabled              o      mmc@fe2c0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             ,        @                                +   
      
   	   !     !          biu ciu ciu-drive ciu-sample            	                    default                                "   (        okay            "            ,         >         O         Z         b         i        w                        p      mmc@fe2d0000          0    rockchip,rk3588-dw-mshc rockchip,rk3288-dw-mshc             -        @                                +   !     !     !     !          biu ciu ciu-drive ciu-sample            	                    default                       "   %      	  disabled              q      mmc@fe2e0000              rockchip,rk3588-dwcmshc             .                                       k   !  -   !  .   !  ,        { n6        (  +   !  ,   !  *   !  +   !  -   !  .        core bus axi block timer                                            default       (     !     !     !     !     !          core bus axi block timer            okay            "            Z                                              r      rng@fe378000              rockchip,rk3588-rng             7                                     +   
                 0      i2s@fe470000              rockchip,rk3588-i2s-tdm             G                                       +   !   +   !   /   !   (        mclk_tx mclk_rx hclk            k   !   )   !   -        P   !      !              /       /           tx rx              "   &           !   *   !   +      
  tx-m rx-m                    default       (                                        g          	  disabled              s      i2s@fe480000              rockchip,rk3588-i2s-tdm             H                                       +   !  y   !  }   !  u        mclk_tx mclk_rx hclk               /      /           tx rx              !  ^   !  _      
  tx-m rx-m                    default       (                                        g          	  disabled              t      i2s@fe490000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             I                                       +   !      !           i2s_clk i2s_hclk            k   !           P   !              u       u           tx rx              "   &        default                             g          	  disabled              u      i2s@fe4a0000          (    rockchip,rk3588-i2s rockchip,rk3066-i2s             J                                       +   !   %   !           i2s_clk i2s_hclk            k   !   "        P   !              u      u           tx rx              "   &        default                             g          	  disabled              v      spdif-tx@fe4e0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             N                 P   !           k   !   7      
  mclk hclk           +   !   9   !   6        tx             /                                            default            "   &        g          	  disabled              w      spdif-tx@fe4f0000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             O                 P   !           k   !   =      
  mclk hclk           +   !   ?   !   <        tx             u                                            default            "   &        g          	  disabled              x      interrupt-controller@fe600000             arm,gic-v3               `             h                       	                                      a          	     8         	         F                                +                 msi-controller@fe640000           arm,gic-v3-its              d                           	        	                    msi-controller@fe660000           arm,gic-v3-its              f                           	        	                   ppi-partitions     interrupt-partition-0           	'                             interrupt-partition-1           	'            	                        dma-controller@fea10000           arm,pl330 arm,primecell                     @                 V              W                	0        +   !   n      	  apb_pclk            	G              /      dma-controller@fea30000           arm,pl330 arm,primecell                     @                 X              Y                	0        +   !   o      	  apb_pclk            	G              u      i2c@fea90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !   {      	  i2c pclk                  >                          default                      +          	  disabled              y      i2c@feaa0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !   |      	  i2c pclk                  ?                          default                      +          	  disabled              z      i2c@feab0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !   }      	  i2c pclk                  @                          default                      +          	  disabled              {      i2c@feac0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !   ~      	  i2c pclk                  A                          default                      +          	  disabled              |      i2c@fead0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !         	  i2c pclk                  B                          default                      +          	  disabled              }      timer@feae0000        ,    rockchip,rk3588-timer rockchip,rk3288-timer                                     !               +   !   T   !   W        pclk timer            ~      watchdog@feaf0000              rockchip,rk3588-wdt snps,dw-wdt                              +   !   d   !   c      
  tclk pclk                 ;                       spi@feb00000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    F               +   !      !           spiclk apb_pclk            /      /           tx rx           	R                            default                      +          	  disabled                    spi@feb10000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    G               +   !      !           spiclk apb_pclk            /      /           tx rx           	R                            default                      +          	  disabled                    spi@feb20000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    H               +   !      !           spiclk apb_pclk            u      u           tx rx           	R                         default                      +            okay            k   !           {              pmic@0            rockchip,rk806          	Y B@                                              default                              	k        	   +        	   +        	   +        	   +        	   +        	   +        	   +        	   +        	   +        	   +        	           
	   +        
           
#           
0   +         
<        
L      dvs1-null-pins          
Xgpio_pwrctrl1         	  
]pin_fun0                     dvs2-null-pins          
Xgpio_pwrctrl2         	  
]pin_fun0                     dvs3-null-pins          
Xgpio_pwrctrl3         	  
]pin_fun0                     regulators     dcdc-reg1           vdd_gpu_s0           +        = dp        U ~        m  0        
f             >   regulator-state-mem                   dcdc-reg2           vdd_cpu_lit_s0                    +        = dp        U ~        m  0              regulator-state-mem                   dcdc-reg3           vdd_log_s0                    +        = 
L        U q        m  0             regulator-state-mem                  
 q         dcdc-reg4           vdd_vdenc_s0                      +        = dp        U ~        m  0             regulator-state-mem                   dcdc-reg5           vdd_ddr_s0                    +        = 
L        U         m  0             regulator-state-mem                  
 P         dcdc-reg6           vdd2_ddr_s3                   +             regulator-state-mem          
         dcdc-reg7           vdd_2v0_pldo_s3                   +        =         U         m  0              regulator-state-mem          
        
          dcdc-reg8           vcc_3v3_s3                    +        = 2Z        U 2Z              regulator-state-mem          
        
 2Z         dcdc-reg9           vddq_ddr_s0                   +             regulator-state-mem                   dcdc-reg10          vcc_1v8_s3                    +        = w@        U w@             regulator-state-mem          
        
 w@         pldo-reg1           avcc_1v8_s0                   +        = w@        U w@             regulator-state-mem                   pldo-reg2           vcc_1v8_s0                    +        = w@        U w@             regulator-state-mem                  
 w@         pldo-reg3           avdd_1v2_s0                   +        = O        U O             regulator-state-mem                   pldo-reg4           vcc_3v3_s0                    +        = 2Z        U 2Z        m  0             regulator-state-mem                   pldo-reg5           vccio_sd_s0                   +        = w@        U 2Z        m  0              regulator-state-mem                   pldo-reg6         	  pldo6_s3                      +        = w@        U w@             regulator-state-mem          
        
 w@         nldo-reg1           vdd_0v75_s3                   +        = q        U q             regulator-state-mem          
        
 q         nldo-reg2           vdd_ddr_pll_s0                    +        = P        U P             regulator-state-mem                  
 P         nldo-reg3           avdd_0v75_s0                      +        = q        U q             regulator-state-mem                   nldo-reg4           vdd_0v85_s0                   +        = P        U P             regulator-state-mem                   nldo-reg5           vdd_0v75_s0                   +        = q        U q             regulator-state-mem                            spi@feb30000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    I               +   !      !           spiclk apb_pclk            u      u           tx rx           	R                            default                      +          	  disabled                    serial@feb40000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      L               +   !      !           baudclk apb_pclk               /      /   	        tx rx                      default                             	  disabled                    serial@feb50000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      M               +   !      !           baudclk apb_pclk               /   
   /           tx rx                      default                               okay                    serial@feb60000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      N               +   !      !           baudclk apb_pclk               /      /           tx rx                      default                             	  disabled                    serial@feb70000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      O               +   !      !           baudclk apb_pclk               u   	   u   
        tx rx                      default                             	  disabled                    serial@feb80000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      P               +   !      !           baudclk apb_pclk               u      u           tx rx                      default                             	  disabled                    serial@feb90000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      Q               +   !      !           baudclk apb_pclk               u      u           tx rx                      default                               okay                    serial@feba0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      R               +   !      !           baudclk apb_pclk               v      v           tx rx                      default                               okay                    serial@febb0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      S               +   !      !           baudclk apb_pclk               v   	   v   
        tx rx                      default                             	  disabled                    serial@febc0000       &    rockchip,rk3588-uart snps,dw-apb-uart                                      T               +   !      !           baudclk apb_pclk               v      v           tx rx                      default                             	  disabled                    pwm@febd0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !   L   !   K      	  pwm pclk                       default                  	  disabled                    pwm@febd0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +   !   L   !   K      	  pwm pclk                       default                  	  disabled                    pwm@febd0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !   L   !   K      	  pwm pclk                       default                  	  disabled                    pwm@febd0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +   !   L   !   K      	  pwm pclk                       default                  	  disabled                    pwm@febe0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !   O   !   N      	  pwm pclk                       default                  	  disabled                    pwm@febe0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +   !   O   !   N      	  pwm pclk                       default                  	  disabled                    pwm@febe0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !   O   !   N      	  pwm pclk                       default                  	  disabled                    pwm@febe0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +   !   O   !   N      	  pwm pclk                       default                  	  disabled                    pwm@febf0000          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !   R   !   Q      	  pwm pclk                       default                  	  disabled                    pwm@febf0010          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                             +   !   R   !   Q      	  pwm pclk                       default                  	  disabled                    pwm@febf0020          (    rockchip,rk3588-pwm rockchip,rk3328-pwm                              +   !   R   !   Q      	  pwm pclk                       default                  	  disabled                    pwm@febf0030          (    rockchip,rk3588-pwm rockchip,rk3328-pwm              0               +   !   R   !   Q      	  pwm pclk                       default                  	  disabled                    thermal-zones                package-thermal         
            
            
                    trips      package-crit            
 8        
          	  critical                          bigcore0-thermal            
   d        
            
                   trips      bigcore0-alert          
 L        
          passive                  bigcore0-crit           
 8        
          	  critical                       cooling-maps       map0                                         bigcore2-thermal            
   d        
            
                   trips      bigcore2-alert          
 L        
          passive                  bigcore2-crit           
 8        
          	  critical                       cooling-maps       map0                             	            littlecore-thermal          
   d        
            
                   trips      littlecore-alert            
 L        
          passive                  littlecore-crit         
 8        
          	  critical                       cooling-maps       map0                     0                          center-thermal          
            
            
                   trips      center-crit         
 8        
          	  critical                          gpu-thermal         
   d        
            
                   trips      gpu-alert           
 L        
          passive                  gpu-crit            
 8        
          	  critical                       cooling-maps       map0                                      npu-thermal         
            
            
                   trips      npu-crit            
 8        
          	  critical                             tsadc@fec00000            rockchip,rk3588-tsadc                                                     +   !      !           tsadc apb_pclk          k   !           {            !   V   !   W        tsadc-apb tsadc                  ,            C                       ^           default sleep           h           okay                     adc@fec10000              rockchip,rk3588-saradc                                                    ~           +   !      !           saradc apb_pclk            !   U        saradc-apb        	  disabled                    i2c@fec80000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !         	  i2c pclk                  C                          default                      +            okay                 rtc@51            haoyu,hym8563              Q                                              #hym8563         default                                        i2c@fec90000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !         	  i2c pclk                  D                          default                      +          	  disabled                    i2c@feca0000          (    rockchip,rk3588-i2c rockchip,rk3399-i2c                              +   !      !         	  i2c pclk                  E                          default                      +          	  disabled                    spi@fecb0000          (    rockchip,rk3588-spi rockchip,rk3066-spi                                    J               +   !      !           spiclk apb_pclk            v      v           tx rx           	R                            default                      +          	  disabled                    efuse@fecc0000            rockchip,rk3588-otp                               +   !      !      !      !           otp apb_pclk phy arb               !      !      !           otp apb arb                      +                cpu-code@2                                id@7                                  cpu-leakage@17                                cpu-leakage@18                                cpu-leakage@19                                log-leakage@1a                                gpu-leakage@1b                                cpu-version@1c                                              npu-leakage@28             (                   codec-leakage@29               )                      dma-controller@fed10000           arm,pl330 arm,primecell                     @                 Z              [                	0        +   !   p      	  apb_pclk            	G              v      phy@fed60000              rockchip,rk3588-hdptx-phy                                 +   !     !  T        ref apb                               8     !  #   !     !  c   !  d   !  e   !  !   !  "      "  phy apb init cmn lane ropll lcpll                    	  disabled               m      phy@fed80000              rockchip,rk3588-usbdp-phy                                           +   !     !  l   !  V           refclk immortal pclk utmi         (     !      !      !      !      !          init cmn lane pcs_apb pma_apb                                            x         	  disabled               %      phy@feda0000              rockchip,rk3588-mipi-dcphy                                          +   !      !        	  pclk ref                !  i   !      !      !  j        m_phy apb grf s_phy                  	  disabled               w      phy@fedb0000              rockchip,rk3588-mipi-dcphy                                          +   !      !        	  pclk ref                !  k   !      !      !  l        m_phy apb grf s_phy                  	  disabled               x      phy@fedc0000              rockchip,rk3588-csi-dphy                                 +   !           pclk                           !      !           apb phy                  	  disabled                    phy@fedc8000              rockchip,rk3588-csi-dphy                ܀                +   !           pclk                           !      !           apb phy                  	  disabled                    phy@fee00000              rockchip,rk3588-naneng-combphy                               +   !     !  v   !  W        ref apb pipe            k   !          {                       !  <   !  C        phy apb            -                   okay                     phy@fee20000              rockchip,rk3588-naneng-combphy                               +   !     !  x   !  W        ref apb pipe            k   !          {                       !  >   !  E        phy apb            -                   okay               *      sram@ff001000         
    mmio-sram                               F                                 +                   pinctrl           rockchip,rk3588-pinctrl          F                                +                 gpio@fd8a0000             rockchip,gpio-bank                                                    +   !  q   !  r         
<                                         
L                               gpio@fec20000             rockchip,gpio-bank                                                    +   !   s   !   t         
<                                         
L                              gpio@fec30000             rockchip,gpio-bank                                                    +   !   u   !   v         
<                  @                      
L                        )      gpio@fec40000             rockchip,gpio-bank                                                    +   !   w   !   x         
<                  `                      
L                        ,      gpio@fec50000             rockchip,gpio-bank                                                    +   !   y   !   z         
<                                        
L                              pcfg-pull-up                             pcfg-pull-down                            pcfg-pull-none           -                 pcfg-pull-none-drv-level-0           -        :                    pcfg-pull-none-drv-level-1           -        :                   pcfg-pull-none-drv-level-2           -        :                   pcfg-pull-none-drv-level-3           -        :                   pcfg-pull-none-drv-level-4           -        :                   pcfg-pull-none-drv-level-5           -        :                   pcfg-pull-none-drv-level-6           -        :                   pcfg-pull-none-drv-level-7           -        :                   pcfg-pull-none-drv-level-8           -        :                   pcfg-pull-none-drv-level-9           -        :   	                pcfg-pull-none-drv-level-10          -        :   
                pcfg-pull-none-drv-level-11          -        :                   pcfg-pull-none-drv-level-12          -        :                   pcfg-pull-none-drv-level-13          -        :                   pcfg-pull-none-drv-level-14          -        :                   pcfg-pull-none-drv-level-15          -        :                   pcfg-pull-up-drv-level-0                     :                    pcfg-pull-up-drv-level-1                     :                   pcfg-pull-up-drv-level-2                     :                    pcfg-pull-up-drv-level-3                     :                   pcfg-pull-up-drv-level-4                     :                   pcfg-pull-up-drv-level-5                     :                   pcfg-pull-up-drv-level-6                     :                   pcfg-pull-up-drv-level-7                     :                   pcfg-pull-up-drv-level-8                     :                   pcfg-pull-up-drv-level-9                     :   	                pcfg-pull-up-drv-level-10                    :   
                pcfg-pull-up-drv-level-11                    :                   pcfg-pull-up-drv-level-12                    :                   pcfg-pull-up-drv-level-13                    :                   pcfg-pull-up-drv-level-14                    :                   pcfg-pull-up-drv-level-15                    :                   pcfg-pull-down-drv-level-0                   :                    pcfg-pull-down-drv-level-1                   :                   pcfg-pull-down-drv-level-2                   :                   pcfg-pull-down-drv-level-3                   :                   pcfg-pull-down-drv-level-4                   :                   pcfg-pull-down-drv-level-5                   :                   pcfg-pull-down-drv-level-6                   :                   pcfg-pull-down-drv-level-7                   :                   pcfg-pull-down-drv-level-8                   :                   pcfg-pull-down-drv-level-9                   :   	                pcfg-pull-down-drv-level-10                  :   
                pcfg-pull-down-drv-level-11                  :                   pcfg-pull-down-drv-level-12                  :                   pcfg-pull-down-drv-level-13                  :                   pcfg-pull-down-drv-level-14                  :                   pcfg-pull-down-drv-level-15                  :                   pcfg-pull-up-smt                      I                pcfg-pull-down-smt                    I                pcfg-pull-none-smt           -         I                 pcfg-pull-none-drv-level-0-smt           -        :             I                pcfg-pull-none-drv-level-1-smt           -        :            I                 pcfg-pull-none-drv-level-2-smt           -        :            I                pcfg-pull-none-drv-level-3-smt           -        :            I                 pcfg-pull-none-drv-level-4-smt           -        :            I                pcfg-pull-none-drv-level-5-smt           -        :            I                 pcfg-output-high             ^                pcfg-output-low          j                 auddsm     auddsm-pins       @  u                                                                   bt1120     bt1120-pins        u                                                                                                                   
                                                                                                             can0       can0m0-pins          u                                          can0m1-pins          u         	            	                      can1       can1m0-pins          u         	            	                   can1m1-pins          u      
                                     can2       can2m0-pins          u         	            	                   can2m1-pins          u          
             
                      cif    cif-clk         u                      	      cif-dvp-clk       0  u                  
                            
      cif-dvp-bus16           u                                                                                                                cif-dvp-bus8            u                                                                                                                    clk32k     clk32k-in           u       
                      clk32k-out0         u       
                      clk32k-out1         u                               cpu    cpu-pins             u                                             ddrphych0      ddrphych0-pins        @  u                                                                    ddrphych1      ddrphych1-pins        @  u                                                                   ddrphych2      ddrphych2-pins        @  u                  	            
                                     ddrphych3      ddrphych3-pins        @  u                                                                   dp0    dp0m0-pins          u                            dp0m1-pins          u          
                   dp0m2-pins          u                                dp1    dp1m0-pins          u                            dp1m1-pins          u          
                   dp1m2-pins          u                               emmc       emmc-rstnout            u                             emmc-bus8           u                                                                                                                 emmc-clk            u                             emmc-cmd            u                              emmc-data-strobe            u                                eth1       eth1-pins           u                               fspi       fspim0-pins       `  u                                                                                         fspim0-cs1          u                            fspim2-pins       `  u                                                                                         fspim2-cs1          u                            fspim1-pins       `  u                                                                  	                       fspim1-cs1          u                      !         gmac1      gmac1-miim           u                                  "      gmac1-clkinout          u                      #      gmac1-rx-bus2         0  u                              	                $      gmac1-tx-bus2         0  u                                              %      gmac1-rgmii-clk          u                                  &      gmac1-rgmii-bus       @  u                                                           '      gmac1-ppsclk            u                      (      gmac1-ppstrig           u                      )      gmac1-ptp-ref-clk           u                      *      gmac1-txer          u      
                +         gpu    gpu-pins            u                       ,         hdmi       hdmim0-rx-cec           u                      -      hdmim0-rx-hpdin         u                      .      hdmim0-rx-scl           u                       /      hdmim0-rx-sda           u                       0      hdmim0-tx0-cec          u                       y      hdmim0-tx0-hpd          u                       z      hdmim0-tx0-scl          u                       {      hdmim0-tx0-sda          u                       |      hdmim0-tx1-hpd          u                      	      hdmim1-rx-cec           u                      1      hdmim1-rx-hpdin         u                      2      hdmim1-rx-scl           u                      3      hdmim1-rx-sda           u                      4      hdmim1-tx0-cec          u                       5      hdmim1-tx0-hpd          u                      6      hdmim1-tx0-scl          u                       7      hdmim1-tx0-sda          u                       8      hdmim1-tx1-cec          u                       9      hdmim1-tx1-hpd          u                      :      hdmim1-tx1-scl          u                      
      hdmim1-tx1-sda          u                            hdmim2-rx-cec           u                      ;      hdmim2-rx-hpdin         u                      <      hdmim2-rx-scl           u                      =      hdmim2-rx-sda           u                      >      hdmim2-tx0-scl          u                      ?      hdmim2-tx0-sda          u                      @      hdmim2-tx1-cec          u                            hdmim2-tx1-scl          u                      A      hdmim2-tx1-sda          u                      B      hdmi-debug0         u                      C      hdmi-debug1         u                      D      hdmi-debug2         u      	                E      hdmi-debug3         u      
                F      hdmi-debug4         u                      G      hdmi-debug5         u                      H      hdmi-debug6         u                       I      hdmim0-tx1-cec          u                      J      hdmim0-tx1-scl          u                      K      hdmim0-tx1-sda          u                      L         i2c0       i2c0m0-xfer          u                                    M      i2c0m2-xfer          u                                     .      i2c0m1-xfer          u         	            	             N         i2c1       i2c1m0-xfer          u          	             	                    i2c1m1-xfer          u                    	                O      i2c1m2-xfer          u          	             	             P      i2c1m3-xfer          u         	            	             Q      i2c1m4-xfer          u         	            	             R         i2c2       i2c2m0-xfer          u          	             	                    i2c2m2-xfer          u         	            	             S      i2c2m3-xfer          u         	            	             T      i2c2m4-xfer          u         	             	             U      i2c2m1-xfer          u         	            	             V         i2c3       i2c3m0-xfer          u         	            	                    i2c3m1-xfer          u         	            	             W      i2c3m2-xfer          u         	            	             X      i2c3m4-xfer          u         	            	             Y      i2c3m3-xfer          u      
   	            	             Z         i2c4       i2c4m0-xfer          u         	            	                    i2c4m2-xfer          u          	             	             [      i2c4m3-xfer          u         	            	             \      i2c4m4-xfer          u         	            	             ]      i2c4m1-xfer          u         	            	             ^         i2c5       i2c5m0-xfer          u         	            	                    i2c5m1-xfer          u         	            	             _      i2c5m2-xfer          u         	            	             `      i2c5m3-xfer          u         	            	             a      i2c5m4-xfer          u         	            	             b         i2c6       i2c6m0-xfer          u          	             	                    i2c6m1-xfer          u         	            	             c      i2c6m3-xfer          u      	   	            	             d      i2c6m4-xfer          u         	             	             e      i2c6m2-xfer          u         	            	             f         i2c7       i2c7m0-xfer          u         	            	                    i2c7m2-xfer          u         	            	             g      i2c7m3-xfer          u      
   	            	             h      i2c7m1-xfer          u         	            	             i         i2c8       i2c8m0-xfer          u         	            	                    i2c8m2-xfer          u         	            	             j      i2c8m3-xfer          u         	            	             k      i2c8m4-xfer          u         	            	             l      i2c8m1-xfer          u         	         	   	             m         i2s0       i2s0-lrck           u                             i2s0-mclk           u                      n      i2s0-sclk           u                             i2s0-sdi0           u                             i2s0-sdi1           u                             i2s0-sdi2           u                             i2s0-sdi3           u                             i2s0-sdo0           u                             i2s0-sdo1           u                             i2s0-sdo2           u                             i2s0-sdo3           u                                i2s1       i2s1m0-lrck         u                             i2s1m0-mclk         u                       o      i2s1m0-sclk         u                             i2s1m0-sdi0         u                             i2s1m0-sdi1         u                             i2s1m0-sdi2         u                             i2s1m0-sdi3         u                             i2s1m0-sdo0         u      	                       i2s1m0-sdo1         u      
                       i2s1m0-sdo2         u                             i2s1m0-sdo3         u                             i2s1m1-lrck         u                       p      i2s1m1-mclk         u                       q      i2s1m1-sclk         u                       r      i2s1m1-sdi0         u                       s      i2s1m1-sdi1         u                       t      i2s1m1-sdi2         u                       u      i2s1m1-sdi3         u                       v      i2s1m1-sdo0         u                       w      i2s1m1-sdo1         u                       x      i2s1m1-sdo2         u                       y      i2s1m1-sdo3         u                       z         i2s2       i2s2m0-lrck         u                      {      i2s2m0-mclk         u                      |      i2s2m0-sclk         u                      }      i2s2m0-sdi          u                      ~      i2s2m0-sdo          u                            i2s2m1-lrck         u                             i2s2m1-mclk         u                            i2s2m1-sclk         u                             i2s2m1-sdi          u      
                       i2s2m1-sdo          u                                i2s3       i2s3-lrck           u                             i2s3-mclk           u                             i2s3-sclk           u                             i2s3-sdi            u                             i2s3-sdo            u                                jtag       jtagm0-pins          u                                        jtagm1-pins          u                                        jtagm2-pins          u                                             litcpu     litcpu-pins         u                                mcu    mcum0-pins           u                                        mcum1-pins           u                                           mipi       mipim0-camera0-clk          u      	                      mipim0-camera1-clk          u                            mipim0-camera2-clk          u                            mipim0-camera3-clk          u                            mipim0-camera4-clk          u                            mipim1-camera0-clk          u                            mipim1-camera1-clk          u                            mipim1-camera2-clk          u                            mipim1-camera3-clk          u                            mipim1-camera4-clk          u      	                      mipi-te0            u                            mipi-te1            u                               npu    npu-pins            u                                pcie20x1       pcie20x1m0-clkreqn          u                            pcie20x1m0-perstn           u                            pcie20x1m0-waken            u                            pcie20x1m1-clkreqn          u                            pcie20x1m1-perstn           u                            pcie20x1m1-waken            u                            pcie20x1-2-button-rstn          u                               pcie30phy      pcie30phy-pins           u                                           pcie30x1       pcie30x1m0-0-clkreqn            u                             pcie30x1m0-0-perstn         u                             pcie30x1m0-0-waken          u                             pcie30x1m0-1-clkreqn            u                             pcie30x1m0-1-perstn         u                             pcie30x1m0-1-waken          u                             pcie30x1m1-0-clkreqn            u                            pcie30x1m1-0-perstn         u                            pcie30x1m1-0-waken          u                            pcie30x1m1-1-clkreqn            u                             pcie30x1m1-1-perstn         u                            pcie30x1m1-1-waken          u                            pcie30x1m2-0-clkreqn            u                            pcie30x1m2-0-perstn         u                            pcie30x1m2-0-waken          u                            pcie30x1m2-1-clkreqn            u                             pcie30x1m2-1-perstn         u                            pcie30x1m2-1-waken          u                            pcie30x1-0-button-rstn          u      	                      pcie30x1-1-button-rstn          u      
                         pcie30x2       pcie30x2m0-clkreqn          u                             pcie30x2m0-perstn           u                             pcie30x2m0-waken            u                             pcie30x2m1-clkreqn          u                            pcie30x2m1-perstn           u                            pcie30x2m1-waken            u                            pcie30x2m2-clkreqn          u                            pcie30x2m2-perstn           u                            pcie30x2m2-waken            u                            pcie30x2m3-clkreqn          u                            pcie30x2m3-perstn           u                            pcie30x2m3-waken            u                            pcie30x2-button-rstn            u                               pcie30x4       pcie30x4m0-clkreqn          u                             pcie30x4m0-perstn           u                             pcie30x4m0-waken            u                             pcie30x4m1-clkreqn          u                            pcie30x4m1-perstn           u                            pcie30x4m1-waken            u                            pcie30x4m2-clkreqn          u                            pcie30x4m2-perstn           u                            pcie30x4m2-waken            u                            pcie30x4m3-clkreqn          u                            pcie30x4m3-perstn           u      
                      pcie30x4m3-waken            u      	                      pcie30x4-button-rstn            u                               pdm0       pdm0m0-clk          u                            pdm0m0-clk1         u                            pdm0m0-sdi0         u                            pdm0m0-sdi1         u                            pdm0m0-sdi2         u                            pdm0m0-sdi3         u                            pdm0m1-clk          u                             pdm0m1-clk1         u                             pdm0m1-sdi0         u                             pdm0m1-sdi1         u                             pdm0m1-sdi2         u                             pdm0m1-sdi3         u                                pdm1       pdm1m0-clk          u                            pdm1m0-clk1         u                            pdm1m0-sdi0         u                            pdm1m0-sdi1         u                            pdm1m0-sdi2         u                            pdm1m0-sdi3         u                            pdm1m1-clk          u                            pdm1m1-clk1         u                            pdm1m1-sdi0         u                            pdm1m1-sdi1         u                            pdm1m1-sdi2         u      	                      pdm1m1-sdi3         u      
                         pmic       pmic-pins         p  u                                                                                                               pmu    pmu-pins            u                                pwm0       pwm0m0-pins         u                        1      pwm0m1-pins         u                            pwm0m2-pins         u                               pwm1       pwm1m0-pins         u                        2      pwm1m1-pins         u                            pwm1m2-pins         u                               pwm2       pwm2m0-pins         u                             pwm2m1-pins         u      	                 3      pwm2m2-pins         u                               pwm3       pwm3m0-pins         u                        4      pwm3m1-pins         u      
                      pwm3m2-pins         u                            pwm3m3-pins         u                               pwm4       pwm4m0-pins         u                              pwm4m1-pins         u                               pwm5       pwm5m0-pins         u       	                       pwm5m1-pins         u                             pwm5m2-pins         u                               pwm6       pwm6m0-pins         u                              pwm6m1-pins         u                            pwm6m2-pins         u                               pwm7       pwm7m0-pins         u                              pwm7m1-pins         u                            pwm7m2-pins         u                            pwm7m3-pins         u                               pwm8       pwm8m0-pins         u                             pwm8m1-pins         u                            pwm8m2-pins         u                               pwm9       pwm9m0-pins         u                             pwm9m1-pins         u                            pwm9m2-pins         u                               pwm10      pwm10m0-pins            u                              pwm10m1-pins            u                            pwm10m2-pins            u                               pwm11      pwm11m0-pins            u                             pwm11m1-pins            u                            pwm11m2-pins            u                            pwm11m3-pins            u                               pwm12      pwm12m0-pins            u                             pwm12m1-pins            u                               pwm13      pwm13m0-pins            u                             pwm13m1-pins            u                            pwm13m2-pins            u                                pwm14      pwm14m0-pins            u                             pwm14m1-pins            u      
                      pwm14m2-pins            u                               pwm15      pwm15m0-pins            u                             pwm15m1-pins            u                            pwm15m2-pins            u                            pwm15m3-pins            u                               refclk     refclk-pins         u                                 sata       sata-pins         0  u                                                          sata0      sata0m0-pins            u                            sata0m1-pins            u                      	         sata1      sata1m0-pins            u                      
      sata1m1-pins            u                               sata2      sata2m0-pins            u      	                      sata2m1-pins            u                               sdio       sdiom1-pins       `  u                                                                                     sdiom0-pins       `  u                  
                                                	                         sdmmc      sdmmc-bus4        @  u                                                                 sdmmc-clk           u                             sdmmc-cmd           u                             sdmmc-det           u                             sdmmc-pwren         u                                spdif0     spdif0m0-tx         u                             spdif0m1-tx         u                               spdif1     spdif1m0-tx         u                             spdif1m1-tx         u      	                      spdif1m2-tx         u                               spi0       spi0m0-pins       0  u                                                     spi0m0-cs0          u                             spi0m0-cs1          u                             spi0m1-pins       0  u                                                  spi0m1-cs0          u      
                     spi0m1-cs1          u      	                     spi0m2-pins       0  u                 	           
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             b         uart8      uart8m0-xfer             u      	   
           
            c      uart8m0-ctsn            u         
             d      uart8m0-rtsn            u      
   
             e      uart8m1-xfer             u         
           
                   uart8m1-ctsn            u         
             f      uart8m1-rtsn            u         
             g      uart8-xfer          u      	   
            h         uart9      uart9m0-xfer             u         
           
            i      uart9m1-xfer             u         
           
                   uart9m1-ctsn            u         
             j      uart9m1-rtsn            u          
             k      uart9m2-xfer             u         
           
            l      uart9m2-ctsn            u         
             m      uart9m2-rtsn            u         
             n      uart9m0-ctsn            u         
             o      uart9m0-rtsn            u         
             p         vop    vop-pins            u                      q         bt656      bt656-pins          u                                                                                                              r         gpio-func      tsadc-gpio-func         u                                  eth0       eth0-pins           u                      s         gmac0      gmac0-miim           u                                  t      gmac0-clkinout          u                      u      gmac0-rx-bus2         0  u                                              v      gmac0-tx-bus2         0  u                                              w      gmac0-rgmii-clk          u                                  x      gmac0-rgmii-bus       @  u                              	            
                y      gmac0-ppsclk            u                      z      gmac0-ppstring          u                      {      gmac0-ptp-refclk            u                      |      gmac0-txer          u                      }         leds       led_user_en         u                        &         pcie2      pcie2-1-vcc-en                    u                    pcie2-1-rst                   u                   pcie2-0-rst         u                                pcie3      pcie30x2-perstn-m1-l            u                             pcie-4g-pwen            u                       *      pcie30x4-perstn-m1-l            u                             pcie30x4-pwren-h            u                       +         hym8563    hym8563-int         u                                  usb    vcc5v0-host-en          u                       -            hdmi1-sound           simple-audio-card           i2s                    hdmi1         	  disabled              ~   simple-audio-card,codec                 simple-audio-card,cpu                      usb@fc400000              rockchip,rk3588-dwc3 snps,dwc3              @       @                                +   !     !     !          ref_clk suspend_clk bus_clk         otg                        usb2-phy usb3-phy         
  utmi_wide              "              !  S                           :         [      	  disabled                    syscon@fd5b8000       %    rockchip,rk3588-pcie3-phy-grf syscon                [                  %      syscon@fd5c0000       $    rockchip,rk3588-pipe-phy-grf syscon             \                   $      syscon@fd5cc000       $    rockchip,rk3588-usbdpphy-grf syscon             \       @           #      syscon@fd5d4000       .    rockchip,rk3588-usb2phy-grf syscon simple-mfd               ]@       @                      +             "   usb2phy@4000              rockchip,rk3588-usb2phy           @                        +   !          phyclk          #usb480m_phy1                                    !  n   !          phy apb       	  disabled              !   otg-port                      	  disabled                          syscon@fd5e4000       $    rockchip,rk3588-hdptxphy-grf syscon             ^@                         spdif-tx@fddb8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             ۀ                P   !           k   !        
  mclk hclk           +   !     !          tx             u                                    "           g          	  disabled                    i2s@fddc8000              rockchip,rk3588-i2s-tdm             ܀                                      +   !     !     !          mclk_tx mclk_rx hclk            k   !          P   !              v           tx             "              !          tx-m            g          	  disabled                    spdif-tx@fdde8000         ,    rockchip,rk3588-spdif rockchip,rk3568-spdif             ހ                P   !           k   !  F      
  mclk hclk           +   !  I   !  E        tx             u                                    "           g          	  disabled                    i2s@fddf4000              rockchip,rk3588-i2s-tdm             @                                      +   !  9   !  9   !  ?        mclk_tx mclk_rx hclk            k   !  6        P   !              v           tx             "              !          tx-m            g          	  disabled                    i2s@fddf8000              rockchip,rk3588-i2s-tdm             ߀                                      +   !  +   !  +   !  '        mclk_tx mclk_rx hclk            k   !  (        P   !              v           rx             "              !          rx-m            g          	  disabled                    i2s@fde00000              rockchip,rk3588-i2s-tdm                                                    +   !  &   !  &   !  "        mclk_tx mclk_rx hclk            k   !  #        P   !              v           rx             "              !          rx-m            g          	  disabled                    dp@fde60000           rockchip,rk3588-dp                      @                               k   !          { $       (  +   !     !     !     !     !          apb aux hdcp i2s spdif                          "              !          g          	  disabled                 ports                        +       port@0                              port@1                                   hdmi@fdea0000             rockchip,rk3588-dw-hdmi-qp                             0  +   !     !     !     !  9   !  S   !          pclk earc ref aud hdp hclk_vo1        P                                                                i               6avp cec earc main hpd              n        default             	  
             "              !     !  1        ref hdp            p        x   r        g            okay                 ports                        +       port@0                           endpoint            @             t         port@1                          endpoint            @            (               edp@fded0000              rockchip,rk3588-edp                              +   !     !          dp pclk                                  n        dp             "              !     !          dp apb             r      	  disabled                 ports                        +       port@0                              port@1                                   hdmi_receiver@fdee0000        .    rockchip,rk3588-hdmirx-ctrler snps,dw-hdmi-rx                       `       0                                                    6cec hdmi dma          8  +   !  	   !     !     !  
   !     !  !   !        3  aclk audio cr_para pclk ref hclk_s_hdmirx hclk_vo1                       "               !     !     !     !          axi apb ref biu            p        "   r      	  disabled                    pcie@fe150000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                        4  +   !  @   !  E   !  ;   !  J   !  O   !  t        -  aclk_mst aclk_slv aclk_dbi pclk aux pipe ref             pci       P                                                                           6sys pmc msg legacy err                                          `                                                                                                                                                                                	  pcie-phy               "   "      T  F                                                     @      	        @         0     
@        @                                      dbi apb config             !  &   !  +      	  pwr pipe            okay            default                                                   legacy-interrupt-controller                                                                                       pcie-ep@fe150000              rockchip,rk3588-pcie-ep       P     
@             
@                         	        @      
@0                  dbi dbi2 apb addr_space atu       0  +   !  @   !  E   !  ;   !  J   !  O   !  t      )  aclk_mst aclk_slv aclk_dbi pclk aux pipe                                                                                                                                       +  6sys pmc msg legacy err dma0 dma1 dma2 dma3                                        	  pcie-phy               "   "           !  &   !  +      	  pwr pipe          	  disabled                    pcie@fe160000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                        +                       4  +   !  A   !  F   !  <   !  K   !  P   !  u        -  aclk_mst aclk_slv aclk_dbi pclk aux pipe ref             pci       P                                                                              6sys pmc msg legacy err                                          `                                                                                                                                                                           	  pcie-phy               "   "      T  F                                                     @      	@       @         0     
@@       @                                      dbi apb config             !  '   !  ,      	  pwr pipe            okay            default                                                   legacy-interrupt-controller                                                                                        pcie@fe170000         *    rockchip,rk3588-pcie rockchip,rk3568-pcie                  /      0  +   !  B   !  G   !  =   !  L   !  Q   !        )  aclk_mst aclk_slv aclk_dbi pclk aux pipe             pci       P                                                                                6sys pmc msg legacy err                                          `                                                                                                                                                                                   	  pcie-phy               "   "      T  F                                                     @      	       @         0     
@       @                                      dbi apb config             !  (   !  -      	  pwr pipe                         +           okay            default                                                   legacy-interrupt-controller                                                                                        ethernet@fe1b0000         &    rockchip,rk3588-gmac snps,dwmac-4.20a                                                                     6macirq eth_wake_irq       (  +   !  6   !  7   !  X   !  ]   !  4      0  stmmaceth clk_mac_ref pclk_mac aclk_mac ptp_ref            "   !           !  #      
  stmmaceth              p           -        &           6        G          Z           m      	  disabled                 mdio              snps,dwmac-mdio                      +                    stmmac-axi-config           v                                                               rx-queues-config                            queue0        queue1           tx-queues-config                            queue0        queue1              sata@fe220000         '    rockchip,rk3588-dwc-ahci snps,dwc-ahci              "                                    (  +   !  c   !  `   !  f   !  U   !  p        sata pmalive rxoob ref asic                                 +          	  disabled                 sata-port@0                      @                     	  sata-phy                                     phy@fed70000              rockchip,rk3588-hdptx-phy                                 +   !     !  U        ref apb                               8     !  &   !     !  f   !  g   !  h   !  $   !  %      "  phy apb init cmn lane ropll lcpll                      okay               n      phy@fed90000              rockchip,rk3588-usbdp-phy                                           +   !     !  m   !  W  !        refclk immortal pclk utmi         (     !      !      !      !      !          init cmn lane pcs_apb pma_apb             "                     #        x         	  disabled                    phy@fee10000              rockchip,rk3588-naneng-combphy                               +   !     !  w   !  W        ref apb pipe            k   !          {                       !  =   !  D        phy apb            -          $        okay                    phy@fee80000              rockchip,rk3588-pcie3-phy                                            +   !  y        pclk               !  H        phy            -          %        okay                                                                opp-table-cluster0            operating-points-v2                        opp-1008000000              <          
L 
L ~          @      opp-1200000000              G          
4 
4 ~          @      opp-1416000000              Tfr            ~          @               opp-1608000000              _"          P P ~          @      opp-1800000000              kI          ~ ~ ~          @         opp-table-cluster1            operating-points-v2                        opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table-cluster2            operating-points-v2                        opp-1200000000              G          
L 
L B@          @      opp-1416000000              Tfr            B@          @      opp-1608000000              _"            B@          @      opp-1800000000              kI          P P B@          @      opp-2016000000              x)          H H B@          @      opp-2208000000              h          l l B@          @      opp-2400000000                        B@ B@ B@          @         opp-table-gpu             operating-points-v2            #   opp-300000000                         
L 
L P      opp-400000000               ׄ          
L 
L P      opp-500000000               e          
L 
L P      opp-600000000               #F          
L 
L P      opp-700000000               )'          
` 
` P      opp-800000000               /          q q P      opp-900000000               5          5  5  P      opp-1000000000              ;          P P P         gpio-leds         
    gpio-leds      led-0           %         
  
]heartbeat                           
  +heartbeat           default           &                   regulator-vcc12v-dcin             regulator-fixed         vcc12v_dcin                   +        =          U            '      regulator-vcc5v0-sys              regulator-fixed         vcc5v0_sys                    +        = LK@        U LK@          '           +      regulator-vcc-1v1-nldo-s3             regulator-fixed         vcc_1v1_nldo_s3                   +        =         U            +                 chosen          Aserial2:1500000n8         hdmi1-con             hdmi-connector          a      port       endpoint            @  (                      pcie-oscillator           gated-fixed-clock                                #pcie30_refclk           M                  regulator-vcc3v3-pcie2x1l0            regulator-fixed         vcc3v3_pcie2x1l0            = 2Z        U 2Z        X                             regulator-vcc3v3-bkey             regulator-fixed          i          )               default           *        vcc3v3_bkey         = 2Z        U 2Z        X             +                regulator-vcc3v3-pi6c-05              regulator-fixed          i          )               default           +        vcc3v3_pcie30           = 2Z        U 2Z        X             +                regulator-vcc5v0-host             regulator-fixed          i        |  ,               default           -        vcc5v0_host         = LK@        U LK@         +                    +           ,      __symbols__         /cpus/cpu@0         /cpus/cpu@100           /cpus/cpu@200           /cpus/cpu@300           /cpus/cpu@400           /cpus/cpu@500           /cpus/cpu@600           /cpus/cpu@700           /cpus/idle-states/cpu-sleep         /cpus/l2-cache-l0           /cpus/l2-cache-l1           /cpus/l2-cache-l2           /cpus/l2-cache-l3           /cpus/l2-cache-b0           /cpus/l2-cache-b1           /cpus/l2-cache-b2           /cpus/l2-cache-b3         
  #/l3-cache           ,/display-subsystem          >/firmware/scmi          C/firmware/scmi/protocol@14          L/firmware/scmi/protocol@16          W/hdmi0-sound          	  c/clock-0          	  h/clock-1          	  o/clock-2            v/reserved-memory/shmem@10f000         #  /reserved-memory/hdmi-receiver-cma          /gpu@fb000000           /usb@fc000000           /usb@fc800000           /usb@fc840000           /usb@fc880000           /usb@fc8c0000           /usb@fcd00000           /iommu@fc900000         /iommu@fcb00000         /syscon@fd58a000            /syscon@fd58c000            /syscon@fd5e8000            '/syscon@fd5ec000            6/syscon@fd5a4000            >/syscon@fd5a6000            F/syscon@fd5a8000            N/syscon@fd5ac000            V/syscon@fd5b0000            ^/syscon@fd5b4000            k/syscon@fd5b5000            x/syscon@fd5bc000            /syscon@fd5c4000            /syscon@fd5c8000            /syscon@fd5d0000            /syscon@fd5d0000/usb2phy@0        $  /syscon@fd5d0000/usb2phy@0/otg-port         /syscon@fd5d8000            /syscon@fd5d8000/usb2phy@8000         (  /syscon@fd5d8000/usb2phy@8000/host-port         /syscon@fd5dc000            /syscon@fd5dc000/usb2phy@c000         (  /syscon@fd5dc000/usb2phy@c000/host-port         /syscon@fd5e0000            /syscon@fd5f0000            /sram@fd600000           /clock-controller@fd7c0000           [/i2c@fd880000           $/i2c@fd880000/regulator@42          4/i2c@fd880000/regulator@43          D/serial@fd890000            J/pwm@fd8b0000           O/pwm@fd8b0010           T/pwm@fd8b0020           Y/pwm@fd8b0030           </power-management@fd8d8000        ,  ^/power-management@fd8d8000/power-controller       ;  d/power-management@fd8d8000/power-controller/power-domain@8        <  k/power-management@fd8d8000/power-controller/power-domain@12         r/npu@fdab0000           ~/iommu@fdab9000         /npu@fdac0000           /iommu@fdaca000         /npu@fdad0000           /iommu@fdada000         /video-codec@fdb50000           /iommu@fdb50800         /rga@fdb80000           /video-codec@fdba0000           /iommu@fdba0800         /video-codec@fdba4000           /iommu@fdba4800         /video-codec@fdba8000           /iommu@fdba8800         /video-codec@fdbac000           /iommu@fdbac800         -/video-codec@fdc70000           2/vop@fdd90000           6/vop@fdd90000/ports         >/vop@fdd90000/ports/port@0        &  B/vop@fdd90000/ports/port@0/endpoint@8           P/vop@fdd90000/ports/port@1          T/vop@fdd90000/ports/port@2          X/vop@fdd90000/ports/port@3          \/iommu@fdd97e00         d/spdif-tx@fddb0000          n/i2s@fddc0000           w/spdif-tx@fdde0000          /i2s@fddf0000           /i2s@fddfc000           /dsi@fde20000           /dsi@fde20000/ports/port@0          /dsi@fde20000/ports/port@1          /dsi@fde30000           /dsi@fde30000/ports/port@0          /dsi@fde30000/ports/port@1          /dp@fde50000            /dp@fde50000/ports/port@0           /dp@fde50000/ports/port@1           /hdmi@fde80000          /hdmi@fde80000/ports/port@0         /hdmi@fde80000/ports/port@1         /edp@fdec0000           /edp@fdec0000/ports/port@0          /edp@fdec0000/ports/port@1          /qos@fdf35000           /qos@fdf35200           /qos@fdf35400           "/qos@fdf35600           -/qos@fdf36000           8/qos@fdf39000           A/qos@fdf3d800           K/qos@fdf3e000           V/qos@fdf3e200           a/qos@fdf3e400           p/qos@fdf3e600           /qos@fdf40000           /qos@fdf40200           /qos@fdf40400           /qos@fdf40500           /qos@fdf40600           /qos@fdf40800           /qos@fdf41000           /qos@fdf41100           /qos@fdf60000           /qos@fdf60200           	/qos@fdf60400           /qos@fdf61000           +/qos@fdf61200           </qos@fdf61400           M/qos@fdf62000           Y/qos@fdf63000           e/qos@fdf64000           m/qos@fdf66000           u/qos@fdf66200           /qos@fdf66400           /qos@fdf66600           /qos@fdf66800           /qos@fdf66a00           /qos@fdf66c00           /qos@fdf66e00           /qos@fdf67000           /qos@fdf67200           /qos@fdf70000           /qos@fdf71000           /qos@fdf72000           /qos@fdf72200           /qos@fdf72400            /qos@fdf80000           */qos@fdf81000           4/qos@fdf81200           ?/qos@fdf82000           J/qos@fdf82200           U/dfi@fe060000           Y/pcie@fe180000        +  c/pcie@fe180000/legacy-interrupt-controller          r/pcie@fe190000        +  |/pcie@fe190000/legacy-interrupt-controller          /ethernet@fe1c0000          /ethernet@fe1c0000/mdio       %  /ethernet@fe1c0000/stmmac-axi-config          $  /ethernet@fe1c0000/rx-queues-config       $  /ethernet@fe1c0000/tx-queues-config         /sata@fe210000          /sata@fe230000          /spi@fe2b0000           E/mmc@fe2c0000           ]/mmc@fe2d0000           /mmc@fe2e0000           /i2s@fe470000           /i2s@fe480000           /i2s@fe490000           /i2s@fe4a0000           /spdif-tx@fe4e0000          /spdif-tx@fe4f0000          "/interrupt-controller@fe600000        7  &/interrupt-controller@fe600000/msi-controller@fe640000        7  +/interrupt-controller@fe600000/msi-controller@fe660000        D  0/interrupt-controller@fe600000/ppi-partitions/interrupt-partition-0       D  ?/interrupt-controller@fe600000/ppi-partitions/interrupt-partition-1         N/dma-controller@fea10000            T/dma-controller@fea30000             `/i2c@fea90000            e/i2c@feaa0000            j/i2c@feab0000            o/i2c@feac0000            t/i2c@fead0000           Z/timer@feae0000         a/watchdog@feaf0000           /spi@feb00000            /spi@feb10000            /spi@feb20000         $  e/spi@feb20000/pmic@0/dvs1-null-pins       $  u/spi@feb20000/pmic@0/dvs2-null-pins       $  /spi@feb20000/pmic@0/dvs3-null-pins       *  /spi@feb20000/pmic@0/regulators/dcdc-reg1         *  /spi@feb20000/pmic@0/regulators/dcdc-reg1         *  /spi@feb20000/pmic@0/regulators/dcdc-reg2         *  /spi@feb20000/pmic@0/regulators/dcdc-reg2         *  /spi@feb20000/pmic@0/regulators/dcdc-reg3         *  /spi@feb20000/pmic@0/regulators/dcdc-reg4         *  /spi@feb20000/pmic@0/regulators/dcdc-reg4         *  /spi@feb20000/pmic@0/regulators/dcdc-reg5         *  /spi@feb20000/pmic@0/regulators/dcdc-reg6         *  /spi@feb20000/pmic@0/regulators/dcdc-reg7         *  !/spi@feb20000/pmic@0/regulators/dcdc-reg8         *  ,/spi@feb20000/pmic@0/regulators/dcdc-reg9         +  8/spi@feb20000/pmic@0/regulators/dcdc-reg10        *  C/spi@feb20000/pmic@0/regulators/pldo-reg1         *  D/spi@feb20000/pmic@0/regulators/pldo-reg2         *  O/spi@feb20000/pmic@0/regulators/pldo-reg3         *  [/spi@feb20000/pmic@0/regulators/pldo-reg4         *  f/spi@feb20000/pmic@0/regulators/pldo-reg5         *  r/spi@feb20000/pmic@0/regulators/pldo-reg6         *  {/spi@feb20000/pmic@0/regulators/nldo-reg1         *  /spi@feb20000/pmic@0/regulators/nldo-reg2         *  /spi@feb20000/pmic@0/regulators/nldo-reg3         *  /spi@feb20000/pmic@0/regulators/nldo-reg4         *  /spi@feb20000/pmic@0/regulators/nldo-reg5            /spi@feb30000           /serial@feb40000            /serial@feb50000            /serial@feb60000            /serial@feb70000            /serial@feb80000            /serial@feb90000            /serial@feba0000            /serial@febb0000            /serial@febc0000            /pwm@febd0000           /pwm@febd0010           /pwm@febd0020           /pwm@febd0030           /pwm@febe0000           /pwm@febe0010           /pwm@febe0020           	/pwm@febe0030           /pwm@febf0000           /pwm@febf0010           /pwm@febf0020           !/pwm@febf0030           '/thermal-zones          5/thermal-zones/package-thermal        2  E/thermal-zones/package-thermal/trips/package-crit            R/thermal-zones/bigcore0-thermal       5  c/thermal-zones/bigcore0-thermal/trips/bigcore0-alert          4  r/thermal-zones/bigcore0-thermal/trips/bigcore0-crit          /thermal-zones/bigcore2-thermal       5  /thermal-zones/bigcore2-thermal/trips/bigcore2-alert          4  /thermal-zones/bigcore2-thermal/trips/bigcore2-crit       "  /thermal-zones/littlecore-thermal         9  /thermal-zones/littlecore-thermal/trips/littlecore-alert          8  /thermal-zones/littlecore-thermal/trips/littlecore-crit         /thermal-zones/center-thermal         0  /thermal-zones/center-thermal/trips/center-crit         /thermal-zones/gpu-thermal        +  
/thermal-zones/gpu-thermal/trips/gpu-alert        *  /thermal-zones/gpu-thermal/trips/gpu-crit           /thermal-zones/npu-thermal        *  )/thermal-zones/npu-thermal/trips/npu-crit           2/tsadc@fec00000         8/adc@fec10000            y/i2c@fec80000           ?/i2c@fec80000/rtc@51             ~/i2c@fec90000            /i2c@feca0000            /spi@fecb0000           G/efuse@fecc0000         K/efuse@fecc0000/cpu-code@2          T/efuse@fecc0000/id@7            [/efuse@fecc0000/cpu-leakage@17          i/efuse@fecc0000/cpu-leakage@18          w/efuse@fecc0000/cpu-leakage@19          /efuse@fecc0000/log-leakage@1a          /efuse@fecc0000/gpu-leakage@1b          /efuse@fecc0000/cpu-version@1c          /efuse@fecc0000/npu-leakage@28        !  /efuse@fecc0000/codec-leakage@29            /dma-controller@fed10000            /phy@fed60000           /phy@fed80000           /phy@feda0000           /phy@fedb0000           /phy@fedc0000           /phy@fedc8000           /phy@fee00000           /phy@fee20000           $/sram@ff001000        	  1/pinctrl             =/pinctrl/gpio@fd8a0000           C/pinctrl/gpio@fec20000           I/pinctrl/gpio@fec30000           O/pinctrl/gpio@fec40000           U/pinctrl/gpio@fec50000          9/pinctrl/pcfg-pull-up           F/pinctrl/pcfg-pull-down         U/pinctrl/pcfg-pull-none       $  d/pinctrl/pcfg-pull-none-drv-level-0       $  /pinctrl/pcfg-pull-none-drv-level-1       $  /pinctrl/pcfg-pull-none-drv-level-2       $  /pinctrl/pcfg-pull-none-drv-level-3       $  /pinctrl/pcfg-pull-none-drv-level-4       $  /pinctrl/pcfg-pull-none-drv-level-5       $  /pinctrl/pcfg-pull-none-drv-level-6       $  !/pinctrl/pcfg-pull-none-drv-level-7       $  </pinctrl/pcfg-pull-none-drv-level-8       $  W/pinctrl/pcfg-pull-none-drv-level-9       %  r/pinctrl/pcfg-pull-none-drv-level-10          %  /pinctrl/pcfg-pull-none-drv-level-11          %  /pinctrl/pcfg-pull-none-drv-level-12          %  /pinctrl/pcfg-pull-none-drv-level-13          %  /pinctrl/pcfg-pull-none-drv-level-14          %  /pinctrl/pcfg-pull-none-drv-level-15          "  /pinctrl/pcfg-pull-up-drv-level-0         "  3/pinctrl/pcfg-pull-up-drv-level-1         "  L/pinctrl/pcfg-pull-up-drv-level-2         "  e/pinctrl/pcfg-pull-up-drv-level-3         "  ~/pinctrl/pcfg-pull-up-drv-level-4         "  /pinctrl/pcfg-pull-up-drv-level-5         "  /pinctrl/pcfg-pull-up-drv-level-6         "  /pinctrl/pcfg-pull-up-drv-level-7         "  /pinctrl/pcfg-pull-up-drv-level-8         "  /pinctrl/pcfg-pull-up-drv-level-9         #  /pinctrl/pcfg-pull-up-drv-level-10        #  ./pinctrl/pcfg-pull-up-drv-level-11        #  H/pinctrl/pcfg-pull-up-drv-level-12        #  b/pinctrl/pcfg-pull-up-drv-level-13        #  |/pinctrl/pcfg-pull-up-drv-level-14        #  /pinctrl/pcfg-pull-up-drv-level-15        $  /pinctrl/pcfg-pull-down-drv-level-0       $  /pinctrl/pcfg-pull-down-drv-level-1       $  /pinctrl/pcfg-pull-down-drv-level-2       $  /pinctrl/pcfg-pull-down-drv-level-3       $  /pinctrl/pcfg-pull-down-drv-level-4       $  7/pinctrl/pcfg-pull-down-drv-level-5       $  R/pinctrl/pcfg-pull-down-drv-level-6       $  m/pinctrl/pcfg-pull-down-drv-level-7       $  /pinctrl/pcfg-pull-down-drv-level-8       $  /pinctrl/pcfg-pull-down-drv-level-9       %  /pinctrl/pcfg-pull-down-drv-level-10          %  /pinctrl/pcfg-pull-down-drv-level-11          %  /pinctrl/pcfg-pull-down-drv-level-12          %  /pinctrl/pcfg-pull-down-drv-level-13          %  ./pinctrl/pcfg-pull-down-drv-level-14          %  J/pinctrl/pcfg-pull-down-drv-level-15            f/pinctrl/pcfg-pull-up-smt           w/pinctrl/pcfg-pull-down-smt         /pinctrl/pcfg-pull-none-smt       (  /pinctrl/pcfg-pull-none-drv-level-0-smt       (  /pinctrl/pcfg-pull-none-drv-level-1-smt       (  /pinctrl/pcfg-pull-none-drv-level-2-smt       (  /pinctrl/pcfg-pull-none-drv-level-3-smt       (  /pinctrl/pcfg-pull-none-drv-level-4-smt       (  8/pinctrl/pcfg-pull-none-drv-level-5-smt         W/pinctrl/pcfg-output-high           h/pinctrl/pcfg-output-low            x/pinctrl/auddsm/auddsm-pins         /pinctrl/bt1120/bt1120-pins         /pinctrl/can0/can0m0-pins           /pinctrl/can0/can0m1-pins           /pinctrl/can1/can1m0-pins           /pinctrl/can1/can1m1-pins           /pinctrl/can2/can2m0-pins           /pinctrl/can2/can2m1-pins           /pinctrl/cif/cif-clk            /pinctrl/cif/cif-dvp-clk            /pinctrl/cif/cif-dvp-bus16          /pinctrl/cif/cif-dvp-bus8            /pinctrl/clk32k/clk32k-in            /pinctrl/clk32k/clk32k-out0          /pinctrl/clk32k/clk32k-out1          )/pinctrl/cpu/cpu-pins         "   2/pinctrl/ddrphych0/ddrphych0-pins         "   A/pinctrl/ddrphych1/ddrphych1-pins         "   P/pinctrl/ddrphych2/ddrphych2-pins         "   _/pinctrl/ddrphych3/ddrphych3-pins            n/pinctrl/dp0/dp0m0-pins          y/pinctrl/dp0/dp0m1-pins          /pinctrl/dp0/dp0m2-pins          /pinctrl/dp1/dp1m0-pins          /pinctrl/dp1/dp1m1-pins          /pinctrl/dp1/dp1m2-pins          /pinctrl/emmc/emmc-rstnout           /pinctrl/emmc/emmc-bus8          /pinctrl/emmc/emmc-clk           /pinctrl/emmc/emmc-cmd           /pinctrl/emmc/emmc-data-strobe           /pinctrl/eth1/eth1-pins          /pinctrl/fspi/fspim0-pins           ! /pinctrl/fspi/fspim0-cs1            !/pinctrl/fspi/fspim2-pins           !/pinctrl/fspi/fspim2-cs1            !"/pinctrl/fspi/fspim1-pins           !./pinctrl/fspi/fspim1-cs1            !9/pinctrl/gmac1/gmac1-miim           !D/pinctrl/gmac1/gmac1-clkinout           !S/pinctrl/gmac1/gmac1-rx-bus2            !a/pinctrl/gmac1/gmac1-tx-bus2            !o/pinctrl/gmac1/gmac1-rgmii-clk          !/pinctrl/gmac1/gmac1-rgmii-bus          !/pinctrl/gmac1/gmac1-ppsclk         !/pinctrl/gmac1/gmac1-ppstrig          !  !/pinctrl/gmac1/gmac1-ptp-ref-clk            !/pinctrl/gmac1/gmac1-txer           !/pinctrl/gpu/gpu-pins           !/pinctrl/hdmi/hdmim0-rx-cec         !/pinctrl/hdmi/hdmim0-rx-hpdin           !/pinctrl/hdmi/hdmim0-rx-scl         !/pinctrl/hdmi/hdmim0-rx-sda         "
/pinctrl/hdmi/hdmim0-tx0-cec            "/pinctrl/hdmi/hdmim0-tx0-hpd            "(/pinctrl/hdmi/hdmim0-tx0-scl            "7/pinctrl/hdmi/hdmim0-tx0-sda            "F/pinctrl/hdmi/hdmim0-tx1-hpd            "U/pinctrl/hdmi/hdmim1-rx-cec         "c/pinctrl/hdmi/hdmim1-rx-hpdin           "s/pinctrl/hdmi/hdmim1-rx-scl         "/pinctrl/hdmi/hdmim1-rx-sda         "/pinctrl/hdmi/hdmim1-tx0-cec            "/pinctrl/hdmi/hdmim1-tx0-hpd            "/pinctrl/hdmi/hdmim1-tx0-scl            "/pinctrl/hdmi/hdmim1-tx0-sda            "/pinctrl/hdmi/hdmim1-tx1-cec            "/pinctrl/hdmi/hdmim1-tx1-hpd            "/pinctrl/hdmi/hdmim1-tx1-scl            "/pinctrl/hdmi/hdmim1-tx1-sda            #/pinctrl/hdmi/hdmim2-rx-cec         #/pinctrl/hdmi/hdmim2-rx-hpdin           #%/pinctrl/hdmi/hdmim2-rx-scl         #3/pinctrl/hdmi/hdmim2-rx-sda         #A/pinctrl/hdmi/hdmim2-tx0-scl            #P/pinctrl/hdmi/hdmim2-tx0-sda            #_/pinctrl/hdmi/hdmim2-tx1-cec            #n/pinctrl/hdmi/hdmim2-tx1-scl            #}/pinctrl/hdmi/hdmim2-tx1-sda            #/pinctrl/hdmi/hdmi-debug0           #/pinctrl/hdmi/hdmi-debug1           #/pinctrl/hdmi/hdmi-debug2           #/pinctrl/hdmi/hdmi-debug3           #/pinctrl/hdmi/hdmi-debug4           #/pinctrl/hdmi/hdmi-debug5           #/pinctrl/hdmi/hdmi-debug6           #/pinctrl/hdmi/hdmim0-tx1-cec            #/pinctrl/hdmi/hdmim0-tx1-scl            #/pinctrl/hdmi/hdmim0-tx1-sda            $/pinctrl/i2c0/i2c0m0-xfer           $/pinctrl/i2c0/i2c0m2-xfer           $%/pinctrl/i2c0/i2c0m1-xfer           $1/pinctrl/i2c1/i2c1m0-xfer           $=/pinctrl/i2c1/i2c1m1-xfer           $I/pinctrl/i2c1/i2c1m2-xfer           $U/pinctrl/i2c1/i2c1m3-xfer           $a/pinctrl/i2c1/i2c1m4-xfer           $m/pinctrl/i2c2/i2c2m0-xfer           $y/pinctrl/i2c2/i2c2m2-xfer           $/pinctrl/i2c2/i2c2m3-xfer           $/pinctrl/i2c2/i2c2m4-xfer           $/pinctrl/i2c2/i2c2m1-xfer           $/pinctrl/i2c3/i2c3m0-xfer           $/pinctrl/i2c3/i2c3m1-xfer           $/pinctrl/i2c3/i2c3m2-xfer           $/pinctrl/i2c3/i2c3m4-xfer           $/pinctrl/i2c3/i2c3m3-xfer           $/pinctrl/i2c4/i2c4m0-xfer           $/pinctrl/i2c4/i2c4m2-xfer           $/pinctrl/i2c4/i2c4m3-xfer           %	/pinctrl/i2c4/i2c4m4-xfer           %/pinctrl/i2c4/i2c4m1-xfer           %!/pinctrl/i2c5/i2c5m0-xfer           %-/pinctrl/i2c5/i2c5m1-xfer           %9/pinctrl/i2c5/i2c5m2-xfer           %E/pinctrl/i2c5/i2c5m3-xfer           %Q/pinctrl/i2c5/i2c5m4-xfer           %]/pinctrl/i2c6/i2c6m0-xfer           %i/pinctrl/i2c6/i2c6m1-xfer           %u/pinctrl/i2c6/i2c6m3-xfer           %/pinctrl/i2c6/i2c6m4-xfer           %/pinctrl/i2c6/i2c6m2-xfer           %/pinctrl/i2c7/i2c7m0-xfer           %/pinctrl/i2c7/i2c7m2-xfer           %/pinctrl/i2c7/i2c7m3-xfer           %/pinctrl/i2c7/i2c7m1-xfer           %/pinctrl/i2c8/i2c8m0-xfer           %/pinctrl/i2c8/i2c8m2-xfer           %/pinctrl/i2c8/i2c8m3-xfer           %/pinctrl/i2c8/i2c8m4-xfer           %/pinctrl/i2c8/i2c8m1-xfer           &/pinctrl/i2s0/i2s0-lrck         &/pinctrl/i2s0/i2s0-mclk         &/pinctrl/i2s0/i2s0-sclk         &#/pinctrl/i2s0/i2s0-sdi0         &-/pinctrl/i2s0/i2s0-sdi1         &7/pinctrl/i2s0/i2s0-sdi2         &A/pinctrl/i2s0/i2s0-sdi3         &K/pinctrl/i2s0/i2s0-sdo0         &U/pinctrl/i2s0/i2s0-sdo1         &_/pinctrl/i2s0/i2s0-sdo2         &i/pinctrl/i2s0/i2s0-sdo3         &s/pinctrl/i2s1/i2s1m0-lrck           &/pinctrl/i2s1/i2s1m0-mclk           &/pinctrl/i2s1/i2s1m0-sclk           &/pinctrl/i2s1/i2s1m0-sdi0           &/pinctrl/i2s1/i2s1m0-sdi1           &/pinctrl/i2s1/i2s1m0-sdi2           &/pinctrl/i2s1/i2s1m0-sdi3           &/pinctrl/i2s1/i2s1m0-sdo0           &/pinctrl/i2s1/i2s1m0-sdo1           &/pinctrl/i2s1/i2s1m0-sdo2           &/pinctrl/i2s1/i2s1m0-sdo3           &/pinctrl/i2s1/i2s1m1-lrck           '/pinctrl/i2s1/i2s1m1-mclk           '/pinctrl/i2s1/i2s1m1-sclk           '/pinctrl/i2s1/i2s1m1-sdi0           ''/pinctrl/i2s1/i2s1m1-sdi1           '3/pinctrl/i2s1/i2s1m1-sdi2           '?/pinctrl/i2s1/i2s1m1-sdi3           'K/pinctrl/i2s1/i2s1m1-sdo0           'W/pinctrl/i2s1/i2s1m1-sdo1           'c/pinctrl/i2s1/i2s1m1-sdo2           'o/pinctrl/i2s1/i2s1m1-sdo3           '{/pinctrl/i2s2/i2s2m0-lrck           '/pinctrl/i2s2/i2s2m0-mclk           '/pinctrl/i2s2/i2s2m0-sclk           '/pinctrl/i2s2/i2s2m0-sdi            '/pinctrl/i2s2/i2s2m0-sdo            '/pinctrl/i2s2/i2s2m1-lrck           '/pinctrl/i2s2/i2s2m1-mclk           '/pinctrl/i2s2/i2s2m1-sclk           '/pinctrl/i2s2/i2s2m1-sdi            '/pinctrl/i2s2/i2s2m1-sdo            '/pinctrl/i2s3/i2s3-lrck         '/pinctrl/i2s3/i2s3-mclk         (/pinctrl/i2s3/i2s3-sclk         (/pinctrl/i2s3/i2s3-sdi          (/pinctrl/i2s3/i2s3-sdo          (/pinctrl/jtag/jtagm0-pins           (+/pinctrl/jtag/jtagm1-pins           (7/pinctrl/jtag/jtagm2-pins           (C/pinctrl/litcpu/litcpu-pins         (O/pinctrl/mcu/mcum0-pins         (Z/pinctrl/mcu/mcum1-pins       !  (e/pinctrl/mipi/mipim0-camera0-clk          !  (x/pinctrl/mipi/mipim0-camera1-clk          !  (/pinctrl/mipi/mipim0-camera2-clk          !  (/pinctrl/mipi/mipim0-camera3-clk          !  (/pinctrl/mipi/mipim0-camera4-clk          !  (/pinctrl/mipi/mipim1-camera0-clk          !  (/pinctrl/mipi/mipim1-camera1-clk          !  (/pinctrl/mipi/mipim1-camera2-clk          !  (/pinctrl/mipi/mipim1-camera3-clk          !  )/pinctrl/mipi/mipim1-camera4-clk            )#/pinctrl/mipi/mipi-te0          ),/pinctrl/mipi/mipi-te1          )5/pinctrl/npu/npu-pins         %  )>/pinctrl/pcie20x1/pcie20x1m0-clkreqn          $  )Q/pinctrl/pcie20x1/pcie20x1m0-perstn       #  )c/pinctrl/pcie20x1/pcie20x1m0-waken        %  )t/pinctrl/pcie20x1/pcie20x1m1-clkreqn          $  )/pinctrl/pcie20x1/pcie20x1m1-perstn       #  )/pinctrl/pcie20x1/pcie20x1m1-waken        )  )/pinctrl/pcie20x1/pcie20x1-2-button-rstn          "  )/pinctrl/pcie30phy/pcie30phy-pins         '  )/pinctrl/pcie30x1/pcie30x1m0-0-clkreqn        &  )/pinctrl/pcie30x1/pcie30x1m0-0-perstn         %  )/pinctrl/pcie30x1/pcie30x1m0-0-waken          '  */pinctrl/pcie30x1/pcie30x1m0-1-clkreqn        &  *!/pinctrl/pcie30x1/pcie30x1m0-1-perstn         %  *5/pinctrl/pcie30x1/pcie30x1m0-1-waken          '  *H/pinctrl/pcie30x1/pcie30x1m1-0-clkreqn        &  *]/pinctrl/pcie30x1/pcie30x1m1-0-perstn         %  *q/pinctrl/pcie30x1/pcie30x1m1-0-waken          '  */pinctrl/pcie30x1/pcie30x1m1-1-clkreqn        &  */pinctrl/pcie30x1/pcie30x1m1-1-perstn         %  */pinctrl/pcie30x1/pcie30x1m1-1-waken          '  */pinctrl/pcie30x1/pcie30x1m2-0-clkreqn        &  */pinctrl/pcie30x1/pcie30x1m2-0-perstn         %  */pinctrl/pcie30x1/pcie30x1m2-0-waken          '  */pinctrl/pcie30x1/pcie30x1m2-1-clkreqn        &  +/pinctrl/pcie30x1/pcie30x1m2-1-perstn         %  +%/pinctrl/pcie30x1/pcie30x1m2-1-waken          )  +8/pinctrl/pcie30x1/pcie30x1-0-button-rstn          )  +O/pinctrl/pcie30x1/pcie30x1-1-button-rstn          %  +f/pinctrl/pcie30x2/pcie30x2m0-clkreqn          $  +y/pinctrl/pcie30x2/pcie30x2m0-perstn       #  +/pinctrl/pcie30x2/pcie30x2m0-waken        %  +/pinctrl/pcie30x2/pcie30x2m1-clkreqn          $  +/pinctrl/pcie30x2/pcie30x2m1-perstn       #  +/pinctrl/pcie30x2/pcie30x2m1-waken        %  +/pinctrl/pcie30x2/pcie30x2m2-clkreqn          $  +/pinctrl/pcie30x2/pcie30x2m2-perstn       #  +/pinctrl/pcie30x2/pcie30x2m2-waken        %  ,/pinctrl/pcie30x2/pcie30x2m3-clkreqn          $  ,/pinctrl/pcie30x2/pcie30x2m3-perstn       #  ,-/pinctrl/pcie30x2/pcie30x2m3-waken        '  ,>/pinctrl/pcie30x2/pcie30x2-button-rstn        %  ,S/pinctrl/pcie30x4/pcie30x4m0-clkreqn          $  ,f/pinctrl/pcie30x4/pcie30x4m0-perstn       #  ,x/pinctrl/pcie30x4/pcie30x4m0-waken        %  ,/pinctrl/pcie30x4/pcie30x4m1-clkreqn          $  ,/pinctrl/pcie30x4/pcie30x4m1-perstn       #  ,/pinctrl/pcie30x4/pcie30x4m1-waken        %  ,/pinctrl/pcie30x4/pcie30x4m2-clkreqn          $  ,/pinctrl/pcie30x4/pcie30x4m2-perstn       #  ,/pinctrl/pcie30x4/pcie30x4m2-waken        %  ,/pinctrl/pcie30x4/pcie30x4m3-clkreqn          $  -/pinctrl/pcie30x4/pcie30x4m3-perstn       #  -/pinctrl/pcie30x4/pcie30x4m3-waken        '  -+/pinctrl/pcie30x4/pcie30x4-button-rstn          -@/pinctrl/pdm0/pdm0m0-clk            -K/pinctrl/pdm0/pdm0m0-clk1           -W/pinctrl/pdm0/pdm0m0-sdi0           -c/pinctrl/pdm0/pdm0m0-sdi1           -o/pinctrl/pdm0/pdm0m0-sdi2           -{/pinctrl/pdm0/pdm0m0-sdi3           -/pinctrl/pdm0/pdm0m1-clk            -/pinctrl/pdm0/pdm0m1-clk1           -/pinctrl/pdm0/pdm0m1-sdi0           -/pinctrl/pdm0/pdm0m1-sdi1           -/pinctrl/pdm0/pdm0m1-sdi2           -/pinctrl/pdm0/pdm0m1-sdi3           -/pinctrl/pdm1/pdm1m0-clk            -/pinctrl/pdm1/pdm1m0-clk1           -/pinctrl/pdm1/pdm1m0-sdi0           -/pinctrl/pdm1/pdm1m0-sdi1           -/pinctrl/pdm1/pdm1m0-sdi2           .	/pinctrl/pdm1/pdm1m0-sdi3           ./pinctrl/pdm1/pdm1m1-clk            . /pinctrl/pdm1/pdm1m1-clk1           .,/pinctrl/pdm1/pdm1m1-sdi0           .8/pinctrl/pdm1/pdm1m1-sdi1           .D/pinctrl/pdm1/pdm1m1-sdi2           .P/pinctrl/pdm1/pdm1m1-sdi3           .\/pinctrl/pmic/pmic-pins         .f/pinctrl/pmu/pmu-pins           .o/pinctrl/pwm0/pwm0m0-pins           .{/pinctrl/pwm0/pwm0m1-pins           ./pinctrl/pwm0/pwm0m2-pins           ./pinctrl/pwm1/pwm1m0-pins           ./pinctrl/pwm1/pwm1m1-pins           ./pinctrl/pwm1/pwm1m2-pins           ./pinctrl/pwm2/pwm2m0-pins           ./pinctrl/pwm2/pwm2m1-pins           ./pinctrl/pwm2/pwm2m2-pins           ./pinctrl/pwm3/pwm3m0-pins           ./pinctrl/pwm3/pwm3m1-pins           ./pinctrl/pwm3/pwm3m2-pins           ./pinctrl/pwm3/pwm3m3-pins           //pinctrl/pwm4/pwm4m0-pins           //pinctrl/pwm4/pwm4m1-pins           /#/pinctrl/pwm5/pwm5m0-pins           ///pinctrl/pwm5/pwm5m1-pins           /;/pinctrl/pwm5/pwm5m2-pins           /G/pinctrl/pwm6/pwm6m0-pins           /S/pinctrl/pwm6/pwm6m1-pins           /_/pinctrl/pwm6/pwm6m2-pins           /k/pinctrl/pwm7/pwm7m0-pins           /w/pinctrl/pwm7/pwm7m1-pins           //pinctrl/pwm7/pwm7m2-pins           //pinctrl/pwm7/pwm7m3-pins           //pinctrl/pwm8/pwm8m0-pins           //pinctrl/pwm8/pwm8m1-pins           //pinctrl/pwm8/pwm8m2-pins           //pinctrl/pwm9/pwm9m0-pins           //pinctrl/pwm9/pwm9m1-pins           //pinctrl/pwm9/pwm9m2-pins           //pinctrl/pwm10/pwm10m0-pins         //pinctrl/pwm10/pwm10m1-pins         //pinctrl/pwm10/pwm10m2-pins         0
/pinctrl/pwm11/pwm11m0-pins         0/pinctrl/pwm11/pwm11m1-pins         0$/pinctrl/pwm11/pwm11m2-pins         01/pinctrl/pwm11/pwm11m3-pins         0>/pinctrl/pwm12/pwm12m0-pins         0K/pinctrl/pwm12/pwm12m1-pins         0X/pinctrl/pwm13/pwm13m0-pins         0e/pinctrl/pwm13/pwm13m1-pins         0r/pinctrl/pwm13/pwm13m2-pins         0/pinctrl/pwm14/pwm14m0-pins         0/pinctrl/pwm14/pwm14m1-pins         0/pinctrl/pwm14/pwm14m2-pins         0/pinctrl/pwm15/pwm15m0-pins         0/pinctrl/pwm15/pwm15m1-pins         0/pinctrl/pwm15/pwm15m2-pins         0/pinctrl/pwm15/pwm15m3-pins         0/pinctrl/refclk/refclk-pins         0/pinctrl/sata/sata-pins         0/pinctrl/sata0/sata0m0-pins         0/pinctrl/sata0/sata0m1-pins         1
/pinctrl/sata1/sata1m0-pins         1/pinctrl/sata1/sata1m1-pins         1$/pinctrl/sata2/sata2m0-pins         11/pinctrl/sata2/sata2m1-pins         1>/pinctrl/sdio/sdiom1-pins           1J/pinctrl/sdio/sdiom0-pins           1V/pinctrl/sdmmc/sdmmc-bus4           1a/pinctrl/sdmmc/sdmmc-clk            1k/pinctrl/sdmmc/sdmmc-cmd            1u/pinctrl/sdmmc/sdmmc-det            1/pinctrl/sdmmc/sdmmc-pwren          1/pinctrl/spdif0/spdif0m0-tx         1/pinctrl/spdif0/spdif0m1-tx         1/pinctrl/spdif1/spdif1m0-tx         1/pinctrl/spdif1/spdif1m1-tx         1/pinctrl/spdif1/spdif1m2-tx         1/pinctrl/spi0/spi0m0-pins           1/pinctrl/spi0/spi0m0-cs0            1/pinctrl/spi0/spi0m0-cs1            1/pinctrl/spi0/spi0m1-pins           1/pinctrl/spi0/spi0m1-cs0            2 /pinctrl/spi0/spi0m1-cs1            2/pinctrl/spi0/spi0m2-pins           2/pinctrl/spi0/spi0m2-cs0            2"/pinctrl/spi0/spi0m2-cs1            2-/pinctrl/spi0/spi0m3-pins           29/pinctrl/spi0/spi0m3-cs0            2D/pinctrl/spi0/spi0m3-cs1            2O/pinctrl/spi1/spi1m1-pins           2[/pinctrl/spi1/spi1m1-cs0            2f/pinctrl/spi1/spi1m1-cs1            2q/pinctrl/spi1/spi1m2-pins           2}/pinctrl/spi1/spi1m2-cs0            2/pinctrl/spi1/spi1m2-cs1            2/pinctrl/spi1/spi1m0-pins           2/pinctrl/spi1/spi1m0-cs0            2/pinctrl/spi1/spi1m0-cs1            2/pinctrl/spi2/spi2m0-pins           2/pinctrl/spi2/spi2m0-cs0            2/pinctrl/spi2/spi2m0-cs1            2/pinctrl/spi2/spi2m1-pins           2/pinctrl/spi2/spi2m1-cs0            2/pinctrl/spi2/spi2m1-cs1            2/pinctrl/spi2/spi2m2-pins           3/pinctrl/spi2/spi2m2-cs0            3/pinctrl/spi2/spi2m2-cs1            3/pinctrl/spi3/spi3m1-pins           3'/pinctrl/spi3/spi3m1-cs0            32/pinctrl/spi3/spi3m1-cs1            3=/pinctrl/spi3/spi3m2-pins           3I/pinctrl/spi3/spi3m2-cs0            3T/pinctrl/spi3/spi3m2-cs1            3_/pinctrl/spi3/spi3m3-pins           3k/pinctrl/spi3/spi3m3-cs0            3v/pinctrl/spi3/spi3m3-cs1            3/pinctrl/spi3/spi3m0-pins           3/pinctrl/spi3/spi3m0-cs0            3/pinctrl/spi3/spi3m0-cs1            3/pinctrl/spi4/spi4m0-pins           3/pinctrl/spi4/spi4m0-cs0            3/pinctrl/spi4/spi4m0-cs1            3/pinctrl/spi4/spi4m1-pins           3/pinctrl/spi4/spi4m1-cs0            3/pinctrl/spi4/spi4m1-cs1            3/pinctrl/spi4/spi4m2-pins           3/pinctrl/spi4/spi4m2-cs0            3/pinctrl/tsadc/tsadcm1-shut         4/pinctrl/tsadc/tsadc-shut           4/pinctrl/tsadc/tsadc-shut-org           4%/pinctrl/uart0/uart0m0-xfer         42/pinctrl/uart0/uart0m1-xfer         4?/pinctrl/uart0/uart0m2-xfer         4L/pinctrl/uart0/uart0-ctsn           4W/pinctrl/uart0/uart0-rtsn           4b/pinctrl/uart1/uart1m1-xfer         4o/pinctrl/uart1/uart1m1-ctsn         4|/pinctrl/uart1/uart1m1-rtsn         4/pinctrl/uart1/uart1m2-xfer         4/pinctrl/uart1/uart1m2-ctsn         4/pinctrl/uart1/uart1m2-rtsn         4/pinctrl/uart1/uart1m0-xfer         4/pinctrl/uart1/uart1m0-ctsn         4/pinctrl/uart1/uart1m0-rtsn         4/pinctrl/uart2/uart2m0-xfer         4/pinctrl/uart2/uart2m1-xfer         4/pinctrl/uart2/uart2m2-xfer         4/pinctrl/uart2/uart2-ctsn           5	/pinctrl/uart2/uart2-rtsn           5/pinctrl/uart3/uart3m0-xfer         5!/pinctrl/uart3/uart3m1-xfer         5./pinctrl/uart3/uart3m2-xfer         5;/pinctrl/uart3/uart3-ctsn           5F/pinctrl/uart3/uart3-rtsn           5Q/pinctrl/uart4/uart4m0-xfer         5^/pinctrl/uart4/uart4m1-xfer         5k/pinctrl/uart4/uart4m2-xfer         5x/pinctrl/uart4/uart4-ctsn           5/pinctrl/uart4/uart4-rtsn           5/pinctrl/uart5/uart5m0-xfer         5/pinctrl/uart5/uart5m0-ctsn         5/pinctrl/uart5/uart5m0-rtsn         5/pinctrl/uart5/uart5m1-xfer         5/pinctrl/uart5/uart5m1-ctsn         5/pinctrl/uart5/uart5m1-rtsn         5/pinctrl/uart5/uart5m2-xfer         5/pinctrl/uart6/uart6m1-xfer         5/pinctrl/uart6/uart6m1-ctsn         6/pinctrl/uart6/uart6m1-rtsn         6/pinctrl/uart6/uart6m2-xfer         6/pinctrl/uart6/uart6m0-xfer         6*/pinctrl/uart6/uart6m0-ctsn         67/pinctrl/uart6/uart6m0-rtsn         6D/pinctrl/uart7/uart7m1-xfer         6Q/pinctrl/uart7/uart7m1-ctsn         6^/pinctrl/uart7/uart7m1-rtsn         6k/pinctrl/uart7/uart7m2-xfer         6x/pinctrl/uart7/uart7m0-xfer         6/pinctrl/uart7/uart7m0-ctsn         6/pinctrl/uart7/uart7m0-rtsn         6/pinctrl/uart8/uart8m0-xfer         6/pinctrl/uart8/uart8m0-ctsn         6/pinctrl/uart8/uart8m0-rtsn         6/pinctrl/uart8/uart8m1-xfer         6/pinctrl/uart8/uart8m1-ctsn         6/pinctrl/uart8/uart8m1-rtsn         6/pinctrl/uart8/uart8-xfer           6/pinctrl/uart9/uart9m0-xfer         7/pinctrl/uart9/uart9m1-xfer         7/pinctrl/uart9/uart9m1-ctsn         7/pinctrl/uart9/uart9m1-rtsn         7,/pinctrl/uart9/uart9m2-xfer         79/pinctrl/uart9/uart9m2-ctsn         7F/pinctrl/uart9/uart9m2-rtsn         7S/pinctrl/uart9/uart9m0-ctsn         7`/pinctrl/uart9/uart9m0-rtsn         7m/pinctrl/vop/vop-pins           7v/pinctrl/bt656/bt656-pins         #  7/pinctrl/gpio-func/tsadc-gpio-func          7/pinctrl/eth0/eth0-pins         7/pinctrl/gmac0/gmac0-miim           7/pinctrl/gmac0/gmac0-clkinout           7/pinctrl/gmac0/gmac0-rx-bus2            7/pinctrl/gmac0/gmac0-tx-bus2            7/pinctrl/gmac0/gmac0-rgmii-clk          7/pinctrl/gmac0/gmac0-rgmii-bus          7/pinctrl/gmac0/gmac0-ppsclk         7/pinctrl/gmac0/gmac0-ppstring            8/pinctrl/gmac0/gmac0-ptp-refclk         8/pinctrl/gmac0/gmac0-txer           8)/pinctrl/leds/led_user_en           85/pinctrl/pcie2/pcie2-0-rst        $  8A/pinctrl/pcie3/pcie30x2-perstn-m1-l         8V/pinctrl/pcie3/pcie-4g-pwen       $  8c/pinctrl/pcie3/pcie30x4-perstn-m1-l          8x/pinctrl/pcie3/pcie30x4-pwren-h         8/pinctrl/hym8563/hym8563-int            8/pinctrl/usb/vcc5v0-host-en         8/hdmi1-sound            8/usb@fc400000           8/syscon@fd5b8000            8/syscon@fd5c0000            8/syscon@fd5cc000            8/syscon@fd5d4000            8/syscon@fd5d4000/usb2phy@4000         '  8/syscon@fd5d4000/usb2phy@4000/otg-port          9	/syscon@fd5e4000            9/spdif-tx@fddb8000          9!/i2s@fddc8000           9*/spdif-tx@fdde8000          94/i2s@fddf4000           9=/i2s@fddf8000           9F/i2s@fde00000           9P/dp@fde60000            9T/dp@fde60000/ports/port@0           9[/dp@fde60000/ports/port@1           J/hdmi@fdea0000          9c/hdmi@fdea0000/ports/port@0       %  9l/hdmi@fdea0000/ports/port@0/endpoint            9y/hdmi@fdea0000/ports/port@1       %  9/hdmi@fdea0000/ports/port@1/endpoint            9/edp@fded0000           9/edp@fded0000/ports/port@0          9/edp@fded0000/ports/port@1          9/hdmi_receiver@fdee0000         9/pcie@fe150000        +  9/pcie@fe150000/legacy-interrupt-controller          9/pcie-ep@fe150000           9/pcie@fe160000        +  9/pcie@fe160000/legacy-interrupt-controller          9/pcie@fe170000        +  9/pcie@fe170000/legacy-interrupt-controller          :/ethernet@fe1b0000          :	/ethernet@fe1b0000/mdio       %  :/ethernet@fe1b0000/stmmac-axi-config          $  :&/ethernet@fe1b0000/rx-queues-config       $  :9/ethernet@fe1b0000/tx-queues-config         :L/sata@fe220000          :R/phy@fed70000           :\/phy@fed90000           :g/phy@fee10000           :s/phy@fee80000           :}/opp-table-cluster0         :/opp-table-cluster1         :/opp-table-cluster2         :/opp-table-gpu          :/gpio-leds/led-0            :/regulator-vcc12v-dcin          :/regulator-vcc5v0-sys           :/regulator-vcc-1v1-nldo-s3          :/hdmi1-con/port/endpoint            ;/pcie-oscillator            ;/pcie-oscillator            ;)/regulator-vcc3v3-pcie2x1l0         ;:/regulator-vcc3v3-bkey          ;F/regulator-vcc3v3-pi6c-05           ;T/regulator-vcc3v3-pi6c-05           ;c/regulator-vcc5v0-host           	compatible interrupt-parent #address-cells #size-cells model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 i2c6 i2c7 i2c8 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 spi4 mmc0 cpu device_type reg enable-method capacity-dmips-mhz clocks cpu-idle-states i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache dynamic-power-coefficient #cooling-cells operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us cache-level cache-unified ports arm,smc-id shmem #clock-cells #reset-cells simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupts clock-frequency clock-output-names interrupt-names ranges no-map alloc-ranges alignment assigned-clocks assigned-clock-rates clock-names power-domains dr_mode phys phy-names phy_type resets snps,dis_enblslpm_quirk snps,dis-u1-entry-quirk snps,dis-u2-entry-quirk snps,dis-u2-freeclk-exists-quirk snps,dis-del-phy-power-chg-quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis_rxdet_inp3_quirk #iommu-cells reset-names #phy-cells phy-supply rockchip,grf pinctrl-0 pinctrl-names fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend dmas dma-names reg-shift reg-io-width #pwm-cells #power-domain-cells pm_qos domain-supply reg-names iommus rockchip,vop-grf rockchip,vo1-grf rockchip,pmu remote-endpoint assigned-clock-parents #sound-dai-cells rockchip,vo-grf bus-range #interrupt-cells interrupt-map-mask interrupt-map linux,pci-domain max-link-speed msi-map iommu-map num-lanes interrupt-controller rockchip,php-grf snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,wr_osr_lmt snps,rd_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use ports-implemented hba-port-cap snps,rx-ts-max snps,tx-ts-max fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp no-sdio no-mmc sd-uhs-sdr104 vmmc-supply vqmmc-supply no-sd non-removable mmc-hs400-1_8v mmc-hs400-enhanced-strobe rockchip,trcm-sync-tx-only dma-noncoherent mbi-alias mbi-ranges msi-controller #msi-cells affinity arm,pl330-periph-burst #dma-cells num-cs spi-max-frequency system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply vcc10-supply vcc11-supply vcc12-supply vcc13-supply vcc14-supply vcca-supply gpio-controller #gpio-cells pins function regulator-enable-ramp-delay regulator-suspend-microvolt regulator-on-in-suspend polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp rockchip,hw-tshut-mode rockchip,hw-tshut-polarity pinctrl-1 #thermal-sensor-cells #io-channel-cells wakeup-source bits rockchip,u2phy-grf rockchip,usb-grf rockchip,usbdpphy-grf rockchip,pipe-grf rockchip,pipe-phy-grf gpio-ranges bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable output-high output-low rockchip,pins memory-region reset-gpios vpcie3v3-supply rockchip,phy-grf data-lanes rockchip,rx-common-refclk-mode opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend color linux,default-trigger stdout-path vdd-supply startup-delay-us enable-active-high gpio cpu_l0 cpu_l1 cpu_l2 cpu_l3 cpu_b0 cpu_b1 cpu_b2 cpu_b3 CPU_SLEEP l2_cache_l0 l2_cache_l1 l2_cache_l2 l2_cache_l3 l2_cache_b0 l2_cache_b1 l2_cache_b2 l2_cache_b3 l3_cache display_subsystem scmi scmi_clk scmi_reset hdmi0_sound spll xin24m xin32k scmi_shmem hdmi_receiver_cma gpu usb_host0_xhci usb_host0_ehci usb_host0_ohci usb_host1_ehci usb_host1_ohci usb_host2_xhci mmu600_pcie mmu600_php pmu1grf sys_grf mipidcphy0_grf mipidcphy1_grf vop_grf vo0_grf vo1_grf usb_grf php_grf csidphy0_grf csidphy1_grf pipe_phy0_grf pipe_phy2_grf usbdpphy0_grf usb2phy0_grf u2phy0 u2phy0_otg usb2phy2_grf u2phy2 u2phy2_host usb2phy3_grf u2phy3 u2phy3_host hdptxphy0_grf ioc system_sram1 cru vdd_cpu_big0_s0 vdd_cpu_big1_s0 uart0 pwm0 pwm1 pwm2 pwm3 power pd_npu pd_gpu rknn_core_0 rknn_mmu_0 rknn_core_1 rknn_mmu_1 rknn_core_2 rknn_mmu_2 vpu121 vpu121_mmu rga vepu121_0 vepu121_0_mmu vepu121_1 vepu121_1_mmu vepu121_2 vepu121_2_mmu vepu121_3 vepu121_3_mmu av1d vop vop_out vp0 vp0_out_hdmi1 vp1 vp2 vp3 vop_mmu spdif_tx2 i2s4_8ch spdif_tx3 i2s5_8ch i2s9_8ch dsi0 dsi0_in dsi0_out dsi1 dsi1_in dsi1_out dp0 dp0_in dp0_out hdmi0 hdmi0_in hdmi0_out edp0 edp0_in edp0_out qos_gpu_m0 qos_gpu_m1 qos_gpu_m2 qos_gpu_m3 qos_rga3_1 qos_sdio qos_sdmmc qos_usb3_1 qos_usb3_0 qos_usb2host_0 qos_usb2host_1 qos_fisheye0 qos_fisheye1 qos_isp0_mro qos_isp0_mwo qos_vicap_m0 qos_vicap_m1 qos_isp1_mwo qos_isp1_mro qos_rkvenc0_m0ro qos_rkvenc0_m1ro qos_rkvenc0_m2wo qos_rkvenc1_m0ro qos_rkvenc1_m1ro qos_rkvenc1_m2wo qos_rkvdec0 qos_rkvdec1 qos_av1 qos_iep qos_jpeg_dec qos_jpeg_enc0 qos_jpeg_enc1 qos_jpeg_enc2 qos_jpeg_enc3 qos_rga2_mro qos_rga2_mwo qos_rga3_0 qos_vdpu qos_npu1 qos_npu2 qos_npu0_mwr qos_npu0_mro qos_mcu_npu qos_hdcp0 qos_hdcp1 qos_hdmirx qos_vop_m0 qos_vop_m1 dfi pcie2x1l1 pcie2x1l1_intc pcie2x1l2 pcie2x1l2_intc gmac1 mdio1 gmac1_stmmac_axi_setup gmac1_mtl_rx_setup gmac1_mtl_tx_setup sata0 sata2 sfc sdhci i2s0_8ch i2s1_8ch i2s2_2ch i2s3_2ch spdif_tx0 spdif_tx1 gic its0 its1 ppi_partition0 ppi_partition1 dmac0 dmac1 timer0 wdt rk806_dvs1_null rk806_dvs2_null rk806_dvs3_null vdd_gpu_s0 vdd_gpu_mem_s0 vdd_cpu_lit_s0 vdd_cpu_lit_mem_s0 vdd_log_s0 vdd_vdenc_s0 vdd_vdenc_mem_s0 vdd_ddr_s0 vdd2_ddr_s3 vcc_2v0_pldo_s3 vcc_3v3_s3 vddq_ddr_s0 vcc_1v8_s3 avcc_1v8_s0 avdd_1v2_s0 vcc_3v3_s0 vccio_sd_s0 pldo6_s3 vdd_0v75_s3 vdd_ddr_pll_s0 avdd_0v75_s0 vdd_0v85_s0 uart1 uart2 uart3 uart4 uart5 uart6 uart7 uart8 uart9 pwm4 pwm5 pwm6 pwm7 pwm8 pwm9 pwm10 pwm11 pwm12 pwm13 pwm14 pwm15 thermal_zones package_thermal package_crit bigcore0_thermal bigcore0_alert bigcore0_crit bigcore2_thermal bigcore2_alert bigcore2_crit little_core_thermal littlecore_alert littlecore_crit center_thermal center_crit gpu_thermal gpu_alert gpu_crit npu_thermal npu_crit tsadc saradc hym8563 otp cpu_code otp_id cpub0_leakage cpub1_leakage cpul_leakage log_leakage gpu_leakage otp_cpu_version npu_leakage codec_leakage dmac2 hdptxphy0 usbdp_phy0 mipidcphy0 mipidcphy1 csi_dphy0 csi_dphy1 combphy0_ps combphy2_psu system_sram2 pinctrl pcfg_pull_up pcfg_pull_down pcfg_pull_none pcfg_pull_none_drv_level_0 pcfg_pull_none_drv_level_1 pcfg_pull_none_drv_level_2 pcfg_pull_none_drv_level_3 pcfg_pull_none_drv_level_4 pcfg_pull_none_drv_level_5 pcfg_pull_none_drv_level_6 pcfg_pull_none_drv_level_7 pcfg_pull_none_drv_level_8 pcfg_pull_none_drv_level_9 pcfg_pull_none_drv_level_10 pcfg_pull_none_drv_level_11 pcfg_pull_none_drv_level_12 pcfg_pull_none_drv_level_13 pcfg_pull_none_drv_level_14 pcfg_pull_none_drv_level_15 pcfg_pull_up_drv_level_0 pcfg_pull_up_drv_level_1 pcfg_pull_up_drv_level_2 pcfg_pull_up_drv_level_3 pcfg_pull_up_drv_level_4 pcfg_pull_up_drv_level_5 pcfg_pull_up_drv_level_6 pcfg_pull_up_drv_level_7 pcfg_pull_up_drv_level_8 pcfg_pull_up_drv_level_9 pcfg_pull_up_drv_level_10 pcfg_pull_up_drv_level_11 pcfg_pull_up_drv_level_12 pcfg_pull_up_drv_level_13 pcfg_pull_up_drv_level_14 pcfg_pull_up_drv_level_15 pcfg_pull_down_drv_level_0 pcfg_pull_down_drv_level_1 pcfg_pull_down_drv_level_2 pcfg_pull_down_drv_level_3 pcfg_pull_down_drv_level_4 pcfg_pull_down_drv_level_5 pcfg_pull_down_drv_level_6 pcfg_pull_down_drv_level_7 pcfg_pull_down_drv_level_8 pcfg_pull_down_drv_level_9 pcfg_pull_down_drv_level_10 pcfg_pull_down_drv_level_11 pcfg_pull_down_drv_level_12 pcfg_pull_down_drv_level_13 pcfg_pull_down_drv_level_14 pcfg_pull_down_drv_level_15 pcfg_pull_up_smt pcfg_pull_down_smt pcfg_pull_none_smt pcfg_pull_none_drv_level_0_smt pcfg_pull_none_drv_level_1_smt pcfg_pull_none_drv_level_2_smt pcfg_pull_none_drv_level_3_smt pcfg_pull_none_drv_level_4_smt pcfg_pull_none_drv_level_5_smt pcfg_output_high pcfg_output_low auddsm_pins bt1120_pins can0m0_pins can0m1_pins can1m0_pins can1m1_pins can2m0_pins can2m1_pins cif_clk cif_dvp_clk cif_dvp_bus16 cif_dvp_bus8 clk32k_in clk32k_out0 clk32k_out1 cpu_pins ddrphych0_pins ddrphych1_pins ddrphych2_pins ddrphych3_pins dp0m0_pins dp0m1_pins dp0m2_pins dp1m0_pins dp1m1_pins dp1m2_pins emmc_rstnout emmc_bus8 emmc_clk emmc_cmd emmc_data_strobe eth1_pins fspim0_pins fspim0_cs1 fspim2_pins fspim2_cs1 fspim1_pins fspim1_cs1 gmac1_miim gmac1_clkinout gmac1_rx_bus2 gmac1_tx_bus2 gmac1_rgmii_clk gmac1_rgmii_bus gmac1_ppsclk gmac1_ppstrig gmac1_ptp_ref_clk gmac1_txer gpu_pins hdmim0_rx_cec hdmim0_rx_hpdin hdmim0_rx_scl hdmim0_rx_sda hdmim0_tx0_cec hdmim0_tx0_hpd hdmim0_tx0_scl hdmim0_tx0_sda hdmim0_tx1_hpd hdmim1_rx_cec hdmim1_rx_hpdin hdmim1_rx_scl hdmim1_rx_sda hdmim1_tx0_cec hdmim1_tx0_hpd hdmim1_tx0_scl hdmim1_tx0_sda hdmim1_tx1_cec hdmim1_tx1_hpd hdmim1_tx1_scl hdmim1_tx1_sda hdmim2_rx_cec hdmim2_rx_hpdin hdmim2_rx_scl hdmim2_rx_sda hdmim2_tx0_scl hdmim2_tx0_sda hdmim2_tx1_cec hdmim2_tx1_scl hdmim2_tx1_sda hdmi_debug0 hdmi_debug1 hdmi_debug2 hdmi_debug3 hdmi_debug4 hdmi_debug5 hdmi_debug6 hdmim0_tx1_cec hdmim0_tx1_scl hdmim0_tx1_sda i2c0m0_xfer i2c0m2_xfer i2c0m1_xfer i2c1m0_xfer i2c1m1_xfer i2c1m2_xfer i2c1m3_xfer i2c1m4_xfer i2c2m0_xfer i2c2m2_xfer i2c2m3_xfer i2c2m4_xfer i2c2m1_xfer i2c3m0_xfer i2c3m1_xfer i2c3m2_xfer i2c3m4_xfer i2c3m3_xfer i2c4m0_xfer i2c4m2_xfer i2c4m3_xfer i2c4m4_xfer i2c4m1_xfer i2c5m0_xfer i2c5m1_xfer i2c5m2_xfer i2c5m3_xfer i2c5m4_xfer i2c6m0_xfer i2c6m1_xfer i2c6m3_xfer i2c6m4_xfer i2c6m2_xfer i2c7m0_xfer i2c7m2_xfer i2c7m3_xfer i2c7m1_xfer i2c8m0_xfer i2c8m2_xfer i2c8m3_xfer i2c8m4_xfer i2c8m1_xfer i2s0_lrck i2s0_mclk i2s0_sclk i2s0_sdi0 i2s0_sdi1 i2s0_sdi2 i2s0_sdi3 i2s0_sdo0 i2s0_sdo1 i2s0_sdo2 i2s0_sdo3 i2s1m0_lrck i2s1m0_mclk i2s1m0_sclk i2s1m0_sdi0 i2s1m0_sdi1 i2s1m0_sdi2 i2s1m0_sdi3 i2s1m0_sdo0 i2s1m0_sdo1 i2s1m0_sdo2 i2s1m0_sdo3 i2s1m1_lrck i2s1m1_mclk i2s1m1_sclk i2s1m1_sdi0 i2s1m1_sdi1 i2s1m1_sdi2 i2s1m1_sdi3 i2s1m1_sdo0 i2s1m1_sdo1 i2s1m1_sdo2 i2s1m1_sdo3 i2s2m0_lrck i2s2m0_mclk i2s2m0_sclk i2s2m0_sdi i2s2m0_sdo i2s2m1_lrck i2s2m1_mclk i2s2m1_sclk i2s2m1_sdi i2s2m1_sdo i2s3_lrck i2s3_mclk i2s3_sclk i2s3_sdi i2s3_sdo jtagm0_pins jtagm1_pins jtagm2_pins litcpu_pins mcum0_pins mcum1_pins mipim0_camera0_clk mipim0_camera1_clk mipim0_camera2_clk mipim0_camera3_clk mipim0_camera4_clk mipim1_camera0_clk mipim1_camera1_clk mipim1_camera2_clk mipim1_camera3_clk mipim1_camera4_clk mipi_te0 mipi_te1 npu_pins pcie20x1m0_clkreqn pcie20x1m0_perstn pcie20x1m0_waken pcie20x1m1_clkreqn pcie20x1m1_perstn pcie20x1m1_waken pcie20x1_2_button_rstn pcie30phy_pins pcie30x1m0_0_clkreqn pcie30x1m0_0_perstn pcie30x1m0_0_waken pcie30x1m0_1_clkreqn pcie30x1m0_1_perstn pcie30x1m0_1_waken pcie30x1m1_0_clkreqn pcie30x1m1_0_perstn pcie30x1m1_0_waken pcie30x1m1_1_clkreqn pcie30x1m1_1_perstn pcie30x1m1_1_waken pcie30x1m2_0_clkreqn pcie30x1m2_0_perstn pcie30x1m2_0_waken pcie30x1m2_1_clkreqn pcie30x1m2_1_perstn pcie30x1m2_1_waken pcie30x1_0_button_rstn pcie30x1_1_button_rstn pcie30x2m0_clkreqn pcie30x2m0_perstn pcie30x2m0_waken pcie30x2m1_clkreqn pcie30x2m1_perstn pcie30x2m1_waken pcie30x2m2_clkreqn pcie30x2m2_perstn pcie30x2m2_waken pcie30x2m3_clkreqn pcie30x2m3_perstn pcie30x2m3_waken pcie30x2_button_rstn pcie30x4m0_clkreqn pcie30x4m0_perstn pcie30x4m0_waken pcie30x4m1_clkreqn pcie30x4m1_perstn pcie30x4m1_waken pcie30x4m2_clkreqn pcie30x4m2_perstn pcie30x4m2_waken pcie30x4m3_clkreqn pcie30x4m3_perstn pcie30x4m3_waken pcie30x4_button_rstn pdm0m0_clk pdm0m0_clk1 pdm0m0_sdi0 pdm0m0_sdi1 pdm0m0_sdi2 pdm0m0_sdi3 pdm0m1_clk pdm0m1_clk1 pdm0m1_sdi0 pdm0m1_sdi1 pdm0m1_sdi2 pdm0m1_sdi3 pdm1m0_clk pdm1m0_clk1 pdm1m0_sdi0 pdm1m0_sdi1 pdm1m0_sdi2 pdm1m0_sdi3 pdm1m1_clk pdm1m1_clk1 pdm1m1_sdi0 pdm1m1_sdi1 pdm1m1_sdi2 pdm1m1_sdi3 pmic_pins pmu_pins pwm0m0_pins pwm0m1_pins pwm0m2_pins pwm1m0_pins pwm1m1_pins pwm1m2_pins pwm2m0_pins pwm2m1_pins pwm2m2_pins pwm3m0_pins pwm3m1_pins pwm3m2_pins pwm3m3_pins pwm4m0_pins pwm4m1_pins pwm5m0_pins pwm5m1_pins pwm5m2_pins pwm6m0_pins pwm6m1_pins pwm6m2_pins pwm7m0_pins pwm7m1_pins pwm7m2_pins pwm7m3_pins pwm8m0_pins pwm8m1_pins pwm8m2_pins pwm9m0_pins pwm9m1_pins pwm9m2_pins pwm10m0_pins pwm10m1_pins pwm10m2_pins pwm11m0_pins pwm11m1_pins pwm11m2_pins pwm11m3_pins pwm12m0_pins pwm12m1_pins pwm13m0_pins pwm13m1_pins pwm13m2_pins pwm14m0_pins pwm14m1_pins pwm14m2_pins pwm15m0_pins pwm15m1_pins pwm15m2_pins pwm15m3_pins refclk_pins sata_pins sata0m0_pins sata0m1_pins sata1m0_pins sata1m1_pins sata2m0_pins sata2m1_pins sdiom1_pins sdiom0_pins sdmmc_bus4 sdmmc_clk sdmmc_cmd sdmmc_det sdmmc_pwren spdif0m0_tx spdif0m1_tx spdif1m0_tx spdif1m1_tx spdif1m2_tx spi0m0_pins spi0m0_cs0 spi0m0_cs1 spi0m1_pins spi0m1_cs0 spi0m1_cs1 spi0m2_pins spi0m2_cs0 spi0m2_cs1 spi0m3_pins spi0m3_cs0 spi0m3_cs1 spi1m1_pins spi1m1_cs0 spi1m1_cs1 spi1m2_pins spi1m2_cs0 spi1m2_cs1 spi1m0_pins spi1m0_cs0 spi1m0_cs1 spi2m0_pins spi2m0_cs0 spi2m0_cs1 spi2m1_pins spi2m1_cs0 spi2m1_cs1 spi2m2_pins spi2m2_cs0 spi2m2_cs1 spi3m1_pins spi3m1_cs0 spi3m1_cs1 spi3m2_pins spi3m2_cs0 spi3m2_cs1 spi3m3_pins spi3m3_cs0 spi3m3_cs1 spi3m0_pins spi3m0_cs0 spi3m0_cs1 spi4m0_pins spi4m0_cs0 spi4m0_cs1 spi4m1_pins spi4m1_cs0 spi4m1_cs1 spi4m2_pins spi4m2_cs0 tsadcm1_shut tsadc_shut tsadc_shut_org uart0m0_xfer uart0m1_xfer uart0m2_xfer uart0_ctsn uart0_rtsn uart1m1_xfer uart1m1_ctsn uart1m1_rtsn uart1m2_xfer uart1m2_ctsn uart1m2_rtsn uart1m0_xfer uart1m0_ctsn uart1m0_rtsn uart2m0_xfer uart2m1_xfer uart2m2_xfer uart2_ctsn uart2_rtsn uart3m0_xfer uart3m1_xfer uart3m2_xfer uart3_ctsn uart3_rtsn uart4m0_xfer uart4m1_xfer uart4m2_xfer uart4_ctsn uart4_rtsn uart5m0_xfer uart5m0_ctsn uart5m0_rtsn uart5m1_xfer uart5m1_ctsn uart5m1_rtsn uart5m2_xfer uart6m1_xfer uart6m1_ctsn uart6m1_rtsn uart6m2_xfer uart6m0_xfer uart6m0_ctsn uart6m0_rtsn uart7m1_xfer uart7m1_ctsn uart7m1_rtsn uart7m2_xfer uart7m0_xfer uart7m0_ctsn uart7m0_rtsn uart8m0_xfer uart8m0_ctsn uart8m0_rtsn uart8m1_xfer uart8m1_ctsn uart8m1_rtsn uart8_xfer uart9m0_xfer uart9m1_xfer uart9m1_ctsn uart9m1_rtsn uart9m2_xfer uart9m2_ctsn uart9m2_rtsn uart9m0_ctsn uart9m0_rtsn vop_pins bt656_pins tsadc_gpio_func eth0_pins gmac0_miim gmac0_clkinout gmac0_rx_bus2 gmac0_tx_bus2 gmac0_rgmii_clk gmac0_rgmii_bus gmac0_ppsclk gmac0_ppstring gmac0_ptp_refclk gmac0_txer led_user_en pcie2_0_rst pcie30x2_perstn_m1_l pcie_4g_pwen pcie30x4_perstn_m1_l pcie30x4_pwren_h hym8563_int vcc5v0_host_en hdmi1_sound usb_host1_xhci pcie30_phy_grf pipe_phy1_grf usbdpphy1_grf usb2phy1_grf u2phy1 u2phy1_otg hdptxphy1_grf spdif_tx5 i2s8_8ch spdif_tx4 i2s6_8ch i2s7_8ch i2s10_8ch dp1 dp1_in dp1_out hdmi1_in hdmi1_in_vp0 hdmi1_out hdmi1_out_con edp1 edp1_in edp1_out hdmi_receiver pcie3x4 pcie3x4_intc pcie3x4_ep pcie3x2 pcie3x2_intc pcie2x1l0 pcie2x1l0_intc gmac0 mdio0 gmac0_stmmac_axi_setup gmac0_mtl_rx_setup gmac0_mtl_tx_setup sata1 hdptxphy1 usbdp_phy1 combphy1_ps pcie30phy cluster0_opp_table cluster1_opp_table cluster2_opp_table gpu_opp_table led_user vcc12v_dcin vcc5v0_sys vcc_1v1_nldo_s3 hdmi1_con_in pcie30_port0_refclk pcie30_port1_refclk vcc3v3_pcie2x1l0 vcc3v3_bkey vcc3v3_pcie30 vcc3v3_pi6c_05 vcc5v0_host 