  0   8     (            @                                                                        ,radxa,rock3a rockchip,rk3568             7Radxa ROCK 3A      aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /ethernet@fe010000           /mmc@fe310000            /mmc@fe2b0000            /mmc@fe000000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                    psci            *           7   @        I           V           c   @        u                                               
      cpu@100          cpu          ,arm,cortex-a55                                    psci            *           7   @        I           V           c   @        u                                                     cpu@200          cpu          ,arm,cortex-a55                                    psci            *           7   @        I           V           c   @        u                                                     cpu@300          cpu          ,arm,cortex-a55                                    psci            *           7   @        I           V           c   @        u                                                        l3-cache             ,cache                               ,           9   @        K                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            ڂ                                          protocol@14                                              hdmi-sound           ,simple-audio-card           HDMI            i2s         (           Bokay       simple-audio-card,codec         I         simple-audio-card,cpu           I   	         pmu          ,arm,cortex-a55-pmu        0  S                                                ^   
               psci             ,arm,psci-1.0            #smc       reserved-memory                                   q   shmem@10f000             ,arm,scmi-shmem                                x                    timer            ,arm,armv8-timer       0  S                                 
                  xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci              @                                           sata pmalive rxoob          S       _                       	  sata-phy                                   	  Bdisabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                         sata pmalive rxoob          S       `                       	  sata-phy                                   	  Bdisabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                     @          S                                            ref_clk suspend_clk bus_clk         otg       
  utmi_wide                                        $        Bokay                             usb2-phy usb3-phy           =         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          S                                            ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                        $        Bokay          interrupt-controller@fd400000            ,arm,gic-v3               @             F                 S      	            D        Y           j    A          t  (                     q                                                msi-controller@fd440000          ,arm,gic-v3-its              D                                                 i         usb@fd800000             ,generic-ehci                                 S                                                       usb         Bokay          usb@fd840000             ,generic-ohci                                 S                                                       usb         Bokay          usb@fd880000             ,generic-ehci                                 S                                                       usb         Bokay          usb@fd8c0000             ,generic-ohci                                 S                                                       usb         Bokay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                    g   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           Bokay                                                                                                                syscon@fdc50000                                ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                          syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                        syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon              ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                          '                    clock-controller@fdd20000            ,rockchip,rk3568-cru                                         xin24m                     '           4                          D   G          Y              p                     i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                              S       .                       -      	  i2c pclk               !        default                                   Bokay       regulator@1c             ,tcs,tcs4525                    }           vdd_cpu                            5          0                     "              regulator-state-mem                   pmic@20          ,rockchip,rk809                           #        S              4      H        Y                        mclk                  H        default            $   %         8        P            a   &        m   &        y   &           &           &           &           &           &           &                       regulators     DCDC_REG1         
  vdd_logic                                                   p          q   regulator-state-mem                   DCDC_REG2           vdd_gpu                                        p          q           H   regulator-state-mem                   DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                               p          q   regulator-state-mem                   DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem                   LDO_REG1            vdda0v9_image                                c   regulator-state-mem                   LDO_REG2          	  vdda_0v9                                           regulator-state-mem                   LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                  
          LDO_REG4            vccio_acodec                      2Z         2Z              regulator-state-mem                   LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem                   LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                  
 2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem                   LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                  
 w@         LDO_REG9            vcca1v8_image            w@         w@           d   regulator-state-mem                   SWITCH_REG1         vcc_3v3                                 regulator-state-mem                   SWITCH_REG2       
  vcc3v3_sd              p   regulator-state-mem                            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                S       t                       ,        baudclk apb_pclk            &   '       '              (        default         +           8         	  Bdisabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               )        default         B         	  Bdisabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                         0      	  pwm pclk               *        default         B         	  Bdisabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               +        default         B         	  Bdisabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              0                           0      	  pwm pclk               ,        default         B         	  Bdisabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                           power-controller          !   ,rockchip,rk3568-power-controller            M                                           power-domain@7                                         a   -        M          power-domain@8                                         a   .   /   0        M          power-domain@9             	                                  a   1   2   3        M          power-domain@10            
                            a   4   5   6   7   8   9        M          power-domain@11                                  a   :        M          power-domain@13                                 a   ;        M          power-domain@14                                 a   <   =   >        M          power-domain@15                                   a   ?   @   A   B   C   D   E   F        M                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                       @       $  S       (          )          '           hjob mmu gpu                             gpu bus                                  Bokay               G        x   H                 video-codec@fdea0400             ,rockchip,rk3568-vpu                              S                  hvdpu                              
  aclk hclk              I                    iommu@fdea0800           ,rockchip,rk3568-iommu                       @        S                  aclk iface                                                           I      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                             S       Z                                     aclk hclk sclk               &     $     %        core axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                 S       @                             
  aclk hclk              J              
      iommu@fdee0800           ,rockchip,rk3568-iommu                       @        S       ?                               aclk iface                
                       J      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                      @         S       d                                          biu ciu ciu-drive ciu-sample                       р                      reset           Bokay                                                              K                 default            L   M   N                  ,         9         F        T   &        `         ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                S                             hmacirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  stmmaceth           p            m   O         }           P           Q                 Bokay            4                  Y        R        input              S      	  rgmii-id                       default            T   U   V   W   X   Y   mdio             ,snps,dwmac-mdio                              ethernet-phy@0           ,ethernet-phy-ieee802.3-c22                      default            Z          N                     [                 S         stmmac-axi-config                                            !           1              O      rx-queues-config            A              P   queue0           tx-queues-config            W              Q   queue0              vop@fe040000                         0     @                mvop gamma-lut           S                (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2               \              	        p            Bokay             ,rockchip,rk3568-vop         4                    Y               ports                                           port@0                                           endpoint@2                     w   ]           e         port@1                                             port@2                                                   iommu@fe043e00           ,rockchip,rk3568-iommu                >            ?                S                                      aclk iface                            	        Bokay               \      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                S       D           pclk                          dphy               ^              	        apb                      p          	  Bdisabled       ports                                port@0                    port@1                         dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                S       E           pclk                          dphy               _              	        apb                      p          	  Bdisabled       ports                                port@0                    port@1                         hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi             
                 S       -         (                         (              iahb isfr cec ref           default            `   a   b              	        +           p            P            Bokay               c           d              ports                                port@0                 endpoint            w   e           ]         port@1                endpoint            w   f                          qos@fe128000             ,rockchip,rk3568-qos syscon                                  -      qos@fe138080             ,rockchip,rk3568-qos syscon                                 <      qos@fe138100             ,rockchip,rk3568-qos syscon                                  =      qos@fe138180             ,rockchip,rk3568-qos syscon                                 >      qos@fe148000             ,rockchip,rk3568-qos syscon                                  .      qos@fe148080             ,rockchip,rk3568-qos syscon                                 /      qos@fe148100             ,rockchip,rk3568-qos syscon                                  0      qos@fe150000             ,rockchip,rk3568-qos syscon                                   :      qos@fe158000             ,rockchip,rk3568-qos syscon                                  4      qos@fe158100             ,rockchip,rk3568-qos syscon                                  5      qos@fe158180             ,rockchip,rk3568-qos syscon                                 6      qos@fe158200             ,rockchip,rk3568-qos syscon                                  7      qos@fe158280             ,rockchip,rk3568-qos syscon                                 8      qos@fe158300             ,rockchip,rk3568-qos syscon                                  9      qos@fe180000             ,rockchip,rk3568-qos syscon                              qos@fe190000             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190280             ,rockchip,rk3568-qos syscon                                 C      qos@fe190300             ,rockchip,rk3568-qos syscon                                  D      qos@fe190380             ,rockchip,rk3568-qos syscon                                 E      qos@fe190400             ,rockchip,rk3568-qos syscon                                  F      qos@fe198000             ,rockchip,rk3568-qos syscon                                  ;      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                  1      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                 2      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                  3      dfi@fe230000             ,rockchip,rk3568-dfi             #                 S                     g      pcie@fe260000            ,rockchip,rk3568-pcie          0             @      &                               mdbi apb config        <  S       K          J          I          H          G           hsys pmc msg legacy err                       (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         Y                                `                    h                      h                     h                     h                                             	           	       i               	%                       	  pcie-phy                        T  q                                                    @              @                         pipe                                     Bokay            default            j           [               	/   k   legacy-interrupt-controller                      Y            D                     S       H              h         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             +        @         S       b                                          biu ciu ciu-drive ciu-sample                       р                      reset           Bokay                                	?   #                       default            l   m   n   o         9        T   p        `         mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             ,        @         S       c                                          biu ciu ciu-drive ciu-sample                       р                      reset         	  Bdisabled          spi@fe300000             ,rockchip,sfc                0        @         S       e                 x      v        clk_sfc hclk_sfc               q        default         Bokay                                 flash@0          ,jedec,spi-nor                       	H2         	Z           	k            mmc@fe310000             ,rockchip,rk3568-dwcmshc             1                 S                  4      {      }        D n6       (        |      z      y      {      }        core bus axi block timer            Bokay                                         default            r   s   t   u        T           `         rng@fe388000             ,rockchip,rk3568-rng             8       @               p      o      	  core ahb                  m        Bokay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm             @                 S       4           4      =      A        DFq Fq               ?      C      9        mclk_tx mclk_rx hclk            &   v            	|tx                P      Q      
  tx-m rx-m           p            P            Bokay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm             A                 S       5           4      E      I        DFq Fq               G      K      :        mclk_tx mclk_rx hclk            &   v      v           	|rx tx                 R      S      
  tx-m rx-m           p            default            w   x   y   z        P            Bokay             	                 i2s@fe420000             ,rockchip,rk3568-i2s-tdm             B                 S       6           4      M        DFq               O      O      ;        mclk_tx mclk_rx hclk            &   v      v           	|tx rx                 T        tx-m            p            default            {   |   }   ~        P            Bokay             	      i2s@fe430000             ,rockchip,rk3568-i2s-tdm             C                 S       7                 S      W      <        mclk_tx mclk_rx hclk            &   v      v           	|tx rx                 U      V      
  tx-m rx-m           p            P          	  Bdisabled          pdm@fe440000             ,rockchip,rk3568-pdm             D                 S       L                 Z      Y        pdm_clk pdm_hclk            &   v   	        	|rx                                    default               X        pdm-m           P          	  Bdisabled          spdif@fe460000           ,rockchip,rk3568-spdif               F                 S       f         
  mclk hclk                 _      \        &   v           	|tx          default                    P          	  Bdisabled          dma-controller@fe530000          ,arm,pl330 arm,primecell             S        @         S                             	                   	  apb_pclk            	              '      dma-controller@fe550000          ,arm,pl330 arm,primecell             U        @         S                             	                   	  apb_pclk            	              v      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             Z                 S       /                H     G      	  i2c pclk                       default                                 	  Bdisabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             [                 S       0                J     I      	  i2c pclk                       default                                 	  Bdisabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             \                 S       1                L     K      	  i2c pclk                       default                                 	  Bdisabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ]                 S       2                N     M      	  i2c pclk                       default                                 	  Bdisabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ^                 S       3                P     O      	  i2c pclk                       default                                   Bokay       rtc@51           ,haoyu,hym8563              Q             #        S                          rtcic_32kout            default                              watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt             `                 S                                  
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             a                 S       g                R     Q        spiclk apb_pclk         &   '      '           	|tx rx           default                                                  	  Bdisabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             b                 S       h                T     S        spiclk apb_pclk         &   '      '           	|tx rx           default                                                  	  Bdisabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             c                 S       i                V     U        spiclk apb_pclk         &   '      '           	|tx rx           default                                                  	  Bdisabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             d                 S       j                X     W        spiclk apb_pclk         &   '      '           	|tx rx           default                                                  	  Bdisabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               e                 S       u                             baudclk apb_pclk            &   '      '                            default         +           8           Bokay             	      serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               f                 S       v                #              baudclk apb_pclk            &   '      '                      default         +           8           Bokay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               g                 S       w                '     $        baudclk apb_pclk            &   '      '                      default         +           8         	  Bdisabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               h                 S       x                +     (        baudclk apb_pclk            &   '      '   	                   default         +           8         	  Bdisabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               i                 S       y                /     ,        baudclk apb_pclk            &   '   
   '                      default         +           8         	  Bdisabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               j                 S       z                3     0        baudclk apb_pclk            &   '      '                      default         +           8         	  Bdisabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               k                 S       {                7     4        baudclk apb_pclk            &   '      '                      default         +           8         	  Bdisabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               l                 S       |                ;     8        baudclk apb_pclk            &   '      '                      default         +           8         	  Bdisabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               m                 S       }                ?     <        baudclk apb_pclk            &   '      '                      default         +           8         	  Bdisabled          thermal-zones      cpu-thermal         	   d        	          	          trips      cpu_alert0          
 p        
           passive                  cpu_alert1          
 $        
           passive       cpu_crit            
 s        
        	   critical             cooling-maps       map0            
         0  
#   
                     gpu-thermal         	           	          	         trips      gpu-threshold           
 p        
           passive       gpu-target          
 $        
           passive                  gpu-crit            
 s        
        	   critical             cooling-maps       map0            
           
#                  tsadc@fe710000           ,rockchip,rk3568-tsadc               q                 S       s           4                  Df@ 
`                          tsadc apb_pclk                                 p            
2 s        default sleep                      
I           
S           Bokay            
i           
                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc               r                 S       ]                             saradc apb_pclk                      saradc-apb          
           Bokay            
         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                     Z     Y      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n 0                    Z     Y      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                     ]     \      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o 0                    ]     \      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                     `     _      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default         B         	  Bdisabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p 0                    `     _      	  pwm pclk                       default         B         	  Bdisabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                     "     }              ref apb pipe            4      "        D                      phy         
           
           
           Bokay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                     %     ~              ref apb pipe            4      %        D                      phy         
           
           
           Bokay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                      y        pclk            
                         apb         p          	  Bdisabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       z        
                  	        apb                    	  Bdisabled               ^      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       {        
                  	        apb                    	  Bdisabled               _      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy0_480m            S                  
                       Bokay                  host-port           
            Bokay                                otg-port            
            Bokay                                   usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy1_480m            S                  
                       Bokay       host-port           
            Bokay                                otg-port            
            Bokay                                   pinctrl          ,rockchip,rk3568-pinctrl         p               g                                  q              gpio@fdd60000            ,rockchip,gpio-bank                               S       !                 .               
                                           D        Y              #      gpio@fe740000            ,rockchip,gpio-bank              t                 S       "                c     d         
                                           D        Y                    gpio@fe750000            ,rockchip,gpio-bank              u                 S       #                e     f         
                  @                        D        Y                    gpio@fe760000            ,rockchip,gpio-bank              v                 S       $                g     h         
                  `                        D        Y              [      gpio@fe770000            ,rockchip,gpio-bank              w                 S       %                i     j         
                                          D        Y         pcfg-pull-up             $                 pcfg-pull-down           1                 pcfg-pull-none           @                 pcfg-pull-none-drv-level-1           @        M                    pcfg-pull-none-drv-level-2           @        M                    pcfg-pull-none-drv-level-3           @        M                    pcfg-pull-up-drv-level-1             $        M                    pcfg-pull-up-drv-level-2             $        M                    pcfg-pull-none-smt           @         \                 acodec        audiopwm          bt656         bt1120        cam    vcc_cam_en          q      	                           can0       can0m0-pins          q                                              can1       can1m0-pins          q                                             can2       can2m0-pins          q                                            cif       clk32k     clk32k-out0         q                                 cpu       ebc       edpdp         emmc       emmc-bus8           q                                                                                                           r      emmc-clk            q                       s      emmc-cmd            q                       t      emmc-datastrobe         q                       u         eth0          eth1          flash         fspi       fspi-pins         `  q                                                                                   q         gmac0         gmac1      gmac1m1-miim             q                                   T      gmac1m1-clkinout            q                       X      gmac1m1-rx-bus2       0  q                              	                 V      gmac1m1-tx-bus2       0  q                                               U      gmac1m1-rgmii-clk            q                                    W      gmac1m1-rgmii-bus         @  q                                                           Y         gpu       hdmitx     hdmitxm1-cec            q                        b      hdmitx-scl          q                       `      hdmitx-sda          q                       a         i2c0       i2c0-xfer            q       	             
                 !         i2c1       i2c1-xfer            q                                              i2c2       i2c2m0-xfer          q                                              i2c3       i2c3m1-xfer          q                                            i2c4       i2c4m1-xfer          q      
            	                          i2c5       i2c5m0-xfer          q                                            i2s1       i2s1m0-lrcktx           q                       x      i2s1m0-mclk         q                       %      i2s1m0-sclktx           q                       w      i2s1m0-sdi0         q                       y      i2s1m0-sdo0         q                       z         i2s2       i2s2m0-lrcktx           q                       |      i2s2m0-sclktx           q                       {      i2s2m0-sdi          q                       }      i2s2m0-sdo          q                       ~         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2       pcie30x2m1-pins       0  q                                                        pdm    pdmm0-clk           q                             pdmm0-clk1          q                             pdmm0-sdi0          q                             pdmm0-sdi1          q      
                       pdmm0-sdi2          q      	                       pdmm0-sdi3          q                                pmic       pmic_int            q                         $         pmu       pwm0       pwm0m0-pins         q                        )         pwm1       pwm1m0-pins         q                        *         pwm2       pwm2m0-pins         q                        +         pwm3       pwm3-pins           q                        ,         pwm4       pwm4-pins           q                                 pwm5       pwm5-pins           q                                 pwm6       pwm6-pins           q                                 pwm7       pwm7-pins           q                                 pwm8       pwm8m0-pins         q      	                          pwm9       pwm9m0-pins         q      
                          pwm10      pwm10m0-pins            q                                pwm11      pwm11m0-pins            q                                pwm12      pwm12m0-pins            q                                pwm13      pwm13m0-pins            q                                pwm14      pwm14m0-pins            q                                pwm15      pwm15m0-pins            q                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  q                                                            l      sdmmc0-clk          q                       m      sdmmc0-cmd          q                       n      sdmmc0-det          q                        o         sdmmc1        sdmmc2     sdmmc2m0-bus4         @  q                                                           L      sdmmc2m0-clk            q                       N      sdmmc2m0-cmd            q                       M         spdif      spdifm0-tx          q                                spi0       spi0m0-pins       0  q                                                        spi0m0-cs0          q                              spi0m0-cs1          q                                 spi1       spi1m0-pins       0  q                                                     spi1m0-cs0          q                             spi1m0-cs1          q                                spi2       spi2m0-pins       0  q                                                     spi2m0-cs0          q                             spi2m0-cs1          q                                spi3       spi3m0-pins       0  q                              
                       spi3m0-cs0          q                             spi3m0-cs1          q                                tsadc      tsadc-shutorg           q                              tsadc-pin           q                                  uart0      uart0-xfer           q                                     (         uart1      uart1m0-xfer             q                                         uart1m0-ctsn            q                             uart1m0-rtsn            q                                uart2      uart2m0-xfer             q                                              uart3      uart3m0-xfer             q                                             uart4      uart4m0-xfer             q                                            uart5      uart5m0-xfer             q                                            uart6      uart6m0-xfer             q                                            uart7      uart7m0-xfer             q                                            uart8      uart8m0-xfer             q                                            uart9      uart9m0-xfer             q                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       display    vcc_mipi_en         q                                 ethernet       eth_phy_rst         q                        Z         hym8563    hym8563-int         q                                  leds       led_user_en         q                                  pcie       pcie-enable-h           q                               pcie-reset-h            q                        j         usb    vcc5v0_usb_host_en          q                               vcc5v0_usb_hub_en           q                               vcc5v0_usb_otg_en           q                                  bt     bt-enable           q      
             bt-host-wake            q                   bt-wake         q                      sdio-pwrseq    wifi-enable         q                                    opp-table-0          ,operating-points-v2                        opp-408000000               Q          P P 0          @      opp-600000000               #F          P P 0          @      opp-816000000               0,          P P 0          @               opp-1104000000              Aʹ            0          @      opp-1416000000              Tfr            0          @      opp-1608000000              _"            0          @      opp-1800000000              kI          0 0 0          @      opp-1992000000              v          0 0 0          @         opp-table-1          ,operating-points-v2            G   opp-200000000                         P P B@      opp-300000000                         P P B@      opp-400000000               ׄ          P P B@      opp-600000000               #F            B@      opp-700000000               )'          ~ ~ B@      opp-800000000               /          B@ B@ B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                          sata pmalive rxoob          S       ^                       	  sata-phy                                   	  Bdisabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       qos@fe190080             ,rockchip,rk3568-qos syscon                                  @      qos@fe190100             ,rockchip,rk3568-qos syscon                                  A      qos@fe190200             ,rockchip,rk3568-qos syscon                                  B      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                
                  &      '     w        refclk_m refclk_n pclk                       phy                    Bokay                                pcie@fe270000            ,rockchip,rk3568-pcie                                                 (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  S                                                          hsys pmc msg legacy err          Y                                `                                                                                                                                	           	      i              	%                    	  pcie-phy                        0     @       @      '                             T  q                                                    @      @       @           mdbi apb config                        pipe          	  Bdisabled       legacy-interrupt-controller          D                     Y                        S                              pcie@fe280000            ,rockchip,rk3568-pcie                                            /      (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  S                                                          hsys pmc msg legacy err          Y                                `                                                                                                                                	           	       i               	%                    	  pcie-phy                        0            @      (                             T  q                                                    @             @           mdbi apb config                        pipe            Bokay            default                                      	/   k   legacy-interrupt-controller          D                     Y                        S                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a               *                 S                            hmacirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  stmmaceth           p            m            }                                     	  Bdisabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                            !           1                    rx-queues-config            A                 queue0           tx-queues-config            W                 queue0              can@fe570000             ,rockchip,rk3568v2-canfd             W                 S                       A     @      
  baud pclk                U     T      	  core apb            default                  	  Bdisabled          can@fe580000             ,rockchip,rk3568v2-canfd             X                 S                       C     B      
  baud pclk                W     V      	  core apb            default                  	  Bdisabled          can@fe590000             ,rockchip,rk3568v2-canfd             Y                 S                       E     D      
  baud pclk                Y     X      	  core apb            default                  	  Bdisabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                          |              ref apb pipe            4              D                      phy         
           
           
           Bokay                     chosen          serial2:1500000n8         hdmi-con             ,hdmi-connector           a      port       endpoint            w              f            external-gmac1-clock             ,fixed-clock         sY@        gmac1_clkin                        R      leds          
   ,gpio-leds      led-0              #             
  heartbeat                    
  heartbeat           default                     rk809-sound          ,simple-audio-card           i2s         Analog RK809            (      simple-audio-card,cpu           I         simple-audio-card,codec         I            sdio-pwrseq          ,mmc-pwrseq-simple                       
  ext_clock           default                       d         LK@           [                 K      regulator-vcc12v-dcin            ,regulator-fixed         vcc12v_dcin                                    regulator-pcie30-avdd0v9             ,regulator-fixed         pcie30_avdd0v9                                                 &      regulator-pcie30-avdd1v8             ,regulator-fixed         pcie30_avdd1v8                             w@         w@           &      regulator-vcc3v3-pi6c-03             ,regulator-fixed         vcc3v3_pi6c_03                             2Z         2Z           "                 regulator-vcc3v3-pcie            ,regulator-fixed          (           #               default                    vcc3v3_pcie          2Z         2Z           "           k      regulator-vcc3v3-sys             ,regulator-fixed         vcc3v3_sys                             2Z         2Z                      &      regulator-vcc5v0-sys             ,regulator-fixed         vcc5v0_sys                             LK@         LK@                      "      regulator-vcc5v0-usb             ,regulator-fixed         vcc5v0_usb                             LK@         LK@                            regulator-vcc5v0-usb-host            ,regulator-fixed          (        ;   #               default                    vcc5v0_usb_host          LK@         LK@                            regulator-vcc5v0-usb-hub             ,regulator-fixed          (        ;   #               default                    vcc5v0_usb_hub                            regulator-vcc5v0-usb-otg             ,regulator-fixed          (        ;   #               default                    vcc5v0_usb_otg           LK@         LK@                            regulator-vcc-cam            ,regulator-fixed          (        ;      	            default                    vcc_cam          2Z         2Z           &   regulator-state-mem                   regulator-vcc-mipi           ,regulator-fixed          (        ;   [               default                  	  vcc_mipi             2Z         2Z           &   regulator-state-mem                      	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 ethernet0 mmc0 mmc1 mmc2 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend system-power-controller #sound-dai-cells vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency bus-width disable-wp cap-sd-highspeed cap-sdio-irq keep-power-in-suspend mmc-pwrseq non-removable sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode phy-supply reset-assert-us reset-deassert-us reset-gpios snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes vpcie3v3-supply cd-gpios spi-max-frequency spi-rx-bus-width spi-tx-bus-width dma-names rockchip,trcm-sync-tx-only arm,pl330-periph-burst #dma-cells uart-has-rtscts polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-pull-down bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf stdout-path function color linux,default-trigger post-power-on-delay-ms power-off-delay-us enable-active-high gpio 