     8  p   (            J  8                                                                   &   ,firefly,rk3568-roc-pc rockchip,rk3568            7Firefly Station P2     aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /ethernet@fe2a0000           /ethernet@fe010000           /mmc@fe2b0000            /mmc@fe310000         cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                    !psci            /           <   @        N           [           h   @        z                                    	      cpu@100          cpu          ,arm,cortex-a55                                    !psci            /           <   @        N           [           h   @        z                                    
      cpu@200          cpu          ,arm,cortex-a55                                    !psci            /           <   @        N           [           h   @        z                                          cpu@300          cpu          ,arm,cortex-a55                                    !psci            /           <   @        N           [           h   @        z                                             l3-cache             ,cache                               1           >   @        P                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            Ԃ                                          protocol@14                                              hdmi-sound           ,simple-audio-card           HDMI            	i2s         "           <okay       simple-audio-card,codec         C         simple-audio-card,cpu           C            pmu          ,arm,cortex-a55-pmu        0  M                                                X   	   
            psci             ,arm,psci-1.0            (smc       reserved-memory                                   k   shmem@10f000             ,arm,scmi-shmem                                r                    timer            ,arm,armv8-timer       0  M                                 
            y      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci              @                                           sata pmalive rxoob          M       _                       	  sata-phy                                   	  <disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                         sata pmalive rxoob          M       `                       	  sata-phy                                     <okay          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                     @          M                                            ref_clk suspend_clk bus_clk         otg       
  utmi_wide                                                <okay                             usb2-phy usb3-phy         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          M                                            ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  utmi_wide                                                <okay          interrupt-controller@fd400000            ,arm,gic-v3               @             F                 M      	            7        L           ]    A          g  (            r         k                                                msi-controller@fd440000          ,arm,gic-v3-its              D                           r                      `         usb@fd800000             ,generic-ehci                                 M                                                       usb         <okay          usb@fd840000             ,generic-ohci                                 M                                                       usb         <okay          usb@fd880000             ,generic-ehci                                 M                                                       usb         <okay          usb@fd8c0000             ,generic-ohci                                 M                                                       usb         <okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                    ^   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           <okay                                                                                                                syscon@fdc50000                                ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                         syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                        syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon              ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                              clock-controller@fdd20000            ,rockchip,rk3568-cru                                         xin24m                                '                          7   G          L              c                    i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                              M       .                       -      	  i2c pclk                       default                                   <okay       pmic@20          ,rockchip,rk809                                    M                         default            !         p           "           "           "           "           "           "           "           "           "            regulators     DCDC_REG1         
  vdd_logic                     %        7           N          f p        ~  q   regulator-state-mem                   DCDC_REG2           vdd_gpu         7           N          f p        ~  q           D   regulator-state-mem                   DCDC_REG3           vcc_ddr                   %        7      regulator-state-mem                   DCDC_REG4           vdd_npu         7           N          f p        ~  q   regulator-state-mem                   DCDC_REG5           vcc_1v8                   %        N w@        f w@              regulator-state-mem                   LDO_REG1            vdda0v9_image           N         f            Z   regulator-state-mem                   LDO_REG2          	  vdda_0v9                      %        N         f    regulator-state-mem                   LDO_REG3            vdda0v9_pmu                   %        N         f    regulator-state-mem                            LDO_REG4            vccio_acodec            N 2Z        f 2Z              regulator-state-mem                   LDO_REG5          	  vccio_sd            N w@        f 2Z              regulator-state-mem                   LDO_REG6            vcc3v3_pmu                    %        N 2Z        f 2Z              regulator-state-mem                   2Z         LDO_REG7          	  vcca_1v8                      %        N w@        f w@              regulator-state-mem                   LDO_REG8            vcca1v8_pmu                   %        N w@        f w@   regulator-state-mem                   w@         LDO_REG9            vcca1v8_image           N w@        f w@           [   regulator-state-mem                   SWITCH_REG1         vcc_3v3                   %              regulator-state-mem                   SWITCH_REG2       
  vcc3v3_sd                     %           e   regulator-state-mem                            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                M       t                       ,        baudclk apb_pclk               #       #              $        default                             	  <disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               %        default                  	  <disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                         0      	  pwm pclk               &        default                  	  <disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                          0      	  pwm pclk               '        default                  	  <disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              0                           0      	  pwm pclk               (        default                  	  <disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                           power-controller          !   ,rockchip,rk3568-power-controller                                                       power-domain@7                                            )                  power-domain@8                                            *   +   ,                  power-domain@9             	                                     -   .   /                  power-domain@10            
                               0   1   2   3   4   5                  power-domain@11                                     6                  power-domain@13                                    7                  power-domain@14                                    8   9   :                  power-domain@15                                      ;   <   =   >   ?   @   A   B                        gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                       @       $  M       (          )          '           "job mmu gpu                             gpu bus                                  <okay               C        2   D                 video-codec@fdea0400             ,rockchip,rk3568-vpu                              M                  "vdpu                              
  aclk hclk           >   E                    iommu@fdea0800           ,rockchip,rk3568-iommu                       @        M                  aclk iface                                            E               E      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                             M       Z                                     aclk hclk sclk               &     $     %        Rcore axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                 M       @                             
  aclk hclk           >   F              
      iommu@fdee0800           ,rockchip,rk3568-iommu                       @        M       ?                               aclk iface                
        E               F      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                      @         M       d                                          biu ciu ciu-drive ciu-sample            ^           iр                      Rreset         	  <disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                M                             "macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  Rstmmaceth           c           w   G                    H           I                 <okay            '                  L        J        input           default            K   L   M   N   O   P           Q        rgmii              R                             N          #   O        ,   &   mdio             ,snps,dwmac-mdio                              phy@0            ,ethernet-phy-ieee802.3-c22                         Q         stmmac-axi-config           5                                 ?           O              G      rx-queues-config            _              H   queue0           tx-queues-config            u              I   queue0              vop@fe040000                         0     @                vop gamma-lut           M                (                                      %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            >   S              	        c           <okay             ,rockchip,rk3568-vop         '                    L               ports                                           port@0                                           endpoint@2                        T           \         port@1                                             port@2                                                   iommu@fe043e00           ,rockchip,rk3568-iommu                >            ?                M                                      aclk iface          E                  	        <okay               S      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                M       D           pclk                          dphy               U              	        Rapb                      c         	  <disabled       ports                                port@0                    port@1                         dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                M       E           pclk                          dphy               V              	        Rapb                      c         	  <disabled       ports                                port@0                    port@1                         hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi             
                 M       -         (                         (              iahb isfr cec ref           default            W   X   Y              	                   c                       <okay               Z           [              ports                                port@0                 endpoint               \           T         port@1                endpoint               ]                          qos@fe128000             ,rockchip,rk3568-qos syscon                                  )      qos@fe138080             ,rockchip,rk3568-qos syscon                                 8      qos@fe138100             ,rockchip,rk3568-qos syscon                                  9      qos@fe138180             ,rockchip,rk3568-qos syscon                                 :      qos@fe148000             ,rockchip,rk3568-qos syscon                                  *      qos@fe148080             ,rockchip,rk3568-qos syscon                                 +      qos@fe148100             ,rockchip,rk3568-qos syscon                                  ,      qos@fe150000             ,rockchip,rk3568-qos syscon                                   6      qos@fe158000             ,rockchip,rk3568-qos syscon                                  0      qos@fe158100             ,rockchip,rk3568-qos syscon                                  1      qos@fe158180             ,rockchip,rk3568-qos syscon                                 2      qos@fe158200             ,rockchip,rk3568-qos syscon                                  3      qos@fe158280             ,rockchip,rk3568-qos syscon                                 4      qos@fe158300             ,rockchip,rk3568-qos syscon                                  5      qos@fe180000             ,rockchip,rk3568-qos syscon                              qos@fe190000             ,rockchip,rk3568-qos syscon                                   ;      qos@fe190280             ,rockchip,rk3568-qos syscon                                 ?      qos@fe190300             ,rockchip,rk3568-qos syscon                                  @      qos@fe190380             ,rockchip,rk3568-qos syscon                                 A      qos@fe190400             ,rockchip,rk3568-qos syscon                                  B      qos@fe198000             ,rockchip,rk3568-qos syscon                                  7      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                  -      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                 .      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                  /      dfi@fe230000             ,rockchip,rk3568-dfi             #                 M                     ^      pcie@fe260000            ,rockchip,rk3568-pcie          0             @      &                               dbi apb config        <  M       K          J          I          H          G           "sys pmc msg legacy err                       (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         L                                `                     _                      _                     _                     _                                  .           =           L       `               T                       	  pcie-phy                        T  k                                                    @              @                         Rpipe                                   	  <disabled       legacy-interrupt-controller                      L            7                     M       H              _         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             +        @         M       b                                          biu ciu ciu-drive ciu-sample            ^           iр                      Rreset           <okay            ^            h        y                           default            a   b   c   d                    e                 mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc             ,        @         M       c                                          biu ciu ciu-drive ciu-sample            ^           iр                      Rreset         	  <disabled          spi@fe300000             ,rockchip,sfc                0        @         M       e                 x      v        clk_sfc hclk_sfc               f        default       	  <disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc             1                 M                  '      {      }        7 n6       (        |      z      y      {      }        core bus axi block timer            <okay            ^           i                  default            g   h   i   j      rng@fe388000             ,rockchip,rk3568-rng             8       @               p      o      	  core ahb                  m        <okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm             @                 M       4           '      =      A        7Fq Fq               ?      C      9        mclk_tx mclk_rx hclk               k            tx                P      Q      
  Rtx-m rx-m           c                       <okay                     i2s@fe410000             ,rockchip,rk3568-i2s-tdm             A                 M       5           '      E      I        7Fq Fq               G      K      :        mclk_tx mclk_rx hclk               k      k           rx tx                 R      S      
  Rtx-m rx-m           c           default       0     l   m   n   o   p   q   r   s   t   u   v   w                  	  <disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm             B                 M       6           '      M        7Fq               O      O      ;        mclk_tx mclk_rx hclk               k      k           tx rx                 T        Rtx-m            c           default            x   y   z   {                  	  <disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm             C                 M       7                 S      W      <        mclk_tx mclk_rx hclk               k      k           tx rx                 U      V      
  Rtx-m rx-m           c                     	  <disabled          pdm@fe440000             ,rockchip,rk3568-pdm             D                 M       L                 Z      Y        pdm_clk pdm_hclk               k   	        rx             |   }   ~                 default               X        Rpdm-m                     	  <disabled          spdif@fe460000           ,rockchip,rk3568-spdif               F                 M       f         
  mclk hclk                 _      \           k           tx          default                              	  <disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell             S        @         M                                                	  apb_pclk                          #      dma-controller@fe550000          ,arm,pl330 arm,primecell             U        @         M                                                	  apb_pclk                          k      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             Z                 M       /                H     G      	  i2c pclk                       default                                 	  <disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             [                 M       0                J     I      	  i2c pclk                       default                                 	  <disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             \                 M       1                L     K      	  i2c pclk                       default                                 	  <disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ]                 M       2                N     M      	  i2c pclk                       default                                 	  <disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c             ^                 M       3                P     O      	  i2c pclk                       default                                 	  <disabled          watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt             `                 M                                  
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             a                 M       g                R     Q        spiclk apb_pclk            #      #           tx rx           default                                                  	  <disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             b                 M       h                T     S        spiclk apb_pclk            #      #           tx rx           default                                                  	  <disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             c                 M       i                V     U        spiclk apb_pclk            #      #           tx rx           default                                                  	  <disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi             d                 M       j                X     W        spiclk apb_pclk            #      #           tx rx           default                                                  	  <disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               e                 M       u                             baudclk apb_pclk               #      #                      default                             	  <disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               f                 M       v                #              baudclk apb_pclk               #      #                      default                               <okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               g                 M       w                '     $        baudclk apb_pclk               #      #                      default                             	  <disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               h                 M       x                +     (        baudclk apb_pclk               #      #   	                   default                             	  <disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               i                 M       y                /     ,        baudclk apb_pclk               #   
   #                      default                             	  <disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               j                 M       z                3     0        baudclk apb_pclk               #      #                      default                             	  <disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               k                 M       {                7     4        baudclk apb_pclk               #      #                      default                             	  <disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               l                 M       |                ;     8        baudclk apb_pclk               #      #                      default                             	  <disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart               m                 M       }                ?     <        baudclk apb_pclk               #      #                      default                             	  <disabled          thermal-zones      cpu-thermal            d        	          	          trips      cpu_alert0          	" p        	.          passive                  cpu_alert1          	" $        	.          passive       cpu_crit            	" s        	.        	  critical             cooling-maps       map0            	9         0  	>   	   
                  gpu-thermal                    	          	         trips      gpu-threshold           	" p        	.          passive       gpu-target          	" $        	.          passive                  gpu-crit            	" s        	.        	  critical             cooling-maps       map0            	9           	>                  tsadc@fe710000           ,rockchip,rk3568-tsadc               q                 M       s           '                  7f@ 
`                          tsadc apb_pclk                                 c           	M s        default sleep                      	d           	n           <okay                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc               r                 M       ]                             saradc apb_pclk                      Rsaradc-apb          	           <okay            	         pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default                  	  <disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                     Z     Y      	  pwm pclk                       default                  	  <disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n                      Z     Y      	  pwm pclk                       default                  	  <disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             n 0                    Z     Y      	  pwm pclk                       default                  	  <disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default                  	  <disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                     ]     \      	  pwm pclk                       default                  	  <disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o                      ]     \      	  pwm pclk                       default                  	  <disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             o 0                    ]     \      	  pwm pclk                       default                  	  <disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default                  	  <disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                     `     _      	  pwm pclk                       default                  	  <disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p                      `     _      	  pwm pclk                       default                  	  <disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm             p 0                    `     _      	  pwm pclk                       default                  	  <disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                     "     }              ref apb pipe            '      "        7                      Rphy         	           	           	           <okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                     %     ~              ref apb pipe            '      %        7                      Rphy         	           	           	           <okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                      y        pclk            	                         Rapb         c         	  <disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       z        	                  	        Rapb                    	  <disabled               U      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                               	  ref pclk                       {        	                  	        Rapb                    	  <disabled               V      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy0_480m            M                  	                       <okay       host-port           	            <okay            	                    otg-port            	            <okay                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                            phyclk          clk_usbphy1_480m            M                  	                       <okay       host-port           	            <okay            	                    otg-port            	            <okay            	                       pinctrl          ,rockchip,rk3568-pinctrl         c              ^                                  k              gpio@fdd60000            ,rockchip,gpio-bank                               M       !                 .               	        
                        
            7        L                     gpio@fe740000            ,rockchip,gpio-bank              t                 M       "                c     d         	        
                        
            7        L                    gpio@fe750000            ,rockchip,gpio-bank              u                 M       #                e     f         	        
           @            
            7        L              R      gpio@fe760000            ,rockchip,gpio-bank              v                 M       $                g     h         	        
           `            
            7        L         gpio@fe770000            ,rockchip,gpio-bank              w                 M       %                i     j         	        
                       
            7        L         pcfg-pull-up             
                 pcfg-pull-none           
%                 pcfg-pull-none-drv-level-1           
%        
2                    pcfg-pull-none-drv-level-2           
%        
2                    pcfg-pull-none-drv-level-3           
%        
2                    pcfg-pull-up-drv-level-1             
        
2                    pcfg-pull-up-drv-level-2             
        
2                    pcfg-pull-none-smt           
%         
A                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
V                                              can1       can1m0-pins          
V                                             can2       can2m0-pins          
V                                            cif       clk32k     clk32k-out0         
V                                 cpu       ebc       edpdp         emmc       emmc-bus8           
V                                                                                                           g      emmc-clk            
V                       h      emmc-cmd            
V                       i      emmc-datastrobe         
V                       j         eth0          eth1          flash         fspi       fspi-pins         `  
V                                                                                   f         gmac0      gmac0-miim           
V                                         gmac0-clkinout          
V                             gmac0-rx-bus2         0  
V                                                     gmac0-tx-bus2         0  
V                                                     gmac0-rgmii-clk          
V                                         gmac0-rgmii-bus       @  
V                                                                    gmac1      gmac1m1-miim             
V                                   K      gmac1m1-clkinout            
V                       P      gmac1m1-rx-bus2       0  
V                              	                 M      gmac1m1-tx-bus2       0  
V                                               L      gmac1m1-rgmii-clk            
V                                    N      gmac1m1-rgmii-bus         @  
V                                                           O         gpu       hdmitx     hdmitxm0-cec            
V                       Y      hdmitx-scl          
V                       W      hdmitx-sda          
V                       X         i2c0       i2c0-xfer            
V       	             
                          i2c1       i2c1-xfer            
V                                              i2c2       i2c2m0-xfer          
V                                              i2c3       i2c3m0-xfer          
V                                             i2c4       i2c4m0-xfer          
V                  
                          i2c5       i2c5m0-xfer          
V                                            i2s1       i2s1m0-lrckrx           
V                       o      i2s1m0-lrcktx           
V                       n      i2s1m0-sclkrx           
V                       m      i2s1m0-sclktx           
V                       l      i2s1m0-sdi0         
V                       p      i2s1m0-sdi1         
V      
                 q      i2s1m0-sdi2         
V      	                 r      i2s1m0-sdi3         
V                       s      i2s1m0-sdo0         
V                       t      i2s1m0-sdo1         
V                       u      i2s1m0-sdo2         
V      	                 v      i2s1m0-sdo3         
V      
                 w         i2s2       i2s2m0-lrcktx           
V                       y      i2s2m0-sclktx           
V                       x      i2s2m0-sdi          
V                       z      i2s2m0-sdo          
V                       {         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
V                       |      pdmm0-clk1          
V                       }      pdmm0-sdi0          
V                       ~      pdmm0-sdi1          
V      
                       pdmm0-sdi2          
V      	                       pdmm0-sdi3          
V                                pmic       pmic-int            
V                         !         pmu       pwm0       pwm0m0-pins         
V                        %         pwm1       pwm1m0-pins         
V                        &         pwm2       pwm2m0-pins         
V                        '         pwm3       pwm3-pins           
V                        (         pwm4       pwm4-pins           
V                                 pwm5       pwm5-pins           
V                                 pwm6       pwm6-pins           
V                                 pwm7       pwm7-pins           
V                                 pwm8       pwm8m0-pins         
V      	                          pwm9       pwm9m0-pins         
V      
                          pwm10      pwm10m0-pins            
V                                pwm11      pwm11m0-pins            
V                                pwm12      pwm12m0-pins            
V                                pwm13      pwm13m0-pins            
V                                pwm14      pwm14m0-pins            
V                                pwm15      pwm15m0-pins            
V                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
V                                                            a      sdmmc0-clk          
V                       b      sdmmc0-cmd          
V                       c      sdmmc0-det          
V                        d         sdmmc1        sdmmc2        spdif      spdifm0-tx          
V                                spi0       spi0m0-pins       0  
V                                                        spi0m0-cs0          
V                              spi0m0-cs1          
V                                 spi1       spi1m0-pins       0  
V                                                     spi1m0-cs0          
V                             spi1m0-cs1          
V                                spi2       spi2m0-pins       0  
V                                                     spi2m0-cs0          
V                             spi2m0-cs1          
V                                spi3       spi3m0-pins       0  
V                              
                       spi3m0-cs0          
V                             spi3m0-cs1          
V                                tsadc      tsadc-shutorg           
V                              tsadc-pin           
V                                  uart0      uart0-xfer           
V                                     $         uart1      uart1m0-xfer             
V                                            uart2      uart2m0-xfer             
V                                              uart3      uart3m0-xfer             
V                                             uart4      uart4m0-xfer             
V                                            uart5      uart5m0-xfer             
V                                            uart6      uart6m0-xfer             
V                                            uart7      uart7m0-xfer             
V                                            uart8      uart8m0-xfer             
V                                            uart9      uart9m0-xfer             
V                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       leds       user-led-enable-h           
V      
                           usb    vcc5v0-host-en          
V                               vcc5v0-otg-en           
V                                  pcie       pcie-reset-pin          
V                              vcc3v3-pcie-en-pin          
V                                     opp-table-0          ,operating-points-v2          
d              opp-408000000           
o    Q         
v P P 0        
  @      opp-600000000           
o    #F         
v P P 0        
  @      opp-816000000           
o    0,         
v P P 0        
  @         
      opp-1104000000          
o    Aʹ         
v   0        
  @      opp-1416000000          
o    Tfr         
v   0        
  @      opp-1608000000          
o    _"         
v   0        
  @      opp-1800000000          
o    kI         
v 0 0 0        
  @      opp-1992000000          
o    v         
v 0 0 0        
  @         opp-table-1          ,operating-points-v2            C   opp-200000000           
o             
v P P B@      opp-300000000           
o             
v P P B@      opp-400000000           
o    ׄ         
v P P B@      opp-600000000           
o    #F         
v   B@      opp-700000000           
o    )'         
v ~ ~ B@      opp-800000000           
o    /         
v B@ B@ B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                          sata pmalive rxoob          M       ^                       	  sata-phy                                   	  <disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                       qos@fe190080             ,rockchip,rk3568-qos syscon                                  <      qos@fe190100             ,rockchip,rk3568-qos syscon                                  =      qos@fe190200             ,rockchip,rk3568-qos syscon                                  >      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                	                  &      '     w        refclk_m refclk_n pclk                       Rphy         
           <okay                     pcie@fe270000            ,rockchip,rk3568-pcie                                                 (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  M                                                          "sys pmc msg legacy err          L                                `                                                                                                                      .           =           L      `              T                    	  pcie-phy                        0     @       @      '                             T  k                                                    @      @       @           dbi apb config                        Rpipe          	  <disabled       legacy-interrupt-controller          7                     L                        M                              pcie@fe280000            ,rockchip,rk3568-pcie                                            /      (                                      $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  M                                                          "sys pmc msg legacy err          L                                `                                                                                                                      .           =           L       `               T                    	  pcie-phy                        0            @      (                             T  k                                                    @             @           dbi apb config                        Rpipe            <okay            default                    
   R               
      legacy-interrupt-controller          7                     L                        M                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a               *                 M                            "macirq eth_wake_irq       @                                                    W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  Rstmmaceth           c           w                                                   <okay            '                  L                input           default                                              rgmii              R                             N          #   <        ,   /   mdio             ,snps,dwmac-mdio                              phy@0            ,ethernet-phy-ieee802.3-c22                                  stmmac-axi-config           5                                 ?           O                    rx-queues-config            _                 queue0           tx-queues-config            u                 queue0              can@fe570000             ,rockchip,rk3568v2-canfd             W                 M                       A     @      
  baud pclk                U     T      	  Rcore apb            default                  	  <disabled          can@fe580000             ,rockchip,rk3568v2-canfd             X                 M                       C     B      
  baud pclk                W     V      	  Rcore apb            default                  	  <disabled          can@fe590000             ,rockchip,rk3568v2-canfd             Y                 M                       E     D      
  baud pclk                Y     X      	  Rcore apb            default                  	  <disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                          |              ref apb pipe            '              7                      Rphy         	           	           	           <okay                     chosen          
serial2:1500000n8         regulator-dc-12v             ,regulator-fixed         dc_12v                    %        N          f                   external-gmac0-clock             ,fixed-clock         sY@        gmac0_clkin                              external-gmac1-clock             ,fixed-clock         sY@        gmac1_clkin                        J      leds          
   ,gpio-leds      led-user          	  
user-led            
on          |      
          
  
heartbeat           default                              hdmi-con             ,hdmi-connector          a      port       endpoint                          ]            regulator-pcie30-avdd0v9             ,regulator-fixed         pcie30_avdd0v9                    %        N         f            "      regulator-pcie30-avdd1v8             ,regulator-fixed         pcie30_avdd1v8                    %        N w@        f w@           "      regulator-vcc3v3-sys             ,regulator-fixed         vcc3v3_sys                    %        N 2Z        f 2Z                      "      regulator-vcc3v3-pcie            ,regulator-fixed         vcc3v3_pcie          &        N 2Z        f 2Z        default                                       9                              regulator-vcc5v0-sys             ,regulator-fixed         vcc5v0_sys                    %        N LK@        f LK@                            regulator-vcc5v0-usb             ,regulator-fixed         vcc5v0_usb                    %        N LK@        f LK@                            regulator-vcc5v0-host            ,regulator-fixed         vcc5v0_host          &                           default                                                 regulator-vcc5v0-otg             ,regulator-fixed         vcc5v0_otg           &                           default                                	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 ethernet0 ethernet1 mmc0 mmc1 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-name regulator-always-on regulator-boot-on regulator-initial-mode regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay regulator-off-in-suspend regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso clock_in_out phy-handle phy-mode snps,reset-gpio snps,reset-active-low snps,reset-delays-us tx_delay rx_delay snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes bus-width cap-sd-highspeed cd-gpios disable-wp sd-uhs-sdr104 vmmc-supply vqmmc-supply non-removable dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf reset-gpios vpcie3v3-supply stdout-path label default-state linux,default-trigger retain-state-suspended vin-supply enable-active-high startup-delay-us 