  w   8     (                                                                                 '   ,friendlyarm,nanopi-r5c rockchip,rk3568           7FriendlyElec NanoPi R5C    aliases          =/pinctrl/gpio@fdd60000           C/pinctrl/gpio@fe740000           I/pinctrl/gpio@fe750000           O/pinctrl/gpio@fe760000           U/pinctrl/gpio@fe770000           [/i2c@fdd40000            `/i2c@fe5a0000            e/i2c@fe5b0000            j/i2c@fe5c0000            o/i2c@fe5d0000            t/i2c@fe5e0000            y/serial@fdd50000             /serial@fe650000             /serial@fe660000             /serial@fe670000             /serial@fe680000             /serial@fe690000             /serial@fe6a0000             /serial@fe6b0000             /serial@fe6c0000             /serial@fe6d0000             /spi@fe610000            /spi@fe620000            /spi@fe630000            /spi@fe640000            /mmc@fe2b0000            /mmc@fe310000            /i2c@fe5e0000/rtc@51          cpus                                 cpu@0            cpu          ,arm,cortex-a55                                                      psci                        -   @        ?           L           Y   @        k           x                                    
      cpu@100          cpu          ,arm,cortex-a55                                     psci                        -   @        ?           L           Y   @        k           x                                          cpu@200          cpu          ,arm,cortex-a55                                     psci                        -   @        ?           L           Y   @        k           x                                          cpu@300          cpu          ,arm,cortex-a55                                     psci                        -   @        ?           L           Y   @        k           x                                             l3-cache             ,cache                               "           /   @        A                    display-subsystem            ,rockchip,display-subsystem                   firmware       scmi             ,arm,scmi-smc            Ђ                                          protocol@14                                               hdmi-sound           ,simple-audio-card           HDMI            i2s                    8okay       simple-audio-card,codec         ?         simple-audio-card,cpu           ?   	         pmu          ,arm,cortex-a55-pmu        0  I                                                T   
               psci             ,arm,psci-1.0            smc       reserved-memory                                   g   shmem@10f000             ,arm,scmi-shmem                                 n                    timer            ,arm,armv8-timer       0  I                                 
            u      xin24m           ,fixed-clock         n6         xin24m                               xin32k           ,fixed-clock                    xin32k                     default                   sata@fc400000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci               @                                            sata pmalive rxoob          I       _                       	  sata-phy                                   	  8disabled          sata@fc800000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                           sata pmalive rxoob          I       `                       	  sata-phy                                   	  8disabled          usb@fcc00000             ,rockchip,rk3568-dwc3 snps,dwc3                      @          I                                             ref_clk suspend_clk bus_clk         host          
  
utmi_wide                                                8okay                             usb2-phy usb3-phy           3         usb@fd000000             ,rockchip,rk3568-dwc3 snps,dwc3                       @          I                                             ref_clk suspend_clk bus_clk         host                             usb2-phy usb3-phy         
  
utmi_wide                                                8okay          interrupt-controller@fd400000            ,arm,gic-v3                @             F                 I      	            :        O           `    A          j  (            u         g                                                msi-controller@fd440000          ,arm,gic-v3-its               D                           u                      Z         usb@fd800000             ,generic-ehci                                  I                                                        usb         8okay          usb@fd840000             ,generic-ohci                                  I                                                        usb         8okay          usb@fd880000             ,generic-ehci                                  I                                                        usb         8okay          usb@fd8c0000             ,generic-ohci                                  I                                                        usb         8okay          syscon@fdc20000       )   ,rockchip,rk3568-pmugrf syscon simple-mfd                                     X   io-domains        &   ,rockchip,rk3568-pmu-io-voltage-domain           8okay                                                                                                     syscon@fdc50000                                 ,rockchip,rk3568-pipe-grf syscon                  syscon@fdc60000       &   ,rockchip,rk3568-grf syscon simple-mfd                                           syscon@fdc80000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdc90000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        syscon@fdca0000       #   ,rockchip,rk3568-usb2phy-grf syscon                                         syscon@fdca8000       #   ,rockchip,rk3568-usb2phy-grf syscon               ʀ                         clock-controller@fdd00000            ,rockchip,rk3568-pmucru                                                               clock-controller@fdd20000            ,rockchip,rk3568-cru                                           xin24m                                                          ,   G          A              X                     i2c@fdd40000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c                               I       .                        -      	  i2c pclk               !        default                                   8okay       regulator@1c             ,tcs,tcs4525                     e           vdd_cpu                            5          0                     "              regulator-state-mem                   pmic@20          ,rockchip,rk809                            #        I                         default            $                  8   %        D   %        P   %        \   %        h   %        t   %           %           %           %            regulators     DCDC_REG1         
  vdd_logic                                                   p          q   regulator-state-mem                   DCDC_REG2           vdd_gpu                                        p          q           G   regulator-state-mem                   DCDC_REG3           vcc_ddr                                 regulator-state-mem                   DCDC_REG4           vdd_npu                               p          q   regulator-state-mem                   DCDC_REG5           vcc_1v8                            w@         w@              regulator-state-mem                   LDO_REG1            vdda0v9_image            ~         ~           T   regulator-state-mem                   LDO_REG2          	  vdda_0v9                                           regulator-state-mem                   LDO_REG3            vdda0v9_pmu                                        regulator-state-mem                            LDO_REG4            vccio_acodec             2Z         2Z              regulator-state-mem                   LDO_REG5          	  vccio_sd             w@         2Z              regulator-state-mem                   LDO_REG6            vcc3v3_pmu                             2Z         2Z              regulator-state-mem                   2Z         LDO_REG7          	  vcca_1v8                               w@         w@              regulator-state-mem                   LDO_REG8            vcca1v8_pmu                            w@         w@   regulator-state-mem                   w@         LDO_REG9            vcca1v8_image            w@         w@           U   regulator-state-mem                   SWITCH_REG1         vcc_3v3                                 regulator-state-mem                   SWITCH_REG2       
  vcc3v3_sd                                ]   regulator-state-mem                            serial@fdd50000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                                 I       t                        ,        baudclk apb_pclk               &       &              '        default                             	  8disabled          pwm@fdd70000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               (        default                  	  8disabled          pwm@fdd70010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                           0      	  pwm pclk               )        default                  	  8disabled          pwm@fdd70020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm                                            0      	  pwm pclk               *        default                  	  8disabled          pwm@fdd70030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm               0                            0      	  pwm pclk               +        default                  	  8disabled          power-management@fdd90000         &   ,rockchip,rk3568-pmu syscon simple-mfd                            power-controller          !   ,rockchip,rk3568-power-controller            $                                           power-domain@7                                           8   ,        $          power-domain@8                                           8   -   .   /        $          power-domain@9              	                                   8   0   1   2        $          power-domain@10             
                             8   3   4   5   6   7   8        $          power-domain@11                                    8   9        $          power-domain@13                                   8   :        $          power-domain@14                                   8   ;   <   =        $          power-domain@15                                     8   >   ?   @   A   B   C   D   E        $                gpu@fde60000          &   ,rockchip,rk3568-mali arm,mali-bifrost                        @       $  I       (          )          '           ?job mmu gpu                              gpu bus                                  8okay               F        O   G                 video-codec@fdea0400             ,rockchip,rk3568-vpu                               I                  ?vdpu                               
  aclk hclk           [   H                    iommu@fdea0800           ,rockchip,rk3568-iommu                        @        I                  aclk iface                                             b               H      rga@fdeb0000          (   ,rockchip,rk3568-rga rockchip,rk3288-rga                              I       Z                                      aclk hclk sclk               &     $     %        ocore axi ahb                  
      video-codec@fdee0000             ,rockchip,rk3568-vepu                                  I       @                              
  aclk hclk           [   I              
      iommu@fdee0800           ,rockchip,rk3568-iommu                        @        I       ?                                aclk iface                
        b               I      mmc@fe000000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc                       @         I       d                                           biu ciu ciu-drive ciu-sample            {           р                      oreset         	  8disabled          ethernet@fe010000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                                 I                             ?macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  ostmmaceth           X               J                    K           L               	  8disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                     J      rx-queues-config                          K   queue0           tx-queues-config            $              L   queue0              vop@fe040000                          0     @                :vop gamma-lut           I                (                                       %  aclk hclk dclk_vp0 dclk_vp1 dclk_vp2            [   M              	        X            8okay             ,rockchip,rk3568-vop                             A               ports                                           port@0                                            endpoint@2                      D   N           V         port@1                                              port@2                                                    iommu@fe043e00           ,rockchip,rk3568-iommu                 >            ?                I                                       aclk iface          b                  	        8okay               M      dsi@fe060000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 I       D           pclk                           dphy               O              	        oapb                      X          	  8disabled       ports                                port@0                     port@1                          dsi@fe070000          *   ,rockchip,rk3568-mipi-dsi snps,dw-mipi-dsi                                 I       E           pclk                           dphy               P              	        oapb                      X          	  8disabled       ports                                port@0                     port@1                          hdmi@fe0a0000            ,rockchip,rk3568-dw-hdmi              
                 I       -         (                          (              iahb isfr cec ref           default            Q   R   S              	                   X            T            8okay            e   T        u   U              ports                                port@0                  endpoint            D   V           N         port@1                 endpoint            D   W                          qos@fe128000             ,rockchip,rk3568-qos syscon                                   ,      qos@fe138080             ,rockchip,rk3568-qos syscon                                  ;      qos@fe138100             ,rockchip,rk3568-qos syscon                                   <      qos@fe138180             ,rockchip,rk3568-qos syscon                                  =      qos@fe148000             ,rockchip,rk3568-qos syscon                                   -      qos@fe148080             ,rockchip,rk3568-qos syscon                                  .      qos@fe148100             ,rockchip,rk3568-qos syscon                                   /      qos@fe150000             ,rockchip,rk3568-qos syscon                                    9      qos@fe158000             ,rockchip,rk3568-qos syscon                                   3      qos@fe158100             ,rockchip,rk3568-qos syscon                                   4      qos@fe158180             ,rockchip,rk3568-qos syscon                                  5      qos@fe158200             ,rockchip,rk3568-qos syscon                                   6      qos@fe158280             ,rockchip,rk3568-qos syscon                                  7      qos@fe158300             ,rockchip,rk3568-qos syscon                                   8      qos@fe180000             ,rockchip,rk3568-qos syscon                               qos@fe190000             ,rockchip,rk3568-qos syscon                                    >      qos@fe190280             ,rockchip,rk3568-qos syscon                                  B      qos@fe190300             ,rockchip,rk3568-qos syscon                                   C      qos@fe190380             ,rockchip,rk3568-qos syscon                                  D      qos@fe190400             ,rockchip,rk3568-qos syscon                                   E      qos@fe198000             ,rockchip,rk3568-qos syscon                                   :      qos@fe1a8000             ,rockchip,rk3568-qos syscon                                   0      qos@fe1a8080             ,rockchip,rk3568-qos syscon                                  1      qos@fe1a8100             ,rockchip,rk3568-qos syscon                                   2      dfi@fe230000             ,rockchip,rk3568-dfi              #                 I                     X      pcie@fe260000            ,rockchip,rk3568-pcie          0              @      &                               :dbi apb config        <  I       K          J          I          H          G           ?sys pmc msg legacy err                       (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci         O                                `                    Y                      Y                     Y                     Y                                                               Z                                      	  pcie-phy                        T  g                                                    @              @                         opipe                                     8okay            default            [           \          legacy-interrupt-controller                      O            :                     I       H              Y         mmc@fe2b0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              +        @         I       b                                           biu ciu ciu-drive ciu-sample            {           р                      oreset           8okay                      !        (            2         D         U        `   ]        l           default            ^   _   `   a      mmc@fe2c0000          0   ,rockchip,rk3568-dw-mshc rockchip,rk3288-dw-mshc              ,        @         I       c                                           biu ciu ciu-drive ciu-sample            {           р                      oreset         	  8disabled          spi@fe300000             ,rockchip,sfc                 0        @         I       e                  x      v        clk_sfc hclk_sfc               b        default       	  8disabled          mmc@fe310000             ,rockchip,rk3568-dwcmshc              1                 I                        {      }        , n6       (         |      z      y      {      }        core bus axi block timer            8okay            (                     y                 default            c   d   e   f        `           l         rng@fe388000             ,rockchip,rk3568-rng              8       @                p      o      	  core ahb                  m        8okay          i2s@fe400000             ,rockchip,rk3568-i2s-tdm              @                 I       4                 =      A        ,Fq Fq                ?      C      9        mclk_tx mclk_rx hclk               g            tx                P      Q      
  otx-m rx-m           X            T            8okay               	      i2s@fe410000             ,rockchip,rk3568-i2s-tdm              A                 I       5                 E      I        ,Fq Fq                G      K      :        mclk_tx mclk_rx hclk               g      g           rx tx                 R      S      
  otx-m rx-m           X            default       0     h   i   j   k   l   m   n   o   p   q   r   s        T          	  8disabled          i2s@fe420000             ,rockchip,rk3568-i2s-tdm              B                 I       6                 M        ,Fq                O      O      ;        mclk_tx mclk_rx hclk               g      g           tx rx                 T        otx-m            X            default            t   u   v   w        T          	  8disabled          i2s@fe430000             ,rockchip,rk3568-i2s-tdm              C                 I       7                  S      W      <        mclk_tx mclk_rx hclk               g      g           tx rx                 U      V      
  otx-m rx-m           X            T          	  8disabled          pdm@fe440000             ,rockchip,rk3568-pdm              D                 I       L                  Z      Y        pdm_clk pdm_hclk               g   	        rx             x   y   z   {   |   }        default               X        opdm-m           T          	  8disabled          spdif@fe460000           ,rockchip,rk3568-spdif                F                 I       f         
  mclk hclk                  _      \           g           tx          default            ~        T          	  8disabled          dma-controller@fe530000          ,arm,pl330 arm,primecell              S        @         I                                                 	  apb_pclk                          &      dma-controller@fe550000          ,arm,pl330 arm,primecell              U        @         I                                                 	  apb_pclk                          g      i2c@fe5a0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              Z                 I       /                 H     G      	  i2c pclk                       default                                 	  8disabled          i2c@fe5b0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              [                 I       0                 J     I      	  i2c pclk                       default                                 	  8disabled          i2c@fe5c0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              \                 I       1                 L     K      	  i2c pclk                       default                                 	  8disabled          i2c@fe5d0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ]                 I       2                 N     M      	  i2c pclk                       default                                 	  8disabled          i2c@fe5e0000          (   ,rockchip,rk3568-i2c rockchip,rk3399-i2c              ^                 I       3                 P     O      	  i2c pclk                       default                                   8okay       rtc@51           ,haoyu,hym8563               Q             #        I                          rtcic_32kout            default                              watchdog@fe600000             ,rockchip,rk3568-wdt snps,dw-wdt              `                 I                                   
  tclk pclk         spi@fe610000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              a                 I       g                 R     Q        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          spi@fe620000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              b                 I       h                 T     S        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          spi@fe630000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              c                 I       i                 V     U        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          spi@fe640000          (   ,rockchip,rk3568-spi rockchip,rk3066-spi              d                 I       j                 X     W        spiclk apb_pclk            &      &           tx rx           default                                                  	  8disabled          serial@fe650000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                e                 I       u                              baudclk apb_pclk               &      &                      default                             	  8disabled          serial@fe660000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                f                 I       v                 #              baudclk apb_pclk               &      &                      default                               8okay          serial@fe670000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                g                 I       w                 '     $        baudclk apb_pclk               &      &                      default                             	  8disabled          serial@fe680000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                h                 I       x                 +     (        baudclk apb_pclk               &      &   	                   default                             	  8disabled          serial@fe690000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                i                 I       y                 /     ,        baudclk apb_pclk               &   
   &                      default                             	  8disabled          serial@fe6a0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                j                 I       z                 3     0        baudclk apb_pclk               &      &                      default                             	  8disabled          serial@fe6b0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                k                 I       {                 7     4        baudclk apb_pclk               &      &                      default                             	  8disabled          serial@fe6c0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                l                 I       |                 ;     8        baudclk apb_pclk               &      &                      default                             	  8disabled          serial@fe6d0000       &   ,rockchip,rk3568-uart snps,dw-apb-uart                m                 I       }                 ?     <        baudclk apb_pclk               &      &                      default                             	  8disabled          thermal-zones      cpu-thermal            d                            trips      cpu_alert0           p        	           passive                  cpu_alert1           $        	           passive       cpu_crit             s        	        	   critical             cooling-maps       map0            	         0  	   
                     gpu-thermal                                       trips      gpu-threshold            p        	           passive       gpu-target           $        	           passive                  gpu-crit             s        	        	   critical             cooling-maps       map0            	           	                  tsadc@fe710000           ,rockchip,rk3568-tsadc                q                 I       s                             ,f@ 
`                           tsadc apb_pclk                                 X            	! s        default sleep                      	8           	B           8okay            	X           	o                     saradc@fe720000       .   ,rockchip,rk3568-saradc rockchip,rk3399-saradc                r                 I       ]                              saradc apb_pclk                      osaradc-apb          	           8okay            	                    pwm@fe6e0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  8disabled          pwm@fe6e0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                      Z     Y      	  pwm pclk                       default                  	  8disabled          pwm@fe6e0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n                       Z     Y      	  pwm pclk                       default                  	  8disabled          pwm@fe6e0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              n 0                     Z     Y      	  pwm pclk                       default                  	  8disabled          pwm@fe6f0000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  8disabled          pwm@fe6f0010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                      ]     \      	  pwm pclk                       default                  	  8disabled          pwm@fe6f0020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o                       ]     \      	  pwm pclk                       default                  	  8disabled          pwm@fe6f0030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              o 0                     ]     \      	  pwm pclk                       default                  	  8disabled          pwm@fe700000          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  8disabled          pwm@fe700010          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                      `     _      	  pwm pclk                       default                  	  8disabled          pwm@fe700020          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p                       `     _      	  pwm pclk                       default                  	  8disabled          pwm@fe700030          (   ,rockchip,rk3568-pwm rockchip,rk3328-pwm              p 0                     `     _      	  pwm pclk                       default                  	  8disabled          phy@fe830000             ,rockchip,rk3568-naneng-combphy                                       "     }              ref apb pipe                  "        ,                      ophy         	           	           	           8okay                     phy@fe840000             ,rockchip,rk3568-naneng-combphy                                       %     ~              ref apb pipe                  %        ,                      ophy         	           	           	           8okay                     phy@fe870000             ,rockchip,rk3568-csi-dphy                                        y        pclk            	                         oapb         X          	  8disabled          mipi-dphy@fe850000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        z        	                  	        oapb                    	  8disabled               O      mipi-dphy@fe860000           ,rockchip,rk3568-dsi-dphy                                	  ref pclk                        {        	                  	        oapb                    	  8disabled               P      usb2phy@fe8a0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy0_480m            I                  	                       8okay                  host-port           	            8okay            	                    otg-port            	            8okay                        usb2phy@fe8b0000             ,rockchip,rk3568-usb2phy                                              phyclk          clk_usbphy1_480m            I                  	                       8okay       host-port           	            8okay            	                    otg-port            	            8okay                        pinctrl          ,rockchip,rk3568-pinctrl         X               X                                  g              gpio@fdd60000            ,rockchip,gpio-bank                                I       !                  .               	        
                       
            :        O              #      gpio@fe740000            ,rockchip,gpio-bank               t                 I       "                 c     d         	        
                       
            :        O         gpio@fe750000            ,rockchip,gpio-bank               u                 I       #                 e     f         	        
          @            
            :        O         gpio@fe760000            ,rockchip,gpio-bank               v                 I       $                 g     h         	        
          `            
            :        O              \      gpio@fe770000            ,rockchip,gpio-bank               w                 I       %                 i     j         	        
                      
            :        O         pcfg-pull-up             
                 pcfg-pull-none           
+                 pcfg-pull-none-drv-level-1           
+        
8                    pcfg-pull-none-drv-level-2           
+        
8                    pcfg-pull-none-drv-level-3           
+        
8                    pcfg-pull-up-drv-level-1             
        
8                    pcfg-pull-up-drv-level-2             
        
8                    pcfg-pull-none-smt           
+         
G                 acodec        audiopwm          bt656         bt1120        cam       can0       can0m0-pins          
\                                              can1       can1m0-pins          
\                                             can2       can2m0-pins          
\                                            cif       clk32k     clk32k-out0         
\                                 cpu       ebc       edpdp         emmc       emmc-bus8           
\                                                                                                           c      emmc-clk            
\                       d      emmc-cmd            
\                       e      emmc-datastrobe         
\                       f         eth0          eth1          flash         fspi       fspi-pins         `  
\                                                                                   b         gmac0         gmac1         gpu       hdmitx     hdmitxm0-cec            
\                       S      hdmitx-scl          
\                       Q      hdmitx-sda          
\                       R         i2c0       i2c0-xfer            
\       	             
                 !         i2c1       i2c1-xfer            
\                                              i2c2       i2c2m0-xfer          
\                                              i2c3       i2c3m0-xfer          
\                                             i2c4       i2c4m0-xfer          
\                  
                          i2c5       i2c5m0-xfer          
\                                            i2s1       i2s1m0-lrckrx           
\                       k      i2s1m0-lrcktx           
\                       j      i2s1m0-sclkrx           
\                       i      i2s1m0-sclktx           
\                       h      i2s1m0-sdi0         
\                       l      i2s1m0-sdi1         
\      
                 m      i2s1m0-sdi2         
\      	                 n      i2s1m0-sdi3         
\                       o      i2s1m0-sdo0         
\                       p      i2s1m0-sdo1         
\                       q      i2s1m0-sdo2         
\      	                 r      i2s1m0-sdo3         
\      
                 s         i2s2       i2s2m0-lrcktx           
\                       u      i2s2m0-sclktx           
\                       t      i2s2m0-sdi          
\                       v      i2s2m0-sdo          
\                       w         i2s3          isp       jtag          lcdc          mcu       npu       pcie20        pcie30x1          pcie30x2          pdm    pdmm0-clk           
\                       x      pdmm0-clk1          
\                       y      pdmm0-sdi0          
\                       z      pdmm0-sdi1          
\      
                 {      pdmm0-sdi2          
\      	                 |      pdmm0-sdi3          
\                       }         pmic       pmic-int            
\                         $         pmu       pwm0       pwm0m0-pins         
\                        (         pwm1       pwm1m0-pins         
\                        )         pwm2       pwm2m0-pins         
\                        *         pwm3       pwm3-pins           
\                        +         pwm4       pwm4-pins           
\                                 pwm5       pwm5-pins           
\                                 pwm6       pwm6-pins           
\                                 pwm7       pwm7-pins           
\                                 pwm8       pwm8m0-pins         
\      	                          pwm9       pwm9m0-pins         
\      
                          pwm10      pwm10m0-pins            
\                                pwm11      pwm11m0-pins            
\                                pwm12      pwm12m0-pins            
\                                pwm13      pwm13m0-pins            
\                                pwm14      pwm14m0-pins            
\                                pwm15      pwm15m0-pins            
\                                refclk        sata          sata0         sata1         sata2         scr       sdmmc0     sdmmc0-bus4       @  
\                                                            ^      sdmmc0-clk          
\                       _      sdmmc0-cmd          
\                       `      sdmmc0-det          
\                        a         sdmmc1        sdmmc2        spdif      spdifm0-tx          
\                       ~         spi0       spi0m0-pins       0  
\                                                        spi0m0-cs0          
\                              spi0m0-cs1          
\                                 spi1       spi1m0-pins       0  
\                                                     spi1m0-cs0          
\                             spi1m0-cs1          
\                                spi2       spi2m0-pins       0  
\                                                     spi2m0-cs0          
\                             spi2m0-cs1          
\                                spi3       spi3m0-pins       0  
\                              
                       spi3m0-cs0          
\                             spi3m0-cs1          
\                                tsadc      tsadc-shutorg           
\                              tsadc-pin           
\                                  uart0      uart0-xfer           
\                                     '         uart1      uart1m0-xfer             
\                                            uart2      uart2m0-xfer             
\                                              uart3      uart3m0-xfer             
\                                             uart4      uart4m0-xfer             
\                                            uart5      uart5m0-xfer             
\                                            uart6      uart6m0-xfer             
\                                            uart7      uart7m0-xfer             
\                                            uart8      uart8m0-xfer             
\                                            uart9      uart9m0-xfer             
\                                            vop       spi0-hs       spi1-hs       spi2-hs       spi3-hs       gmac-txd-level3       gmac-txc-level2       hym8563    hym8563-int         
\                                  usb    vcc5v0-usb-host-en          
\                               vcc5v0-usb-otg-en           
\                                  gpio-leds      lan-led-pin         
\                              power-led-pin           
\                              wan-led-pin         
\                              wlan-led-pin            
\                                 pcie       pcie20-reset-pin            
\                        [         rockchip-key       reset-button-pin            
\                                     opp-table-0          ,operating-points-v2          
j              opp-408000000           
u    Q         
| P P 0        
  @      opp-600000000           
u    #F         
| P P 0        
  @      opp-816000000           
u    0,         
| P P 0        
  @         
      opp-1104000000          
u    Aʹ         
|   0        
  @      opp-1416000000          
u    Tfr         
|   0        
  @      opp-1608000000          
u    _"         
|   0        
  @      opp-1800000000          
u    kI         
| 0 0 0        
  @      opp-1992000000          
u    v         
| 0 0 0        
  @         opp-table-1          ,operating-points-v2            F   opp-200000000           
u             
| P P B@      opp-300000000           
u             
| P P B@      opp-400000000           
u    ׄ         
| P P B@      opp-600000000           
u    #F         
|   B@      opp-700000000           
u    )'         
| ~ ~ B@      opp-800000000           
u    /         
| B@ B@ B@         sata@fc000000         '   ,rockchip,rk3568-dwc-ahci snps,dwc-ahci                                                            sata pmalive rxoob          I       ^                       	  sata-phy                                   	  8disabled          syscon@fdc70000       $   ,rockchip,rk3568-pipe-phy-grf syscon                                        qos@fe190080             ,rockchip,rk3568-qos syscon                                   ?      qos@fe190100             ,rockchip,rk3568-qos syscon                                   @      qos@fe190200             ,rockchip,rk3568-qos syscon                                   A      syscon@fdcb8000       %   ,rockchip,rk3568-pcie3-phy-grf syscon                 ˀ                         phy@fe8c0000             ,rockchip,rk3568-pcie3-phy                                 	                   &      '     w        refclk_m refclk_n pclk                       ophy         
           8okay            
                       pcie@fe270000            ,rockchip,rk3568-pcie                                                 (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  I                                                          ?sys pmc msg legacy err          O                                `                                                                                                                                                 Z                                  	  pcie-phy                        0      @       @      '                             T  g                                                    @      @       @           :dbi apb config                        opipe            8okay               #                
      legacy-interrupt-controller          :                     O                        I                              pcie@fe280000            ,rockchip,rk3568-pcie                                            /      (                                       $  aclk_mst aclk_slv aclk_dbi pclk aux          pci       <  I                                                          ?sys pmc msg legacy err          O                                `                                                                                                                                                  Z                                   	  pcie-phy                        0             @      (                             T  g                                                    @             @           :dbi apb config                        opipe            8okay               #               
      legacy-interrupt-controller          :                     O                        I                              ethernet@fe2a0000         &   ,rockchip,rk3568-gmac snps,dwmac-4.20a                *                 I                            ?macirq eth_wake_irq       @                                                     W  stmmaceth mac_clk_rx mac_clk_tx clk_mac_refout aclk_mac pclk_mac clk_mac_speed ptp_ref                      
  ostmmaceth           X                                                             	  8disabled       mdio             ,snps,dwmac-mdio                                 stmmac-axi-config                                                                           rx-queues-config                             queue0           tx-queues-config            $                 queue0              can@fe570000             ,rockchip,rk3568v2-canfd              W                 I                        A     @      
  baud pclk                U     T      	  ocore apb            default                  	  8disabled          can@fe580000             ,rockchip,rk3568v2-canfd              X                 I                        C     B      
  baud pclk                W     V      	  ocore apb            default                  	  8disabled          can@fe590000             ,rockchip,rk3568v2-canfd              Y                 I                        E     D      
  baud pclk                Y     X      	  ocore apb            default                  	  8disabled          phy@fe820000             ,rockchip,rk3568-naneng-combphy                                            |              ref apb pipe                          ,                      ophy         	           	           	           8okay                     chosen          
serial2:1500000n8         adc-keys          	   ,adc-keys            
               
buttons         
 w@           d   button-maskrom          $MASKROM         *           5             hdmi-con             ,hdmi-connector           a      port       endpoint            D              W            regulator-vdd-usbc           ,regulator-fixed       	  vdd_usbc                               LK@         LK@                 regulator-vcc3v3-sys             ,regulator-fixed         vcc3v3_sys                             2Z         2Z                      %      regulator-vcc5v0-sys             ,regulator-fixed         vcc5v0_sys                             LK@         LK@                      "      regulator-vcc3v3-pcie            ,regulator-fixed         vcc3v3_pcie          2Z         2Z         O           #               b @           "                 regulator-vcc5v0-usb             ,regulator-fixed         vcc5v0_usb                             LK@         LK@                            regulator-vcc5v0-usb-host            ,regulator-fixed          O        s   #               default                    vcc5v0_usb_host                            LK@         LK@                            regulator-vcc5v0-usb-otg             ,regulator-fixed          O        s   #               default                    vcc5v0_usb_otg           LK@         LK@                            regulator-pcie30-avdd0v9             ,regulator-fixed         pcie30_avdd0v9                                                 %      regulator-pcie30-avdd1v8             ,regulator-fixed         pcie30_avdd1v8                             w@         w@           %      gpio-keys         
   ,gpio-keys           default               button-reset            x   2           #              $reset           *           gpio-leds         
   ,gpio-leds           default                        led-lan                    lan            \             led-power                      power         
  heartbeat              \             led-wan                    wan            \             led-wlan                       wlan               \                   	interrupt-parent #address-cells #size-cells compatible model gpio0 gpio1 gpio2 gpio3 gpio4 i2c0 i2c1 i2c2 i2c3 i2c4 i2c5 serial0 serial1 serial2 serial3 serial4 serial5 serial6 serial7 serial8 serial9 spi0 spi1 spi2 spi3 mmc0 mmc1 rtc0 device_type reg clocks #cooling-cells enable-method i-cache-size i-cache-line-size i-cache-sets d-cache-size d-cache-line-size d-cache-sets next-level-cache operating-points-v2 cpu-supply phandle cache-level cache-unified ports arm,smc-id shmem #clock-cells simple-audio-card,name simple-audio-card,format simple-audio-card,mclk-fs status sound-dai interrupts interrupt-affinity ranges no-map arm,no-tick-in-suspend clock-frequency clock-output-names pinctrl-0 pinctrl-names clock-names phys phy-names ports-implemented power-domains dr_mode phy_type resets snps,dis_u2_susphy_quirk extcon interrupt-controller #interrupt-cells mbi-alias mbi-ranges msi-controller dma-noncoherent #msi-cells pmuio1-supply pmuio2-supply vccio1-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply vccio7-supply #reset-cells assigned-clocks assigned-clock-rates assigned-clock-parents rockchip,grf fcs,suspend-voltage-selector regulator-name regulator-always-on regulator-boot-on regulator-min-microvolt regulator-max-microvolt regulator-ramp-delay vin-supply regulator-off-in-suspend system-power-controller vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply vcc7-supply vcc8-supply vcc9-supply wakeup-source regulator-initial-mode regulator-on-in-suspend regulator-suspend-microvolt dmas reg-io-width reg-shift #pwm-cells #power-domain-cells pm_qos interrupt-names mali-supply iommus #iommu-cells reset-names fifo-depth max-frequency snps,axi-config snps,mixed-burst snps,mtl-rx-config snps,mtl-tx-config snps,tso snps,blen snps,rd_osr_lmt snps,wr_osr_lmt snps,rx-queues-to-use snps,tx-queues-to-use reg-names remote-endpoint #sound-dai-cells avdd-0v9-supply avdd-1v8-supply rockchip,pmu bus-range interrupt-map-mask interrupt-map linux,pci-domain num-ib-windows num-ob-windows max-link-speed msi-map num-lanes reset-gpios no-sdio no-mmc bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp vmmc-supply vqmmc-supply mmc-hs200-1_8v non-removable dma-names arm,pl330-periph-burst #dma-cells polling-delay-passive polling-delay thermal-sensors temperature hysteresis trip cooling-device rockchip,hw-tshut-temp pinctrl-1 #thermal-sensor-cells rockchip,hw-tshut-mode rockchip,hw-tshut-polarity #io-channel-cells vref-supply rockchip,pipe-grf rockchip,pipe-phy-grf #phy-cells rockchip,usbgrf phy-supply gpio-controller gpio-ranges #gpio-cells bias-pull-up bias-disable drive-strength input-schmitt-enable rockchip,pins opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend rockchip,phy-grf data-lanes vpcie3v3-supply stdout-path io-channels io-channel-names keyup-threshold-microvolt poll-interval label linux,code press-threshold-microvolt enable-active-high startup-delay-us gpio debounce-interval color function linux,default-trigger 